High linearity wiGig baseband amplifier with channel selection filter

Abstract

A circuit includes a Sallen-Key filter and a programmable gain amplifier coupled to the Sallen-Key filter, the Sallen-Key filter including a source follower implementing a unity gain amplifier. The circuit is capable of implementing a programmable gain that decouples the bandwidth of the circuit from its gain setting via adjustment of a current mirror replication ratio in the programmable gain amplifier. The programmable gain amplifier can include a differential voltage-to-current converter, a current mirror pair, and a programmable output gain stage. At least one leg in the Sallen-Key filter and the programmable gain amplifier can include transistors arranged in the same circuit configuration.

Description

[0001] This application is a divisional application of Chinese invention patent application filed on November 16, 2016, with application number CN201680067166.2 and invention title "High Linearity WiGig Baseband Amplifier with Channel Selection Filter".

[0002] Cross-references to related applications

[0003] This application claims priority to U.S. Provisional Application No. 62 / 256,460, filed November 17, 2015. This reference and all other external references are incorporated herein by reference in their entirety. Technical Field

[0004] The present invention generally relates to circuits including filters and programmable gain amplifiers, and more particularly to circuits providing independent filter bandwidth control and gain. Background Technology

[0005] The background description includes information that may be useful for understanding the invention. It is not an admission that any information provided herein is prior art or related to the currently claimed invention, or that any publications, express or implied, referenced are prior art.

[0006] The performance requirements of the WiGig baseband signal processing system are three times higher. Based on the input signal level, it is desirable to generate sufficient gain at the baseband output for maximum signal-to-noise ratio (SNR). It is also desirable to attenuate out-of-band signals relative to a specified rejection level and to be able to accommodate input signals with high dynamic range while maintaining high linearity.

[0007] Figure 1 This is a diagram of a baseband system where the filter function is implemented using a first dedicated amplifier in a closed-loop configuration, coupled to a second dedicated amplifier configured to provide programmable gain. The first stage is a Sallen-Key filter with a large input impedance and a small output impedance. The input to the filter is connected to resistor R1, and its output is coupled to resistor R2 and to output V. out Capacitor C3. Resistor R2 is coupled to capacitor C4 (which is grounded) and the positive input terminal of the operational amplifier. Output terminal V out It is directly coupled to the negative input of the operational amplifier to act as a unity-gain buffer. The operational amplifier provides high gain and allows a second-order filter to be built without using an inductor. In this case, the impedance depicted in this Sallen-Key filter provides a low-pass filter. These filters can be designed as low-pass, high-pass, or band-pass filters. The second stage is via... Figure 1 The adjustable impedance R described in the figure adj(1) and R adj(2)Offers adjustable gain. Summary of the Invention

[0008] The following description includes information that may be useful for understanding the invention. It is not intended to imply that the information provided herein is prior art or related to the currently claimed invention, or that any publications, express or implied, referenced are prior art.

[0009] In one aspect of this disclosure, a WiGig baseband signal processing circuit includes: a first-stage filter including a source follower constituting a unity-gain amplifier; and a programmable gain amplifier coupled to the first-stage filter. The baseband signal processing circuit is configured to provide at least a programmable gain by adjusting at least the current mirror replication ratio in the programmable gain amplifier to decouple the bandwidth setting of the baseband signal processing circuit from its gain setting. The programmable gain amplifier includes a differential voltage-to-current converter, a current mirror pair, and a programmable output, a first gain stage, and a second gain stage. The differential voltage-to-current converter and the first current mirror share a first transistor, and the differential voltage-to-current converter and the second current mirror share a second transistor.

[0010] In another aspect, a circuit includes a Sallen-Key filter and a programmable gain amplifier coupled to the Sallen-Key filter. The Sallen-Key filter includes a source follower implementing a unity-gain amplifier. The programmable gain amplifier is configured to provide programmable gain via adjusting the current mirror replication ratio in the programmable gain amplifier to decouple the bandwidth of the circuit from its gain setting. The programmable gain amplifier may include a differential voltage-to-current converter, a current mirror pair, and a programmable output gain stage. In some aspects, the circuit is configured to function as a low-pass filter, a high-pass filter, or a band-pass filter.

[0011] In another aspect, a circuit includes a Sallen-Key filter coupled to a programmable gain amplifier, wherein the circuit includes a source follower within the Sallen-Key filter, the source follower including a first plurality of transistors arranged in a first circuit configuration; and at least one branch within the programmable gain amplifier includes at least a second plurality of transistors arranged in at least a second circuit configuration identical to the first circuit configuration. In some aspects, the first and at least the second plurality of transistors have the same unit device size and current density. The circuit may have a fabrication layout comprising a uniform array of unit devices. Methods for fabricating this circuit and other circuits are disclosed herein.

[0012] On the other hand, a method is provided for avoiding linear dependence on the operating region of transistors in an amplifier within a Sallen-Key filter. The method includes employing a source follower in the Sallen-Key filter to provide unity gain, the source follower comprising an active device and a load device; and selecting the DC level of the input signal to the Sallen-Key filter to ensure sufficient headroom for at least one of the load device and a device in a current mirror pair used as a programmable amplifier.

[0013] As used herein and throughout the claims, unless the context otherwise clearly indicates otherwise, the terms “a,” “an,” and “the” include the plural reference. Furthermore, as used herein, unless the context otherwise clearly indicates otherwise, “in” includes both “in” and “on”.

[0014] The numerical ranges referenced herein are intended solely as a shorthand method for individually referring to each individual value falling within that range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were listed separately herein. All methods described herein may be performed in any suitable order unless otherwise indicated herein or clearly denied by the context. The use of any and all examples or exemplary language (e.g., “such as”) provided with respect to certain aspects herein is intended only to better illustrate the work and not to otherwise limit the scope of the invention. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.

[0015] The grouping of optional elements or aspects of the invention disclosed herein should not be construed as limiting. Each member of a group may be referenced and claimed individually or in conjunction with other members of the group or other elements found herein. For convenience and / or patentability reasons, a group may include or omit members of one or more groups. When any such inclusion or omission occurs, the specification is deemed herein to include the modified group, thereby fulfilling the written description of all Markush groups used in the appended claims. Attached Figure Description

[0016] The flowcharts depicting the disclosed methods include “processing blocks” or “steps” that may represent computer software instructions or groups of instructions. Alternatively, processing blocks or steps may represent steps performed by a functionally equivalent circuit such as a digital signal processor or an application-specific integrated circuit (ASIC). The flowcharts do not depict the syntax of any particular programming language. Rather, the flowcharts illustrate the functional information required by those skilled in the art to fabricate circuits or generate computer software to perform the processing according to this disclosure. It should be noted that many routine elements, such as loops and variable initialization, as well as the use of temporary variables, are not shown. Those skilled in the art will understand that the specific order of the steps described is illustrative only and is subject to change unless otherwise indicated herein. Unless otherwise stated, the steps described below are unordered, meaning that they can be performed in any convenient or desired order.

[0017] Figure 1 It is a block diagram of a circuit that uses a first dedicated amplifier coupled to a second dedicated amplifier configured to provide programmable gain in a closed-loop configuration to implement the filter function.

[0018] Figure 2 This is a circuit diagram depicting a filter and amplifier configured according to one aspect of the present invention.

[0019] Figure 3 This is a flowchart illustrating the steps of a method performed according to an aspect of the present invention.

[0020] Figure 4 This is a flowchart illustrating the steps of a method performed according to an aspect of the present invention. Detailed Implementation

[0021] The detailed description that follows, taken in conjunction with the accompanying drawings, is intended as a description of various aspects of the work and is not intended to represent the only aspect in which the work can be practiced. The detailed description includes specific details to provide a thorough understanding of the work. However, it will be apparent to those skilled in the art that the work can be practiced without these specific details. In some cases, well-known structures and components are shown in block diagram form to avoid obscuring the concept of the work.

[0022] Where each aspect of this disclosure can represent a single combination of inventive elements, this work is considered to include all possible combinations of the disclosed elements. Thus, if one aspect includes elements A, B, and C, and a second aspect includes elements B and D, then this work is considered to include other remaining combinations of A, B, C, or D, even if not explicitly disclosed.

[0023] As used herein, and unless the context otherwise specifies, the term “coupled to” is intended to include both direct coupling (where two elements coupled to each other are in contact with each other) and indirect coupling (where at least one additional element is located between the two elements). Therefore, the terms “coupled to” and “coupled with” are used synonymously.

[0024] Figure 2 This is a circuit diagram depicting a filter and amplifier configured according to one aspect of the invention. A pair of signal input nodes (inp) and a pair of signal output nodes (outn) are provided. Transistors (e.g., field-effect transistors) are represented by M1-M8 and M1b-M8b. Resistors are represented by R0, R1-R3, and R1b-R3b. Capacitors are represented by C1, C2, C1b, and C2b. The capacitances of C2 and C2b may be adjustable (e.g., programmable). Power supply voltage, transistor base voltage, and ground are represented by symbols commonly used in the art.

[0025] exist Figure 2 In the depicted circuit configuration, M2, M2b, M5, and M5b provide source-follower functionality. The source-follower amplifier comprises two series-stacked devices coupled between the supply voltage VDD and ground, where the first device (i.e., the active device) converts the input signal, and the second device (i.e., the load device) provides the load. The load device is biased by a DC bias voltage. The output signal of the source-follower is in phase with the input signal, and the voltage gain is approximately 0 dB, exhibiting linearity.

[0026] The low supply voltage used in integrated circuits limits voltage margin (i.e., the available output signal swing). To alleviate the margin problem, an active current source load can be used. For example, a load device can provide a controlled current load to an active device driven by the input. Thus, the load device provides DC bias to operate the source follower.

[0027] Components R1, R2, C1, C2, and M5 are used as a Sallen-Key filter. Therefore, according to one aspect of this disclosure, a source follower is incorporated into the design of the Sallen-Key filter. Figure 1 The operational amplifier in a conventional Sallen-Key filter limits the filter's high-frequency behavior and typically results in high power consumption. A source follower can significantly extend the range of this filter's high-frequency behavior while achieving lower power consumption. The source follower has similar input / output characteristics to the operational amplifier. Operational amplifiers exhibit infinite input impedance, good current drive, and low output impedance at both their input and output terminals. Similarly, source followers possess properties including high input impedance, good current drive, and low output impedance at both their input and output terminals.

[0028] Components M2, M2b, and R0 convert the differential voltage between voltages Vx and Vxb depicted in the circuit diagram into differential currents through transistors M1 and M1b. Transistor pairs M1, M7, M1b, and M7b provide current mirrors with a gain equal to the device ratio between M7 and M1. Components M7 and R3 form a first output gain stage, and components M7b and R3b form a second output gain stage, wherein the first and second output gain stages convert the input differential current into an output differential voltage.

[0029] The total differential gain of the input signal is:

[0030]

[0031] The filter transfer function is:

[0032]

[0033] in, and .

[0034] Based on some aspects of this disclosure, the circuits disclosed herein can be used for baseband processing of wide-bandwidth signals, such as those used in the WiGig standard. These aspects can reduce power consumption compared to conventional circuits. For example, in a conventional Sallen-Key filter, the closed-loop bandwidth of the amplifier needs to be commensurate with the filter bandwidth. This typically requires high power consumption, especially in the case of WiGig signals. However, in the aspects disclosed herein, the source follower achieves unity gain.

[0035] Improved linearity can be achieved in some aspects of this disclosure. In conventional Sallen-Key filter designs, linearity depends on the operating regions of the transistors in the filter's amplifier. The ideal operating regions of those transistors, where sufficient drain-source voltage is presented, are saturated. For large input signals, transistor margins are reduced. Consequently, the amplifier's open-loop gain decreases, and assuming a unit-interrupt closed-loop gain, this leads to reduced linearity.

[0036] In some aspects of this disclosure, since the source followers (M5 and M5b) in the Sallen-Key filter provide unity gain, the only margin considerations are limited to transistors M4 and M4b, which can be addressed by setting the input to a higher DC level. Similarly, for the programmable gain amplifier, sufficient margin can be guaranteed for transistors M1 and M7 when the input is set to a sufficiently high DC level, making the current replication from M1 to M7 unaffected by the input signal level. At the output, with transistor M8 operating as a cascaded device, the margin can be slightly squeezed without affecting current replication (and therefore linearity).

[0037] Figure 2 The circuit shown provides independent filter bandwidth and gain control. In conventional filter-amplifier circuits, the bandwidth of the programmable gain amplifier is still a function of the gain setting. To have independent bandwidth and gain control (i.e., bandwidth controlled only by the Sallen-Key filter, and gain controlled only by the programmable gain amplifier), the bandwidth of the programmable gain amplifier must be large enough that the worst-case gain setting avoids affecting the overall bandwidth, leading to suboptimal designs that result in high power consumption. Conversely, in Figure 2 In the circuit shown, programmable gain can be achieved through the current mirror replication ratio (W7 / W1) and the resistance ratio (R3 / R0). This enables high bandwidth without significant power consumption. Therefore, according to certain aspects of this disclosure, independent filter bandwidth and gain control can be achieved without increasing the power budget.

[0038] Circuit designs based on certain aspects of this disclosure can facilitate the fabrication of circuits including Sallen-Key filters coupled to programmable gain amplifiers. The similarity in circuit structure (e.g., branches M6, M5, M4, branches M3b, M2, M1, and branches M8, M7) between the amplifiers within the Sallen-Key filter and the programmable gain amplifier can be utilized to facilitate layout, simplify design, reduce manufacturing costs, and / or improve chip functionality. By adjusting transistor dimensions to provide common cell device sizes and current densities, highly compact layouts can be achieved, providing a uniform array of cell devices that can mitigate certain layout-related effects. Therefore, aspects of this disclosure include the design and fabrication of integrated circuits, which may include methods, apparatus, and programmable control systems configured to fabricate integrated circuits according to the design aspects disclosed herein.

[0039] although Figure 2A low-pass implementation of the circuit is shown, but the novel aspects disclosed herein can be used for alternative circuit configurations and can be adapted to any of the various types of filter characteristics that may be desired for baseband, intermediate frequency, and radio frequency processing.

[0040] As an example, a high-pass implementation can be provided by replacing R1, R2, R1b, and R2b with capacitors and C1, C2, C1b, and C2b with resistors. The resulting high-pass bandwidth is... .

[0041] In another respect, bandpass applications can be implemented by cascading a high-pass filter with a low-pass filter. For example, an AC coupling capacitor can follow the low-pass filter implementation described herein. It will be apparent to those skilled in the art that alternative filter designs and applications of these and related circuits can be provided based on the teachings disclosed herein.

[0042] The bias currents from M6, M6b, M3, and M3b will affect circuit performance. Large bias currents will allow devices M5 and M2 to have large transconductance g. m This reduces the output impedance of the source follower stage used for unity gain. However, for a given current density, excessive bias current typically results in a larger device size. This can cause large capacitive loads at the output of the Sallen-Key filter and the output of the source follower M2, leading to reduced bandwidth. Therefore, circuits designed according to the aspects disclosed herein can take this trade-off into account, for example, to produce circuits with an optimal design relative to the aforementioned parameters.

[0043] Figure 3 This is a flowchart depicting steps that can be performed according to various aspects of this disclosure. These steps may include methods for avoiding linear dependence on the operating regions of transistors in the amplifier of a Sallen-Key filter. A first step 301 includes employing a source follower in the Sallen-Key filter. The source follower includes an active device and a load device and may provide unity gain. A second step 302 includes determining the required margin in at least one of the transistors in the filter amplifier circuit, such as the load device and a device in a current mirror pair used as a programmable amplifier. A third step 303 includes selecting the DC level of the input signal to the Sallen-Key filter to ensure sufficient margin in at least one transistor.

[0044] Figure 4 This is a flowchart depicting a method configured according to aspects of this disclosure. As mentioned above regarding... Figure 2As shown, the similarity in the circuit structure (e.g., branches M6, M5, M4, branches M3b, M2, M1, branches M8, M7) between the amplifiers inside the Sallen-Key filter and the programmable gain amplifier can be used to help with layout, simplify design, reduce manufacturing costs and / or improve chip functionality.

[0045] A first step 401 in the method for manufacturing an integrated circuit includes employing a transistor layout shared by a Sallen-Key filter and at least one programmable gain amplifier. A second step 402 includes designing the Sallen-Key filter and programmable gain amplifier (and optional other circuitry and / or circuitry portions) to include the transistor layout. This can provide a circuit design for generating the Sallen-Key filter and programmable gain amplifier. A third step 403, optionally preceding step 402, may include adjusting the dimensions of the transistors in the layout to provide shared cell device dimensions and current densities. Steps 402 and / or 403 may also include designing the layout to be highly compact and providing a uniform array of cell devices that can mitigate layout-related effects. Based on the generated circuit design, the Sallen-Key filter and programmable gain amplifier are manufactured at 404.

[0046] Methods configured according to certain aspects of this disclosure can provide designs for integrated circuits based on the circuit configurations disclosed herein. In some aspects, the methods are configured to provide the fabrication of integrated circuits based on the designs disclosed herein. According to the foregoing design aspects, the methods disclosed herein can include programmable systems configured to design and / or fabricate integrated circuits.

[0047] It should be noted that any language for this method can be executed by any suitable combination of computing devices, including servers, interfaces, systems, databases, agents, peers, engines, modules, controllers, or other types of computing devices operating individually or collectively. It should be understood that computing devices include processors configured to execute software instructions stored on tangible, non-transitory computer-readable storage media (e.g., hard disk drives, solid-state drives, RAM, flash memory, ROM, etc.). The software instructions preferably configure the computing device to provide the roles, responsibilities, or other functions disclosed with respect to the disclosed circuits and methods.

[0048] It will be apparent to those skilled in the art that numerous modifications may be made beyond those already described without departing from the inventive concept of this document. Therefore, the subject matter of this invention is not limited except in the spirit of the appended claims. Furthermore, in both the description and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. Specifically, the terms “comprising” and “including” should be interpreted as referring to an element, component, or step in a non-exclusive manner, indicating that the mentioned element, component, or step may be present, utilized, or combined with other elements, components, or steps not expressly referenced. Where a claim in the description relates to at least one item selected from the group consisting of A, B, C, ... and N, the text should be interpreted as requiring only one element from that group, rather than A plus N or B plus N, etc.

Claims

1. A WiGig baseband signal processing circuit, comprising: The first-stage filter includes the source follower that forms the unity-gain amplifier; as well as A programmable gain amplifier coupled to the first-stage filter, the baseband signal processing circuit being configured to provide at least programmable gain by adjusting at least the current mirror replication ratio in the programmable gain amplifier, thereby decoupling the bandwidth setting of the baseband signal processing circuit from its gain setting. The programmable gain amplifier includes a differential voltage-to-current converter, a current mirror pair, and a first gain stage and a second gain stage with programmable output. The differential voltage-to-current converter and the first current mirror share a first transistor, and the differential voltage-to-current converter and the second current mirror share a second transistor.

2. The WiGig baseband signal processing circuit according to claim 1, wherein, The current mirror replication ratio is the ratio between a pair of transistors in the current mirror.

3. The WiGig baseband signal processing circuit according to claim 1, wherein, The input signal of the source follower is in phase with the output signal of the source follower.

4. The WiGig baseband signal processing circuit according to claim 1 further includes: The first gain stage and the first current mirror of the programmable output share a third transistor; as well as The second gain stage and the second current mirror of the programmable output share a fourth transistor.

5. The WiGig baseband signal processing circuit according to claim 4, wherein, The first gain stage and the second gain stage convert the input differential current into the output differential voltage.

6. The WiGig baseband signal processing circuit according to claim 1, wherein, The source follower includes: A first circuit, comprising a first plurality of transistors; and A second circuit, which includes a second plurality of transistors in a branch within the programmable gain amplifier, wherein the second circuit has the same configuration as the first circuit.

7. The WiGig baseband signal processing circuit according to claim 1, wherein, The gain of the programmable gain amplifier is based on the current mirror replication ratio and the ratio between the first resistor and the second resistor.

8. The WiGig baseband signal processing circuit according to claim 1, wherein, The first-stage filter includes a low-pass filter.

9. The WiGig baseband signal processing circuit according to claim 1, wherein, The first-stage filter includes a high-pass filter.

10. The WiGig baseband signal processing circuit according to claim 1, wherein, The first-stage filter includes a bandpass filter.

11. The WiGig baseband signal processing circuit according to claim 1, wherein, The first-stage filter is configured as a Sallen-Key filter.

12. The WiGig baseband signal processing circuit according to claim 1, further comprising: Integrated circuit layout including uniform arrays of unit devices.

13. The WiGig baseband signal processing circuit according to claim 6, wherein, The first plurality of transistors and the second plurality of transistors have the same unit device size and current density.

14. The WiGig baseband signal processing circuit according to claim 6, wherein, The first circuit is configured as an active device, while the second circuit is configured as a load device.

15. The WiGig baseband signal processing circuit according to claim 14, wherein, The load device provides a controlled current load to the active device.

16. The WiGig baseband signal processing circuit according to claim 14, wherein, The load device provides a DC bias to operate the source follower.

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