Pixelated light emitting diode for self-aligned photoresist patterning

Abstract

A light source includes an array of light emitters, where at least some of the light emitters have a center patterned surface and an unpatterned border; a light blocking metal layer located between each of the array of light emitters; and a down-converter material located on each of the array of light emitters.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to micro light emitting diode (LED) lighting systems. In certain embodiments, self-aligned photoresist patterning is used to create features that reduce optical cross-talk between LED pixels. BACKGROUND

[0002] Light emitting diodes (LEDs) have been widely used in vehicle headlamps, roadway lighting, luminaires, and various applications requiring high luminous efficacy, long lifetime, and good controllability of light direction and intensity. In some applications, lighting can be improved or new lighting applications can be realized by providing an LED light source comprising a plurality of pixels that can be adaptively programmed to emit light of defined intensity. Such LED pixel arrays can generally benefit from smaller pixel size, larger number of pixels, and larger pixel density.

[0003] High intensity / brightness light emitting devices capable of operating across the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials. Typically, Ill-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a growth substrate, such as sapphire, silicon carbide, Ill-nitride, or other suitable substrate, by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as the growth substrate due to its widespread commercial availability and relative ease of use. The stack grown on the growth substrate typically includes one or more n-type layers doped with, for example, Si, formed over the substrate, a light emitting or active region formed over the one or more n-type layers, and one or more p-type layers doped with, for example, Mg, formed over the active region.

[0004] Unfortunately, simply reducing pixel size and increasing pixel density can cause problems. Because light from an LED and associated phosphor is emitted in all directions, it can be difficult to prevent the light emission of one LED pixel from overlapping with the light emission of another LED pixel of the pixel array, thereby reducing the effective resolution of the LED pixel array or causing undesirable pixel illumination overlap of the area being illuminated. This is particularly true for designs having separate LED light emitters in the pixel array but still using a single phosphor layer.

[0005] One solution to minimize optical cross-talk between LED pixels in a pixel array is to have multiple discrete phosphors, each associated with a discrete pixel by using a conventional photoresist patterning and phosphor deposition. Unfortunately, when considering the precision limitations of wafer-level processing and die-to-wafer attachment of LED pixel arrays, each LED die will have a slightly different orientation on the wafer. For small and high-density micro-LED arrays, this die-to-die variation can be comparable to the critical dimensions of the photoresist pattern. Precise alignment of the mask to each die is time consuming, adds cost, and reduces the advantages of parallel wafer-level processing. SUMMARY

[0006] Provided herein are light sources and methods of manufacturing light sources. Light emitters (e.g., pixels) include a central patterned surface and an unpatterned border to facilitate a self-aligned, maskless method of manufacturing light sources.

[0007] In a first aspect, a light source includes an array comprising: a plurality of light emitters. Each light emitter includes a semiconductor layer having first and second surfaces. The semiconductor layer can include a Group III-nitride material. In one or more embodiments, the semiconductor layer includes GaN. In one or more embodiments, the semiconductor layer includes a stack including an n-type layer, a light emitting region, and a p-type layer. The first surface of at least a portion of the light emitters includes: a central patterned surface and an unpatterned border. In one or more embodiments, the unpatterned border has a width in a range of 1 to 50 microns. Each light emitter further includes a down-converter material, such as a phosphor material, on the semiconductor layer. The array further includes a light-blocking metal between each of the light emitters and the down-converter material on each of the light emitters in the array of light emitters. The down-converter material (e.g., a phosphor layer) can be located within a self-aligned cavity defined in part by emitting light from at least some of the array of light emitters into a positive photoresist and removing the exposed photoresist. In embodiments, there is down-converter material on the central patterned surface and no down-converter material on at least portions of the unpatterned border.

[0008] In one embodiment, each light emitter includes a minimum width in a range of 5 microns and 500 microns. The light emitters can be formed from at least partially roughened or patterned GaN formed by direct etching or growth on a previously patterned and removed sapphire or other substrate. In one or more embodiments, the light emitting material includes GaN.

[0009] In one embodiment, each light emitter can support a light blocking metal layer of less than 5 microns in height. In some embodiments, the light blocking layer can be electroplated aluminum or other reflective metal. Metal deposition can occur before or after deposition of down-converter material (e.g., phosphor material) on discrete pixels of the light emitter array.

[0010] In one embodiment, the array includes common electrical contacts that are active at the wafer or die level. Selected or all of the light emitters in the light emitter array can be provided with current to generate and emit light that develops portions of a positive photoresist layer.

[0011] In one embodiment, the array provides multi-color illumination and can be color tunable by selective activation and / or current levels provided to pixels in the array.

[0012] In one embodiment, the phosphor is formed from particles that are bound together by a condensed cure silicone system.

[0013] In one embodiment, optical elements are aligned with at least some of the light emitter array. In addition to optical elements such as lenses, beam expanders, beam homogenizers, polarizers or color filters, and light scattering layers, various protective layers can be applied. In some embodiments, active optical or electrical layers including ITO, graphene, or other conductive layers can be applied.

[0014] In one embodiment, the light source can be used in at least one of architectural, camera flash, and automotive lighting.

[0015] In a further aspect, a method of fabricating a light source by a self-aligned, maskless method includes coating a light emitter array with a positive photoresist. The light emitter array can be provided by a die or wafer level substrate. At least some of the light emitters can be activated to expose portions of the positive photoresist and create developed positive photoresist. After washing away the developed positive photoresist, a cavity is within the positive (undeveloped) photoresist sidewalls. Down-converter material (e.g., phosphor material) or other suitable material can be used to at least partially fill the cavity.

[0016] In one embodiment, further processing can include deposition and washing away of a second positive photoresist layer. Advantageously, this allows for building up a stack of various phosphor material layers.

[0017] In another embodiment, the processing can include electroplating metal on a bonding metal layer deposited in the GaN trench. This allows for increasing the height of the reflective sidewalls, reducing potential optical cross-talk between adjacent light emitters.

[0018] In another embodiment, electrical contacts on the backside of the wafer are supplied with electrical current to activate the array of light emitters. The activation can define a desired pattern, which can include, but is not limited to, a checkerboard or an RGBY uniform pattern. BRIEF DESCRIPTION OF DRAWINGS

[0019] So that the above-recited features of the present disclosure can be understood in detail, a more particular description can be had by reference to one or more embodiments, some of which are set forth in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure can admit to other equally effective embodiments. Figure 1 - Figures 3 and Figure 5 - The line drawings of Figure 6 are not to scale.

[0020] Figure 1 is a schematic diagram illustrating a portion of a pixel array formed at least in part from a GaN-based die or wafer in cross-section;

[0021] Figures 2A-2E.2 illustrates a self-aligned process suitable for applying photoresist to a surface of a pixel array such as the one shown in Figure 1 and patterning;

[0022] Figure 3A illustrates one embodiment of a pixel array with a first phosphor material 352 on top after processing, where all pixels in the pixel array are illuminated;

[0023] Figure 3B illustrates another embodiment of a pixel array 310 with both a first phosphor material 352 and a second phosphor material 354 on top;

[0024] Figure 4A , Figure 4B and Figure 4C respectively show micrographs of LED pixel arrays processed according to one embodiment;

[0025] Figure 5 illustrates an exemplary contact layout for electrically contacting a subset of wafer-level pixels for photoresist exposure; and

[0026] Figures 6A-6K illustrates a self-aligned process suitable for surface treatment of pixels. DETAILED DESCRIPTION

[0027] Before several exemplary embodiments of the present disclosure are described, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure can have other embodiments and can be practiced or carried out in various ways.

[0028] According to one or more embodiments, the term "substrate" as used herein refers to an intermediate or final structure having a surface or a portion of a surface on which a process is performed. Additionally, in some embodiments, reference to a substrate also refers to only a portion of the substrate, unless the context clearly indicates otherwise. Furthermore, according to some embodiments, reference to depositing on a substrate includes depositing on a bare substrate, or a substrate with one or more films or features or materials deposited or formed thereon.

[0029] In one or more embodiments, "substrate" means any substrate or surface of material formed on a substrate on which film processing is performed during a fabrication process. In exemplary embodiments, the substrate surface on which processing is performed includes materials such as silicon, silicon oxide, silicon on insulator (SOI), strained silicon, amorphous silicon, doped silicon, doped carbon silicon oxide, germanium, gallium arsenide, glass, sapphire, and any other suitable materials such as metals, metal nitrides, group III- nitrides (e.g., GaN, AIN, InN, and alloys), metal alloys, and other conductive materials, depending on the application. Substrates include light emitting diode (LED) devices, including uLED devices. In some embodiments, the substrate is exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure, and / or bake the substrate surface. In addition to film processing directly on the surface of the substrate itself, in some embodiments, any of the disclosed film processing steps are also performed on an underlayer formed on the substrate, and the term "substrate surface" is intended to include such underlayer as the context indicates. Thus, for example, where a film / layer or partial film / layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes a substrate surface.

[0030] Reference to a micro-LED (uLED) means that the light emitting diode has one or more characteristic dimensions (e.g., height, width, depth, thickness, etc. dimensions) that are less than 100 microns. In one or more embodiments, one or more of the height, width, depth, thickness dimensions have a value in the range of 2 to 25 microns.

[0031] A down-converter material absorbs energy, converting an incoming wavelength to a lower energy, higher wavelength. In this context, the down-converter material can be a phosphor material, or a semiconductor nanoparticle (quantum dot), or a combination of phosphor and quantum dot.

[0032] When referring to at least portions of the unpatterned border being free of material (e.g., down-converter material), it is recognized that some material can bleed onto the unpatterned border during the deposition process. In one or more embodiments, greater than or equal to 50%, or greater than or equal to 60%, or greater than or equal to 70%, or greater than or equal to 80%, or greater than or equal to 90%, or greater than or equal to 95%, or greater than or equal to 99% of the unpatterned border is free of down-converter material.

[0033] Methods of depositing thin films include, but are not limited to, sputter deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma-enhanced atomic layer deposition (PEALD), plasma-enhanced chemical vapor deposition (PECVD), and combinations thereof.

[0034] Figure 1 FIG. 1 is a schematic diagram illustrating a portion of a pixel array 100 including a plurality of light emitters (e.g., pixels) in cross-section. Two pixels (120 and 122) are shown partially in cross-section. In Figure 1 In FIG. 1, details of pixel 120 are provided, and it is understood that pixel 122 has corresponding features. Each light emitter includes a semiconductor layer 110 having a first surface 132 and a second surface 134. In one or more embodiments, the semiconductor layer includes GaN. In one or more embodiments, the semiconductor layer includes a stack including an n-type layer, a light-emitting region, and a p-type layer. The array can be formed at least in part by patterning an underlying die or wafer, which can include a plurality of individual pixels including at least a semiconductor layer and contacts that can be electrically addressed to emit light. Each pixel includes a center patterned surface 124 and an unpatterned border 126. The plurality of pixels 120 and 122 are separated by trenches or grooves filled with a light-blocking metal 130 or other suitable structure capable of absorbing or reflecting overlapping light emissions from adjacent LED pixels. The unpatterned border is designed to minimize lateral emissions from each pixel.

[0035] In some embodiments, the die or wafer is electroplated starting with a seed layer, followed by photoresist patterning to outline the metal pad growth area. Alternatively, the existing metal structure can be electroplated after laser lift-off of the sapphire layer. The metal electroplating can be limited to less than 5 microns in height to reduce diffusion of the electroplated material into the active GaN pixel area. The metallization and contact pattern of the die or wafer can be designed such that a particular subset of pixels can be electrically contacted at the wafer or tile level. The common contacts can be later severed to allow individual addressing capability of all pixels.

[0036] Figure 2A - FIG. 2E illustrates a suitable apparatus for applying photoresist to a substrate such as the substrate of FIG. 2D relative to Figure 1The structure shown and patterning process 200. First, Figure 2A A die or wafer 202 is shown that includes a plurality of individual pixels 210, each having a center patterned surface 224 and an unpatterned border 226, and separated by a light-blocking metal 230. Each pixel includes a semiconductor layer. Figure 2B Shown in the middle is a close-up excerpt of three pixels (LED1, LED2, and LED3) from the die or wafer 202, with a layer of positive photoresist 220 deposited on the top surface of the die or wafer 202, over the patterned surface of the "LED" 224 and its unpatterned border 226 and light-blocking metal 230. Figure 2A

[0037] At this point, two options are presented for illuminating the pixels to allow for creating a design for a desired application. In a first option, Figure 2C.1 all of the pixels (e.g., LED1, LED2, and LED3) are illuminated, which develops the positive photoresist 222 over only the patterned surface of each pixel (LED1, LED2, and LED3). The positive (undeveloped) photoresist 220 resides on the unpatterned border and light-blocking metal. In a second option, Figure 2C.2 only some of the pixels (e.g., LED1 and LED3) are illuminated, forming a defined pattern of developed photoresist 222. The pixels are illuminated for a duration. In one or more embodiments, the duration is greater than one second and less than ten seconds. The positive photoresist is developed by suitable methods, including flooding with a developer, and drying. Illumination, addition of developer, and drying are repeated as needed.

[0038] Thereafter, the developed positive photoresist portions (i.e., the portions exposed to light from the patterned surface of the illuminated pixels) are washed away, in Figure 2D.1 and Figure 2D.2 This leaves cavities 240 separated by thin edge walls 242 or thick edge walls 244 of positive (undeveloped) photoresist. The cavities 240 can be further processed by filling or adding down-converter material (e.g., phosphor material). In Figure 2E.1 and Figure 2E.2 The cavities 240 are filled with down-converter material 252, according to the desired configuration. Thereafter, the remaining photoresist 220 is removed, and additional processing is used to fill the open cavities with metal sidewalls 250 or additional down-converter material 252. There is down-converter material on the center patterned surface, and there is no down-converter material on at least portions of the unpatterned border.

[0039] For Figure 2E.2 ​The positive resist development of the thick edge wall 244 is further processed by illuminating the pixel LED 2, removing the developed photoresist, and depositing the desired down-converter material on the LED 2.

[0040] Figure 3A A pixel array 300 is shown after processing with a first phosphor material 352 on top, where all of the pixels in the pixel array are illuminated. Alternatively, Figure 3B A pixel array 310 is shown after processing with both a first phosphor material 352 and a second phosphor material 354 on top, where half of the pixels in the pixel array are illuminated in a checkerboard pattern. After development and rinsing of the photoresist, any cavities are filled with the first phosphor material. Any previously unilluminated pixels are illuminated, the photoresist is developed and rinsed, and any cavities filled with the second phosphor material are used to define a checkerboard or other desired pattern.

[0041] Figure 4A Figure 4B and Figure 4C Images of LED pixel arrays processed according to one embodiment are shown in Figures 400, 410, and 420, respectively. A 6x3 array of blue-emitting LEDs on a ceramic tile were coated with an adhesion promoter, hexamethyldisilazane (HMDS). A 15 micron layer of positive photoresist, AZ4562, was spin-coated onto the tile and then dried at 100°C for 2 minutes. Individual pixels of the array were electrically contacted, which were then illuminated at 800 mA / cm 2 for 5 seconds. The photoresist was then flooded with TMAH-based developer, RD6, for 50 seconds and then spin-dried. The process was repeated and the sample was then rinsed in DI water. Figure 4A An optical image 400 of the resulting photoresist pattern is shown, with a 100 μm scale, where the photoresist has been removed from one of the center pixels. Figure 4B A scanning electron microscope image 410 of a pattern corner is shown, while Figure 4C A scanning electron microscope image 420 of a cross-section of the same sample along the edge of the photoresist pattern between two adjacent LED pixels is shown. The thickness of the remaining photoresist was measured at two points: 14.18 microns and 15.44 microns. The undercut angle was 42.4°.

[0042] Figure 5 ​An exemplary contact layout 500 for electrical contact to a subset of wafer-level pixels exposed with photoresist is shown. A subset of pixels 502 of a first color (e.g., red) are electrically connected between a first contact "Cl" of each pixel 502 to a first color common contact 512. A second contact "C2" of each pixel 502 is in electrical contact with a connection 510 to a layout common contact 508. A subset of pixels 504 of a second color (e.g., green) are electrically connected between a first contact "Cl" of each pixel 504 to a second color common contact 514. A second contact "E2" of each pixel 504 is in electrical contact with a connection 510 to the layout common contact 508. A subset of pixels 506 of a third color (e.g., blue) are electrically connected between a first contact "Cl" of each pixel 506 to a third color common contact 516. A second contact "C2" of each pixel 506 is in electrical contact with a connection 510 to the layout common contact 508. The common contacts can be later cut to allow individual addressing capability of all pixels.

[0043] It is advantageous for an LED pixel containing a central patterned surface and an unpatterned border to minimize the lateral emission of each pixel so that a photoresist film on a die or wafer surface can be patterned with high resolution. In one or more embodiments, the width of the unpatterned border is in the range of 1 to 50 microns, including all values and subranges therebetween, including 5 to 20 microns. To enhance light extraction, GaN surfaces in the semiconductor device have a roughened surface by a patterned sapphire etched by a resist pattern or by photoelectrochemical etching. In one embodiment, the patterned sapphire can be formed to leave smooth sapphire near the edges of the die layout. This requires the sapphire to be aligned with the LED. The lack of surface roughness at the outer 5 to 20 micron edge of each pixel in the LED reduces the light intensity at the pixel edge and improves the quality of blue light extinction to reduce cross-talk between LED pixels.

[0044] In one embodiment, forming a self-aligned photoresist array can rely on the deposition or coating of a uniform layer of positive photoresist sensitive to the emission wavelength of the LEDs. When some or all of the LED pixels are then turned on, only the photoresist directly above the LEDs will be exposed. After development, the photoresist remains only over the dark areas of the array ("off" pixels, spaces between pixels), as well as around the perimeter of the array. If the resulting pattern is filled with phosphor, then the photoresist can be lifted off to yield a pixelated phosphor array aligned with the LED array. The photoresist thickness and LED light dose can be adjusted to minimize overexposure in the regions of interest. Alternatively, a multi-step approach can be applied, where a thin photoresist film is followed by LED exposure, and then a thin light-blocking layer on the photoresist sidewalls (such as aluminum metal) can be applied to further reduce cross-talk from the LED light source. Any excess aluminum on the LED emission surface can be removed by a directional dry etch process. Then, with the aid of this blocking layer between pixels, a second photoresist layer can be patterned. This process can be repeated to create the desired photo-patterned aspect ratio and sidewall profile.

[0045] Positive photoresist compounds used for this described process can include a photosensitive material that is photodegraded such that a developer will dissolve away the deposited regions exposed to light. In effect, this leaves a coating (i.e., film) on the previously dark portions of the resist that were irradiated where the mask was placed. Positive resists typically require use at low temperatures because they are susceptible to permanent cross-linking (also known as "baking hard") at high temperatures, which renders the resist unable to be removed by a subsequent stripping bath (typically a mild solvent system).

[0046] Light emitting pixel arrays such as disclosed herein can include, but are not limited to, LEDs formed from sapphire or silicon carbide. The LEDs can be formed from an epitaxially grown or deposited semiconductor n-layer. A semiconductor p-layer can then be grown or deposited sequentially on the n-layer, forming an active region at the junction between the layers. Semiconductor materials capable of forming high-brightness light emitting devices can include, but are not limited to, III-V semiconductors— particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen— also known as Ill-Nitride materials. In certain embodiments, laser emitting elements can be used.

[0047] Phosphor particles can be used to modify the color of light emitted from the LEDs, including one or more wavelength conversion materials capable of creating white light or other colors of monochromatic light. In some embodiments, phosphor particles held together by a binder or adhesive can be used. For example, phosphors cemented together with silicone can be molded, dispensed, screen printed, sprayed, or laminated.

[0048] In one embodiment, a condensation-cured silicone resin system can be used to bind phosphor particles. The silicone material or siloxane can be selected for mechanical stability, low temperature curing properties (e.g., below 150-120 degrees Celsius), and the ability to be catalyzed using a gas phase catalyst. In one embodiment, an organosiloxane block copolymer can be used. An organopolysiloxane containing D and T units can be used, where the D units are primarily bonded together to form linear blocks having 10 to 400 D units, and the T units are primarily bonded to one another to form branched polymer chains, which are referred to as "nonlinear blocks." In certain embodiments, the condensation-cured silicone resin system can include optional organic, inorganic, or organic / inorganic binders and filler materials. In one embodiment, light active phosphors, dyes, or nanoparticles can be bound together by the silicone resin. In other embodiments, the silicone resin can additionally form optical structures, including lenses, light guides, or refractive elements.

[0049] Catalysts for condensation-cured silicone resin system catalysts can be selected to minimize the generation of species that require removal, and / or should not require high temperature activation to enable curing at relatively low temperatures and / or use of heat sensitive substrates. The composition can employ a catalyst that is relatively non-toxic, and relatively stable in solution but relatively fast curing when dried. The catalyst can be effective at relatively low concentrations, and / or effective under relatively low (or no) humidity conditions. A catalyst that can be used as a gas phase can be used. In one embodiment, the gas phase curing of the condensation-cured silicone resin system can be performed using a basic or alkaline catalyst. In one embodiment, a superbase catalyst such as described by Swier et al. in U.S. Patent 9688035 can be used. In some embodiments, a silicone resin solid composition made using a superbase catalyst exhibits enhanced curing rate, improved mechanical strength, and improved thermal stability compared to a similar composition without the superbase catalyst.

[0050] The term "superbase" as used herein refers to a compound with very high basicity, such as lithium diisopropylamide. The term "superbase" also encompasses a base resulting from the mixing of two (or more) bases, resulting in a new basic species with inherent new properties. The term "superbase" does not necessarily mean a base that is thermodynamically and / or kinetically stronger than another base. Instead, in some embodiments, it means creating a basic reagent by combining the properties of several different bases. The term "superbase" also encompasses any species that has a higher absolute proton affinity (APA = 245.3 kcal / mol) and intrinsic gas phase basicity (GB = 239 kcal / mol) relative to 1,8-bis-(dimethylamino)-naphthalene.

[0051] Non-limiting examples of superbases include organic superbases, organometallic superbases, and inorganic superbases. Organic superbases include, but are not limited to, nitrogen-containing compounds. In some embodiments, the nitrogen-containing compounds also have low nucleophilicity and relatively mild use conditions. Non-limiting examples of nitrogen-containing compounds include phosphazenes, amidines, guanidines, and polycyclic polyamines. Organic superbases also include compounds in which an active metal has been exchanged for a hydrogen on a heteroatom, such as oxygen (unstable alkoxides) or nitrogen (metal amides, such as lithium diisopropylamide). In some embodiments, the superbase catalyst is an amidine compound. In some embodiments, the term "superbase" refers to an organic superbase having at least two nitrogen atoms and a pKb from about 0.5 to about 11, as measured in water. In certain embodiments, the superbase catalyst is an organic superbase, such as any of the organic superbases described above or known in the art.

[0052] All or only a portion of the light emitted by the LED can be converted by a wavelength conversion material of the phosphor. The unconverted light can be part of the final spectrum, although it need not be. Examples of common devices include a blue-emitting LED segment combined with a yellow-emitting phosphor, a blue-emitting LED segment combined with green- and red-emitting phosphors, a UV-emitting LED segment combined with blue- and yellow-emitting phosphors, and a UV-emitting LED segment combined with blue-, green-, and red-emitting phosphors. In some embodiments, individually controllable RGB (three LEDs) or RGBY (four LEDs) can be located underneath a single micro-optical device. This allows precise color control of the emitted light. Typically, such RGB LEDs are spaced far enough apart that color mixing will occur in the far field.

[0053] The direction, beam width, and beam shape of the light emitted from each LED can be modified by a micro-optical device. The micro-optical device can be a single optical element or multiple optical elements. For example, the optical elements can include converging or diverging lenses, aspheric lenses, Fresnel lenses, or graded-index lenses. Other optical elements are also included, such as mirrors, beam diffusers, filters, masks, apertures, collimators, or optical waveguides. The micro-optical device can be located a distance from the LED to allow for receiving and redirecting light from multiple LEDs. Alternatively, the micro-optical device can be disposed on top of each LED to individually direct, focus, or defocus the emitted LED light. The micro-optical device can be attached directly to the LED, attached to the LED via a transparent interposer or plate, or held a fixed distance from the LED by a surrounding substrate attachment (not shown).

[0054] In some embodiments, each LED pixel in the light emitter array can be controlled individually, while in other embodiments, groups of pixels can be controlled as blocks. In still other embodiments, both individual pixels and groups of pixels can be controlled. To reduce overall data management requirements, control can be limited to on / off functionality or switching between a relatively small number of light intensity levels. In other embodiments, continuous variation of illumination intensity is supported. Both individual and group level control of light intensity are contemplated. In one embodiment, overlapping or dynamically selected control zones are also possible, e.g., where overlapping groups of light emitters in the pixel array are individually controllable, though with common pixels depending on the illumination requirements. In one embodiment, intensity can be individually controlled and adjusted for each pixel by using pulse width modulation to set the appropriate ramp time and pulse width. This allows for a gradation of pixel activation to reduce power fluctuations, and provides superior control of emitted light intensity.

[0055] Programmable light emitting arrays such as disclosed herein can also support a wide range of applications that benefit from fine-grained intensity, spatial, and temporal control of light distribution. This can include, but is not limited to, precise spatial patterning of light emitted from blocks or individual LEDs. Depending on the application, emitted light can be spectrally distinct, adaptive over time, and / or environmentally responsive. In some embodiments, a light emitting array can provide preprogrammed light distributions in various intensity, spatial, or temporal patterns. Emitted light can be based at least in part on received sensor data, and can be used for optical wireless communication. Associated optics can be distinct at the individual or multiple LED level. An example light emitting array can include a device with a centrally controlled block of high intensity LEDs with associated common optics, while edge-located LEDs can have individual optics. Common applications supported by light emitting LED arrays include camera or video lighting, architectural and area lighting, and street lighting.

[0056] Programmable light emitting arrays can be used to selectively and adaptively illuminate a building or area to improve visual display or reduce lighting costs. Additionally, a light emitting array can be used to project media facades for decorative motion or video effects. In combination with tracking sensors and / or cameras, selective illumination of an area surrounding a pedestrian can be possible. Spectrally distinct LEDs can be used to adjust the color temperature of illumination, as well as support horticultural lighting of specific wavelengths.

[0057] Street lighting is an important application that can greatly benefit from the use of programmable light emitting arrays. A single type of light emitting array can be used to simulate various street light types, allowing for example, switching between type I linear street lights and type IV semi-circular street lights by appropriately activating or deactivating selected LEDs. In addition, street lighting costs can be reduced by adjusting the light beam intensity or distribution according to environmental conditions or time of use. For example, the light intensity and distribution area can be reduced when there are no pedestrians. If the LEDs are spectrally distinct, the color temperature of the light can be adjusted according to the respective day, dusk or night conditions.

[0058] Programmable light emitting LEDs are also well suited for supporting applications that require direct display or projection display. For example, motor vehicle headlamps that require calibration, or warning, emergency, or information signs can all use light emitting arrays for display or projection. This allows for example, modifying the directivity of the light output from a motor vehicle headlamp. If the light emitting array consists of a large number of LEDs or includes a suitable dynamic light mask, text or numerical information can be presented by user directed placement. Directional arrows or similar indicators can also be provided.

[0059] Turning Figures 6A-6K The self-alignment process 600 according to embodiments is suitable for surface treatment of pixels. Figure 6A A die or wafer 602 is shown that includes a semiconductor layer 610 that is divided into a plurality of individual pixels, each pixel having a central patterned surface 624 and an unpatterned border 626 and separated by a light blocking metal 630. A layer of positive photoresist 620 is deposited onto the top surface of the die or wafer 602, over the patterned surfaces 624, the unpatterned borders 626, and the light blocking metal 630. All or some of the pixels (LED1, LED2, and LED3) are illuminated. Here for illustrative purposes, Figure 6B LED1 and LED3 are shown as being illuminated, which develops the positive photoresist into developed positive photoresist 622 over only the patterned surface of each illuminated pixel. The positive (undeveloped) photoresist 620 resides on the unpatterned borders, the unilluminated LED2, and the light blocking metal. Thereafter, at Figure 6C The developed positive photoresist 622 portion is washed away (i.e., the portion exposed to light from the patterned surface of the illuminated pixel). This leaves a cavity 640 separated by a thin edge wall 642 or a thick edge wall 644. Figure 6D The exposed LED is shown as being surface treated (e.g., chemically etched) to form an aperture 646. Figure 6E Small down-converter particles, such as quantum dots (QDs), are shown as being injected into the treated surface. In this way, a "phosphor pixel" 648 of the surface of the GaN is created (for a particular color / pixel / design set). Thereafter, atFigure 6F The remaining walls 642 and 644 of the positive photoresist are removed. In an embodiment, for a specific color / pixel / design set, the material on the central patterned surface has surface treatment and down-converter particles, and at least in each portion of the unpatterned boundary, surface treatment and down-converter particles are absent.

[0060] Optionally, this process can be repeated for different pixel / color / design sets. Another layer of positive photoresist 620 is deposited onto the substrate. About Figure 6G In contrast Figure 6B Different sets of pixels are illuminated. For illustrative purposes, LED2 is illuminated, which develops the positive photoresist into a positive photoresist 622 developed only above the patterned surface 624 of LED2, for example, for each illuminated pixel. Positive (undeveloped) photoresist 620 resides on the unpatterned boundary 626, the light-blocking metal 630, and the unilluminated LEDs (LED1 and LED3). Subsequently, in Figure 6H The positive photoresist portion (i.e., the portion exposed to light from the patterned surface of the illuminated pixels) is washed away. This leaves cavities 640 separated by thick edge walls 644. Figure 6I The exposed LEDs are surface-treated (e.g., chemically etched onto the exposed GaN surface) to form pores 646. Figure 6J Small down-converter particles—such as quantum dots (QDs)—are injected into the treated surface. In this way, “phosphor pixels” 650 embedded in the GaN surface are created for another specific color / pixel / design set. Subsequently, in Figure 6K The diagram shows the wall 644 where the remaining positive photoresist has been removed. In one embodiment, for another specific color / pixel / design set, the material on the central patterned surface has surface treatment and down-converter particles, and at least in each portion of the unpatterned boundary, surface treatment and down-converter particles are absent. Example

[0061] Various embodiments are listed below. It will be understood that, within the scope of the invention, the embodiments listed below can be combined with all aspects and other embodiments.

[0062] Example (a). A light source includes: an array comprising: a plurality of light emitters, each light emitter including: a semiconductor layer having a first surface and a second surface, the first surface of at least a portion of the light emitters including: a central patterned surface and an unpatterned boundary, and a down-converter material on the semiconductor layer; and a light-blocking metal layer located between each light emitter.

[0063] Embodiment (b). The light source of embodiment (a), wherein the unpatterned border has a width in a range from 1 to 50 microns.

[0064] Embodiment (c). The light source of any one of embodiments (a) to (b), wherein there is down-converter material on the central patterned surface and there is no down-converter material on at least portions of the unpatterned border.

[0065] Embodiment (d). The light source of any one of embodiments (a) to (c), wherein each light emitter comprises a minimum width in a range from 5 microns to 500 microns.

[0066] Embodiment (e). The light source of any one of embodiments (a) to (d), wherein the semiconductor layer comprises GaN.

[0067] Embodiment (f). The light source of any one of embodiments (a) to (e), wherein the down-converter material comprises a phosphor material.

[0068] Embodiment (g). The light source of any one of embodiments (a) to (f), wherein the light-blocking metal layer has a height less than 5 microns.

[0069] Embodiment (h). The light source of any one of embodiments (a) to (g), wherein the array provides multi-color illumination with a phosphor formed from particles bonded together by a condensation-cured silicone system.

[0070] Embodiment (i). The light source of any one of embodiments (a) to (h), wherein the plurality of light emitters are color-tunable.

[0071] Embodiment (j). The light source of any one of embodiments (a) to (i), further comprising an optical element aligned with at least some of the light emitters.

[0072] Embodiment (k). The light source of any one of embodiments (a) to (j), wherein the light source is used for at least one of architectural, camera flash, and automotive lighting.

[0073] Embodiment (l). The light source of any one of embodiments (a) to (k), wherein the array comprises a common electrical contact that is active at a wafer or die level.

[0074] Example (m). A method of fabricating a light source by a self-aligned, maskless method, comprising: coating an array of light emitters with a positive photoresist; activating at least some of the light emitters to expose portions of the positive photoresist and create developed positive photoresist, each light emitter comprising: a semiconductor layer having a first surface and a second surface, the first surface of at least some of the light emitters comprising: a center patterned surface and an unpatterned border; washing away the developed positive photoresist to leave cavities with positive photoresist sidewalls; and at least partially filling the cavities with a down-converter material.

[0075] Example (n). The method of any of examples (m), wherein the unpatterned border has a width in a range of 1 to 50 microns.

[0076] Example (o). The method of any of examples (m) to (n), wherein each light emitter comprises a minimum width in a range of 5 microns to 500 microns.

[0077] Example (p). The method of any of examples (m) to (o), wherein the semiconductor layer of each light emitter comprises GaN.

[0078] Example (q). The method of any of examples (m) to (p), wherein the down-converter material comprises a phosphor material.

[0079] Example (r). The method of any of examples (m) to (q), further comprising depositing a light-blocking metal layer having a height of less than 5 microns between each light emitter.

[0080] Example. The method of any of examples (m) to (r), further comprising depositing and washing away a second layer of positive photoresist.

[0081] Example (t). The method of any of examples (m) to (s), further comprising electroplating metal on a bonding metal layer deposited in the GaN trench.

[0082] Example (u). The method of any of examples (m) to (t), further comprising providing electrical contacts on a backside of a wafer supporting the array of light emitters.

[0083] Example (v). The method of any of examples (m) to (u), further comprising activating each of the array of light emitters.

[0084] Example (w). The method of any of examples (m) to (v), further comprising activating selected light emitters to define a desired pattern.

[0085] Example (x). The method of any one of examples (m) through (w), further comprising aligning the optical elements with at least some of the array of light emitters.

[0086] References throughout this specification to “one embodiment,” “certain embodiments,” “one or more embodiments” or “embodiments” mean that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. The appearances of the phrases such as “in one or more embodiments,” “in certain embodiments,” “in one embodiment,” or “in an embodiment” in various places in the specification are not necessarily referring to the same embodiment of the disclosure. Furthermore, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments.

[0087] Many modifications and other embodiments of the present invention will come to mind to one skilled in the art to which this invention pertains having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the invention is not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. It is also to be understood that other embodiments of the invention can be practiced without the elements / steps corresponding to the specifically disclosed elements / steps.

Claims

1. A light source, comprising: An array comprising: Multiple optical emitters, each comprising: A semiconductor layer having a first surface and a second surface At least a portion of the first surface of the light emitter includes: A central patterned surface and an unpatterned boundary, wherein the unpatterned boundary has a width ranging from 1 to 50 micrometers; and Down-converter material on the semiconductor layer; and A light-blocking metal layer is located between each light emitter.

2. The light source of claim 1, wherein the downconverter material is present on the central patterned surface, and the downconverter material is absent on at least each portion of the unpatterned boundary.

3. The light source of claim 1, wherein each light emitter includes a minimum width in the range of 5 micrometers to 500 micrometers.

4. The light source according to claim 1, wherein the semiconductor layer comprises GaN, and the down-converter material comprises a phosphor material.

5. The light source according to claim 1, wherein the light-blocking metal layer has a height of less than 5 micrometers.

6. The light source of claim 1, wherein the array utilizes a phosphor formed from particles bonded together by a condensation-cured silicone resin system to provide multicolor illumination.

7. The light source according to claim 1, wherein the plurality of light emitters are color-tunable.

8. The light source according to claim 1 further includes optical elements aligned with at least some of the light emitters.

9. The light source according to claim 1, wherein the light source is used for at least one of architectural lighting, camera flash lighting, and motor vehicle lighting.

10. A method for fabricating a light source using a self-aligned maskless method, comprising: The light emitter array is coated with positive photoresist; At least some light emitters are activated to expose a portion of positive photoresist and create developed positive photoresist. Each light emitter includes a semiconductor layer having a first surface and a second surface. The first surface of at least a portion of the light emitters includes a central patterned surface and an unpatterned boundary, wherein the unpatterned boundary has a width in the range of 1 to 50 micrometers. The developed positive photoresist is washed away to leave a cavity with positive photoresist sidewalls; as well as The cavity is at least partially filled with the material of the downconverter.

11. The method of claim 10, wherein each light emitter comprises a minimum width in the range of 5 micrometers to 500 micrometers.

12. The method of claim 10, wherein the semiconductor layer of each light emitter comprises GaN.

13. The method of claim 10 further comprises depositing a light-blocking metal layer with a height of less than 5 micrometers between each light emitter.

14. The method of claim 10 further comprises depositing and washing away a second positive photoresist layer.

15. The method of claim 10, further comprising providing electrical contacts on the back side of the wafer supporting the light emitter array.

16. The method of claim 10, further comprising activating each of the optical emitter array.

17. The method of claim 10, further comprising activating a selected light emitter to define a desired pattern.

18. The method of claim 10, further comprising aligning the optical elements with at least some of the light emitter array.

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