Display panel and display device

Abstract

Embodiments of the present application relate to a display panel and a display device. The display panel includes: a substrate including a first display area and a second display area each having a plurality of sub-pixels, wherein a number of sub-pixels per unit area in the first display area is less than a number of sub-pixels per unit area in the second display area; a transistor layer provided over the substrate and including a plurality of transistors; a planarization layer over the transistor layer; an light emitting element layer provided over the planarization layer, including a common electrode and including a plurality of light emitting elements, the common electrode including a plurality of holes in the first display area; and an antenna provided in the first display area and at least a portion of the antenna overlapping the plurality of holes, including a first antenna electrode and a second antenna electrode provided over the first antenna electrode, the first antenna electrode being provided in the transistor layer. The present application improves a reception rate of the antenna.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0188379, filed on December 30, 2020, the entire contents of which are incorporated herein by reference for all purposes, as if fully set forth herein. Technical Field

[0003] Embodiments of the present invention relate to a display panel and a display device. Background Technology

[0004] Display devices incorporating wireless communication include an antenna for receiving signals. The antenna for receiving signals may be located below the display panel of the display device or in a non-display area of ​​the display panel.

[0005] In terms of aesthetics and practicality, display devices tend to minimize non-display areas and maximize display areas. However, due to limitations in the miniaturization of antennas used for receiving signals, it is difficult to reduce the non-display area and increase the display area when the antenna is located in a non-display area.

[0006] If the antenna is located in the display area, the space occupied by the antenna in the non-display area can be used as the display area. However, electrodes formed in the display area used to display images will interfere with the antenna's signal reception. Summary of the Invention

[0007] Embodiments of the present invention provide a display panel and a display device, comprising: a common electrode including a plurality of holes in a first display area; and an antenna positioned to at least partially overlap with the plurality of holes, the antenna being integrated into the display panel, the display panel and the display device having an improved antenna reception rate.

[0008] In one aspect, embodiments of the present invention provide a display panel, comprising: a substrate, a transistor layer on the substrate, a planarization layer on the transistor layer, a light-emitting element layer on the planarization layer, and an antenna. The substrate includes a first display area and a second display area, each having a plurality of sub-pixels. The number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area. The transistor layer includes a plurality of transistors. The light-emitting element layer includes a common electrode and a plurality of light-emitting elements. The common electrode includes a plurality of holes in the first display area. The antenna is located in the first display area and positioned to at least partially overlap with the plurality of holes. The antenna includes a first antenna electrode and a second antenna electrode located above the first antenna electrode. The first antenna electrode is located in the transistor layer.

[0009] The transistor layer may include a first opaque conductive layer located in the first display area.

[0010] The first opaque conductive layer may not overlap with the multiple holes, and the first antenna electrode may contact the first opaque conductive layer in the first display area.

[0011] The transistor layer may include a light-shielding layer positioned to at least partially overlap with the light-emitting element.

[0012] The first opaque conductive layer may be formed of the same material as the light-shielding layer.

[0013] The light-emitting element layer may include pixel electrodes located below the common electrode.

[0014] The second antenna electrode may be located in the light-emitting element layer and may be formed of the same material as the pixel electrode.

[0015] The planarization layer may include a second opaque conductive layer located in the first display area.

[0016] The second opaque conductive layer may not overlap with the plurality of holes, and the second antenna electrode may contact the second opaque conductive layer in the first display area.

[0017] The planarization layer may include a source-drain electrode pattern electrically connected to the transistor, and the second opaque conductive layer may be formed of the same material as the source-drain electrode pattern.

[0018] The second opaque conductive layer may include a first portion and a second portion. The first portion may correspond to the edge of a plurality of holes in the first display area, and the second portion may connect to the first portion.

[0019] The second antenna electrode may be located in the transistor layer.

[0020] The transistor layer may include a third opaque conductive layer located in the first display area. The third opaque conductive layer does not overlap with the plurality of holes. The second antenna electrode may contact the third opaque conductive layer in the first display area.

[0021] The plurality of transistors may include gates, and the third opaque conductive layer may be formed of the same material as the gates.

[0022] The third opaque conductive layer may include a third portion corresponding to the edge of the plurality of holes and a fourth portion connecting the third portion.

[0023] In another aspect, embodiments of the present invention provide a display device including a display panel and a light receiving device, wherein the display panel includes: a substrate, the substrate including a first display area and a second display area each having a plurality of sub-pixels, wherein the number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area; a transistor layer disposed on the substrate and including a plurality of transistors; a planarization layer on the transistor layer; a light-emitting element layer disposed on the planarization layer, the light-emitting element layer including a common electrode and including a plurality of light-emitting elements, the common electrode including a plurality of holes in the first display area; and an antenna disposed in the first display area and at least a portion of the antenna overlapping the plurality of holes, the antenna including a first antenna electrode and a second antenna electrode disposed above the first antenna electrode, the first antenna electrode being disposed in the transistor layer, wherein the light receiving device is located below the substrate and at least partially overlaps the first display area.

[0024] According to embodiments of the present invention, a display panel and a display device are provided that can effectively receive antenna signals by including a common electrode having a plurality of holes in a first display area and including an antenna positioned to overlap with the plurality of holes. Attached Figure Description

[0025] Figure 1 The illustration shows a display panel according to an embodiment of the present invention.

[0026] Figure 2 The illustration shows a display device according to an embodiment of the present invention.

[0027] Figure 3 and Figure 4 This is a top view of the first display area of ​​the display panel according to the embodiment.

[0028] Figure 5 This is an equivalent circuit diagram of a sub-pixel according to an embodiment of the present invention.

[0029] Figure 6 This is a cross-sectional view of the display panel according to the embodiment.

[0030] Figure 7 This is a cross-sectional view of the display panel according to the embodiment.

[0031] Figure 8 This is a top view of a display panel according to a comparative example of the present invention.

[0032] Figure 9 and Figure 10 A top view of a display panel according to an embodiment of the present invention. Detailed Implementation

[0033] Figure 1 The illustration shows a display panel according to an embodiment of the present invention.

[0034] Reference Figure 1 According to an embodiment of the present invention, the display panel 100 may include an active region A / A and an inactive region N / A.

[0035] Sub-pixels SP are provided in the active region A / A so that brightness can be presented according to the applied signal.

[0036] The display panel 100 may include an antenna 150. Although the antenna 150 may be located in the active region N / A, technological advancements aim to increase the area of ​​the active region A / A and narrow the area of ​​the active region N / A. Therefore, it is difficult to position the antenna 150 in the active region N / A.

[0037] Therefore, in the display panel 100 according to an embodiment of the present invention, the antenna 150 is located in the active region A / A. However, when the antenna 150 is located in the active region A / A, since a plurality of sub-pixels SP are provided in the active region A / A, the signal reception of the antenna 150 may not be effectively performed due to the wiring of circuits such as light-emitting elements constituting the sub-pixels SP.

[0038] Figure 2 The illustration shows a display device according to an embodiment of the present invention.

[0039] Reference Figure 2 The display device 10 according to an embodiment of the present invention may include a display panel 100 for displaying images and a light receiving device 200 for receiving light.

[0040] The display panel 100 may include: a substrate; and a plurality of insulating layers, transistor layers and light-emitting element layers on the substrate.

[0041] The display panel 100 may include a plurality of sub-pixels for displaying images and various signal lines for driving the plurality of sub-pixels. The signal lines may include a plurality of data lines, a plurality of gate lines, a plurality of power lines, etc. Here, each of the plurality of sub-pixels may include a transistor located in a transistor layer and a light-emitting element located in a light-emitting element layer.

[0042] The display panel 100 may include a display area DA (corresponding to the active area) for displaying images and a non-display area NDA (i.e., the area located outside the display area DA, corresponding to the non-active area). Multiple sub-pixels may be provided in the display area DA. Various signal lines may be provided in the non-display area NDA, and driving circuitry may be connected to the signal lines. The non-display area NDA may be bent so that it is not visible from the front, or it may be covered by a housing (not shown); the non-display area NDA is also referred to as a bezel.

[0043] Reference Figure 6 The display area DA may include a first display area 111 and a second display area 112.

[0044] The light receiving device 200 is a device that receives light and performs a predetermined function. For example, the light receiving device 200 may include one or more of a camera and a proximity sensor.

[0045] The light receiver 200 is a device that needs to receive light, but it can be located behind (below) the display panel 100. That is, the light receiver 200 can be positioned opposite the viewing plane of the display panel 100. The light receiver 200 is not exposed from the front of the display device 10. Therefore, when a user views the display panel 100 from the front, the light receiver 200 is not visible.

[0046] The camera located behind (below) the display panel 100 is a front-facing camera for taking front-facing photos and can be seen as a camera lens.

[0047] Reference Figure 2 The light receiving device 200 may be configured to at least partially overlap with the display area DA of the display panel 100. That is, the light receiving device 200 may be located within the display area DA.

[0048] The area in the display area DA that at least partially overlaps with the light receiving device 200 is referred to as the first display area 111, and the remaining area is referred to as the second display area 112. Therefore, the light receiving device 200 can be positioned to at least partially overlap with the first display area 111 in the display area DA. In other words, it can be seen that the light receiving device 200 is located in the first display area 111 of the display area DA.

[0049] Since the first display area 111 in the display area DA at least partially overlaps with the light receiving device 200, the transmittance of the first display area 111 in the display area DA should be higher than the transmittance of the second display area 112 that does not overlap with the light receiving device 200.

[0050] In order to improve the transmittance of the first display area 111 overlapping with the light receiving device 200, the resolution, sub-pixel arrangement structure, number of sub-pixels per unit area, electrode structure, wiring structure, electrode arrangement structure or wiring arrangement, etc., may be different from each other in the first display area 111 and the second display area 112.

[0051] For example, the number of subpixels per unit area in the first display area 111 may be less than the number of subpixels per unit area in the second display area 112. Therefore, the resolution of the first display area 111 may be lower than the resolution of the second display area 112.

[0052] In the display device 10 according to an embodiment of the present invention, the camera located below the display panel 100 and not exposed to the outside, which serves as a light receiving device 200, is also referred to as UDC (Under Display Camera).

[0053] The display device 10 according to an embodiment of the present invention can have a smaller bezel and can be manufactured without a cutout display panel 100. Furthermore, the design limitations imposed by the light receiving device 200 are eliminated, thereby allowing for greater freedom in appearance design.

[0054] In the display device 10 according to an embodiment of the present invention, although the light receiving device 200 is located behind the display panel 100, the light receiving device 200 can normally perform its predetermined function by receiving light normally. Furthermore, in the display device 10 according to an embodiment of the present invention, although the light receiving device 200 is located behind the display panel 100 and overlaps with the display area DA, the light receiving device 200 can normally receive light and perform its predetermined function, and can display a normal image in the display area DA.

[0055] Therefore, the display device 10 according to an embodiment of the present invention provides a structure that can improve the transmittance of the first display area 111 overlapping with the light receiving device 200.

[0056] Reference Figure 3 and Figure 4 The first display area 111 is an area that at least partially overlaps with the light receiving device 200. The first display area 111 may include a non-transmissive area NTA and a transmissive area TA.

[0057] Reference Figure 3 and Figure 4 The transmissive region TA is a portion of the first display region 111 and can be an area for transmitting external light to the light receiving device 200. For example, the transmissive region TA can have a circular or elliptical shape and can also be referred to as an aperture region.

[0058] Reference Figure 3 and Figure 4 The non-transmissive region NTA is a portion of the first display region 111, and may be the region where the transistors of the transistor layer and the light-emitting elements of the light-emitting element layer are located.

[0059] Reference Figure 3 and Figure 4 The non-transmissive region NTA may include pixel regions PA containing sub-pixels, namely luminescent regions EA1, EA2, EA3 and EA4, and wiring regions SLA containing signal lines SL.

[0060] Reference Figure 3 and Figure 4 When the transmissive region TA is surrounded by the non-transmissive region NTA, the first display region 111 may include a plurality of transmissive regions and TA that are separated from each other.

[0061] Figure 5 It is the equivalent circuit of the sub-pixel SP of the display device 10 according to an embodiment of the present invention.

[0062] Reference Figure 5 Each of the plurality of sub-pixels SP disposed above the display panel 100 of the display device 10 according to an embodiment of the present invention includes a light-emitting element ED 141, a driving transistor DRT, a scanning transistor SCT, and a storage capacitor Cst.

[0063] The light-emitting element 141 may include a pixel electrode 141b, a common electrode 141a, and a light-emitting layer EL located between the pixel electrode 141b and the common electrode 141a. The pixel electrode 141b may be disposed in each sub-pixel SP, and the common electrode 141a may be commonly disposed for multiple sub-pixels SP. The pixel electrode 141b may be an opaque reflective electrode, and the common electrode 141a may be a semi-transparent electrode. For example, the pixel electrode 141b may be an anode electrode, and the common electrode 141a may be a cathode electrode. As another example, the pixel electrode 141b may be a cathode electrode, and the common electrode 141a may be an anode electrode. For example, the light-emitting element 141 may be an organic light-emitting diode (OLED), a micro-light-emitting diode, or a quantum dot light-emitting element.

[0064] The driving transistor DRT is a transistor used to drive the light-emitting element 141, and may include a first node N1, a second node N2, a third node N3, etc.

[0065] The first node N1 of the driving transistor DRT can be the gate node of the driving transistor DRT and can be electrically connected to the source node or drain node of the scanning transistor SCT. The second node N2 of the driving transistor DRT can be the source node or drain node of the driving transistor DRT and can also be electrically connected to the pixel electrode 141b of the light-emitting element 141. The common electrode 141a of the light-emitting element can be connected to the non-driving voltage EVSS. The third node N3 of the driving transistor DRT can be electrically connected to the driving voltage line DVL that provides the driving voltage EVDD.

[0066] The scanning transistor SCT is controlled by the scanning signal SCAN and can be connected between the first node N1 of the driving transistor DRT and the data line DL. The scanning transistor SCT is turned on or off according to the scanning signal SCAN provided from the gate line GL, and controls the connection between the data line DL and the first node N1 of the driving transistor DRT.

[0067] The scanning transistor SCT is turned on by the scanning signal SCAN, which has a turn-on voltage, so that the data voltage Vdata provided from the data line DL can be transmitted to the first node N1 of the driving transistor DRT.

[0068] The on-state voltage of the scan signal SCAN, which enables the scan transistor SCT to conduct, can be either a high-level voltage or a low-level voltage. The off-state voltage of the scan signal SCAN, which enables the scan transistor SCT to turn off, can be either a low-level voltage or a high-level voltage. For example, when the scan transistor SCT is an n-type transistor, the on-state voltage can be high and the off-state voltage can be low. As another example, when the scan transistor SCT is a p-type transistor, the on-state voltage can be low and the off-state voltage can be high.

[0069] Each of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor or a p-type transistor.

[0070] A storage capacitor Cst can be connected between the first node N1 and the second node N2 of the driving transistor DRT. The storage capacitor Cst is charged with an amount of charge corresponding to the voltage difference between its two ends, and is used to maintain the voltage difference between its two ends for a predetermined frame time. Therefore, the corresponding sub-pixel SP can emit light during the predetermined frame time.

[0071] The storage capacitor Cst is not a parasitic capacitor (e.g., Cgs, Cgd) existing between the gate node and the source node (or drain node) of the driving transistor DRT as an internal capacitor, but an external capacitor intentionally designed to be outside the driving transistor DRT.

[0072] The sub-pixel SP of the display device 10 according to an embodiment of the present invention may further include one or more transistors or one or more capacitors.

[0073] Figure 6 The cross-sectional structures of the non-transmissive region NTA and the transmissive region TA in the first display area 111 and the second display area 112 in the display device 10 according to an embodiment of the present invention are shown.

[0074] Reference Figure 6 The first display area 111 of the display panel may include a transmissive area TA and a non-transmissive area NTA. The second display area 112 of the display panel may be a non-transmissive area NTA.

[0075] Figure 6 The stacked structure of the non-transmissive region NTA in the first display area 111, the stacked structure of the transmissive region TA in the first display area 111, and the stacked structure of the second display area 112 are shown.

[0076] Reference Figure 6 The stacking structure of the second display area 112 is as follows.

[0077] In the second display area 112, a transistor layer 120 is disposed on the substrate 110, a planarization layer 130 is disposed on the transistor layer 120, and a light-emitting element layer 140 is disposed on the planarization layer 130. An encapsulation layer ENCAP may be disposed on the light-emitting element layer 140.

[0078] In the second display area 112, transistors, such as the driving transistor DRT and scanning transistor SCT for each sub-pixel SP, can be disposed in the transistor layer 120, and various insulating layers for forming the transistors can be disposed. These insulating layers may include organic and inorganic layers.

[0079] In the second display area 112, various wirings, such as data lines DL, gate lines GL, and drive voltage lines DVL, can be arranged in the transistor layer 120.

[0080] In the second display area 112, a light-emitting element 141 for each sub-pixel SP can be provided in the light-emitting element layer 140. Therefore, in the second display area 112, a pixel electrode 141b, a light-emitting layer EL, and a common electrode 141a constituting the light-emitting element 141 can be provided in the light-emitting element layer 140.

[0081] Reference Figure 6 The stacking structure of the non-transmissive region NTA in the first display area 111 is the same as the stacking structure of the second display area 112.

[0082] In the non-transmissive region NTA of the first display region 111, a transistor layer 120 is disposed on the substrate 110, a planarization layer 130 is disposed on the transistor layer 120, and a light-emitting element layer 140 is disposed on the planarization layer 130. An encapsulation layer ENCAP may be disposed on the light-emitting element layer 140.

[0083] The light-emitting element 141 is susceptible to moisture or oxygen. The encapsulation layer ENCAP prevents the penetration of moisture or oxygen, thereby preventing the light-emitting element 141 from being exposed to moisture or oxygen. The encapsulation layer ENCAP can be formed of one or more layers.

[0084] In the non-transmissive region NTA of the first display area 111, transistors, such as the driving transistor DRT and scanning transistor SCT for each sub-pixel SP, can be disposed in the transistor layer 120, and various insulating layers for forming the transistors can be disposed. The various insulating layers may include organic layers and inorganic layers.

[0085] In the non-transmissive region NTA of the first display area 111, various wirings, such as data lines DL, gate lines GL, and drive voltage lines DVL, can be provided in the transistor layer 120.

[0086] In the non-transmissive region NTA of the first display area 111, a light-emitting element 141 for each sub-pixel SP can be provided in the light-emitting element layer 140. Therefore, in the non-transmissive region NTA of the first display area 111, a pixel electrode 141b, a light-emitting layer EL, and a common electrode 141a constituting the light-emitting element 141 can be provided in the light-emitting element layer 140.

[0087] Reference Figure 6 The stacking structure of the transmission region TA in the first display area 111 is as follows.

[0088] Reference Figure 6 In the transmissive region TA of the first display region 111, a transistor layer 120 is disposed on the substrate 110, a planarization layer 130 is disposed on the transistor layer 120, and a light-emitting element layer 140 is disposed on the planarization layer 130. An encapsulation layer ENCAP may be disposed on the light-emitting element layer 140.

[0089] In the non-transmissive region NTA of the first display area 111, the transistor layer 120 includes transistors such as driving transistors (DRT) and scanning transistors (SCT) for each sub-pixel SP, as well as various wiring. A light-emitting element 141 for each sub-pixel SP can be disposed in the light-emitting element layer 140.

[0090] In the transmissive region TA of the first display area 111, no transistors or wiring are disposed in the transistor layer 120. However, in the transmissive region TA of the first display area 111, various insulating layers required for forming transistors may be disposed in the transistor layer 120. These insulating layers may include organic and inorganic layers.

[0091] In the transmissive region TA of the first display area 111, no light-emitting element 141 for each sub-pixel SP is provided in the light-emitting element layer 140. Therefore, in the transmissive region TA of the first display area 111, no pixel electrode 141b, light-emitting layer EL, and common electrode 141a are provided in the light-emitting element layer 140. In some cases, only some of the pixel electrode 141b, light-emitting layer EL, and common electrode 141a may be provided in the light-emitting element layer 140 in the transmissive region TA of the first display area 111. For example, only the light-emitting layer EL may be provided in the light-emitting element layer 140 in the transmissive region TA of the first display area 111.

[0092] Reference Figure 6 In the non-transmissive region NTA of the first display area 111 and the second display area 112, the metal material layer is not disposed in the transmissive region TA of the first display area 111. However, in the non-transmissive region NTA of the first display area 111 and the second display area 112, the insulating material layer may extend to the transmissive region TA of the first display area 111.

[0093] In other words, the metal material layer is disposed in the non-transmissive region NTA of the first display area 111 and the non-transmissive region NTA of the second display area 112, but not in the transmissive region TA of the first display area 111. The insulating material layer may be disposed together in the non-transmissive region NTA of the first display area 111, the non-transmissive region NTA of the second display area 112, and the transmissive region TA of the first display area 111.

[0094] Reference Figure 6 The transmissive region TA in the first display area 111 of the display panel 100 may partially overlap with the light receiving device 200.

[0095] External light is transmitted to the light receiving device 200 through the transmission region TA in the first display area 111. Therefore, for the normal operation of the light receiving device 200, the transmittance of the transmission region TA in the first display area 111 should be high.

[0096] Figure 7 This is a cross-sectional view of a display panel according to an embodiment of the present invention.

[0097] Figure 7A cross-section of the non-transmissive region NTA and the transmissive region TA in the first display area 111 is shown.

[0098] Second display area ( Figure 7 The profile of the portion containing sub-pixels (not shown in the image) can be configured to be similar to... Figure 7 The cross-section of the non-transmissive region NTA in the first display area 111 shown is the same.

[0099] Figure 7 The diagram shows a portion where a light receiving device 200 is disposed below a substrate 110 in the transmission region TA, and a portion where an antenna 150 is disposed in the transmission region TA. Specifically, the case where the antenna 150 is disposed is divided into two cases: Case 1 and Case 2. Although in Figure 7 In this embodiment, the light receiving device 200 is not provided below the portion where the antenna 150 is located. However, this embodiment also includes an implementation in which the light receiving device 200 is provided below the transmission region TA where the antenna 150 is located, and the light receiving device 200 can be positioned to at least partially overlap with the antenna 150.

[0100] Reference Figure 7 The display panel 100 includes a substrate 110, a transistor layer 120 on the substrate, a planarization layer 130 on the transistor layer, a light-emitting element on the planarization layer, an encapsulation layer ENCAP, and an antenna 150.

[0101] The substrate 110 includes a first display area and a second display area, each having a plurality of sub-pixels. The number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area.

[0102] Transistor layer 120 includes a plurality of transistors. In addition to transistors, transistor layer 120 may also include components constituting the above-described reference. Figure 5 The circuit elements of the described sub-pixel circuit, such as capacitors.

[0103] The transistor layer 120 may include a light-shielding layer 123. The light-shielding layer 123 may prevent external light from being reflected by the circuit elements included in the transistor layer 120 or prevent the circuit elements included in the transistor layer 120 from being damaged or altered by external light.

[0104] The light-shielding layer 123 may be positioned to at least partially overlap with the light-emitting element.

[0105] The planarization layer 130 is used to planarize the transistor layer 120, and can be an organic layer. There are no particular restrictions on the type of organic layer, as long as it can planarize the transistor layer 120; for example, it can be an optically transparent acrylic resin layer.

[0106] The planarization layer 130 may include a first source-drain electrode pattern SDL1 electrically connected to the transistor. The first source-drain electrode pattern SDL1 may be connected to the source-drain of the transistor, or may form another wiring formed above the transistor layer 120.

[0107] The planarization layer 130 may include a second source-drain electrode pattern SDL2 connected to the first source-drain electrode pattern SDL1. The second source-drain electrode pattern SDL2 may be a pattern that electrically connects the first source-drain electrode pattern SDL1 of the driving transistor of the transistor layer 120 to the pixel electrode 141b of the light-emitting element.

[0108] Reference Figure 7 The light-emitting element layer 140 includes a common electrode 141a and a plurality of light-emitting elements, a portion of which can be used as an electrode of one of the light-emitting elements. The common electrode 141a includes a plurality of holes 141aa in the first display area. The plurality of holes 141aa can be positioned to correspond to the transmission area TA of the first display area. When the plurality of holes 141aa are positioned to correspond to the transmission area TA of the first display area, the transmittance of the transmission area TA can be further improved, and the light receiving device 200 can receive light more effectively.

[0109] The light-emitting element layer 140 may include a dam layer 142. Dam layer 142 is a layer with an opening for the pixel electrode 141b, and can define the light-emitting region of a sub-pixel. Dam layer 142 may be opened in the transmission region TA where the light-receiving device 200 is located. When dam layer 142 is opened in the transmission region TA where the light-receiving device 200 is located, the transmission region TA may have higher transmittance.

[0110] The planarization layer 130 may be positioned so as not to overlap with at least a portion of the plurality of holes 141aa of the common electrode 141a. The planarization layer 130 may include holes for the light receiving device 200 in order to maximize the transmittance of the transmission region TA.

[0111] Antenna 150 is positioned in the first display area and is positioned to at least partially overlap with the plurality of apertures 141aa (or at least a portion of antenna 150 overlaps with the plurality of apertures 141aa). By positioning antenna 150 to at least partially overlap with the plurality of apertures 141aa, signal reception by antenna 150 is prevented from being blocked by common electrode 141a.

[0112] Antenna 150 includes a first antenna electrode 151 and a second antenna electrode 152 located above the first antenna electrode 151. Antenna 150 can receive signals through the capacitance between the first antenna electrode 151 and the second antenna electrode 152.

[0113] The first antenna electrode 151 is located in the transistor layer 120. When the first antenna electrode 151 is located in the transistor layer 120, the first antenna electrode 151 can be formed before the light-emitting element layer 140 is formed. Therefore, since it is not necessary to form the antenna electrode at a low temperature after the light-emitting element is formed to prevent damage to the light-emitting element, defects in the first antenna electrode 151 can be prevented.

[0114] The first antenna electrode 151 may be made of a transparent conductive material. For example, the first antenna electrode may be made of indium tin oxide (ITO) or indium gallium zinc oxide (IGZO), but is not limited thereto. Therefore, even when the light receiving device 200 overlaps with the antenna 150, external light can be smoothly incident on the light receiving device 200.

[0115] The transistor layer 120 may include a first opaque conductive layer 122 located in the first display area.

[0116] The first opaque conductive layer 122 may be formed of the same material as the light-shielding layer 123. When the first opaque conductive layer 122 is formed of the same material as the light-shielding layer 123, the first opaque conductive layer 122 can be formed by the same process as the light-shielding layer 123, thereby reducing the manufacturing cost of the display panel.

[0117] The first opaque conductive layer 122 may not overlap with the multiple holes 141aa. Since the first opaque conductive layer 122 does not overlap with the multiple holes 141aa, the transmittance of the portion where the holes are located can be further improved.

[0118] The first antenna electrode 151 can contact the first opaque conductive layer 122 in the first display area. The first opaque conductive layer 122 can be electrically connected to the first antenna electrode 151, so that the antenna 150 can better detect the received signal.

[0119] The light-emitting element layer 140 may include a pixel electrode 141b located below the common electrode 141a.

[0120] Reference Figure 7 In TA case 1, the second antenna electrode 152 is located in the light-emitting element layer 140 and can be formed of the same material as the pixel electrode 141b. When the second antenna electrode 152 is formed of the same material as the pixel electrode 141b, the second antenna electrode 152 can be formed at the same time as the pixel electrode 141b of the light-emitting element layer 140, thereby reducing the manufacturing cost of the display panel.

[0121] The planarization layer 130 may include a second opaque conductive layer 131 located in the first display area.

[0122] The second opaque conductive layer 131 may not overlap with the plurality of holes 141aa. When the second opaque conductive layer 131 does not overlap with the plurality of holes 141aa, the transmittance of the region in which the common electrode 141a is opened by the holes 141aa can be further improved.

[0123] The second antenna electrode 152 can contact the second opaque conductive layer 131 in the first display area. When the second opaque conductive layer 131 contacts the second antenna electrode 152, the resistance of the second antenna electrode 152 can be reduced, allowing the antenna 150 to receive signals better.

[0124] The second opaque conductive layer 131 may be formed of the same material as the second source-drain electrode pattern SDL2. When the second opaque conductive layer 131 is formed of the same material as the second source-drain electrode pattern SDL2, the second source-drain electrode pattern SDL2 and the second opaque conductive layer 131 are formed by the same process, so that the second opaque conductive layer 131 can be formed without additional processes.

[0125] Reference Figure 7 In TA case 2, the second line electrode 152 may be located in the transistor layer 120. When the second line electrode 152 is located in the transistor layer 120, the second line electrode 152 can be formed by forming signal wiring or circuit elements located in the transistor layer 120, so that the second line electrode 152 can be formed without additional steps.

[0126] The second antenna electrode 152 can be made of the same material as the first antenna electrode 151. That is to say, Figure 7 In TA case 2, both the first antenna electrode 151 and the second antenna electrode 152 can be made of a transparent conductive material. In this case, Figure 7 In TA case 2, external light can be incident on the light receiving device 200 more smoothly than in TA case 1.

[0127] Furthermore, when the second antenna electrode 152 is located in the transistor layer 120, since both the first antenna electrode 151 and the second antenna electrode 152 are located in the transistor layer 120, the distance between the antenna electrodes becomes shorter than in case TA 1, which can increase the capacitance of the antenna and improve the performance of the antenna.

[0128] The transistor layer 120 may include a third opaque conductive layer 124 located in the first display area. The third opaque conductive layer 124 may be formed of the same material as one of the wiring and circuit elements disposed in the transistor layer 120. For example, the third opaque conductive layer 124 may be formed of the same material as the gate 121a of the transistor located in the transistor layer 120.

[0129] The third opaque conductive layer 124 does not overlap with the plurality of holes 141aa. When the third opaque conductive layer 124 does not overlap with the plurality of holes 141aa, the transparent area where the common electrode 141a is opened can have higher transmittance.

[0130] The second antenna electrode 152 can contact the third opaque conductive layer 124 in the first display area. When the second antenna electrode 152 is electrically connected to the third opaque conductive layer 124, the resistance of the second antenna electrode 152 can be reduced, allowing the antenna 150 to receive signals better.

[0131] Figure 8 This is a top view of a display panel according to a comparative example of the present invention.

[0132] Reference Figure 8 The light-emitting area of ​​the sub-pixel is located in the non-transmissive region NTA, and the light-shielding layer 123 may be located in the non-transmissive region NTA.

[0133] In the first display area, the common electrode 141a includes a hole 141aa corresponding to the transmission region TA. Therefore, since the common electrode 141a is open in the transmission region TA, the transmission region TA has a higher transmittance, and the light receiving device located in the transmission region TA can effectively receive light.

[0134] The dam layer 142 may be located around the hole 141aa of the common electrode 141a. The dam layer 142 is located below the common electrode 141a and may be used as a guide in the process of forming the hole 141aa in the common electrode 141a.

[0135] Figure 9 These are top views and partial cross-sectional views of the first display area according to an embodiment of the present invention.

[0136] Figure 9 Is with Figure 7 Top view and cross view of the area corresponding to TA case 1.

[0137] Reference Figure 9 In the first display area, the common electrode 141a includes a hole 141aa corresponding to the transmission region TA. Therefore, since the common electrode 141a is open in the transmission region TA, the transmission region TA has a higher transmittance, and the light receiving device located in the transmission region TA can effectively receive light.

[0138] The dam layer 142 may be located around the hole 141aa of the common electrode 141a. The dam layer 142 is located below the common electrode 141a and may be used as a guide in the process of forming the hole 141aa in the common electrode 141a.

[0139] The second opaque conductive layer 131 may contact the second antenna electrode 152. The second opaque conductive layer 131 may include a first portion 131a and a second portion 131b. The first portion 131a may be the portion corresponding to the edge of the plurality of holes 141aa in the first display area. The first portion 131a may be the portion of the second opaque conductive layer 131 that contacts the second antenna electrode 152 in the first display area.

[0140] The second part 131b can connect to the first part 131a. Because, as... Figure 9 The second opaque conductive layer 131 is provided as shown, so that the second opaque conductive layer 131 can contact the antenna 150 in the first display area.

[0141] Figure 10 These are top views and partial cross-sectional views of the first display area according to an embodiment of the present invention.

[0142] Figure 10 Is with Figure 7 Top view and cross view of the area corresponding to TA case 2.

[0143] Reference Figure 10 The common electrode 141a in the first display area includes a hole 141aa corresponding to the transmission region TA. Therefore, since the common electrode 141a is open in the transmission region TA, the transmission region TA has a higher transmittance, and the light receiving device located in the transmission region TA can effectively receive light.

[0144] The dam layer 142 may be located around the hole 141aa of the common electrode 141a. The dam layer 142 is located below the common electrode 141a and may be used as a guide in the process of forming the hole 141aa in the common electrode 141a.

[0145] The third opaque conductive layer 124 may include a third portion 124a corresponding to the edges of the plurality of holes 141aa and a fourth portion 124b connecting the third portion. The third portion 124a may be the portion corresponding to the edges of the plurality of holes 141aa in the first display area. The third portion 124a may be the portion of the third opaque conductive layer 124 that contacts the second antenna electrode 152 in the first display area.

[0146] Part 4, 124b, can connect to Part 3, 124a. Because, as... Figure 10 The diagram shows a third opaque conductive layer 124, so that the third opaque conductive layer 124 can contact the antenna 150 in the first display area.

[0147] In one aspect, embodiments of the present invention may provide a display device including a display panel and a light receiving device.

[0148] In the display device according to an embodiment of the present invention, the details of the display panel are the same as those of the display panel according to the above-described embodiment of the present invention, and therefore, its detailed description will be omitted.

Claims

1. A display panel, comprising: A substrate, the substrate including a first display area and a second display area having a plurality of sub-pixels respectively, wherein the number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area; A transistor layer disposed on the substrate and comprising a plurality of transistors; A planarization layer on the transistor layer; A light-emitting element layer is disposed on the planarization layer, the light-emitting element layer including a common electrode and including a plurality of light-emitting elements, the common electrode including a plurality of holes in the first display area; and An antenna is disposed in the first display area and at least a portion of the antenna overlaps with the plurality of holes. The antenna includes a first antenna electrode and a second antenna electrode disposed above the first antenna electrode, the first antenna electrode being disposed in the transistor layer.

2. The display panel according to claim 1, The transistor layer includes a first opaque conductive layer located in the first display area, the first opaque conductive layer not overlapping with the plurality of holes, and The first antenna electrode is in contact with the first opaque conductive layer in the first display area.

3. The display panel according to claim 2, The transistor layer includes a light-shielding layer positioned to at least partially overlap with the light-emitting element, and The first opaque conductive layer is formed of the same material as the light-shielding layer.

4. The display panel according to claim 1, The light-emitting element layer includes pixel electrodes located below the common electrode, and The second antenna electrode is disposed in the light-emitting element layer and is formed of the same material as the pixel electrode.

5. The display panel according to claim 4, The planarization layer includes a second opaque conductive layer located in the first display area, the second opaque conductive layer not overlapping with the plurality of holes, and The second antenna electrode is in contact with the second opaque conductive layer in the first display area.

6. The display panel according to claim 5, The planarization layer includes a source-drain electrode pattern electrically connected to the transistor. The second opaque conductive layer is formed of the same material as the source-drain electrode pattern.

7. The display panel according to claim 5, The second opaque conductive layer includes a first portion corresponding to the edges of a plurality of holes in the first display area and a second portion connecting the plurality of first portions.

8. The display panel according to claim 1, wherein the second antenna electrode is disposed in the transistor layer.

9. The display panel according to claim 8, The transistor layer includes a third opaque conductive layer located in the first display area, the third opaque conductive layer not overlapping with the plurality of holes, and The second antenna electrode is in contact with the third opaque conductive layer in the first display area.

10. The display panel according to claim 9, The plurality of transistors include a gate, and The third opaque conductive layer is formed of the same material as the gate.

11. The display panel according to claim 8, The transistor layer includes a third opaque conductive layer located in the first display area, and the third opaque conductive layer includes a third portion corresponding to the edge of the plurality of holes and a fourth portion connecting the plurality of third portions.

12. A display device, comprising a display panel and a light receiving device, The display panel includes: A substrate, the substrate including a first display area and a second display area having a plurality of sub-pixels respectively, wherein the number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area; A transistor layer disposed on the substrate and comprising a plurality of transistors; A planarization layer on the transistor layer; A light-emitting element layer is disposed on the planarization layer, the light-emitting element layer including a common electrode and including a plurality of light-emitting elements, the common electrode including a plurality of holes in the first display area; and An antenna is disposed in the first display area, and at least a portion of the antenna overlaps with the plurality of holes. The antenna includes a first antenna electrode and a second antenna electrode disposed above the first antenna electrode. The first antenna electrode is disposed in the transistor layer. The light receiving device is located below the substrate and at least partially overlaps with the first display area.

13. The display device of claim 12, wherein the light receiving device is positioned to at least partially overlap with the antenna.

14. The display device of claim 12, wherein the light receiving device is not exposed from the front side of the display device.

Images