Echo cancellation device in communication device and echo cancellation method thereof

Abstract

The present invention provides an echo cancellation device and an echo cancellation method for a communication system, which can effectively reduce the amount of calculation for echo cancellation. The echo cancellation device includes an echo canceller and a combining circuit. The echo canceller obtains a plurality of delayed signals from a local signal of a communication device and divides the signals into a plurality of delayed signal groups. The echo canceller selectively ignores at least one of the delayed signal groups, and the echo canceller generates an echo cancellation signal using other delayed signal groups in the delayed signal groups. The combining circuit is coupled to an interface circuit of the communication device to receive a received signal. The combining circuit uses the echo cancellation signal to cancel the echo component of the received signal and generates a cancelled signal.

Description

Technical Field

[0001] The present invention relates to a communication device, and in particular to an echo cancellation device and an echo cancellation method applied to the communication device. Background Art

[0002] The local communication device can transmit the local signal to the remote device through the channel, and receive the remote signal sent by the remote device through the channel. Specifically, the interface circuit of the local communication device can transmit the local signal output by the transmitting circuit to the channel, and receive the remote signal from the channel. The interface circuit of the local communication device can output the received signal corresponding to the remote signal to the receiving circuit of the local communication device. Generally speaking, the remote device is also configured with an interface circuit to establish a connection with the local communication device through the channel. In the process of the local signal of the local communication device being transmitted to the remote device, if the impedance of the channel does not match the impedance of the interface circuit (the interface circuit of the local communication device and / or the interface circuit of the remote device), an echo signal will be generated. In other words, the received signal output by the interface circuit has an echo component (noise). The echo component of the received signal needs to be eliminated. Summary of the invention

[0003] The present invention provides an echo cancellation device and an echo cancellation method for a communication device, which can eliminate the echo component of a received signal under the premise of reducing the amount of calculation as much as possible.

[0004] In one embodiment of the present invention, the above-mentioned echo cancellation device includes an echo canceller and a combining circuit. The echo canceller is configured to obtain a plurality of delayed signals from a local signal of a communication device, wherein the delayed signals are divided into a plurality of delayed signal groups. The echo canceller selectively ignores at least one of the delayed signal groups, and the echo canceller generates an echo cancellation signal with other groups of the delayed signal groups. The combining circuit is coupled to the echo canceller to receive the echo cancellation signal. The combining circuit is coupled to an interface circuit of the communication device to receive a received signal. The combining circuit uses the echo cancellation signal to cancel the echo component of the received signal to generate a cancelled signal.

[0005] In one embodiment of the present invention, the echo cancellation method includes: obtaining a plurality of delayed signals from a local signal of a communication device by an echo canceller, wherein the delayed signals are divided into a plurality of delayed signal groups; selectively ignoring at least one of the delayed signal groups by the echo canceller, and generating an echo cancellation signal using the other delayed signal groups; and receiving a received signal from an interface circuit of the communication device by a combining circuit, and canceling an echo component of the received signal using the echo cancellation signal to generate a cancelled signal.

[0006] Based on the above, the communication device and the echo cancellation method thereof described in the embodiments of the present invention can selectively ignore at least one delayed signal group among the multiple delayed signal groups, and use the other delayed signal groups among the delayed signal groups to generate the echo cancellation signal. Therefore, the communication device can eliminate the echo component of the received signal under the premise of reducing the amount of calculation as much as possible. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a circuit block diagram of a communication device according to an embodiment of the present invention.

[0008] Figure 2 It is illustrated according to an embodiment of the present invention, when the channels are of different lengths, Figure 1 FIG. 4 is a schematic diagram of an impulse response curve of a received signal.

[0009] Figure 3 According to an embodiment of the present invention, Figure 1 Circuit block diagram of the interface circuit shown.

[0010] Figure 4 According to an embodiment of the present invention, Figure 1 The circuit block diagram of the echo cancellation device is shown.

[0011] Figure 5 It is a flowchart of an echo cancellation method of a communication device according to an embodiment of the present invention.

[0012] Figure 6 According to an embodiment of the present invention, Figure 5 The circuit block diagram of the echo canceller is shown.

[0013] Figure 7 According to an embodiment of the present invention, Figure 6 The circuit block diagram of the insertion loss detection circuit is shown.

[0014] Figure 8 According to an embodiment of the present invention, Figure 6 The circuit block diagram of the echo cancellation circuit shown.

[0015] Fig. 9 According to an embodiment of the present invention, Figure 8 A circuit block diagram of the calculation circuit 820_2 is shown.

[0016] Fig.10 According to an embodiment of the present invention, Figure 8 A circuit block diagram of the calculation circuit 820_1 is shown.

[0017] Description of Reference Numerals

[0018] 10: Remote Device

[0019] 11: Remote signal

[0020] 20: Channel

[0021] 100:Communication device

[0022] 110: Interface circuit

[0023] 111: Hybrid Circuit

[0024] 112:Analog-to-digital converter

[0025] 120:Echo cancellation device

[0026] 121:Echo Canceller

[0027] 122: Combined circuit

[0028] 310, 320: Pulse response curve

[0029] 311, 312, 321, 322: Pulse

[0030] 700: Insertion loss detection circuit

[0031] 710: High pass filter

[0032] 720: Power calculation circuit

[0033] 730: Power calculation circuit

[0034] 740: Computing circuit

[0035] 800: echo cancellation circuit

[0036] 810: Buffer

[0037] 820_1, 820_2, 820_(BM-1), 820_(BM): Computational circuit

[0038] 821:Multiplexer

[0039] 822, 825: Multiplier

[0040] 823, 826: Accumulator

[0041] 824, 827: coefficient calculation circuit

[0042] 830: Accumulator

[0043] d(n): Eliminated signal

[0044] e(n): echo noise

[0045] H1, H2, H3, H4, H5: tap coefficient group

[0046] H9, H10: Corresponding coefficient groups

[0047] H9X, H10X: corresponding product groups

[0048] PF: Full frequency power

[0049] PH: High frequency band power

[0050] R(n): received signal

[0051] RX: receiving circuit

[0052] S1, S2: corresponding to the cumulative results

[0053] S210~S250: Steps

[0054] s(n): Remote signal

[0055] S / L: Length information

[0056] TX: Transmit circuit

[0057] x(n): local signal

[0058] X1, X2, X2', X3, X4, X5, X M , X M ', X B-M :Delayed signal group

[0059] XX: Corresponding tap input group

[0060] y(n): echo cancellation signal DETAILED DESCRIPTION

[0061] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0062] The term "coupled (or connected)" used in the entire specification of the present invention (including the claims) may refer to any direct or indirect means of connection. For example, if the text describes a first device coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or some connection means. The terms "first", "second", etc. mentioned in the entire specification of the present invention (including the claims) are used to name the components (element) or to distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of components, nor to limit the order of components. In addition, wherever possible, components / components / steps with the same number in the drawings and embodiments represent the same or similar parts. Components / components / steps using the same number or the same terminology in different embodiments can refer to the relevant descriptions of each other.

[0063] Figure 1 is a circuit block diagram of a communication device 100 according to an embodiment of the present invention. Figure 1 The communication device 100 shown can establish a connection with the remote device 10 through the channel 20. According to design requirements, the channel 20 may include a wire or other communication medium. For example (but not limited to this), the wire of the channel 20 may be a 1000BASE-T cable, a 1000BASE-TX cable, or other communication cables. According to design requirements, in some embodiments, the remote device 10 can refer to the relevant description of the communication device 100 for analogy, so the implementation of the remote device 10 is not repeated.

[0064] exist Figure 1 In the illustrated embodiment, the communication device 100 includes a transmitter circuit TX, an interface circuit 110, an echo cancellation device 120, and a receiver circuit RX. The interface circuit 110 is coupled to the transmitter circuit TX to receive a local signal x(n). The echo cancellation device 120 is coupled to the interface circuit 110 and the transmitter circuit TX to receive a received signal R(n) and the local signal x(n). The receiver circuit RX is coupled to the echo cancellation device 120 to receive a cancelled signal d(n).

[0065] According to different design requirements, the implementation of the echo cancellation device 120 can be hardware, firmware, software (i.e., program), or a combination of more than one of the above three. In terms of hardware, the echo cancellation device 120 can be implemented in a logic circuit on an integrated circuit. The relevant functions of the echo cancellation device 120 can be implemented as hardware using hardware description languages ​​(such as Verilog HDL or VHDL) or other suitable programming languages. For example, the relevant functions of the echo cancellation device 120 can be implemented in various logic blocks, modules, and circuits in one or more controllers, microcontrollers, microprocessors, application-specific integrated circuits (ASICs), digital signal processors (DSPs), field programmable gate arrays (FPGAs), and / or other processing units. In terms of software and / or firmware, the relevant functions of the echo cancellation device 120 can be implemented as programming codes. For example, the echo cancellation device 120 is implemented using a general programming language (such as C, C++ or assembly language) or other suitable programming languages. The program code can be recorded / stored in a recording medium. A controller, a microcontroller or a microprocessor can read and execute the program code from the recording medium, thereby implementing the relevant functions of the echo cancellation device 120.

[0066] The interface circuit 110 can transmit the local signal x(n) of the transmitting circuit TX of the communication device 100 to the remote device 10 through the channel 20. The echo cancellation device 120 can obtain a plurality of delayed signals (delayed signals / elements) from the local signal x(n), wherein the delayed signals can be divided into a plurality of delayed signal groups. The remote device 10 can transmit the remote signal 11 to the communication device 100 through the channel 20. The interface circuit 110 can receive the remote signal s(n) corresponding to the remote signal 11 from the channel 20, wherein the remote signal s(n) is the remote signal 11 that has passed through the channel. The interface circuit 110 can output the received signal R(n) corresponding to the remote signal s(n) to the echo cancellation device 120.

[0067] In the process of transmitting the local signal x(n) to the interface circuit of the remote device 10 by the transmitting circuit TX, if the impedance of the transmission wire (channel 20) does not match the impedance of the interface circuit (interface circuit 110 of the communication device 100 and / or the interface circuit of the remote device 10), an echo signal will be generated in the transmission path. The echo signal (noise) will be transmitted back to the communication device 100 and become the echo component of the received signal R(n). Generally speaking, the components of the remote signal s(n) include the remote signal 11 and the far end echo, and the components of the received signal R(n) include the remote signal s(n) and the near end echo. In order to eliminate the echo component of the received signal R(n), an echo cancellation device 120 is required. According to design requirements, the echo cancellation device 120 can be configured with an adjustable finite impulse response (FIR) filter, a least mean square (LMS) filter, and (or) other filters.

[0068] It is assumed that the echo cancellation device 120 can obtain N delayed signals x1, x2, . . . , x(n) from the local signal x(n). N (Not shown in Figure 1 ), where these N delayed signals x1~x N can be divided into B delayed signal groups X1, X2, ..., X B (Not shown in Figure 1 ). According to design requirements, the N and B can be any integers. The echo cancellation device 120 can selectively ignore these delayed signal groups X1-X B At least one delayed signal group in the echo cancellation device 120 is used to generate at least one delayed signal group X1 to X2. B The other delayed signal groups in the tap group are used as the tap group input to generate the echo cancellation signal y(n) (not shown in FIG. Figure 1 The echo cancellation device 120 uses the echo cancellation signal y(n) to cancel the echo component of the received signal R(n) to generate a cancelled signal d(n) to the receiving circuit RX.

[0069] Figure 2 It is illustrated according to an embodiment of the present invention, when the channels 20 are of different lengths, Figure 1 The echo component ( Figure 2 It is a schematic diagram of an impulse response curve of the impulse response of the echo component in the R(n) signal. Figure 2 The horizontal axis of the impulse response curve shown is related to the tap coefficient group (corresponding coefficient group) H1 to HN ,For example Figure 2 The tap coefficient groups shown are H1, H2, H3, H4, and H5. Figure 1 and Figure 2 . Figure 2 The impulse response curve 310 is an impulse response curve of the received signal R(n) when the channel 20 is a short wire. In the impulse response curve 310, the pulse 311 represents the near end echo, and the pulse 312 represents the far end echo. Figure 2 The impulse response curve 320 is an impulse response curve of the received signal R(n) when the channel 20 is a long wire. In the impulse response curve 320, the pulse 321 represents the near-end echo, and the pulse 322 represents the far-end echo.

[0070] Here, it is assumed that the echo cancellation device 120 can obtain 160 delayed signals x1-x from the local signal x(n). 160 (not shown) (that is, N=160), where these delayed signals x1-x 160 It can be evenly divided into 5 delayed signal groups X1, X2, X3, X4, and X5 (not shown) (that is, B=5), wherein each delayed signal group has 160 / 5=32 delayed signals, and these tap coefficient groups H1-H5 correspond to these delayed signal groups X1-X5. Under the premise that the echo cancellation device 120 does not ignore any of these delayed signal groups X1-X5, the echo cancellation device 120 uses these delayed signal groups X1-X5 as tap input groups, and the echo cancellation device 120 can use the following equation 1 to calculate the echo cancellation signal y(n) (not shown in FIG. Figure 1 ). In equation 1, the coefficient h [(b-1)*N / B]+k Indicates the bth tap coefficient group H b The kth tap coefficient in (tap coefficient), that is, the bth delayed signal group X b The kth delayed signal x in [(b-1)*N / B]+k That is, the echo cancellation device 120 can use all the delayed signal groups X1-X5 as the tap input groups to generate the echo cancellation signal y(n).

[0071]

[0072] observe Figure 2 It can be seen from the impulse response curve 310 that when the channel 20 is a short wire, the echo cancellation device 120 can selectively ignore the echo cancellation signal calculation for the delayed signal group X4 and (or) X5, so that the communication device 100 can effectively reduce the amount of calculation without affecting the echo cancellation. Figure 2 From the impulse response curve 320 shown, it can be seen that when the channel 20 is a long wire, the echo cancellation device 120 can selectively ignore the echo cancellation signal calculation for the delayed signal group X2 and (or) X3, so that the communication device 100 can effectively reduce the amount of calculation without affecting the echo cancellation. In other words, by utilizing the characteristic that the echo impulse response is mostly sparse, the echo cancellation device 120 can ignore the calculation of the echo cancellation signal of the corresponding sparse part to achieve the purpose of reducing the amount of calculation. The parts where the impulse response will be sparse are related to the channel length information. The echo cancellation device 120 can decide to ignore the calculation of the echo cancellation signal of the corresponding sparse part based on the line length.

[0073] exist Figure 1 In the illustrated embodiment, the echo cancellation device 120 can dynamically decide which one (or which) of the delayed signal groups X1-X5 to ignore according to the length of the channel 20. Taking the impulse response curve 310 (the channel 20 is a short wire) as an example, the echo cancellation device 120 can dynamically decide to ignore one (or more) of the delayed signal groups X2, X4 and X5. Taking the impulse response curve 320 (the channel 20 is a long wire) as an example, the echo cancellation device 120 can dynamically decide to ignore one (or more) of the delayed signal groups X2, X3 and X4.

[0074] Figure 3 According to an embodiment of the present invention, Figure 1 FIG. 1 is a circuit block diagram of the interface circuit 110. Figure 3 In the illustrated embodiment, the interface circuit 110 includes a hybrid circuit 111 and an analog to digital converter (ADC) 112. The hybrid circuit 111 is adapted to transmit a local signal x(n) to the channel 20 and receive a remote signal 11 through the channel 20. The ADC 112 is coupled to the hybrid circuit 111 to receive the remote signal 11. The ADC 112 is configured to convert the remote signal 11 into a received signal R(n).

[0075] Figure 4 According to an embodiment of the present invention, Figure 1 FIG. 1 is a circuit block diagram of the echo cancellation device 120. Figure 4 In the illustrated embodiment, the echo cancellation device 120 includes an echo canceller 121 and a combine circuit 122. The echo canceller 121 can obtain N delayed signals x1-x from the local signal x(n). N (Not shown in Figure 4 ), where these delayed signals x1~xN Can be divided into B delayed signal groups X1~X B , and each delayed signal group has N / B delayed signals. For example, the echo canceller 121 can obtain 160 delayed signals x1-x from the local signal x(n). 160 , these delayed signals x1~x 160 can be equally divided into 5 delayed signal groups X1-X5, and each delayed signal group has 160 / 5=32 delayed signals, wherein the delayed signal group X1 includes delayed signals x1-x5. 32 , the delayed signal group X2 includes the delayed signal x 33 ~x 64 , the delayed signal group X3 includes the delayed signal x 65 ~x 96 , the delayed signal group X4 includes the delayed signal x 97 ~x 128 , and the delayed signal group X5 includes the delayed signal x 129 ~x 160 .

[0076] Figure 5 FIG. 1 is a flow chart of an echo cancellation method for a communication device according to an embodiment of the present invention. Figure 4 and Figure 5 In step S210, the interface circuit 110 may transmit the local signal x(n) of the communication device 100 to the remote device 10 through the channel 20. In step S220, the echo canceller 121 may obtain a plurality of delayed signals (delayed signals / elements) from the local signal x(n) of the communication device 100. It is assumed that the echo canceller 121 may obtain N delayed signals x1, x2, ..., x elements from the local signal x(n) in step S220. N (Not shown in Figure 4 ), where these N delayed signals x1~x N can be divided into B delayed signal groups X1, X2, ..., X B (Not shown in Figure 4 ). According to design requirements, the N and B can be any integers. In step S230, the interface circuit 110 of the communication device 100 can receive the remote signal 11 sent by the remote device 10 through the channel 20, that is, receive the remote signal s(n) from the channel 20, and output the received signal R(n) corresponding to the remote signal s(n) to the echo cancellation device 120.

[0077] In step S240, the echo canceller 121 may selectively ignore the delayed signal groups X1-X BAt least one group in the delay signal group X1-X B The other groups in the group are used as tap input groups to generate the echo cancellation signal y(n). For example, the echo canceller 121 can adaptively adjust the filter coefficient according to the echo-cancelled echo noise (residual echo) e(n). The echo noise e(n) can be the difference between the cancelled signal d(n) and the remote signal s(n), that is, e(n)=d(n)-s(n). According to the echo noise e(n), the echo canceller 121 can use these tap input groups to generate the echo cancellation signal y(n). The combining circuit 122 is coupled to the echo canceller 121 to receive the echo cancellation signal y(n). In step S250, the combining circuit 122 is coupled to the interface circuit 110 of the communication device 100 to receive the received signal R(n). In step S250, the combining circuit 122 can use the echo cancellation signal y(n) to cancel the echo component of the received signal R(n) and generate the cancelled signal d(n) to the receiving circuit RX.

[0078] For example, Figure 2 Taking the embodiment shown as an example, the echo canceller 121 can dynamically decide which one (or which groups) of the delayed signal groups X1 to X5 to ignore according to the length of the channel 20. Figure 2 The echo canceller 121 can selectively ignore one (or more) of the delayed signal groups X2, X4 and X5 (e.g., ignore the delayed signal group X5). Similarly, when the channel 20 is a long wire ( Figure 2 As shown in the impulse response curve 320 , the echo canceller 121 may selectively ignore one (or more) of the delayed signal groups X2 , X3 and X4 (eg, ignore the delayed signal group X2 ).

[0079] Figure 6 According to an embodiment of the present invention, Figure 5 FIG. 1 is a circuit block diagram of the echo canceller 121. Figure 6 In the illustrated embodiment, the echo canceller 121 includes an insertion loss detection circuit 700 and an echo canceller 800. The insertion loss detection circuit 700 is coupled to the interface circuit 110 to receive the received signal R(n). The insertion loss detection circuit 700 can check the power loss of the received signal R(n) to determine the length information S / L of the channel 20.

[0080] The echo cancellation circuit 800 is coupled to the insertion loss detection circuit 700 to receive the length information S / L. The echo cancellation circuit 800 can obtain a plurality of delayed signals x1-x from the local signal x(n). N (For example, x1~x 160 )(Not shown in Figure 6 ), where these delayed signals x1~x N Can be divided into B delayed signal groups X1~X B (eg, X1-X5), and each delayed signal group has N / B delayed signals. The echo cancellation circuit 800 can selectively ignore these delayed signal groups X1-X5 according to the length information S / L. B At least one group in the above, and using these delayed signal groups X1 to X B The other groups in the 800 are used as multiple tap input groups. The echo cancellation circuit 800 can use these tap input groups to generate the echo cancellation signal y(n). According to the design requirements, the echo cancellation circuit 800 may include a least mean square (LMS) filter and / or other filters. The echo cancellation circuit 800 can adaptively adjust the filter coefficients according to the echo noise e(n). According to the echo noise e(n), the echo cancellation circuit 800 can use these tap input groups to generate the echo cancellation signal y(n).

[0081] For example, Figure 2 Taking the embodiment shown as an example, the echo cancellation circuit 800 can determine the length of the channel 20 according to the length information S / L, and then dynamically decide which one (or which groups) of the delayed signal groups X1-X5 to ignore. In the case where the length information S / L indicates that the channel 20 is a short wire ( Figure 2 The echo cancellation circuit 800 can selectively ignore one (or more) of the delayed signal groups X2, X4 and X5 (e.g., ignore the delayed signal group X5). Similarly, when the length information S / L indicates that the channel 20 is a long wire ( Figure 2 As shown in the impulse response curve 320 , the echo cancellation circuit 800 can selectively ignore one (or more) of the delayed signal groups X2 , X3 and X4 (eg, ignore the delayed signal group X2 ).

[0082] That is to say, by utilizing the characteristic that the echo impulse response is mostly sparse, the echo cancellation circuit 800 can ignore the calculation of the echo cancellation signal corresponding to the sparse part, so as to achieve the purpose of reducing the amount of calculation. The part where the impulse response is sparse is related to the channel length information. According to the length information S / L (line length information) provided by the insertion loss detection circuit 700, the echo cancellation circuit 800 can decide to ignore the calculation of the echo cancellation signal corresponding to the sparse part.

[0083] Figure 7 According to an embodiment of the present invention, Figure 6 FIG. 7 is a circuit block diagram of an insertion loss detection circuit 700. Figure 7 In the illustrated embodiment, the insertion loss detection circuit 700 includes a high-pass filter 710, a power calculation circuit 720, a power calculation circuit 730, and a calculation circuit 740. The high-pass filter 710 is coupled to the interface circuit 110 to receive the received signal R(n). The high-pass filter 710 can extract the high-frequency component of the received signal R(n) to the power calculation circuit 720. The power calculation circuit 720 is coupled to the high-pass filter 710 to receive the high-frequency component of the received signal R(n). The power calculation circuit 720 can calculate the high-band power (high-band power) PH of the high-frequency component. The power calculation circuit 730 is coupled to the interface circuit 110 to receive the received signal R(n). The power calculation circuit 730 can calculate the full-band power (full-band power) PF of the received signal R(n).

[0084] The calculation circuit 740 is coupled to the power calculation circuit 720 to receive the high-band power PH. The calculation circuit 740 is coupled to the power calculation circuit 730 to receive the full-band power PF. The calculation circuit 740 can use the high-band power PH and the full-band power PF to calculate the power loss rate (i.e., PH / PF). The calculation circuit 740 can determine the length information S / L based on the power loss rate PH / PF. The smaller the power loss, the larger the PH / PF, which indicates that the length of the channel 20 is shorter. For example (but not limited to this), the calculation circuit 740 can compare the power loss rate PH / PF with a threshold value THR. The threshold value THR can be determined according to design requirements. When PH / PF is greater than the threshold value THR, the calculation circuit 740 can determine that the channel 20 is a short wire, and notify the echo cancellation circuit 800 of the determination result by the length information S / L. On the contrary, when PH / PF is less than the threshold value THR, the calculation circuit 740 can determine that the channel 20 is a long wire.

[0085] Figure 8 According to an embodiment of the present invention, Figure 6 FIG. 8 is a circuit block diagram of an echo cancellation circuit 800. Figure 8 In the illustrated embodiment, the echo cancellation circuit 800 includes a buffer 810, a plurality of computing circuits (eg Figure 8 The calculation circuits 820_1, 820_2, ..., 820_(BM-1), 820_(BM)) and the accumulator 830 are shown. The buffer 810 can buffer the local signal x(n) to output a plurality of delayed signals of the local signal x(n). For example, the buffer 810 can obtain N delayed signals x1-x2 from the local signal x(n). N(Not shown in Figure 8 ), where these N delayed signals x1~x N Can be divided into B delayed signal groups X1~X B , and each delayed signal group X has N / B delayed signals x. Assume that the buffer 810 can obtain 160 delayed signals x1-x from the local signal x(n). 160 (that is, N=160), where these delayed signals x1~x 160 can be equally divided into 5 delayed signal groups X1-X5 (that is, B=5), and the delayed signal group X1 includes 32 delayed signals x1-x5. 32 , the delayed signal group X2 includes 32 delayed signals x 33 ~x 64 , the delayed signal group X3 includes 32 delayed signals x 65 ~x 96 , the delayed signal group X4 includes 32 delayed signals x 97 ~x 128 , and the delayed signal group X5 includes 32 delayed signals x 129 ~x 160 .

[0086] The calculation circuits 820_1-820_(BM) are coupled to the buffer 810 to receive the delayed signal groups X1-X2, respectively. B Each of the calculation circuits 820_1 to 820_(BM) uses the delay signal groups X1 to X2. B As the corresponding tap input group. Each of these calculation circuits 820_1~820_(BM) uses each tap input (delayed signal) in the corresponding tap input group to multiply the corresponding coefficient (tap coefficient) to generate a corresponding product of each tap input. Each of these calculation circuits 820_1~820_(BM) accumulates these corresponding products to generate a corresponding accumulated result to the accumulator 830.

[0087] It should be noted that the buffer 810 generates B delayed signal groups X1-X B , but the number of these calculation circuits 820_1~820_(BM) is less than the number of delayed signal groups X1~X B The number B of delayed signal groups to be omitted is M, where M is an integer greater than 0. M is the number of delayed signal groups to be omitted. Figure 8 The delayed signal group X M , X M 'With X B-M represents the delayed signal group X1-X generated by the buffer 810 BThe implementation details of at least one of the computing circuits 820_1 to 820_(BM) (e.g., 820_(BM-1)) can be deduced by referring to the relevant description of the computing circuit 820_2, and the implementation details of the other computing circuits of the computing circuits 820_1 to 820_(BM) (e.g., 820_(BM)) can be deduced by referring to the relevant description of the computing circuit 820_1.

[0088] For example, the calculation circuit 820_1 may receive the delayed signal group X1 (as the corresponding tap input group) from the buffer 810. The calculation circuit 820_1 may use each tap input (delayed signal) in the delayed signal group X1 to multiply the corresponding coefficient (tap coefficient) to generate a corresponding product. The calculation circuit 820_1 may accumulate these corresponding products corresponding to the delayed signal group X1 to generate a corresponding accumulated result S1 to the accumulator 830. For example, the calculation circuit 820_1 may use the following equation 2 to calculate the corresponding accumulated result S1. In equation 2, the coefficient h k represents the kth delayed signal x in the delayed signal group X1 (corresponding to the tap input group) k (Tap input) corresponds to the tap coefficient.

[0089]

[0090] For another example, the calculation circuit 820_2 may receive two or more delayed signal groups from the buffer 810, such as the delayed signal group X2 and another delayed signal group X2'. Based on design requirements, the delayed signal group X2' may be a delayed signal group that can be selectively ignored according to the line length, and the delayed signal group X2 may be another delayed signal group that can be selectively ignored according to the line length. The calculation circuit 820_2 may select a corresponding one of the multiple delayed signal groups (such as the delayed signal groups X2 and X2') as the corresponding tap input group according to the length information S / L of the insertion loss detection circuit 700.

[0091] For example, Figure 2 Taking the embodiment shown in the figure as an example, it is assumed that the echo cancellation circuit 800 can dynamically decide to ignore one of the delayed signal groups X2 and X5 according to the length of the channel 20. Figure 8 The delayed signal group X2' shown may be the delayed signal group X5. In the case where the channel 20 is a short wire ( Figure 2The pulse response curve 310 shown in FIG. 3 ) is shown in FIG. 3 . The calculation circuit 820_2 can select the delayed signal group X2 as the corresponding tap input group, and then multiply each tap input (delayed signal) in the corresponding tap input group by the corresponding coefficient to generate a corresponding product (that is, ignoring the delayed signal group X5). The calculation circuit 820_2 can accumulate these corresponding products of the delayed signal group X2 (corresponding tap input group) to generate a corresponding accumulated result S2 to the accumulator 830. The way in which the calculation circuit 820_2 calculates the corresponding accumulated result S2 can be inferred by referring to the relevant description of the calculation circuit 820_1 calculating the corresponding accumulated result S1, so it will not be repeated.

[0092] In the case where channel 20 is a long wire ( Figure 2 As shown in the pulse response curve 320), the calculation circuit 820_2 can select the delayed signal group X5 (that is, Figure 8 The calculation circuit 820_2 can accumulate these corresponding products of the delayed signal group X5 (corresponding tap input group) to generate a corresponding accumulated result S2 to the accumulator 830.

[0093] The accumulator 830 is coupled to the calculation circuits 820_1 ˜ 820_(BM) to receive corresponding accumulation results (eg, S1 and S2 ). The accumulator 830 can accumulate the corresponding accumulation results to generate an echo cancellation signal y(n) to the combining circuit 122 .

[0094] Fig. 9 According to an embodiment of the present invention, Figure 8 A circuit block diagram of the calculation circuit 820_2 is shown. Fig.10 According to an embodiment of the present invention, Figure 8 A circuit block diagram of the calculation circuit 820_1 is shown. Figure 8 The implementation details of at least one of the calculation circuits shown can be referred to Fig. 9 The related description of the calculation circuit 820_2 shown in FIG. Figure 8 The implementation details of other computing circuits in these computing circuits can be referred to Fig.10 The related description of the calculation circuit 820_1 can be deduced by analogy.

[0095] exist Fig. 9In the illustrated embodiment, the calculation circuit 820_2 includes a multiplexer 821, a multiplier 822, and an accumulator 823. The multiplexer 821 is coupled to the buffer 810 to receive the delayed signal group X2 and the delayed signal group X2'. The multiplexer 821 can select a group from the delayed signal group X2 and the delayed signal group X2' as the corresponding tap input group XX according to the length information S / L of the insertion loss detection circuit 700. The multiplier 822 is coupled to the multiplexer 821 to receive the corresponding tap input group XX. The multiplier 822 can use each tap input (delay signal) in the corresponding tap input group XX to multiply a corresponding coefficient in the corresponding coefficient group (tap coefficient group) H9 to generate a corresponding product in the corresponding product group (tap product group) H9X. The accumulator 823 is coupled to the multiplier 822 to receive these corresponding products of the corresponding product group H9X. The accumulator 823 can accumulate each tap product in the tap product group (corresponding to the product group H9X) to generate a corresponding accumulation result S2 to the accumulator 830.

[0096] Fig. 9 The calculation circuit 820_2 shown also includes a coefficient calculation circuit 824. The coefficient calculation circuit 824 can use the corresponding tap input group XX and the echo noise e(n) after echo cancellation to calculate the corresponding coefficient group (tap coefficient group) H9, and provide the corresponding coefficient group H9 to the multiplier 822. This embodiment does not limit the calculation method and algorithm of the coefficient calculation circuit 824. According to design requirements, in some embodiments, the coefficient calculation circuit 824 can use a known algorithm or other algorithm to calculate the tap coefficient.

[0097] exist Fig.10 In the illustrated embodiment, the calculation circuit 820_1 includes a multiplier 825, an accumulator 826, and a coefficient calculation circuit 827. The coefficient calculation circuit 827 can use the delayed signal group X1 as a tap input group. The coefficient calculation circuit 827 can use the delayed signal group X1 and the echo noise e(n) after echo cancellation to calculate the corresponding coefficient group (tap coefficient group) H10, and provide the corresponding coefficient group H10 to the multiplier 825. Fig.10 The coefficient calculation circuit 827 shown can refer to Fig. 9The related description of the coefficient calculation circuit 824 shown in FIG. 8 is analogous, so it is not repeated here. The multiplier 825 is coupled to the buffer 810 to receive the delayed signal group X1. The multiplier 825 can use each tap input (delayed signal) in the delayed signal group X1 to multiply a corresponding coefficient in the corresponding coefficient group (tap coefficient group) H10 to generate a corresponding product in the corresponding product group (tap product group) H10X. The accumulator 826 is coupled to the multiplier 825 to receive these corresponding products of the corresponding product group H10X. The accumulator 823 can accumulate each tap product in the tap product group (corresponding product group H10X) to generate a corresponding accumulated result S1 to the accumulator 830.

[0098] In summary, the communication device 100 and the echo cancellation method thereof described in the above embodiments can ignore the echo cancellation signal calculation corresponding to the sparse part of the echo impulse response by inserting the channel length information of the channel provided by the loss detection circuit 700, thereby selectively ignoring the multiple delayed signal groups X1-X B At least one delayed signal group is selected from the plurality of delayed signal groups, and the other delayed signal groups are used as tap input groups to generate the echo cancellation signal y(n). Therefore, the communication device 100 can eliminate the echo component of the received signal R(n) under the premise of reducing the amount of calculation as much as possible to generate the cancelled signal d(n) to the receiving circuit RX.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An echo cancellation device, suitable for a communication device, characterized in that: The echo cancellation device comprises: an echo canceller configured to obtain a plurality of delayed signals from a local signal of the communication device, wherein the plurality of delayed signals are divided into a plurality of delayed signal groups, the echo canceller selectively ignores at least one of the plurality of delayed signal groups, and the echo canceller generates an echo cancellation signal with other groups of the plurality of delayed signal groups; and a combining circuit coupled to the echo canceller to receive the echo cancellation signal, and coupled to the interface circuit of the communication device to receive a received signal, wherein the combining circuit uses the echo cancellation signal to cancel an echo component of the received signal to generate a cancelled signal, The echo canceller is further configured to determine a length of a channel coupled between the communication device and a remote device based on power loss of the received signal, and the echo canceller dynamically determines which delayed signal group of the plurality of delayed signal groups to ignore based on the length of the channel.

2. The echo cancellation device according to claim 1, characterized in that: The interface circuit transmits the local signal of the communication device to the remote device through the channel, and the echo canceller dynamically determines which delayed signal group among the plurality of delayed signal groups to ignore according to the length of the channel.

3. The echo cancellation device according to claim 1, characterized in that: The echo canceller comprises: an insertion loss detection circuit coupled to the interface circuit to receive the received signal, wherein the interface circuit transmits the local signal of the communication device to the remote device through the channel, the insertion loss detection circuit checks the power loss of the received signal to determine the length information of the channel; and an echo cancellation circuit, coupled to the insertion loss detection circuit to receive the length information, wherein the echo cancellation circuit is configured to obtain the multiple delayed signals from the local signal, the echo cancellation circuit selectively ignores at least one delayed signal group among the multiple delayed signal groups according to the length information, and the echo cancellation circuit generates the echo cancellation signal with other delayed signal groups among the multiple delayed signal groups.

4. The echo cancellation device according to claim 3, characterized in that: The insertion loss detection circuit comprises: a high pass filter, coupled to the interface circuit to receive the received signal, configured to extract a high frequency component of the received signal; A first power calculation circuit, coupled to the high pass filter to receive the high frequency component, configured to calculate a high frequency band power of the high frequency component; A second power calculation circuit is configured to calculate the full-band power of the received signal; and A calculation circuit is coupled to the first power calculation circuit to receive the high-band power, and is coupled to the second power calculation circuit to receive the full-band power, wherein the calculation circuit uses the high-band power and the full-band power to calculate a power loss rate, and the calculation circuit determines the length information based on the power loss rate.

5. The echo cancellation device according to claim 3, characterized in that: The echo cancellation circuit includes a minimum mean square filter.

6. The echo cancellation device according to claim 3, characterized in that: The echo cancellation circuit comprises: a buffer configured to buffer the local signal to output the plurality of delayed signals; a plurality of calculation circuits coupled to the buffer to receive the plurality of delayed signal groups, wherein each of the plurality of calculation circuits uses one of the plurality of delayed signal groups as a corresponding tap input group, uses each delayed signal of the corresponding tap input group to multiply a corresponding coefficient to generate a corresponding product, and accumulates the corresponding products to generate a corresponding accumulation result; and A first accumulator, coupled to the plurality of computing circuits to receive the corresponding accumulation results, wherein the first accumulator accumulates the corresponding accumulation results to generate the echo cancellation signal; The multiple delayed signal groups include a first delayed signal group and a second delayed signal group, and at least one calculation circuit among the multiple calculation circuits selects one group from the first delayed signal group and the second delayed signal group as the corresponding tap input group according to the length information.

7. The echo cancellation device according to claim 6, characterized in that: The at least one computing circuit of the plurality of computing circuits comprises: a multiplexer coupled to the buffer to receive the first delayed signal group and the second delayed signal group, wherein the multiplexer selects one group from the first delayed signal group and the second delayed signal group as the corresponding tap input group according to the length information; a multiplier coupled to the multiplexer to receive the corresponding tap input group, wherein the multiplier uses each delayed signal in the corresponding tap input group to multiply the corresponding coefficient to generate the corresponding product; and The second accumulator is coupled to the multiplier to receive the corresponding products, wherein the second accumulator accumulates the corresponding products to generate the corresponding accumulation result.

8. The echo cancellation device according to claim 7, characterized in that: The at least one computing circuit of the plurality of computing circuits further comprises: The coefficient calculation circuit is configured to use the corresponding tap input group to calculate the corresponding coefficient and provide the corresponding coefficient to the multiplier.

9. An echo cancellation method, applicable to a communication device, characterized in that: The echo cancellation method comprises: Acquire a plurality of delayed signals from a local signal of the communication device by an echo canceller, wherein the plurality of delayed signals are divided into a plurality of delayed signal groups; The echo canceller selectively ignores at least one of the plurality of delayed signal groups and generates an echo cancellation signal using other groups of the plurality of delayed signal groups; receiving a received signal from an interface circuit of the communication device by a combining circuit, and canceling the echo component of the received signal using the echo cancellation signal to generate a cancelled signal; determining, by the echo canceller, a length of a channel coupled between the communication device and a remote device based on the power loss of the received signal; and The echo canceller dynamically determines which delayed signal group among the plurality of delayed signal groups to ignore according to the length of the channel.

10. The echo cancellation method according to claim 9, characterized in that: The interface circuit transmits the local signal of the communication device to the remote device through the channel, and the echo cancellation method further includes: The echo canceller dynamically determines which delayed signal group among the plurality of delayed signal groups to ignore according to the length of the channel.

11. The echo cancellation method according to claim 9, characterized in that: The interface circuit transmits the local signal of the communication device to the remote device through the channel, and the echo cancellation method further includes: checking the power loss of the received signal by an insertion loss detection circuit of the echo canceller to determine the length information of the channel; deriving the plurality of delayed signals from the local signal by an echo cancellation circuit of the echo canceller; and The echo cancellation circuit selectively ignores at least one delayed signal group among the plurality of delayed signal groups according to the length information, and generates the echo cancellation signal with other delayed signal groups among the plurality of delayed signal groups.

12. The echo cancellation method according to claim 11, characterized in that: The echo cancellation method further comprises: extracting a high frequency component of the received signal by a high pass filter of the insertion loss detection circuit; The first power calculation circuit of the insertion loss detection circuit calculates the high-frequency band power of the high-frequency component; calculating the full-band power of the received signal by a second power calculation circuit of the insertion loss detection circuit; The calculation circuit of the insertion loss detection circuit uses the high-band power and the full-band power to calculate a power loss rate; and The calculation circuit determines the length information according to the power loss rate.

13. The echo cancellation method according to claim 11, characterized in that: The echo cancellation circuit includes a minimum mean square filter.

14. The echo cancellation method according to claim 11, characterized in that: The echo cancellation method further comprises: buffering the local signal by a buffer of the echo cancellation circuit to output the plurality of delayed signals; each of the plurality of calculation circuits of the echo cancellation circuit uses one of the plurality of delayed signal groups as a corresponding tap input group, uses each delayed signal of the corresponding tap input group to multiply by a corresponding coefficient to generate a corresponding product, and accumulates the corresponding products to generate a corresponding accumulation result, wherein the plurality of delayed signal groups include a first delayed signal group and a second delayed signal group, and at least one of the plurality of calculation circuits selects one of the first delayed signal group and the second delayed signal group as the corresponding tap input group according to the length information; and The corresponding accumulation results are accumulated by the first accumulator of the echo cancellation circuit to generate the echo cancellation signal.

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