A battery internal resistance tester

Abstract

The present invention discloses a battery internal resistance tester, including an MCU control module, a sampling module, an FPGA module, a DAC, a voltage driving circuit and a resistance module, wherein the resistance module includes a current limiting resistor and a reference resistor, and the voltage driving circuit, the current limiting resistor, the reference resistor and the battery under test constitute a test loop, and a resistor is added as a reference resistor on the basis that the test loop has a current limiting resistor. Compared with a traditional battery internal resistance tester that uses a current limiting resistor as a reference value to calculate the internal resistance of the battery, the present invention uses the resistance value of the reference resistor as a reference value to calculate the internal resistance of the battery under test, thereby avoiding the situation in which the measurement result is not accurate enough due to a large error in the current limiting resistor, and improving the test accuracy of the battery internal resistance tester. In addition, the battery internal resistance tester of the present invention includes an FPGA module, and the FPGA module can achieve complementary advantages with the MCU control module, thereby improving the test efficiency of the battery internal resistance tester.

Description

Technical Field

[0001] The present invention relates to the technical field of power batteries, and in particular to a battery internal resistance tester. Background Art

[0002] With the popularity of new energy electric vehicles and the continuous expansion of the consumer electronics market, rechargeable batteries are being used more and more widely. Internal resistance is a very important indicator of the battery. It directly reflects the electrochemical properties of the battery and is closely related to the battery capacity, maximum current, etc. In production, due to the requirements of multiple strings of batteries for the consistency of battery cells, it is often necessary to sort out cells with similar internal resistance values ​​in parallel, so it is necessary to measure the internal resistance of the single cell more accurately. At the same time, the aging of the battery is often manifested in physical properties as an increase in internal resistance. After the battery ages, the polarization resistance of the positive and negative electrodes increases, and the external manifestation is an increase in internal resistance. Therefore, the measurement of battery internal resistance is very important in practical engineering applications.

[0003] The internal resistance of lithium batteries is mainly composed of two types: ohmic internal resistance and polarization internal resistance. Ohmic internal resistance is closely related to the battery manufacturing level and can be basically considered constant at constant temperature, but polarization internal resistance may fluctuate. At the same time, the relationship between the voltage and current at both ends of the lithium battery conforms to Ohm's law. At present, the main test methods for the internal resistance of lithium-ion batteries are density method, DC discharge method, AC injection method and electrochemical impedance spectroscopy.

[0004] With the continuous development of lithium battery technology, the internal resistance of power batteries is getting lower and lower, and the industry has also put forward higher requirements for the test accuracy of lithium battery internal resistance. The traditional battery internal resistance test method can no longer meet the current high-precision test requirements of battery internal resistance, and there is also the problem of low test efficiency. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a battery internal resistance tester with high testing accuracy and high testing efficiency.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0007] A battery internal resistance tester comprises an MCU control module, a sampling module, an FPGA module, a DAC, a voltage driving circuit and a resistance module, wherein the resistance module comprises a current limiting resistor and a reference resistor, wherein: the voltage driving circuit, the current limiting resistor, the reference resistor and a battery under test are connected in series to form a test loop; the sampling module is used to collect the voltage across the battery under test, and is used to collect the voltage across the reference resistor; the FPGA module is used to generate and output a digital signal, and is used to digitally filter the signal value collected by the sampling module; the DAC is used to convert the digital signal output by the FPGA module into an analog signal; the voltage driving circuit is used to amplify the analog signal output by the DAC into a voltage driving signal, and adjust the output current of the voltage driving signal in real time following the output of the DAC; the MCU control module is used to control the output voltage amplitude and frequency of the digital signal output by the FPGA module, and is used to calculate the internal resistance of the battery under test according to the signal value collected by the sampling module after filtering.

[0008] Preferably, the sampling module includes a preamplifier for amplifying the voltage signal at both ends of the reference resistor, a lock-in amplifier for amplifying the voltage signal at both ends of the measured battery and filtering out noise, a rectifier circuit for rectifying the voltage signal output after being processed by the preamplifier and the lock-in amplifier, a secondary amplifier for secondary amplifying the voltage signal at both ends of the reference resistor and the voltage signal at both ends of the measured battery after being rectified by the rectifier circuit, and an ADC connected to the output end of the secondary amplifier and used for synchronously sampling the voltage at both ends of the measured battery and the voltage at both ends of the reference resistor.

[0009] Preferably, the FPGA module includes a digitally controlled oscillator source for generating and outputting digital signals and a digital filter for digitally filtering the signal values ​​collected by the sampling module.

[0010] Preferably, the FPGA module includes: the digital control oscillation source is a DDS signal generator constructed by internal logic resources of the FPGA module.

[0011] Preferably, the FPGA module also includes a phase compensation unit, which collects in real time the time difference between the voltage zero-crossing point of the numerically controlled oscillation source and the voltage zero-crossing point of the battery under test, and performs phase compensation on the voltage signal output after being processed by the pre-amplifier and the phase-locked amplifier according to the time difference, so that it is consistent with the phase of the signal output by the numerically controlled oscillation source.

[0012] Preferably, the digital filter adopts a FIR low-pass filter.

[0013] Preferably, the battery internal resistance tester also includes a gear control module provided with multiple gears, the resistance module includes multiple parallel branches, each branch is connected in series with a current limiting resistor and a reference resistor of corresponding resistance value, each branch corresponds to a gear of the gear control module, and the gear control module selects one of the gears under the control of the MCU control module, and connects a branch corresponding to the selected gear to the test circuit.

[0014] Preferably, the gear control module can switch gears through a switch tube or a multi-gear selection switch to connect the current limiting resistor and the reference resistor of the corresponding branch to the test loop.

[0015] The beneficial technical effect of the present invention is that: the above-mentioned battery internal resistance tester has a current limiting resistor and a reference resistor connected in its test circuit, and a resistor is added as a reference resistor on the basis that the test circuit has a current limiting resistor. Compared with the traditional battery internal resistance tester that uses the current limiting resistor as a reference value to calculate the internal resistance of the battery, the above-mentioned battery internal resistance tester uses the resistance value of the reference resistor as a reference value to calculate the internal resistance of the tested battery, thereby avoiding the situation where the measurement result is not accurate enough due to the large error of the current limiting resistor, and improving the test accuracy of the battery internal resistance tester. In addition, the battery internal resistance tester in this embodiment includes an FPGA module, and the FPGA module can complement each other with the MCU control module, thereby improving the test efficiency of the battery internal resistance tester. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural schematic diagram of a battery internal resistance tester of the present invention. DETAILED DESCRIPTION

[0017] In order to enable those skilled in the art to more clearly understand the objectives, technical solutions and advantages of the present invention, the present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0018] like Figure 1 As shown, in one embodiment of the present invention, the battery internal resistance tester includes an MCU control module 10, a sampling module 20, an FPGA (Field Programmable Gate Array) module 30, a DAC (Digital to Analog Converter) 40, a voltage driving circuit 50 and a resistance module 60, and the resistance module 60 includes a current limiting resistor 61 and a reference resistor 62.

[0019] The sampling module 20 is used to collect the voltage across the battery 80 under test, and to collect the voltage across the reference resistor 62; the FPGA module 30 is used to generate and output a digital signal, and to digitally filter the signal value collected by the sampling module 20; the DAC40 is used to convert the digital signal output by the FPGA module 20 into an analog signal; the voltage drive circuit 50 is used to amplify the analog signal output by the DAC40 into a voltage drive signal, and to adjust the output current of the voltage drive signal in real time following the output of the DAC40; the MCU control module 10 is used to control the output voltage amplitude and frequency of the digital signal output by the FPGA module 20, and to calculate the internal resistance of the battery 80 under test according to the signal value collected by the sampling module 20 after filtering.

[0020] The voltage driving circuit 50, the current limiting resistor 61, the reference resistor 62 and the battery under test 80 are connected in series to form a test loop. The FPGA module 30 generates and outputs a digital signal under the control of the MCU control module 10. The digital signal is injected into the test loop through the DAC40 and the voltage driving circuit 50 as an excitation source. In this way, a sinusoidal excitation current will be generated in the entire test loop, an excitation voltage will be generated at both ends of the reference resistor 62, and an excitation voltage will also be generated at both ends of the battery under test 80. After the excitation is injected into the test loop, the sampling module 20 collects the excitation voltage at both ends of the reference resistor 62 and the battery under test 80; the FPGA module 30 is electrically connected to the sampling module 20, the FPGA module 30 receives the signal collected by the sampling module 20 and performs digital filtering on the signal collected by the sampling module 20; the MCU control module 10 is electrically connected to the FPGA module 30, the MCU control module 10 receives the signal output by the FPGA module 30 after filtering, and calculates the internal resistance of the battery under test 80 according to the signal value collected by the sampling module 20 after filtering.

[0021] The battery internal resistance tester in this embodiment has a current limiting resistor and a reference resistor connected in its test circuit. A resistor is added as a reference resistor on the basis of the current limiting resistor in the test circuit. Compared with the traditional battery internal resistance tester that uses the current limiting resistor as a reference value to calculate the battery internal resistance, the battery internal resistance tester in this embodiment uses the resistance value of the reference resistor as a reference value to calculate the internal resistance of the tested battery, thereby avoiding the situation where the measurement result is not accurate enough due to the large error of the current limiting resistor, and improving the test accuracy of the battery internal resistance tester. In addition, the battery internal resistance tester in this embodiment includes an FPGA module, and the FPGA module can complement each other with the MCU control module 10, thereby improving the test efficiency of the battery internal resistance tester.

[0022] See also Figure 1In some preferred embodiments of the present invention, the sampling module 20 includes a pre-amplifier 21, a phase-locked amplifier 22, a rectifier circuit 23, a secondary amplifier 24 and an ADC (Analog-to-Digital Converter) 25, and the FPGA module 30 includes a digitally controlled oscillator source 31, a digital filter 32 and a phase compensation unit 33.

[0023] The digital control oscillation source 31 is used to generate and output a digital signal with high resolution and strong stability, and its frequency, phase and amplitude can be adjusted in real time with high precision. Preferably, the digital control oscillation source 31 is a DDS (Direct Digital Synthesis) signal generator constructed by the internal logic resources of the FPGA module. The DDS signal generator can generate a 1KHZ digital signal (source signal), and the high-speed DAC40 converts the digital signal into a corresponding analog signal for use by the voltage drive circuit 50 of the subsequent stage.

[0024] The voltage driving circuit 50 is designed as a voltage buffer, which amplifies the analog signal output by DAC40 into a voltage driving signal, and injects it into the test loop as a driving source, so that the two ends of the reference resistor 62 and the two ends of the battery under test 80 generate an excitation voltage. The voltage buffer uses voltage feedback technology to adjust the output current of the voltage driving signal in real time following the output of DAC40. In actual testing, there are also strict requirements for the size of the injected current. Here, we can send instructions through the MCU control module 10 to change the multiplier coefficient of the DDS signal generator inside the FPGA module 30, so as to accurately control the amplitude of the output voltage of the DDS signal generator, thereby ensuring that the output current of the voltage driving signal is within a reasonable range. Since the frequency, phase and amplitude of the digital signal output by the DDS signal generator are controllable in real time and have high precision, the amplitude of the sinusoidal signal output by DAC40 can be accurately adjusted, and the driving current can be adjusted by adjusting the amplitude of the sinusoidal signal output by DAC40, which is more accurate than the traditional method of adjusting the driving current.

[0025] The voltage driving circuit 50, the current limiting resistor 61, the reference resistor 62 and the battery under test 80 are connected in series to form a test loop. The driving current in the circuit depends on the current limiting resistor 61 in the circuit. Under the same driving current, the current flowing through the reference resistor 62 is the same as the current of the battery under test 80. According to Ohm's law, the internal resistance of the battery under test 80 can be calculated. In actual testing, in order to obtain more accurate test results, the reference resistor 62 often uses a high-precision resistor, and its order of magnitude usually matches the order of magnitude of the internal resistance of the battery under test 80. For example, when the internal resistance of the battery under test 80 is in the micro-ohm level, the reference resistor 62 correspondingly uses a micro-ohm level resistor.

[0026] The preamplifier 21 is used to amplify the voltage signal across the reference resistor 62 to increase the signal amplitude. Since the internal resistance of the battery 80 under test is usually milliohms and a few tenths of a milliohm, and the reference resistor 62 is a resistor whose order of magnitude matches the order of magnitude of the internal resistance of the battery 80 under test, the value of the voltage across the reference resistor 62 is often very small. In the measurement of small signals, an amplifier is needed to amplify the small signals for subsequent measurement.

[0027] The phase-locked amplifier 22 is used to amplify the voltage signal at both ends of the battery 80 under test and filter out noise. Since the internal resistance of the battery 80 under test is usually milliohms and a few tenths of a milliohm, the effective voltage signal at both ends of the battery 80 under test is easily submerged in the circuit white noise. The phase-locked amplifier 22 performs 1KHZ phase-discrimination amplification on the signal, extracts the amplification value of the corresponding signal at 1KHZ, and greatly suppresses useless noise, thereby improving the detection sensitivity and signal-to-noise ratio.

[0028] The rectifier circuit 23 is used to rectify the voltage signal output after being processed by the preamplifier 21 and the phase-locked amplifier 22. The excitation injected into the test loop is an AC excitation, and in actual measurement, the ADC 25 performs DC sampling on the voltage across the battery 80 under test and the voltage across the reference resistor 62, so it is necessary to convert the AC signal into a DC signal.

[0029] The phase compensation unit 33 is used to perform phase compensation on the input signal of the rectifier circuit 23 so that it is consistent with the phase of the signal output by the numerical control oscillation source 31 to improve the accuracy of the rectified signal. In actual measurement, the phase of the current in the test loop is usually offset from the phase of the voltage. The present invention introduces phase compensation technology. The phase compensation unit 33 collects the time difference between the voltage zero-crossing point of the numerical control oscillation source 31 and the voltage zero-crossing point of the measured battery 80 in real time, and performs phase compensation on the voltage signal output after being processed by the pre-amplifier 21 and the phase-locked amplifier 22 according to the time difference, so that it is consistent with the phase of the signal output by the numerical control oscillation source 31, which is conducive to maintaining the stability of the rectification process and improving the accuracy of the rectified signal.

[0030] The secondary amplifier 24 is used to perform secondary amplification processing on the voltage signal at both ends of the reference resistor 62 and the voltage signal at both ends of the measured battery 80 after being rectified by the rectifier circuit 23. In the measurement of small signals, the gain of a single-stage amplifier is often not too high, and a multi-stage amplifier is often used to increase the input impedance, increase the amplification factor and the signal-to-noise ratio.

[0031] ADC25 is connected to the output end of the secondary amplifier 24 and is used to synchronously sample the voltage across the battery 80 under test and the voltage across the reference resistor 62. The ADC25 is a synchronous sampling ADC. At the same time, the current in the test loop is the same everywhere, so the synchronous sampling ADC is used to collect the voltage signal value at the same time for the final calculation. The ADC sampling process is oversampling. By using the oversampling technology, the accuracy of the sampling signal is improved, and the accuracy of the test is improved.

[0032] The digital filter 32 is used to digitally filter the signal value collected by the sampling module 20. The battery internal resistance tester usually needs to be connected to the mains or switching power supply to work, which will introduce additional interference. Therefore, it is necessary to filter the signal to attenuate high-frequency interference and improve accuracy. This embodiment uses a FIR (Finite Impulse Response) low-pass filter to filter the signal and collect signals at 1KHZ, which can greatly attenuate high-frequency interference and has almost no effect on low-frequency signals, greatly improving the test accuracy.

[0033] The digital filter 32 is built into the FGPA module 30. Thanks to the parallel logic structure of the FGPA, this filtering process is carried out in parallel with the ADC sampling. During the ADC sampling process, a multi-order FIR low-pass filter is instantiated inside the FPGA. Since the FPGA main frequency is much larger than the ADC sampling frequency, the data of the FIR low-pass filter is processed synchronously within the ADC sampling interval, and the filtered sampling values ​​are obtained in real time, which can achieve sampling and filtering at the same time, greatly improving work efficiency.

[0034] The MCU control module 10 calculates the internal resistance of the tested battery 80 according to the signal value collected by the sampling module 20 after filtering. Assuming that the amplification factor of the preamplifier 21 is N1, the amplification factor of the lock-in amplifier 22 is N2, the resistance of the reference resistor 62 is R1, the internal resistance of the tested battery 80 is R2, the voltage across the reference resistor 62 sampled by the ADC 25 is V1, the voltage across the tested battery 80 is V2, and the current in the test loop is I, according to Ohm's law, we have:

[0035] V1=I*R1*N1

[0036] V2=I*R2*N2

[0037]

[0038]

[0039]

[0040] According to the above formula, the internal resistance R2 of the battery 80 under test can be calculated.

[0041] See also Figure 1 In some preferred embodiments of the present invention, the battery internal resistance tester also includes a gear control module 70 provided with multiple gears, the resistance module 60 includes multiple parallel branches, each branch is connected in series with a current limiting resistor 61 and a reference resistor 62 of corresponding resistance value, each branch corresponds to a gear of the gear control module 70, and the gear control module 70 selects one of the gears under the control of the MCU control module 10, and connects the current limiting resistor 61 and the reference resistor 62 in a branch corresponding to the selected gear to the test circuit.

[0042] The resistance value of the reference resistor 62 in each branch of the resistance module 60 matches the internal resistance and gear of the battery under test. Different reference resistors 62 are matched according to the different levels of the internal resistance of the battery under test. For example, the gear control module 70 is set to four gears of uΩ, mΩ, Ω, and 100Ω. The four gears correspond to the measurement of batteries with internal resistances of uΩ, mΩ, Ω, and 100Ω. The resistance module 60 is also set to four branches, and the reference resistors 62 in the four branches are selected to be uΩ, mΩ, Ω, and 100Ω. Similarly, the current limiting resistor 61 in each branch of the resistance module 60 also matches the gear corresponding to the gear control module 70 and the internal resistance of the battery under test.

[0043] The gear control module 70 can switch gears through a switch tube or a multi-speed selection switch to connect the current limiting resistor 61 and the reference resistor 62 of the corresponding branch to the test circuit, and realize different test ranges by connecting current limiting resistors 61 and reference resistors 62 of different sizes. When the internal resistance of the battery under test is relatively large, a large-resistance current limiting resistor is used. When the internal resistance of the battery under test is relatively small, a small-resistance current limiting resistor is used. The size of the internal resistance of the battery under test is counted through a fixed proportional relationship and amplification factor.

[0044] The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Those skilled in the art can make various equivalent changes and improvements based on the above embodiments, and all equivalent changes or modifications made within the scope of the claims should fall within the protection scope of the present invention.

Claims

1. A battery internal resistance tester, characterized in that: The battery internal resistance tester includes an MCU control module, a sampling module, an FPGA module, a DAC, a voltage drive circuit and a resistance module, wherein the resistance module includes a current limiting resistor and a reference resistor, wherein: The voltage driving circuit, the current limiting resistor, the reference resistor and the battery under test are connected in series to form a test loop; The sampling module is used to collect the voltage across the battery under test and the voltage across the reference resistor; The FPGA module is used to generate and output digital signals, and to perform digital filtering on the signal values ​​collected by the sampling module; The DAC is used to convert the digital signal output by the FPGA module into an analog signal; The voltage driving circuit is used to amplify the analog signal output by the DAC into a voltage driving signal, and adjust the output current of the voltage driving signal in real time following the output of the DAC; The MCU control module is used to control the output voltage amplitude and frequency of the digital signal output by the FPGA module, and to calculate the internal resistance of the battery under test according to the signal value collected by the sampling module after filtering. The battery internal resistance tester also includes a gear control module with multiple gears, the resistance module includes multiple parallel branches, each branch is connected in series with a current limiting resistor and a reference resistor of corresponding resistance value, each branch corresponds to a gear of the gear control module, and the gear control module selects one of the gears under the control of the MCU control module, and connects a branch corresponding to the selected gear to the test circuit; The gear control module can switch gears through a switch tube or a multi-gear selection switch to connect the current limiting resistor and the reference resistor of the corresponding branch to the test loop.

2. The battery internal resistance tester according to claim 1, characterized in that: The sampling module includes: A pre-amplifier is used to amplify the voltage signal across the reference resistor; A lock-in amplifier is used to amplify the voltage signal at both ends of the battery under test and filter out noise; A rectifier circuit is used to rectify the voltage signal output after being processed by the pre-amplifier and the lock-in amplifier; A secondary amplifier is used to perform secondary amplification processing on the voltage signal at both ends of the reference resistor and the voltage signal at both ends of the battery under test after being rectified by the rectifier circuit; The ADC is connected to the output end of the secondary amplifier and is used for synchronously sampling the voltage across the battery under test and the voltage across the reference resistor.

3. The battery internal resistance tester as claimed in claim 2, characterized in that: The FPGA module includes: A digitally controlled oscillator source is used to generate and output digital signals; A digital filter is used to digitally filter the signal values ​​collected by the sampling module.

4. The battery internal resistance tester as claimed in claim 3, characterized in that: The digital control oscillation source is a DDS signal generator constructed by the internal logic resources of the FPGA module.

5. The battery internal resistance tester as claimed in claim 4, characterized in that: The FPGA module also includes a phase compensation unit, which collects the time difference between the voltage zero-crossing point of the digital control oscillation source and the voltage zero-crossing point of the battery under test in real time, and performs phase compensation on the voltage signal output after being processed by the pre-amplifier and the phase-locked amplifier according to the time difference.

6. The battery internal resistance tester as claimed in claim 5, characterized in that: The digital filter adopts a FIR low-pass filter.

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