A time synchronization test method, device and electronic device for Beidou time synchronization device

Abstract

The present invention provides a time synchronization test method, device and electronic device for a Beidou time synchronization device. The method includes: obtaining the count value per second of the Beidou clock signal; when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located, to obtain the count value of the second where the loss moment is located; in the next second of the second where the loss moment is located, correcting the local clock count value based on the Beidou clock count value, to obtain the local clock count value of the second second in the future where the loss moment is located; using the corrected local clock count value of the second second in the future as the clock length reference to perform a time synchronization test on the Beidou time synchronization device. When the Beidou clock signal is lost for a short time during the test process, the present invention predicts the Beidou clock count value of the next second according to the obtained Beidou clock count value, ensures the continuity of the Beidou clock signal, avoids interrupting the current test item, and improves the anti-interference ability of the test.

Description

Technical Field

[0001] The present invention relates to the technical field of automated device testing, and in particular to a timing test method, device and electronic equipment for a Beidou timing device. Background Art

[0002] With the improvement of the automation level of power systems, various automation devices and systems have been widely used, such as dispatching automation systems, relay protection and fault information management systems, substation automation systems and safety automatic devices. After an accident occurs in the power grid, analyzing the cause of the accident through the sequence and accurate time of each switch action is a common means of power grid fault analysis. This requires a unified time reference to achieve; at the same time, the data sampling of each process layer device in the smart substation must also maintain time synchronization to meet the time synchronization requirements of various functional devices. The time synchronization device realizes the above time synchronization function. It is very important for smart substations to ensure that the performance of the time synchronization device meets the requirements, test the time synchronization device, and ensure the time synchronization of the entire station.

[0003] At present, the test of Beidou timing device in substation adopts on-site testing, and a single Beidou timing device is tested before installation. According to the current test standards, the Beidou timing device test includes multiple tests, and the total test time is relatively long. For example, the test of timekeeping accuracy takes at least 12 hours. During the test, if the Beidou clock signal is lost due to an unexpected situation, the current test item needs to be retested, and the test anti-interference ability is poor. Summary of the invention

[0004] The embodiments of the present invention provide a timing test method, device and electronic equipment for a Beidou timing device, so as to solve the problem that the Beidou timing device testing method has poor anti-interference capability.

[0005] In a first aspect, an embodiment of the present invention provides a timing test method for a Beidou timing device, comprising:

[0006] Obtain the Beidou clock signal, count the Beidou clock signal based on the local clock frequency, and obtain the count value per second corresponding to the Beidou clock signal;

[0007] When the Beidou clock signal is lost, the count value corresponding to the second at the time of loss is predicted based on multiple count values ​​per second before the second at the time of loss, and the count value of the second at the time of loss is obtained;

[0008] In the next second of the second where the lost moment is, the local clock count value is corrected based on the Beidou clock count value to obtain the local clock count value of the second in the future of the second where the lost moment is; wherein the Beidou clock count value includes the count value of the second where the lost moment is and multiple count values ​​per second before the second where the lost moment is;

[0009] Using the local clock count value of the obtained future second second as the clock length reference, perform a time synchronization test on the Beidou time synchronization device.

[0010] In a possible implementation, in the second second after the second where the loss moment is located, correct the local clock count value based on the Beidou clock count value to obtain the local clock count value of the future second second of the second where the loss moment is located, including:

[0011] At a preset time point in the second second after the second where the loss moment is located, obtain the per-second value corresponding to the Beidou clock signal in the m seconds before the second second after the second where the loss moment is located as the first count value, and obtain the per-second count value corresponding to the local clock signal in the m seconds before the second second after the second where the loss moment is located as the second count value;

[0012] Calculate the difference in per-second count values corresponding to the first count value and the second count value respectively;

[0013] Calculate the weighted average of the differences in per-second count values;

[0014] Calculate the sum of the local clock count value of the second where the loss moment is located and the weighted average as the local clock count value of the future second second of the second where the loss moment is located.

[0015] In a possible implementation, before calculating the weighted average of the differences in per-second count values, it further includes:

[0016] Calculate the difference between the differences in per-second count values and the difference in per-second count values of the previous second to obtain the count value difference;

[0017] If the absolute value of the count value difference is greater than the preset difference threshold, replace the difference in per-second count values of the corresponding second with the arithmetic average of the differences in per-second count values in the m seconds before the second second after the second where the loss moment is located.

[0018] In a possible implementation, after obtaining the Beidou clock signal, counting the Beidou clock signal based on the local clock frequency to obtain the per-second count value corresponding to the Beidou clock signal, it further includes:

[0019] At a preset time point per second, correct the local clock count value based on the per-second count value corresponding to the obtained Beidou clock signal to obtain the local clock count value of the next second of the current second;

[0020] Use the local clock count value of the next second obtained by correction as the clock length reference to perform a time synchronization test on the Beidou time synchronization device.

[0021] In a possible implementation, at a preset moment point per second, after correcting the local clock count value based on the count value per second corresponding to the obtained Beidou clock signal and obtaining the local clock count value of the next second of the current second, it further includes:

[0022] Dividing the local clock count value of the next second into multiple equal parts and obtaining an interrupt signal;

[0023] At each interrupt signal, determine whether a Beidou clock signal is obtained.

[0024] In a possible implementation, when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located, and obtaining the count value of the second where the loss moment is located, includes:

[0025] When the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located by using the time series decomposition method, and obtaining the count value of the second where the loss moment is located.

[0026] In a second aspect, an embodiment of the present invention provides a time synchronization test device for a Beidou time synchronization device, including:

[0027] A Beidou clock count value acquisition module, configured to acquire a Beidou clock signal, count the Beidou clock signal based on the local clock frequency, and obtain the count value per second corresponding to the Beidou clock signal;

[0028] A count value prediction module, configured to predict the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located when the Beidou clock signal is lost, and obtain the count value of the second where the loss moment is located;

[0029] A count value correction module, configured to correct the local clock count value based on the Beidou clock count value in the next second of the second where the loss moment is located, and obtain the local clock count value of the second second in the future of the second where the loss moment is located; wherein, the Beidou clock count value includes the count value of the second where the loss moment is located and multiple count values per second before the second where the loss moment is located;

[0030] A test module, configured to use the local clock count value of the second second in the future obtained by correction as the clock length reference to perform time synchronization test on the Beidou time synchronization device.

[0031] In a possible implementation, the count value correction module includes:

[0032] A count value acquisition unit, configured to obtain, at a preset time point in the second next to the second where the loss moment is located, the per-second value corresponding to the Beidou clock signal in the m seconds before the second next to the second where the loss moment is located, as a first count value, and obtain the per-second count value corresponding to the local clock signal in the m seconds before the second next to the second where the loss moment is located, as a second count value;

[0033] A count value difference calculation unit, configured to calculate the per-second count value difference corresponding to the first count value and the second count value respectively;

[0034] A weighted average value calculation unit, configured to calculate the weighted average value of each per-second count value difference;

[0035] A local clock count value acquisition unit for the next second, configured to calculate the sum of the local clock count value in the second where the loss moment is located and the weighted average value, as the local clock count value in the second future to the second where the loss moment is located.

[0036] In a possible implementation manner, the count value correction module further includes:

[0037] A count value difference calculation unit, configured to calculate the difference between each per-second count value difference and the per-second count value difference of the adjacent previous second to obtain a count value difference;

[0038] A count value difference correction unit, configured to, if the absolute value of the count value difference is greater than a preset difference threshold, replace the count value difference of the corresponding second with the arithmetic average value of the count value differences in the m seconds before the second next to the second where the loss moment is located.

[0039] In a third aspect, an embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the method in the first aspect or any possible implementation manner of the first aspect are implemented.

[0040] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the steps of the method in the first aspect or any possible implementation manner of the first aspect are implemented.

[0041] An embodiment of the present invention provides a time synchronization test method, device, and electronic device for a Beidou time synchronization device, including: obtaining a Beidou clock signal, counting the Beidou clock signal based on the local clock frequency to obtain the number of counts per second corresponding to the Beidou clock signal; when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple counts per second before the second where the loss moment is located to obtain the count value of the second where the loss moment is located; in the next second of the second where the loss moment is located, correcting the local clock count value based on the Beidou clock count value to obtain the local clock count value of the second second in the future where the loss moment is located; where the Beidou clock count value includes the count value of the second where the loss moment is located and multiple counts per second before the second where the loss moment is located; using the corrected local clock count value of the second second in the future as the clock length reference to perform a time synchronization test on the Beidou time synchronization device. By obtaining the Beidou clock count value of a preset time, when the Beidou clock signal is lost within a short time during the test, predicting the Beidou clock count value of the next second according to the obtained Beidou clock count value, ensuring the continuity of the Beidou clock signal, avoiding interrupting the current test item, and improving the anti-interference ability of the test. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained without creative efforts.

[0043] Figure 1 is a flowchart of the implementation of the time synchronization test method for the Beidou time synchronization device provided by the embodiment of the present invention;

[0044] Figure 2 is a flowchart of the implementation of the count value correction method provided by the embodiment of the present invention;

[0045] Figure 3 is a schematic structural diagram of the time synchronization test device for the Beidou time synchronization device provided by the embodiment of the present invention;

[0046] Figure 4 is a schematic diagram of the electronic device provided by the embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0047] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0048] In order to make the purpose, technical solutions and advantages of the present invention more clear, specific embodiments will be described below in conjunction with the accompanying drawings.

[0049] See also Figure 1 , which shows a flow chart of the implementation of the timing test method for the Beidou timing device provided by an embodiment of the present invention, which is described in detail as follows:

[0050] In step S1, a Beidou clock signal is obtained, and the Beidou clock signal is counted based on the local clock frequency to obtain a count value per second corresponding to the Beidou clock signal;

[0051] The Beidou clock signal contains time information and duration information; exemplarily, the time information may include year, month, day information and hour, minute, and second information; exemplarily, the duration information is 1 second; by detecting the flag bit of the Beidou clock signal, the start and end time of a cycle of the Beidou clock signal can be obtained; exemplarily, the duration of a cycle of the Beidou clock signal is 1 second.

[0052] By using the local clock frequency and the detection flag, the count value of the Beidou clock signal within 1 second can be obtained; the count value of 1 second is used to represent the length of time. For example, the local clock frequency is 100MHz, that is, theoretically 100 trillion times per second; in actual application scenarios, due to the deviation of the local clock crystal oscillator and the influence of the environment, the actual count value per second obtained by the local clock crystal oscillator frequency fluctuates.

[0053] In a possible implementation, after obtaining the Beidou clock signal, counting the Beidou clock signal based on the local clock frequency, and obtaining the count value per second corresponding to the Beidou clock signal, the method further includes:

[0054] At a preset time point every second, the local clock count value is corrected based on the count value per second corresponding to the acquired Beidou clock signal to obtain the local clock count value of the next second of the current second;

[0055] The corrected local clock count value of the next second is used as the clock length benchmark to perform a timing test on the Beidou timing device.

[0056] In a possible implementation, at a preset time point per second, after correcting the local clock count value based on the count value per second corresponding to the obtained Beidou clock signal and obtaining the local clock count value of the next second of the current second, the following steps are further included:

[0057] Divide the local clock count value of the next second into multiple equal parts and obtain an interrupt signal;

[0058] At each interrupt signal, determine whether a Beidou clock signal is obtained.

[0059] That is, use the corrected local clock count value of the next second as the clock length reference to generate an interrupt signal; the interrupt signal is continuously corrected as the local clock count value is corrected, which is more accurate than the method with a relatively fixed length. Exemplarily, divide the local clock count value of the next second into 4000 equal parts to obtain an interrupt signal with a length of 250 microseconds.

[0060] Exemplarily, if the difference between the local clock count value of the current second and the local clock count value of the next second is greater than a preset difference threshold, divide the local clock count value of the next second into multiple equal parts and obtain an interrupt signal. That is, when the difference between the local clock count values of the previous and next seconds is greater than the preset difference threshold, correct the interrupt signal.

[0061] In step S2, when the Beidou clock signal is lost, predict the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located, and obtain the count value of the second where the loss moment is located;

[0062] The unit of the above-mentioned moment is a time unit smaller than a second. Exemplarily, the unit of the moment can be μm or millisecond.

[0063] When the Beidou clock signal is lost, the actual counting of the second where the loss moment is located cannot be completed, that is, the actual count value of the second where the loss moment is located cannot be obtained. By predicting based on the count values per second for a specified duration before the second where the loss moment is located, the predicted count value of the second where the loss moment is located is obtained.

[0064] Exemplarily, the count value corresponding to the second where the loss moment is located can be predicted based on the count values per second for 7200 seconds before the second where the loss moment is located.

[0065] In a possible implementation, when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located and obtaining the count value of the second where the loss moment is located includes:

[0066] When the Beidou clock signal is lost, predict the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located by using the time series decomposition method, and obtain the count value of the second where the loss moment is located.

[0067] The time series decomposition method divides the count value into long-term trend, seasonal variation, cyclic fluctuation, and irregular fluctuation. The long-term trend refers to a tendency or state of continuous development and change of a phenomenon over a relatively long period; seasonal fluctuation is a regular variation caused by seasonal changes; cyclic fluctuation refers to a non-strictly regular periodic continuous variation; irregular fluctuation refers to the influence caused by numerous accidental factors.

[0068] In step S3, at the next second of the second where the loss moment is located, the local clock count value is corrected based on the Beidou clock count value to obtain the local clock count value at the second future to the second where the loss moment is located; wherein, the Beidou clock count value includes the count value of the second where the loss moment is located and multiple per-second count values before the second where the loss moment is located.

[0069] See Figure 2 , Figure 2 shows the implementation flowchart of the count value correction method provided by the embodiment of the present invention, which is described in detail as follows:

[0070] In a possible implementation manner, at the next second of the second where the loss moment is located, the local clock count value is corrected based on the Beidou clock count value to obtain the local clock count value at the second future to the second where the loss moment is located, including:

[0071] In step S31, at a preset time point at the next second of the second where the loss moment is located, obtain the per-second value corresponding to the Beidou clock signal in the m seconds before the next second of the second where the loss moment is located as the first count value, and obtain the per-second count value corresponding to the local clock signal in the m seconds before the next second of the second where the loss moment is located as the second count value;

[0072] Exemplarily, the preset time point is 500 milliseconds, that is, at 500 milliseconds of the next second of the second where the loss moment is located. Since the end time points of each second of the Beidou clock signal and the local clock signal are not necessarily the same, that is, the moment when the count of each second stops is not necessarily the same, usually the count value of the previous second is obtained at the middle time point of the next second. Exemplarily, the above m is 16.

[0073] In step S32, calculate the per-second count value difference corresponding to the first count value and the second count value respectively;

[0074] Exemplarily, the per-second count value difference is the first count value minus the second count value, that is, the count value of the Beidou clock signal per second minus the count value of the corresponding local clock signal per second; Exemplarily, m is 16, and the first count value minus the second count value is used to obtain a total of 16 per-second count value differences.

[0075] In step S33, calculate the weighted average value of each per-second count value difference;

[0076] The weighted average is the count value difference per second multiplied by a preset weight value, and after summing, it is divided by the total number of seconds. Exemplarily, m is 16, the weight from the 1st second to the 8th second is 0.65, and the weight from the 9th second to the 16th second is 0.35; because the running condition of the local clock oscillator has a stronger correlation, the weight value of the count value difference closer to the current moment in time is greater than the weight value of the count value difference farther in time, eliminating the influence brought by environmental changes.

[0077] In step S34, calculate the sum of the local clock count value of the second where the loss moment is located and the weighted average, as the local clock count value of the second second in the future of the second where the loss moment is located.

[0078] The second second in the future of the second where the loss moment is located is the second second after the second where the loss moment is located; that is, the local clock count value of the second second in the future of the second where the loss moment is located can be the local clock count value of the second where the loss moment is located plus the above-mentioned weighted average. By comparing the Beidou count values and local clock count values of m seconds before the next second, and using the weighted average of the differences to correct the local clock count value, the local clock count value of the next second is obtained.

[0079] In a possible implementation manner, before calculating the weighted average of each count value difference per second, it further includes:

[0080] Calculate the difference between each count value difference per second and the count value difference per second of the previous adjacent second to obtain a count value difference;

[0081] If the absolute value of the count value difference is greater than a preset difference threshold, the count value difference of the corresponding second is replaced with the arithmetic average of the count value differences of m seconds before the second after the loss moment.

[0082] Exemplarily, the local clock frequency is 100 MHz, and the corresponding preset difference threshold is 300. Exemplarily, the arithmetic average is the sum of the count value differences of m seconds before the next second divided by m.

[0083] By calculating the count value difference and comparing it with the preset difference threshold, the second count value with large fluctuations is judged, and the second count value with large fluctuations is corrected with the arithmetic average, excluding the influence of abnormal factors on the second count.

[0084] In step S4, use the corrected local clock count value of the second second in the future as the clock length reference to perform a time synchronization test on the Beidou time synchronization device.

[0085] Exemplarily, the time synchronization test may include a holdover function detection, a network time synchronization detection, a time synchronization signal output test, a leap second reception and processing function test, a master clock multi-time source selection function test, a slave clock source selection function test, a clock source switching function test, and a serial port time message detection.

[0086] In a possible implementation, the corrected local clock count value at the future second 2 is used as the clock length reference to simultaneously perform time synchronization tests on multiple Beidou time synchronization devices. The existing method uses a single-device test method, resulting in low test efficiency. Since the test installation environments and test times of each Beidou time synchronization device are different, it is easy to cause test standard deviation and poor consistency of test results. The existing test method for Beidou time synchronization devices cannot meet the requirements of efficient and safe operation of intelligent substations. When multiple devices are tested simultaneously, the test environment is consistent, the test reference is more consistent, the efficiency is higher, and the test results are more accurate.

[0087] In a possible implementation, before obtaining the Beidou clock signal and counting the Beidou clock signal based on the local clock frequency to obtain the count value per second corresponding to the Beidou clock signal, the following steps are further included:

[0088] The preset local clock second count value is equally divided into 4000 parts to obtain a 250-microsecond interrupt signal;

[0089] At the 250-microsecond interrupt signal, it is determined whether the Beidou clock signal is obtained.

[0090] In the embodiment of the present invention, by obtaining the Beidou clock count value at a preset time, when the Beidou clock signal is lost within a short time during the test, the Beidou clock count value for the next second is predicted based on the obtained Beidou clock count value, ensuring the continuity of the Beidou clock signal, avoiding interrupting the current test item, and improving the anti-interference ability of the test.

[0091] It should be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.

[0092] The following is the device embodiment of the present invention. For details not described in detail, reference may be made to the corresponding method embodiment above.

[0093] Refer to Figure 3 , which shows the structural schematic diagram of the time synchronization test device for the Beidou time synchronization device provided by the embodiment of the present invention. For the sake of convenience of description, only the parts related to the embodiment of the present invention are shown and are described in detail as follows:

[0094] As Figure 3 shown, the time synchronization test device 3 for the Beidou time synchronization device includes:

[0095] A Beidou clock count value acquisition module 31, configured to acquire a Beidou clock signal, count the Beidou clock signal based on the local clock frequency, and obtain the count value per second corresponding to the Beidou clock signal;

[0096] The count value prediction module 32 is configured to predict the count value corresponding to the second where the loss moment is located based on multiple per-second count values before the second where the loss moment is located when the Beidou clock signal is lost, so as to obtain the count value of the second where the loss moment is located;

[0097] The count value correction module 33 is configured to correct the local clock count value based on the Beidou clock count value in the next second of the second where the loss moment is located, so as to obtain the local clock count value of the second future to the second where the loss moment is located; wherein, the Beidou clock count value includes the count value of the second where the loss moment is located and multiple per-second count values before the second where the loss moment is located;

[0098] The test module 34 is configured to perform a time synchronization test on the Beidou time synchronization device by using the local clock count value of the second future to the second obtained by correction as the clock length reference.

[0099] In a possible implementation manner, the count value correction module 33 includes:

[0100] The count value acquisition unit is configured to, at a preset time point in the next second of the second where the loss moment is located, acquire the per-second value corresponding to the Beidou clock signal in the m seconds before the next second of the second where the loss moment is located as the first count value, and acquire the per-second count value corresponding to the local clock signal in the m seconds before the next second of the second where the loss moment is located as the second count value;

[0101] The count value difference calculation unit is configured to calculate the per-second count value difference corresponding to the first count value and the second count value respectively;

[0102] The weighted average value calculation unit is configured to calculate the weighted average value of each per-second count value difference;

[0103] The local clock count value acquisition unit for the next second is configured to calculate the sum of the local clock count value of the second where the loss moment is located and the weighted average value as the local clock count value of the second future to the second where the loss moment is located.

[0104] In a possible implementation manner, the count value correction module 33 further includes:

[0105] The count value difference calculation unit is configured to calculate the difference between each per-second count value difference and the per-second count value difference of the adjacent previous second to obtain the count value difference;

[0106] The count value difference correction unit is configured to, if the absolute value of the count value difference is greater than a preset difference threshold, replace the count value difference of the corresponding second with the arithmetic average value of the count value differences in the m seconds before the next second of the second where the loss moment is located.

[0107] Figure 4 It is a schematic diagram of the electronic device provided by the embodiment of the present invention. As Figure 4As shown, the electronic device 4 of this embodiment includes: a processor 40, a memory 41, and a computer program 42 stored in the memory 41 and executable on the processor 40. When the processor 40 executes the computer program 42, it implements the steps in the above-described embodiments of the time synchronization test method for the Beidou time synchronization device, such as Figure 1 the steps S1 to S4 shown. Alternatively, when the processor 40 executes the computer program 42, it implements the functions of each module in the above-described device embodiments, such as Figure 3 the functions of the modules 31 to 34 shown.

[0108] Exemplarily, the computer program 42 can be divided into one or more modules / units, and the one or more modules / units are stored in the memory 41 and executed by the processor 40 to complete the present invention. The one or more modules / units can be a series of computer program instruction segments capable of performing specific functions, and these instruction segments are used to describe the execution process of the computer program 42 in the electronic device 4. For example, the computer program 42 can be divided into Figure 3 the modules 31 to 34 shown.

[0109] The electronic device 4 can be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The electronic device 4 may include, but is not limited to, a processor 40 and a memory 41. Those skilled in the art can understand that Figure 4 these are merely examples of the electronic device 4 and do not constitute a limitation on the electronic device 4. It may include more or fewer components than shown in the figure, or combine certain components, or have different components. For example, the electronic device may further include input / output devices, network access devices, a bus, etc.

[0110] The so-called processor 40 may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0111] The memory 41 may be an internal storage unit of the electronic device 4, such as a hard disk or memory of the electronic device 4. The memory 41 may also be an external storage device of the electronic device 4, such as a plug-in hard disk equipped on the electronic device 4, a Smart Media Card (SMC), a Secure Digital (SD) card, a Flash Card, etc. Further, the memory 41 may also include both an internal storage unit and an external storage device of the electronic device 4. The memory 41 is used to store the computer program and other programs and data required by the electronic device. The memory 41 may also be used to temporarily store data that has been output or is to be output.

[0112] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, only the above division of each functional unit and module is used as an example. In actual applications, the above functions can be allocated to different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of this application. The specific working process of the units and modules in the above system can refer to the corresponding process in the foregoing method embodiment and will not be elaborated here.

[0113] In the above embodiments, the descriptions of the various embodiments have their own emphases. For the parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0114] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or by a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0115] In the embodiments provided by the present invention, it should be understood that the disclosed device / electronic device and method can be implemented in other ways. For example, the device / electronic device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces. The indirect couplings or communication connections of the devices or units can be in electrical, mechanical or other forms.

[0116] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0117] In addition, in each embodiment of the present invention, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0118] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, to implement all or part of the processes in the above-mentioned method embodiments, it can also be completed by a computer program instructing the relevant hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above-mentioned method embodiments for the time synchronization test of the Beidou time synchronization device can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.

[0119] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A time synchronization test method for a Beidou time synchronization device, characterized in that, it includes: Obtain the Beidou clock signal, count the Beidou clock signal based on the local clock frequency, and obtain the count value per second corresponding to the Beidou clock signal; When the Beidou clock signal is lost, predict the count value corresponding to the second where the loss moment is located based on multiple count values per second before the second where the loss moment is located, and obtain the count value per second where the loss moment is located; In the next second after the second where the loss moment is located, correct the local clock count value based on the Beidou clock count value, and obtain the local clock count value of the second second in the future after the second where the loss moment is located; Wherein the Beidou clock count value includes the count value per second where the loss moment is located and multiple count values per second before the second where the loss moment is located; Use the corrected local clock count value of the second second in the future as the clock length reference to perform a time synchronization test on the Beidou time synchronization device; The step of, in the next second after the second where the loss moment is located, correcting the local clock count value based on the Beidou clock count value to obtain the local clock count value of the second second in the future after the second where the loss moment is located includes: at a preset time point in the next second after the second where the loss moment is located, obtain the count value per second corresponding to the Beidou clock signal of m seconds before the next second after the second where the loss moment is located as the first count value, and obtain the count value per second corresponding to the local clock signal of m seconds before the next second after the second where the loss moment is located as the second count value; calculate the difference in count value per second corresponding to the first count value and the second count value respectively; Calculate the weighted average of each difference in count value per second; calculate the sum of the local clock count value of the second where the loss moment is located and the weighted average as the local clock count value of the second second in the future after the second where the loss moment is located.

2. The method according to claim 1, characterized in that, before calculating the weighted average of each difference in count value per second, it further includes: Calculate the difference between each difference in count value per second and the difference in count value per second of the adjacent previous second to obtain the count value difference; If the absolute value of the count value difference is greater than the preset difference threshold, replace the count value difference of the corresponding second with the arithmetic average of the count value differences of m seconds before the next second after the second where the loss moment is located.

3. The method according to claim 1, characterized in that, after obtaining the Beidou clock signal, counting the Beidou clock signal based on the local clock frequency, and obtaining the count value per second corresponding to the Beidou clock signal, it further includes: At a preset time point per second, correct the local clock count value based on the obtained count value per second corresponding to the Beidou clock signal to obtain the local clock count value of the next second after the current second; Use the corrected local clock count value of the next second as the clock length reference to perform a time synchronization test on the Beidou time synchronization device.

4. The method according to claim 3, characterized in that, after obtaining the local clock count value of the next second after the current second by correcting the local clock count value based on the obtained count value per second corresponding to the Beidou clock signal at a preset time point per second, it further includes: Divide the local clock count value of the next second into multiple equal parts and obtain an interrupt signal; At each interrupt signal, determine whether a Beidou clock signal is acquired.

5. The method according to claim 1, wherein, when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple per-second count values before the second where the loss moment is located, to obtain the count value of the second where the loss moment is located, includes: when the Beidou clock signal is lost, predicting the count value corresponding to the second where the loss moment is located based on multiple per-second count values before the second where the loss moment is located, by means of time series decomposition method, to obtain the count value of the second where the loss moment is located.

6. A time synchronization test device for a Beidou time synchronization device, wherein, it includes: a Beidou clock count value acquisition module, configured to acquire a Beidou clock signal, and count the Beidou clock signal based on the local clock frequency to obtain the per-second count value corresponding to the Beidou clock signal; a count value prediction module, configured to, when the Beidou clock signal is lost, predict the count value corresponding to the second where the loss moment is located based on multiple per-second count values before the second where the loss moment is located, to obtain the count value of the second where the loss moment is located; a count value correction module, configured to, in the next second of the second where the loss moment is located, correct the local clock count value based on the Beidou clock count value to obtain the local clock count value of the second second in the future of the second where the loss moment is located; wherein, the Beidou clock count value includes the count value of the second where the loss moment is located and multiple per-second count values before the second where the loss moment is located; the count value correction module includes: a count value acquisition unit, configured to, at a preset time point in the next second of the second where the loss moment is located, acquire the per-second value corresponding to the Beidou clock signal of m seconds before the next second of the second where the loss moment is located, as the first count value, and acquire the per-second count value corresponding to the local clock signal of m seconds before the next second of the second where the loss moment is located, as the second count value; a count value difference calculation unit, configured to calculate the per-second count value difference corresponding to the first count value and the second count value respectively; a weighted average value calculation unit, configured to calculate the weighted average value of each per-second count value difference; a local clock count value acquisition unit for the next second, configured to calculate the sum of the local clock count value of the second where the loss moment is located and the weighted average value, as the local clock count value of the second second in the future of the second where the loss moment is located; a test module, configured to use the local clock count value of the second second in the future obtained by correction as the clock length reference to perform a time synchronization test on the Beidou time synchronization device.

7. An electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein, when the processor executes the computer program, it implements the steps of the time synchronization test method for the Beidou time synchronization device according to any one of claims 1 to 5 above.

8. A computer-readable storage medium, the computer-readable storage medium stores a computer program, wherein, when the computer program is executed by a processor, it implements the steps of the time synchronization test method for the Beidou time synchronization device according to any one of claims 1 to 5 above.

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