Method of forming a semiconductor structure

Abstract

A method for forming a semiconductor structure, comprising: providing a layer to be etched; forming a first sacrificial layer on a surface of the layer to be etched, the first sacrificial layer having a first opening extending in a first direction, the first opening exposing the surface of the layer to be etched; forming an initial second sacrificial layer on the first sacrificial layer and in the first opening; forming an initial first mask layer on a surface of the initial second sacrificial layer; performing a plurality of patterning steps on the initial first mask layer to form a first mask layer, the first mask layer having a plurality of partition mask openings arranged in the first direction, each of the partition mask openings extending across the first opening in a second direction, the second direction being perpendicular to the first direction. Thus, adjacent patterns with small spacing and good topography are transferred to the layer to be etched.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Technology

[0002] As circuit integration density and scale increase, the size of unit devices in circuits continues to shrink, which in turn raises the requirements for integrated circuit manufacturing processes. For example, critical dimensions continue to shrink, and chip manufacturing requires increasingly higher photolithographic resolution.

[0003] As design sizes continue to shrink, the minimum resolution of design patterns has exceeded the limits of existing optical lithography platforms. The industry has adopted a variety of technical solutions to address this problem. According to the International Semiconductor Technology Roadmap, dual patterning (DPT), extreme ultraviolet (EUV) technology, and electron beam direct writing (EBL) are among the technologies that the industry has high hopes for.

[0004] However, as the integration density of semiconductor structures further increases, it is necessary to further reduce the spacing between two adjacent design patterns. The size of this spacing exceeds or approaches the limits of existing photolithography processes, resulting in the inability to form adjacent patterns with small spacing, or the poor morphology of the numerous adjacent patterns with small spacing. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to transfer adjacent patterns with small spacing and good morphology to the layer to be etched.

[0006] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a layer to be etched; forming a first sacrificial layer on the surface of the layer to be etched, the first sacrificial layer having a first opening extending along a first direction, the first opening exposing the surface of the layer to be etched; forming an initial second sacrificial layer on the first sacrificial layer and within the first opening; forming an initial first mask layer on the surface of the initial second sacrificial layer; performing multiple patterning steps on the initial first mask layer to form a first mask layer, the first mask layer having a plurality of isolation mask openings arranged along the first direction, each of the isolation mask openings spanning the first opening along a second direction, the second direction and the first direction being perpendicular to each other.

[0007] Optionally, each of the patterning steps includes: forming a partition patterning layer on the initial first mask layer; and patterning the initial first mask layer with the partition patterning layer to form a plurality of the partition mask openings within the initial first mask layer.

[0008] Optionally, the method for forming the isolation patterned layer includes: forming a photolithographic sacrificial layer on the surface of the initial first mask layer, wherein the surface of the photolithographic sacrificial layer is higher than the surface of the initial first mask layer; forming an isolation photolithographic layer on the surface of the photolithographic sacrificial layer through an exposure and development process, wherein the isolation photolithographic layer exposes a portion of the surface of the photolithographic sacrificial layer; using the isolation photolithographic layer as a mask, etching the photolithographic sacrificial layer until the surface of the initial first mask layer is exposed, thereby forming the isolation patterned layer.

[0009] Optionally, it further includes: forming an initial second mask layer on the surface of the initial second sacrificial layer before forming the initial first mask layer, wherein the material of the initial second mask layer is a hard mask material; using the first mask layer as a mask, etching the initial second mask layer until the surface of the initial second sacrificial layer is exposed to form a second mask layer.

[0010] Optionally, it further includes: after forming the second mask layer, using the second mask layer as a mask, etching the initial second sacrificial layer to form a plurality of partition openings in the initial second sacrificial layer to form a second sacrificial layer, wherein the partition openings expose the first opening.

[0011] Optionally, it further includes: after forming the second sacrificial layer, forming a plurality of partition structures arranged along a first direction within the first opening exposed by the partition opening.

[0012] Optionally, the method of forming the partition structure includes: forming a partition structure material layer on the surface of the second sacrificial layer, inside the partition opening, and inside the first opening exposed by the partition opening; planarizing the partition structure material layer until the surface of the second sacrificial layer is exposed; and after exposing the surface of the second sacrificial layer, re-etching the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer, thereby forming the partition structure.

[0013] Optionally, the method of forming the partition structure includes: forming a partition structure material layer on the surface of the second sacrificial layer, inside the partition opening, and inside the first opening exposed by the partition opening; and etching back the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer to form the partition structure.

[0014] Optionally, in the second direction, the length of the partition opening is greater than the width of the first opening; the method of forming the semiconductor structure further includes: forming a sidewall film on the surface of the first sacrificial layer and the inner wall surface of the first opening before forming the initial second sacrificial layer.

[0015] Optionally, it also includes: after forming the partition structure, using an anisotropic etching process to etch the sidewall film until the surface of the first sacrificial layer and the surface of the layer to be etched at the bottom of the first opening are exposed, forming a sidewall on the sidewall of the first opening.

[0016] Optionally, the layer to be etched includes a first region and a second region arranged along a second direction, the first region and the second region being adjacent to each other, and the first opening being located on the first region; the method of forming the semiconductor structure further includes: after forming the sidewall, forming a second opening extending along the first direction in a first sacrificial layer on the second region, the second opening exposing the sidewall surface of the sidewall.

[0017] Optionally, it also includes: after forming the sidewall, using the first sacrificial layer, the sidewall, and the plurality of partition structures as a mask, etching the layer to be etched.

[0018] Optionally, the material of the first mask layer includes carbon-doped oxides.

[0019] Optionally, the material of the second sacrificial layer includes spin-coated hydrogen-containing organic material.

[0020] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0021] In the semiconductor structure formation method provided by the present invention, an initial second sacrificial layer is formed on the first sacrificial layer and within the first opening, an initial first mask layer is formed on the surface of the initial second sacrificial layer, and the initial first mask layer is subjected to multiple patterning steps to form the first mask layer. Therefore, multiple small-pitch isolation mask openings within the first mask layer can be dispersed and formed in multiple patterning steps, so that a pattern of one isolation mask opening or multiple large-pitch isolation mask openings can be formed in each patterning step. This results in better exposure effect of the photolithography process, better pattern morphology of the isolation mask openings, and the formation of multiple small-pitch and well-morphologically-oriented isolation mask openings within the first mask layer. Based on this, by transferring the pattern of the first mask layer to the initial second sacrificial layer, the positions of multiple isolation structures formed in the first opening can be defined subsequently, thereby realizing the transfer of small-pitch and well-morphologically-oriented isolation structure patterns to the layer to be etched. In summary, the semiconductor structure formation method described above achieves the transfer of small-pitch and well-morphologically-oriented adjacent patterns to the layer to be etched.

[0022] Furthermore, since an initial second mask layer of hard mask material is formed on the surface of the initial second sacrificial layer before the initial first mask layer is formed, and the initial second mask layer is etched using the first mask layer as a mask until the surface of the initial second sacrificial layer is exposed to form the second mask layer, the stability of pattern transfer is improved through the second mask layer, thereby making the morphology of the pattern transferred to the layer to be etched more stable. Attached Figure Description

[0023] Figures 1 to 5 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0024] Figures 6 to 24 This is a schematic diagram of the steps in a method for forming a semiconductor structure according to an embodiment of the present invention. Detailed Implementation

[0025] As described in the background section, with the increasing integration of semiconductor structures, it is necessary to further reduce the spacing between two adjacent design patterns. However, the size of this spacing exceeds or approaches the limits of existing photolithography processes, resulting in the inability to form adjacent patterns with small spacing, or the poor morphology of numerous adjacent patterns with small spacing. The following will provide a detailed explanation in conjunction with the accompanying drawings.

[0026] It should be noted that the term "surface" in this specification is used to describe the relative spatial relationship and is not limited to whether there is direct contact.

[0027] Figures 1 to 5 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0028] Please refer to Figure 1 A layer 100 to be etched is provided; a sacrificial layer 110 is formed on the layer 100 to be etched, the sacrificial layer 110 having a plurality of conductive mask openings 111 extending along a first direction X, the conductive mask openings 111 exposing the surface of the layer 100 to be etched.

[0029] Please refer to Figure 2 and Figure 3 , Figure 3 yes Figure 2 A schematic diagram of the cross-sectional structure along the direction A1-A2. Figure 2 yes Figure 3A top view of the structure shows that a photolithographic sacrificial layer 120 is formed on the surface of the sacrificial layer 110 and within the conductive mask opening 111, with the surface of the photolithographic sacrificial layer 120 being higher than the surface of the sacrificial layer 110. A photolithographic pattern layer 130 is formed on the surface of the photolithographic sacrificial layer 120 through exposure and development processes. The photolithographic pattern layer 130 has two photolithographic isolation openings 131, which span the same conductive mask opening 111. Furthermore, along the first direction X, there is a spacing W between the two photolithographic isolation openings 131.

[0030] The lithographic sacrificial layer 120 is used to improve the stability of pattern transfer in the lithographic pattern layer 130. For each lithographic pattern layer formed, a corresponding lithographic sacrificial layer needs to be formed.

[0031] Please refer to Figure 4 , Figure 4 and Figure 3 With the view direction consistent, using the photolithographic pattern layer 130 as a mask, the photolithographic sacrificial layer 120 is etched until the layer to be etched 100 is exposed, and an intermediate opening 121 is formed in the photolithographic sacrificial layer 120 to expose the conductive mask opening 111.

[0032] Please refer to Figure 5 , Figure 5 and Figure 2 With the view direction consistent, a partition structure material layer (not shown) is formed on the surface of the photolithographic sacrificial layer 120, inside the intermediate opening 121, and inside the conductive mask opening 111; the partition structure material layer is etched until two partition structures 140 are formed inside the conductive mask opening 111, and the distance between the two partition structures 140 along the first direction X is equal to the distance W; after the partition structure 140 is formed, the layer 100 to be etched is etched using the partition structure 140 and the sacrificial layer 110 as a mask.

[0033] Thus, the missile mask opening 111 is isolated by the partition structure 140.

[0034] However, in the above embodiments, since the two photolithographic isolation openings 131 are formed on the same photolithographic pattern layer 130, the spacing W between the two photolithographic isolation openings 131 is relatively large due to the limitations of the photolithography process. This results in a large spacing between the two partition structures 140, making it impossible to form small-pitch partition structures 140 along the first direction X. Furthermore, when the spacing W approaches the limits of the photolithography process, the patterns of the two photolithographic isolation openings 131 are easily affected by each other during the formation of the photolithographic pattern layer 130 through the exposure process, resulting in poor morphology of the patterns of the two photolithographic isolation openings 131. In summary, adjacent patterns with small spacing cannot be formed, or the morphology of multiple adjacent patterns with small spacing is poor.

[0035] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a semiconductor structure. This method involves forming an initial second sacrificial layer on a first sacrificial layer and within a first opening; forming an initial first mask layer on the surface of the initial second sacrificial layer; and performing multiple patterning steps on the initial first mask layer to form a first mask layer. The first mask layer has multiple isolation mask openings arranged along a first direction, and each isolation mask opening spans the first opening along a second direction, where the second direction and the first direction are perpendicular to each other. This method achieves the transfer of small-pitch and well-shaped adjacent patterns to the layer to be etched.

[0036] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0037] Figures 6 to 24 This is a schematic diagram of the steps in a method for forming a semiconductor structure according to an embodiment of the present invention.

[0038] Please refer to Figure 6 and Figure 7 , Figure 7 yes Figure 6 A schematic diagram of the cross-sectional structure along the C1-C2 direction. Figure 6 yes Figure 7 A top view of the structure along direction D, showing the layer 200 to be etched.

[0039] In this embodiment, the layer to be etched 200 includes a substrate 210 and a third mask material layer 220 located on the substrate 210.

[0040] In this embodiment, the substrate 210 is made of aluminum oxide.

[0041] In other embodiments, the substrate material includes a low-k dielectric layer (K ​​less than or equal to 3.9).

[0042] In other embodiments, the substrate material includes silicon oxide.

[0043] In this embodiment, the third mask material layer 220 provides material for the subsequent formation of the third mask layer.

[0044] On the other hand, the third mask material layer 220 can protect the substrate 210 in subsequent etching processes such as forming the first opening and the partition structure, so as to reduce the damage to the surface of the substrate 210 caused by the etching process.

[0045] In this embodiment, the layer to be etched 200 includes a first region I and a second region II arranged along the second direction Y, and the first region I and the second region II are adjacent to each other.

[0046] Please refer to Figure 8 , Figure 8 and Figure 7 With the view direction consistent, a first sacrificial layer 230 is formed on the surface of the layer to be etched 200. The first sacrificial layer 230 has a first opening 231 extending along the first direction X. The first opening 231 exposes the surface of the layer to be etched 200. The first direction X and the second direction Y are perpendicular to each other.

[0047] In this embodiment, the first opening 231 is located on the first region I.

[0048] Specifically, the method for forming the first sacrificial layer 230 includes: forming a first sacrificial material layer (not shown) on the layer to be etched 200; forming a first opening mask layer (not shown) on the surface of the first sacrificial material layer 230, wherein the first opening mask layer exposes the surface of the first sacrificial material layer in the first region I; using the first opening mask layer as a mask, etching the first sacrificial material layer until the surface of the layer to be etched 200 is exposed, thereby forming the first opening 231 in the first sacrificial material layer to form the first sacrificial layer 230.

[0049] In this embodiment, the material of the first sacrificial layer 230 includes silicon.

[0050] Specifically, the material of the first sacrificial layer 230 includes amorphous silicon, monocrystalline silicon, or polycrystalline silicon.

[0051] In this embodiment, the process for forming the first sacrificial material layer includes a deposition process, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition.

[0052] In this embodiment, the etching process of the first sacrificial material layer includes at least one of dry etching and wet etching.

[0053] In this embodiment, after the first sacrificial layer 230 is formed and before the second sacrificial layer is subsequently formed, a sidewall membrane 232 is formed on the surface of the first sacrificial layer 230 and the inner wall surface of the first opening 231.

[0054] On one hand, the sidewall film 232 provides material for the subsequently formed sidewalls, thereby separating the first opening 231 and the subsequently formed second opening by forming the sidewalls to meet design requirements. On the other hand, the sidewall film 232 can protect the etched layer 200 and the first sacrificial layer 230 during subsequent etching processes such as transferring the partition structure pattern, reducing damage to the surfaces of the etched layer 200 and the first sacrificial layer 230, thereby improving the stability of pattern transfer and the performance and reliability of the semiconductor structure.

[0055] In this embodiment, the material of the sidewall membrane 232 includes titanium oxide.

[0056] In this embodiment, after the first sacrificial layer 230 is formed, the first opening mask layer is removed.

[0057] Please refer to Figure 9 , Figure 9 and Figure 7 With consistent view orientation, an initial second sacrificial layer 240 is formed on the first sacrificial layer 230 and within the first opening 231.

[0058] The initial second sacrificial layer 240 provides material for the subsequent formation of the second sacrificial layer.

[0059] Specifically, the surface of the initial second sacrificial layer 240 is higher than the surface of the first sacrificial layer 230.

[0060] Since an initial second sacrificial layer 240 is formed outside the photolithographic sacrificial layer in the subsequent patterning step, on the one hand, it is beneficial to reduce the surface height difference of the semiconductor structure in each region, that is, to improve the surface flatness of the semiconductor structure, thereby reducing the etching load between different regions of the semiconductor structure. On the other hand, the material selection of the initial second sacrificial layer 240 is more flexible. Therefore, by selecting the material of the initial second sacrificial layer 240, the etching selectivity ratio of the material of the second sacrificial layer and the material of the sidewall film 232 in the etching process can be increased to reduce the damage to the sidewall film 232 during the etching process, thereby improving the performance and reliability of the semiconductor structure.

[0061] In this embodiment, the process for forming the initial second sacrificial layer 240 includes a spin coating process.

[0062] Specifically, in this embodiment, the material of the initial second sacrificial layer 240 includes spin-coated hydrogen-containing organic material (SOH).

[0063] Similarly, in this embodiment, the material of the second sacrificial layer includes spin-coated hydrogen-containing organic matter.

[0064] In another embodiment, the materials of the initial second sacrificial layer and the second sacrificial layer include spin-coated carbon (SOC).

[0065] In other embodiments, the process for forming the initial second sacrificial layer includes a deposition process, such as a chemical vapor deposition process, a fluidized chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0066] Please refer to Figure 10 , Figure 10 and Figure 7 With the view direction consistent, an initial first mask layer 250 is formed on the surface of the initial second sacrificial layer 240.

[0067] The initial first mask layer 250 is used to provide material for the subsequent first mask layer formed after multiple patterning steps.

[0068] In this embodiment, the material of the initial first mask layer 250 includes carbon-doped oxides.

[0069] Furthermore, by forming the initial first mask layer 250, the surface height difference of the semiconductor structure in each region can be further reduced, which is beneficial to improving the surface flatness of the semiconductor structure. This reduces the etching load between different regions of the semiconductor structure and improves the patterning accuracy of subsequent photolithography processes.

[0070] In this embodiment, the process of forming the initial first mask layer 250 includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0071] In this embodiment, before forming the initial first mask layer 250, an initial second mask layer 260 is formed on the surface of the initial second sacrificial layer 240, and the material of the initial second mask layer 260 is a hard mask material.

[0072] The initial second hard mask layer 260 provides material for the subsequent formation of the second hard mask layer.

[0073] Furthermore, by forming the initial second hard mask layer 260, the surface height difference of the semiconductor structure in each region can be further reduced, which is beneficial to improving the surface flatness of the semiconductor structure. This reduces the etching load between different regions of the semiconductor structure and improves the patterning accuracy of subsequent photolithography processes.

[0074] Specifically, the material of the initial second mask layer 260 includes silicon nitride.

[0075] In other embodiments, the material of the initial second mask layer comprises a low-temperature oxide formed in a preset low-temperature environment, the temperature range of which is 50 degrees Celsius to 100 degrees Celsius. The low-temperature oxide includes low-temperature silicon oxide.

[0076] In this embodiment, the process of forming the initial second mask layer 260 includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0077] Next, the initial first mask layer 250 is subjected to multiple patterning steps to form a first mask layer, the first mask layer having a plurality of partition mask openings arranged along the first direction X, each of the partition mask openings spanning the first opening 231 along the second direction Y.

[0078] Specifically, each of the patterning steps includes: forming a partition patterning layer on the initial first mask layer 250; and patterning the initial first mask layer 250 with the partition patterning layer to form a plurality of openings along the partition mask within the initial first mask layer 250.

[0079] For ease of understanding, Figures 11 to 16 This schematically illustrates the specific process of performing a graphical step.

[0080] For details on the specific steps involved in forming the partition graphic layer in each of the graphical steps, please refer to [link / reference needed]. Figures 11 to 14 Specifically, for the steps of patterning the initial first mask layer 250 with the aforementioned partition patterning layer to form a plurality of openings along the partition mask within the initial first mask layer 250, please refer to [the relevant documentation / reference]. Figure 15 and Figure 16 .

[0081] Please refer to Figure 11 and Figure 12 , Figure 12 yes Figure 11 A schematic diagram of the cross-sectional structure along the C1-C2 direction. Figure 11 yes Figure 12 A top view of the structure along direction D shows that a photolithographic sacrificial layer 310 is formed on the surface of the initial first mask layer 250, and the surface of the photolithographic sacrificial layer 310 is higher than the surface of the initial first mask layer 250. An isolation photolithographic layer 320 is formed on the surface of the photolithographic sacrificial layer 310 through exposure and development processes, and the isolation photolithographic layer 320 exposes part of the surface of the photolithographic sacrificial layer 310.

[0082] In this embodiment, one partition mask opening pattern is passed to the first mask layer in each patterning step.

[0083] In other embodiments, depending on design requirements, each patterning step may also transmit a pattern of multiple partition mask openings with large spacing between them to the first mask layer.

[0084] The surface of the photolithography sacrificial layer 310 is higher than the surface of the initial first mask layer 250. Therefore, in each patterning step, the photolithography sacrificial layer 310 can cover the isolation mask opening formed in the initial first mask layer 250 in the previous patterning step. Thus, in the current patterning step, the morphology of the formed isolation mask opening is protected, the damage to the formed isolation mask opening is reduced, and the morphology of the isolation mask opening pattern is improved.

[0085] In this embodiment, the process for forming the photolithographic sacrificial layer 310 includes a spin coating process.

[0086] The material of the photolithographic sacrificial layer 310 includes spin-coated carbon-containing organic materials.

[0087] In this embodiment, an anti-reflection layer (not shown) is also formed on the surface of the photolithography sacrificial layer 310 before the isolation photolithography layer 320 is formed.

[0088] Specifically, the antireflective layer includes a thin silicon antireflective layer (Si-ARC), an organic material bottom antireflective layer (organic BARC), a dielectric antireflective layer (DARC), or a combination of an organic bottom antireflective layer and a dielectric antireflective layer.

[0089] Please refer to Figure 13 and Figure 14 , Figure 14 yes Figure 13 A schematic diagram of the cross-sectional structure along the C1-C2 direction. Figure 13 yes Figure 14 A top view of the structure along direction D shows that the photolithographic layer 320 is used as a mask to etch the photolithographic sacrificial layer 310 until the surface of the initial first mask layer 250 is exposed to form the isolation patterned layer 311.

[0090] In this embodiment, the etching process of the photolithographic sacrificial layer 310 includes at least one of dry etching and wet etching.

[0091] Please refer to Figure 15 and Figure 16 , Figure 16 yes Figure 15 A schematic diagram of the cross-sectional structure along the C1-C2 direction. Figure 15 yes Figure 16 A top view of the structure along direction D shows that the initial first mask layer 250 is patterned by the partition patterning layer 311 to form a plurality of partition mask openings 251 within the initial first mask layer 250.

[0092] In this embodiment, in each patterning step, a partition mask opening 251 is formed in the initial first mask layer 250.

[0093] In other embodiments, depending on design requirements, multiple partition mask openings 251 with large spacing between each other can be formed in the initial first mask layer 250 during each graphical step.

[0094] Specifically, the process of patterning the initial first mask layer 250 with the isolation patterning layer 311 includes at least one of wet etching and dry etching.

[0095] In this embodiment, after forming the partition mask opening 251, the partition patterning layer 311 is removed.

[0096] Please refer to Figure 17 and Figure 18 , Figure 18 yes Figure 17 A schematic diagram of the cross-sectional structure along the C1-C2 direction. Figure 17 yes Figure 18 A top view of the structure along direction D shows that after multiple patterning steps are performed on the initial first mask layer 250, a first mask layer 252 is formed. The first mask layer 252 has a plurality of partition mask openings 251 arranged along the first direction X, and each partition mask opening 251 spans the first opening 231 along the second direction Y.

[0097] It should be noted that, for ease of understanding, this embodiment uses the formation of the first mask layer 252 after two patterning steps as an example. In the actual formation method, the number of patterning steps and the number of patterns of the partition mask openings 251 that need to be transmitted in each patterning step can be adjusted according to the specific design requirements.

[0098] Since an initial second sacrificial layer 240 is formed on the first sacrificial layer 230 and within the first opening 231, an initial first mask layer 250 is formed on the surface of the initial second sacrificial layer 240, and the initial first mask layer 250 is subjected to multiple patterning steps to form a first mask layer 252, it is possible to visualize multiple small-pitch (e.g., ...) spaces within the first mask layer 252. Figure 17The isolation mask openings 251 with a spacing M shown are formed in multiple patterning steps, so that one isolation mask opening 251 pattern or multiple large-spacing isolation mask openings 251 patterns can be formed in each patterning step. This results in better exposure effect in the photolithography process and a better pattern morphology of the isolation mask openings 251, allowing multiple small-spacing and well-shaped isolation mask openings 251 to be formed within the first mask layer 252. Based on this, by transferring the pattern of the first mask layer 252 to the initial second sacrificial layer 240, the positions of multiple isolation structures formed in the first opening 231 can be defined, thereby realizing the transfer of small-spacing and well-shaped isolation structure patterns to the layer to be etched 200. In summary, the semiconductor structure formation method described above achieves the transfer of small-spacing and well-shaped adjacent patterns (adjacent isolation mask openings 251 patterns) to the layer to be etched 200.

[0099] Specifically, through multiple patterning steps, one or more patterns of large-pitched partition mask openings 251 can be formed in each partition photolithography layer 320 to form a first mask layer 252 with multiple small-pitched partition mask openings 251. Therefore, the patterns in each partition photolithography layer 320 are simpler and the spacing between adjacent patterns is larger. Therefore, on the one hand, during the exposure and development process of forming each isolation photolithography layer 320, the pattern of the isolation mask opening 251 is less affected by the pattern of the adjacent isolation mask opening 251, or is not affected by the pattern of the adjacent isolation mask opening 251. As a result, the exposure effect of the photolithography process is better, and the pattern morphology and precision of the isolation mask opening 251 formed in each isolation photolithography layer 320 are better. Consequently, the pattern morphology and precision transferred to the etchable layer 200 are better, and there are fewer defects. On the other hand, the process window for forming each isolation photolithography layer 320 and each mask used to form the isolation photolithography layer 320 is large and the process difficulty is low. As a result, it is beneficial to improve the control precision of the formation process.

[0100] Furthermore, since the sidewall film 232 and the first sacrificial layer 230 are separated from the initial first mask layer 250 by the initial second sacrificial layer 240 during the multiple patterning steps of transferring the pattern of the isolation photolithography layer 320 to the initial first mask layer 250, the initial second sacrificial layer 240 protects the sidewall film 232 and the first sacrificial layer 230, reducing the damage to the formation of the sidewall film 232 and the first sacrificial layer 230 caused by the etching process in the patterning steps. This is beneficial to improving the pattern morphology transferred to the layer 200 to be etched.

[0101] Meanwhile, since the number of partition mask openings 251 formed in the initial first mask layer 250 each time is reduced, the process window of the etching process is larger and the control difficulty of the etching process is lower when etching the initial first mask layer 250 each time. This results in a smaller etching load between different regions of the formed first mask layer 252, thereby reducing the etching load in the process of transferring the pattern to the layer to be etched 200. Based on this, since the pattern of the first mask layer 252 is subsequently transferred to the initial second sacrificial layer 240 to define the positions of multiple partition structures formed in the first opening 231, reducing the etching load during the pattern transfer process to the etchable layer 200 can help reduce the deposition loading of the partition structures. This improves the consistency of the thickness of each partition structure and the consistency of the blocking ability between each partition structure when transferring the pattern to the etchable layer 200. Consequently, on the one hand, the reliability of the semiconductor structure is improved, and on the other hand, the process window size of the etching process during the pattern transfer process to the etchable layer 200 can be increased, which helps to reduce the difficulty of the etching process and improve the control precision of the etching process.

[0102] In this embodiment, the material of the first mask layer 251 includes carbon-doped oxides.

[0103] Please refer to Figure 19 , Figure 19 and Figure 18 With the view direction consistent, using the first mask layer 251 as a mask, the initial second mask layer 260 is etched until the surface of the initial second sacrificial layer 240 is exposed, forming the second mask layer 261.

[0104] Since an initial second mask layer 260 of hard mask material is formed on the surface of the initial second sacrificial layer 240 before the initial first mask layer 250 is formed, and the initial second mask layer 260 is etched using the first mask layer 252 as a mask until the surface of the initial second sacrificial layer 240 is exposed to form a second mask layer 261, the stability of pattern transfer is improved through the second mask layer 261, thereby making the morphology of the pattern transferred to the layer to be etched 200 more stable.

[0105] In this embodiment, the etching process of the initial second mask layer 260 includes at least one of dry etching and wet etching.

[0106] In this embodiment, the material of the second mask layer 261 includes silicon nitride.

[0107] In other embodiments, the material of the second mask layer includes a low-temperature oxide formed in a preset low-temperature environment, the temperature range of which is 50 degrees Celsius to 100 degrees Celsius. The low-temperature oxide includes low-temperature silicon oxide.

[0108] In other embodiments, the material of the second mask layer includes silicon oxynitride, silicon carbonitride, silicon carbonitride, etc.

[0109] In this embodiment, after the second mask layer 261 is formed, the first mask layer 252 is removed.

[0110] Please refer to Figure 20 , Figure 20 and Figure 19 With the view direction consistent, using the second mask layer 261 as a mask, the initial second sacrificial layer 240 is etched, and a plurality of partition openings 241 are formed in the initial second sacrificial layer 240 to form a second sacrificial layer 242. The partition openings 241 expose the first opening 231.

[0111] In this embodiment, the alignment of the etching process is improved by the sidewall film 232 during the etching process of forming the partition opening 241, so as to avoid the etching process from etching the first sacrificial layer 230.

[0112] In this embodiment, the etching process of the initial second sacrificial layer 240 includes at least one of dry etching and wet etching.

[0113] In this embodiment, after the second sacrificial layer 242 is formed, the second mask layer 261 is removed.

[0114] Please refer to Figure 21 , Figure 21 and Figure 20 With the view direction consistent, after the second sacrificial layer 242 is formed, a plurality of partition structures 233 arranged along the first direction X are formed in the first opening 231 exposed by the partition opening 241.

[0115] Specifically, in this embodiment, the method of forming the partition structure 241 includes: forming a partition structure material layer (not shown) on the surface of the second sacrificial layer 242, inside the partition opening 241, and inside the first opening 231 exposed by the partition opening 241; and etching back the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer 230 to form the partition structure 233.

[0116] In other embodiments, the method of forming the partition structure includes: forming a partition structure material layer on the surface of the second sacrificial layer, within the partition opening, and within a first opening exposed by the partition opening; planarizing the partition structure material layer until the surface of the second sacrificial layer is exposed; and after exposing the surface of the second sacrificial layer, re-etching the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer, thereby forming the partition structure.

[0117] In this embodiment, after the partition structure 233 is formed, the second sacrificial layer 242 is removed.

[0118] Please refer to Figure 22 , Figure 22 and Figure 21 With the view direction consistent, after the partition structure 233 is formed, an anisotropic etching process is used to etch the sidewall film 232 until the surface of the first sacrificial layer 230 and the surface of the layer 200 to be etched at the bottom of the first opening 231 are exposed, and a sidewall 234 is formed on the sidewall of the first opening 231.

[0119] In this embodiment, after the sidewall 234 is formed, a second opening 235 extending in the first direction X is formed in the first sacrificial layer 230 on the second region II, and the second opening 235 exposes the sidewall surface of the sidewall 234.

[0120] The method of forming the second opening 235 includes: after forming the sidewall 234, forming a second opening mask layer (not shown) in the first opening 231, on the surface of the first sacrificial layer 230 and on the surface of the partition structure 233, the second opening mask layer exposing the surface of the first sacrificial layer 230 in the second region II; using the second opening mask layer as a mask, etching the first sacrificial layer 230 until the surface of the layer to be etched 200 is exposed.

[0121] During the etching process that forms the second opening 235, the alignment of the etching process is improved by the sidewall 234.

[0122] Next, using the first sacrificial layer 230, sidewalls 234, and multiple partition structures 233 as masks, the layer to be etched 200 is etched. For specific steps on etching the layer to be etched 200, please refer to [link to documentation]. Figure 23 .

[0123] Please refer to Figure 23 , Figure 23 and Figure 22With the view direction consistent, using the first sacrificial layer 230, sidewall 234 and multiple partition structures 233 as masks, the initial third mask material layer 220 is etched until the substrate 210 is exposed, forming the third mask layer 221; using the third mask layer 221 as a mask, the substrate 210 is etched until a plurality of conductive openings 211 are formed in the substrate 210.

[0124] In this embodiment, after the third mask layer 221 is formed, the first sacrificial layer 230, the sidewall 234 and the plurality of partition structures 233 are removed.

[0125] In this embodiment, after forming a plurality of conductive openings 211, the third mask layer 221 is removed.

[0126] Please refer to Figure 24 , Figure 24 and Figure 17 With the view direction consistent, after forming a plurality of conductive openings 211, a conductive structure 201 is formed within the conductive openings 211.

[0127] In this embodiment, the method for forming the conductive structure 201 includes: forming a conductive structure material layer (not shown) on the surface of the substrate 210 and within a plurality of conductive openings 211; planarizing the conductive structure material layer until the surface of the substrate 210 is exposed to form a plurality of conductive structures 201.

[0128] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: Provide the layer to be etched; A first sacrificial layer is formed on the surface of the layer to be etched, and the first sacrificial layer has a first opening extending in a first direction, the first opening exposing the surface of the layer to be etched; After the first opening is formed, a sidewall membrane is first formed on the surface of the first sacrificial layer and the inner wall surface of the first opening. After the sidewall membrane is formed, an initial second sacrificial layer is formed on the sidewall membrane and inside the first opening; An initial first mask layer is formed on the surface of the initial second sacrificial layer; The initial first mask layer is patterned multiple times to form a first mask layer. The first mask layer has a plurality of partition mask openings arranged along the first direction with small spacing. Each partition mask opening crosses the first opening along the second direction, and the second direction and the first direction are perpendicular to each other. The initial second sacrificial layer is etched to form a plurality of partition openings within the initial second sacrificial layer to form a second sacrificial layer, the partition openings exposing the first opening; After the second sacrificial layer is formed, a plurality of partition structures arranged along the first direction are formed in the first opening exposed by the partition opening; After the partition structure is formed, an anisotropic etching process is used to etch the sidewall film until the surface of the first sacrificial layer and the surface of the layer to be etched at the bottom of the first opening are exposed, and a sidewall is formed on the sidewall of the first opening. After the sidewalls are formed, the first sacrificial layer, the sidewalls, and the multiple partition structures are used as masks to etch the layer to be etched. In each patterning step, one isolation mask opening is formed in the initial first mask layer, or multiple isolation mask openings with large spacing between them are formed in the initial first mask layer.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, Each of the patterning steps includes: forming a partition patterning layer on the initial first mask layer; and patterning the initial first mask layer with the partition patterning layer to form a plurality of the partition mask openings within the initial first mask layer.

3. The method for forming a semiconductor structure as described in claim 2, characterized in that, The method for forming the isolation patterned layer includes: forming a photolithographic sacrificial layer on the surface of the initial first mask layer, wherein the surface of the photolithographic sacrificial layer is higher than the surface of the initial first mask layer; forming an isolation photolithographic layer on the surface of the photolithographic sacrificial layer through an exposure and development process, wherein the isolation photolithographic layer exposes a portion of the surface of the photolithographic sacrificial layer; using the isolation photolithographic layer as a mask, etching the photolithographic sacrificial layer until the surface of the initial first mask layer is exposed, thereby forming the isolation patterned layer.

4. The method for forming a semiconductor structure as described in claim 1, characterized in that, Also includes: Before forming the initial first mask layer, an initial second mask layer is formed on the surface of the initial second sacrificial layer, wherein the material of the initial second mask layer is a hard mask material; Using the first mask layer as a mask, the initial second mask layer is etched until the surface of the initial second sacrificial layer is exposed, forming the second mask layer.

5. The method for forming a semiconductor structure as described in claim 4, characterized in that, Also includes: After the second mask layer is formed, the initial second sacrificial layer is etched using the second mask layer as a mask, and a plurality of partition openings are formed in the initial second sacrificial layer to form the second sacrificial layer, wherein the partition openings expose the first opening.

6. The method for forming a semiconductor structure as described in claim 5, characterized in that, The method of forming the partition structure includes: forming a partition structure material layer on the surface of the second sacrificial layer, inside the partition opening, and inside the first opening exposed by the partition opening; planarizing the partition structure material layer until the surface of the second sacrificial layer is exposed; and after exposing the surface of the second sacrificial layer, re-etching the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer, thereby forming the partition structure.

7. The method for forming a semiconductor structure as described in claim 5, characterized in that, The method of forming the partition structure includes: forming a partition structure material layer on the surface of the second sacrificial layer, inside the partition opening, and inside the first opening exposed by the partition opening; and etching back the partition structure material layer until the top surface of the partition structure material layer is lower than or flush with the top surface of the first sacrificial layer to form the partition structure.

8. The method for forming a semiconductor structure as described in claim 5, characterized in that, In the second direction, the length of the partition opening is greater than the width of the first opening.

9. The method for forming a semiconductor structure as described in claim 8, characterized in that, The layer to be etched includes a first region and a second region arranged along a second direction, the first region and the second region being adjacent to each other, and the first opening being located on the first region; the method of forming the semiconductor structure further includes: after forming the sidewall, forming a second opening extending along the first direction in a first sacrificial layer on the second region, the second opening exposing the sidewall surface of the sidewall.

10. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the first mask layer includes carbon-doped oxides.

11. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the second sacrificial layer includes spin-coated hydrogen-containing organic matter.

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