Semiconductor structure, method for manufacturing a semiconductor structure, and method for manufacturing an electronic device

Abstract

To enable the separable support of semiconductor thin films on a substrate. [Solution] The semiconductor structure (1) comprises a first substrate (101) as a substrate, a semiconductor thin film (100) formed on the first substrate (101), and a support (108). The support (108) is made of a resist material and supports the semiconductor thin film (100) with respect to the substrate (101) such that a gap is formed between the semiconductor thin film (100) and the first substrate (101). The support (108) is bonded to the first substrate (101) and to the lower surface of the semiconductor thin film (100) as the first surface facing the first substrate (101).

Description

Technical Field

[0001] The present disclosure relates to a semiconductor structure, a method for manufacturing a semiconductor structure, and a method for manufacturing an electronic device.

Background Art

[0002] Conventionally, a technique has been known in which a semiconductor thin film is formed on a substrate via a sacrificial layer, and then the sacrificial layer is removed by etching to separate the semiconductor thin film from the substrate and transfer it to another substrate. In addition, in order to support the semiconductor thin film after removal of the sacrificial layer, formation of a support has also been proposed (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the conventional technology, depending on the thickness and size of the semiconductor thin film, it has been difficult to form a support, and there have been cases where the semiconductor thin film cannot be supported so as to be separable.

[0005] An object of the present disclosure is to enable a semiconductor thin film to be supported separably on a substrate.

Means for Solving the Problems

[0006] The semiconductor structure of the present disclosure includes a substrate, a semiconductor thin film formed on the substrate, and a support made of a resist material that supports the semiconductor thin film with respect to the substrate such that a gap is formed between the semiconductor thin film and the substrate. The support is joined to the substrate and a first surface of the semiconductor thin film facing the substrate.

[0007] A method for manufacturing a semiconductor structure according to the present disclosure is a method for manufacturing a semiconductor structure using a laminated substrate on which a sacrificial layer and a semiconductor thin film are sequentially formed, comprising the steps of: forming a void between the substrate and the semiconductor thin film by removing a part of the sacrificial layer; forming a support that is bonded to the substrate and the first surface of the semiconductor thin film facing the substrate by applying a resist material to the void; and further removing the sacrificial layer after forming the support.

[0008] A method for manufacturing an electronic device according to the present disclosure includes the steps of: joining a holding member to the semiconductor thin film of the semiconductor structure; separating the semiconductor thin film held by the holding member from a first substrate; joining the semiconductor thin film to a second substrate different from the first substrate; and removing the holding member from the semiconductor thin film after joining the semiconductor thin film to the second substrate. [Effects of the Invention]

[0009] According to this disclosure, since the support is bonded to the substrate and the first surface of the semiconductor thin film, the semiconductor thin film can be separated and supported by the support on the substrate. [Brief explanation of the drawing]

[0010] [Figure 1] This is a flowchart showing the manufacturing method of the electronic device according to Embodiment 1. [Figure 2] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a semiconductor thin film on a first substrate in Embodiment 1. [Figure 3] (A) and (B) are a plan view and a cross-sectional view showing the process of patterning a device substrate in Embodiment 1. [Figure 4] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a Schottky electrode and a resist in Embodiment 1. [Figure 5](A) and (B) are a plan view and a cross-sectional view showing the process of patterning a Schottky electrode in Embodiment 1. [Figure 6] (A) and (B) are a plan view and a cross-sectional view showing the first step of the etching process of the first substrate in Embodiment 1. [Figure 7] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a support in Embodiment 1. [Figure 8] (A) and (B) are a plan view and a cross-sectional view showing the process of etching the support in Embodiment 1. [Figure 9] (A) and (B) are a plan view and a cross-sectional view showing the second step of the etching process of the first substrate in Embodiment 1. [Figure 10] (A) and (B) are cross-sectional views showing the process of separating a semiconductor thin film from a first substrate and the process of removing a support from the semiconductor thin film, respectively, in Embodiment 1. [Figure 11] (A) and (B) are cross-sectional views showing the process of removing a buffer layer from a semiconductor thin film and the process of forming a metal film on a semiconductor thin film, respectively, in Embodiment 1. [Figure 12] This is a cross-sectional view showing the second substrate in Embodiment 1. [Figure 13] Figures (A) to (C) are cross-sectional views showing the process of transferring a semiconductor thin film to a second substrate in Embodiment 1. [Figure 14] This is a cross-sectional view showing the process of forming an insulating layer and an electrode layer on a semiconductor thin film in Embodiment 1. [Figure 15] (A) and (B) are a plan view and a cross-sectional view showing the process of etching the support in a modified example 1 of Embodiment 1. [Figure 16] (A) and (B) are cross-sectional views showing the second step of the etching process of the first substrate and the process of separating the semiconductor thin film from the first substrate, respectively, in a modified example 1 of Embodiment 1. [Figure 17](A) and (B) are a plan view and a cross-sectional view showing the step of forming a support in Modified Example 2 of Embodiment 1. [Figure 18] (A) to (C) are a plan view and a cross-sectional view showing the step of etching a support in Modified Example 2 of Embodiment 1, and a cross-sectional view showing the second stage of the step of etching the first substrate. [Figure 19] (A) to (C) are a plan view and a cross-sectional view showing the step of etching a support in Modified Example 3 of Embodiment 1, and a cross-sectional view showing the second stage of the step of etching the first substrate. [Figure 20] It is a flowchart showing a method for manufacturing an electronic device according to Embodiment 2. [Figure 21] In Embodiment 2, it is a cross-sectional view showing the step of forming a buffer layer, a lower barrier layer, a sacrificial layer, and a semiconductor thin film on a first substrate. [Figure 22] (A) to (C) are a cross-sectional view, a plan view, and an enlarged cross-sectional view showing a part of a device substrate, showing the first stage of the step of patterning the device substrate in Embodiment 2. [Figure 23] (A) to (C) are a cross-sectional view, a plan view, and an enlarged cross-sectional view showing a part of a device substrate, showing the second stage of the step of patterning the device substrate in Embodiment 2. [Figure 24] (A) to (C) are a cross-sectional view, a plan view, and an enlarged cross-sectional view showing a part of a device substrate, showing the step of forming a protective film in Embodiment 2. [Figure 25] In Embodiment 2, it is a cross-sectional view showing the first stage of the step of etching the sacrificial layer. [Figure 26] In Embodiment 2, it is a cross-sectional view showing the step of forming a support. [Figure 27] In Embodiment 2, it is a plan view showing the arrangement of the support. [Figure 28] In Embodiment 2, it is a cross-sectional view showing the second stage of the step of etching the sacrificial layer. [Figure 29]This is a cross-sectional view showing the process of separating a semiconductor thin film from a first substrate in Embodiment 2. [Figure 30] (A) and (B) are cross-sectional views showing the step of removing the support and the step of removing the upper barrier layer, respectively, in Embodiment 2. [Figure 31] Figures (A) to (C) are cross-sectional views showing the process of transferring a semiconductor thin film to a second substrate, the process of removing a protective film, and the process of forming electrodes, respectively, in Embodiment 2. [Figure 32] This is a cross-sectional view showing the process of forming a support in a modified example of Embodiment 2. [Figure 33] This is a plan view showing the arrangement of the support in a modified example of Embodiment 2. [Figure 34] This is a cross-sectional view showing the second step of etching the sacrificial layer in a modified example of Embodiment 2. [Figure 35] This is a plan view showing a step in separating a semiconductor thin film from a first substrate in a modified example of Embodiment 2. [Figure 36] This is a flowchart showing the manufacturing method of the electronic device according to Embodiment 3. [Figure 37] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a semiconductor thin film on a first substrate in Embodiment 3. [Figure 38] (A) and (B) are a plan view and a cross-sectional view showing the process of patterning a device substrate in Embodiment 3. [Figure 39] (A) and (B) are a plan view and a cross-sectional view showing the first step of the etching process of the first substrate in Embodiment 3. [Figure 40] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a resist in Embodiment 3. [Figure 41] This is a cross-sectional view showing the process of exposing the resist in Embodiment 3. [Figure 42] (A) and (B) are a plan view and a cross-sectional view showing the process of developing the resist in Embodiment 3. [Figure 43] (A) and (B) are a plan view and a cross-sectional view showing the second step of the etching process for the first substrate in Embodiment 3. [Figure 44] (A) and (B) are a plan view and a cross-sectional view showing the process of removing the resist from the upper surface of a semiconductor thin film in Embodiment 3. [Figure 45] (A) and (B) are cross-sectional views showing the process of separating the semiconductor thin film from the first substrate and the process of removing the support from the semiconductor thin film, respectively, in Embodiment 3. [Figure 46] Figures (A) to (C) are cross-sectional views showing the process of transferring a semiconductor thin film to a second substrate, the process of patterning a semiconductor thin film, and the process of forming electrodes, respectively, in Embodiment 3. [Figure 47] (A) and (B) are a plan view and a cross-sectional view showing the process of forming electrodes and the like on a semiconductor thin film in Embodiment 3. [Figure 48] (A) and (B) are a plan view and a cross-sectional view showing the arrangement of semiconductor thin films on the first substrate in Embodiment 3. [Figure 49] This is a cross-sectional view showing the exposure process in a modified example 1 of Embodiment 3. [Figure 50] (A) and (B) are a plan view and a cross-sectional view showing the process of developing the support in a modified example 1 of Embodiment 3. [Figure 51] (A) and (B) are a plan view and a cross-sectional view showing the process of developing the support in a modified example 2 of Embodiment 3. [Figure 52] This is a flowchart showing the manufacturing method of the electronic device according to Embodiment 4. [Figure 53] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a sacrificial layer and a semiconductor thin film on a first substrate in Embodiment 4. [Figure 54] (A) and (B) are a plan view and a cross-sectional view showing the process of patterning a device substrate in Embodiment 4. [Figure 55](A) and (B) are a plan view and a cross-sectional view showing the first step of the process of etching the sacrificial layer in Embodiment 4. [Figure 56] (A) and (B) are a plan view and a cross-sectional view showing the process of forming a resist in Embodiment 4. [Figure 57] This is a cross-sectional view showing the process of exposing the resist in Embodiment 4. [Figure 58] (A) and (B) are a plan view and a cross-sectional view showing the process of developing the resist in Embodiment 4. [Figure 59] (A) and (B) are a plan view and a cross-sectional view showing the second step of the process of etching the sacrificial layer in Embodiment 4. [Figure 60] (A) and (B) are cross-sectional views showing the process of separating the semiconductor thin film from the first substrate and the process of removing the support from the semiconductor thin film, respectively, in Embodiment 4. [Figure 61] Figures (A) to (C) are cross-sectional views showing the process of transferring a semiconductor thin film to a second substrate, the process of patterning a semiconductor thin film, and the process of forming electrodes, respectively, in Embodiment 4. [Figure 62] (A) and (B) are a plan view and a cross-sectional view showing the process of forming electrodes, etc., in Embodiment 4. [Figure 63] This is a cross-sectional view showing the step of exposing a resist in a modified example 1 of Embodiment 4. [Figure 64] (A) and (B) are a plan view and a cross-sectional view showing the process of developing the resist in a modified example 1 of Embodiment 4. [Figure 65] (A) and (B) are cross-sectional views showing the process of removing a thin film layer from a semiconductor thin film and the process of transferring the semiconductor thin film to a second substrate, respectively, in a modified example 1 of Embodiment 4. [Figure 66] (A) and (B) are cross-sectional views showing the state in which the semiconductor thin film has been transferred to the second substrate and the process of forming electrodes in a modified example 1 of Embodiment 4, respectively. [Figure 67](A) and (B) are a plan view and a cross-sectional view showing the process of forming electrodes and the like in a modified example 1 of Embodiment 4. [Figure 68] (A) and (B) are cross-sectional views showing other examples of the second stage of the etching process for the first substrate, and other cross-sectional views showing other examples of the process of separating the semiconductor thin film from the first substrate. [Figure 69] (A) and (B) are cross-sectional views showing an example of forming an integrated film on a first substrate, and a cross-sectional view showing the process of separating the integrated film from the first substrate. [Modes for carrying out the invention]

[0011] The semiconductor structure, the method for manufacturing the semiconductor structure, and the method for manufacturing an electronic device according to the embodiment will be described below with reference to the drawings. Examples of electronic devices include Schottky barrier diodes, field-effect transistors, LEDs (light-emitting diodes), or photodiodes. Electronic devices are also referred to as semiconductor devices.

[0012] <Embodiment 1> <Method of manufacturing electronic devices> Figure 1 is a flowchart illustrating the manufacturing method of the electronic device according to Embodiment 1. Figures 2(A) and 2(B) are a plan view and a cross-sectional view showing the process of forming a semiconductor thin film 100 on the first substrate 101.

[0013] The first substrate 101 is, for example, a Si(111) substrate. The first substrate 101 is a substrate on which an epitaxial layer is grown on its upper surface (main surface), and is also called a substrate (or growth substrate). Figures 2(A) and (B) show only a part of the first substrate 101, but the whole is a disc shape with a diameter of 6 inches or 8 inches.

[0014] As shown in Figures 2(A) and (B), a buffer layer 102 made of AlN (aluminum nitride), a contact layer 103 made of n+GaN (gallium nitride), and a drift layer 104 made of n-GaN are formed on the first substrate 101 by epitaxial growth (step S101 in Figure 1). The buffer layer 102 is a single layer of AlN here, but it may be a laminate of, for example, an AlN layer and an AlGaN (aluminum gallium nitride) layer.

[0015] The buffer layer 102, contact layer 103, and drift layer 104 constitute the semiconductor thin film 100. The first substrate 101 and the semiconductor thin film 100 constitute the device substrate 10 as a multilayer substrate.

[0016] Figures 3(A) and 3(B) are a plan view and a cross-sectional view showing the patterning process of the device substrate 10. As shown in Figures 3(A) and 3(B), the first substrate 101, buffer layer 102, contact layer 103, and drift layer 104 are patterned (step S102 in Figure 1). Patterning is performed by forming a resist (not shown) on the drift layer 104 and then using dry etching or the like.

[0017] The dry etching conditions are set so that the side surface of the semiconductor thin film 100 is inclined, as shown in Figure 3(B). However, the side surface of the semiconductor thin film 100 is not limited to an inclined surface; it may also be a vertical surface (i.e., a surface perpendicular to the top surface of the first substrate 101).

[0018] Dry etching is performed until the depth (over-etching amount) t from the top surface (main surface) of the first substrate 101 reaches 50 to 10000 nm. As a result, a sacrificial layer 101a with approximately the same area as the bottom surface of the buffer layer 102 is formed near the top surface of the first substrate 101.

[0019] As shown in Figure 3(A), if we define mutually orthogonal X and Y directions on a plane (XY plane) parallel to the upper surface of the first substrate 101, the semiconductor thin film 100 is patterned into a quadrilateral shape having two sides in the X and Y directions, for example. However, the planar shape of the semiconductor thin film 100 is not limited to a quadrilateral and may be other shapes.

[0020] Figures 4(A) and 4(B) are plan and cross-sectional views and a step-by-step view showing the process of forming a Schottky electrode 105 and a resist 106 on the drift layer 104. As shown in Figures 4(A) and 4(B), the Schottky electrode 105 is formed on the upper surface of the drift layer 104 (step S103 in Figure 1). The Schottky electrode 105 is made of, for example, Ni (nickel), Pd (palladium), or Mo (molybdenum), and is formed by sputtering or deposition.

[0021] Furthermore, a resist 106 for patterning the Schottky electrode 105 is formed on the Schottky electrode 105. The resist 106 is formed, for example, by spin coating.

[0022] Figures 5(A) and 5(B) are cross-sectional views showing the process of patterning the Schottky electrode 105. As shown in Figures 5(A) and 5(B), the Schottky electrode 105 is patterned via the resist 106 by dry etching or wet etching.

[0023] Figures 6(A) and 6(B) are cross-sectional views showing the first step of the etching process for the sacrificial layer 101a of the first substrate 101. As shown in Figures 6(A) and 6(B), the sacrificial layer 101a of the first substrate 101 is etched in the surface direction, i.e., the (100) direction, by wet etching using KOH (potassium hydroxide) or TMAH (aqueous solution of tetramethylammonium hydroxide) (step S104 in Figure 1).

[0024] Etching of the sacrificial layer 101a of the first substrate 101 proceeds from the side (periphery) of the buffer layer 102 toward the inside. The sacrificial layer 101a is etched from the side of the buffer layer 102 to a distance D. The distance D is, for example, 1 μm to 100 μm. As a result, the central part of the sacrificial layer 101a of the first substrate 101 remains, which supports the semiconductor thin film 100.

[0025] Figures 7(A) and 7(B) are cross-sectional views showing the process of forming a support 108 on the first substrate 101. As shown in Figures 7(A) and 7(B), a support 108 made of resist is formed on the first substrate 101 (step S105 in Figure 1). For the resist (photoresist), for example, a negative type resist is used, but a positive type resist may also be used.

[0026] Specifically, a resist is formed on the first substrate 101 so as to cover the entire semiconductor thin film 100, then the resist is exposed and cured using a predetermined photomask, and the unexposed areas (uncured areas) are removed by development to form a support 108 of a predetermined shape.

[0027] The resist also penetrates into the region between the first substrate 101 and the buffer layer 102 (i.e., the region around the sacrificial layer 101a). The light that exposes the resist is reflected from the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100, curing the resist that has penetrated between the semiconductor thin film 100 and the first substrate 101.

[0028] Here, as shown in Figure 7(A), supports 108 are formed at the four corners of the semiconductor thin film 100. The supports 108 are not limited to the four corners of the semiconductor thin film 100, but may also be formed on at least one side (more preferably two sides) of the four sides of the semiconductor thin film 100. The number of supports 108 is not limited to four.

[0029] In other words, the support 108 only needs to be formed so as to be able to support the semiconductor thin film 100 after the removal of the sacrificial layer 101a, which will be described later. From the viewpoint of supporting the semiconductor thin film 100, it is desirable to have two or more support 108s. The shape of the support 108 is approximately cylindrical in Figures 7(A) and (B), but it may be in other shapes as well.

[0030] Figures 8(A) and 8(B) are a plan view and a cross-sectional view showing the process of etching the support 108. As shown in Figures 8(A) and 8(B), the portion of the support 108 that covers the side and top surfaces of the semiconductor thin film 100 is removed by etching (e.g., dry etching) (step S106 in Figure 1).

[0031] As a result, the support 108 remains in a portion formed between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100. Alternatively, the support 108 may be configured to cover a portion of the side surface of the semiconductor thin film 100 (see Figures 15(A) and (B) described later).

[0032] Furthermore, if the support 108 can be formed into the shape shown in Figures 8(A) and (B) during the resist exposure and development process when forming the support 108, the etching process of the support 108 (Figures 8(A) and (B)) may be omitted.

[0033] Figures 9(A) and 9(B) are cross-sectional views showing the second stage of the etching process for the first substrate 101 (i.e., the removal of the sacrificial layer 101a). As shown in Figures 9(A) and 9(B), the sacrificial layer 101a of the first substrate 101 is etched in the (100) direction by wet etching using KOH or TMAH to remove the sacrificial layer 101a (step S107 in Figure 1).

[0034] As a result, a gap is created between the first substrate 101 and the semiconductor thin film 100, and the semiconductor thin film 100 is supported by the support 108. This results in a configuration in which the semiconductor thin film 100 is supported by the support 108 on the first substrate 101, i.e., a semiconductor structure 1 is obtained.

[0035] As shown in Figure 9(B), the side surface 108c of the support 108 and the side surface 100c of the semiconductor thin film 100 are continuous. The side surface 108c of the support 108 may be an inclined surface that forms the same plane as the side surface of the semiconductor thin film 100, or it may be a vertical surface (i.e., a surface perpendicular to the upper surface of the first substrate 101).

[0036] Figure 10(A) is a cross-sectional view showing the process of separating the semiconductor thin film 100 from the first substrate 101. As shown in Figure 10(A), a stamp 130, which serves as a retaining member, is attached to the upper surface of the semiconductor thin film 100. The stamp 130 is made of an organic material, for example, an organic resist. It is desirable that the stamp 130 has adhesive or tack properties.

[0037] By moving the stamp 130 away from the first substrate 101, the support 108 is fractured, and the semiconductor thin film 100 is separated from the first substrate 101 (step S108 in Figure 1). At this stage, fragments of the support 108 are attached to the underside of the semiconductor thin film 100.

[0038] Figure 10(B) is a cross-sectional view showing the process of removing the support 108 from the underside of the semiconductor thin film 100. As shown in Figure 10(B), fragments of the support 108 adhering to the underside of the semiconductor thin film 100 are removed by etching or CMP (chemical mechanical polishing) (step S109 in Figure 1).

[0039] Figure 11(A) is a cross-sectional view showing the process of removing the buffer layer 102 of the semiconductor thin film 100. As shown in Figure 11(A), the buffer layer 102 (AlN layer), which is the bottom layer of the semiconductor thin film 100, is removed by etching or CMP (step S110 in Figure 1).

[0040] Although the semiconductor thin film 100 was described as a laminate of a buffer layer 102, a contact layer 103, and a drift layer 104, for convenience, the laminate of the contact layer 103 and the drift layer 104 after the removal of the buffer layer 102 will also be referred to as the semiconductor thin film 100.

[0041] Figure 11(B) is a cross-sectional view showing the process of forming a metal film 109 on the underside of a semiconductor thin film 100. As shown in Figure 11(B), a metal film 109 as a first metal film is formed on the underside of the semiconductor thin film 100 (more specifically, on the underside of the contact layer 103).

[0042] The metal film 109 is, for example, a single layer of Mo, and is formed by sputtering or vapor deposition. The metal film 109 is not limited to a single layer of Mo, but may be formed of two layers of Mo and Ti (titanium), or two layers of Ti and Au (gold).

[0043] Figure 12 is a cross-sectional view showing a second substrate 120 onto which the semiconductor thin film 100 is transferred. The second substrate 120 shown in Figure 12 is, for example, a SiC (silicon carbide) substrate and is also called a transfer substrate. However, the second substrate 120 is not limited to a SiC substrate, but may be, for example, a glass substrate, a Si substrate, etc.

[0044] A metal film 122, which serves as a second metal film, is formed on the upper surface of the second substrate 120. The metal film 122 is a multilayer film formed by stacking multiple metal layers. For example, the metal film 122 has, in order from the second substrate 120 side (bottom side), a first layer 122a made of Ti, a second layer 122b made of Pt (platinum), and a third layer 122c made of Au.

[0045] The first layer 122a, the second layer 122b, and the third layer 122c are formed by sputtering or vapor deposition. The metal film 122 is not limited to a combination of Ti, Pt, and Au layers, and other combinations are also possible.

[0046] Figures 13(A) to (C) are cross-sectional views showing the process of transferring the semiconductor thin film 100 to the second substrate 120. As shown in Figures 13(A) and (B), the semiconductor thin film 100 held by the stamp 130 is transferred to the second substrate 120 (step S111 in Figure 1).

[0047] Both the metal film 109 on the semiconductor thin film 100 and the metal film 122 on the second substrate 120 have high smoothness with a surface roughness of 10 nm or less. During transfer, the metal film 109 on the lower surface of the semiconductor thin film 100 and the metal film 122 on the upper surface of the second substrate 120 are bonded together by a predetermined pressure. As a result, the metal film 109 and the metal film 122 are joined by intermolecular forces.

[0048] Subsequently, as shown in Figure 13(C), the stamp 130 is peeled off and removed from the upper surface of the semiconductor thin film 100. Alternatively, the annealing process may be performed with the metal film 109 and the metal film 122 bonded together.

[0049] Figure 14 is a cross-sectional view showing the process of forming an insulating layer 113 and an electrode layer 114 on a semiconductor thin film 100. As shown in Figure 14, the insulating layer 113 is formed so as to cover the sides and top surface (excluding the Schottky electrode 105) of the semiconductor thin film 100. Furthermore, an electrode layer 114 is formed on the Schottky electrode 105 of the semiconductor thin film 100 (step S112 in Figure 1). The electrode layer 114 is made of, for example, Pt and is formed by sputtering or deposition.

[0050] By connecting wiring to the electrode layer 114 on the semiconductor thin film 100 and the metal film 122 on the second substrate 120, and then connecting them to a drive circuit or the like, an electronic device as a Schottky barrier diode is completed.

[0051] In this embodiment, as described with reference to Figures 8(A) to 9(B), a support 108 is formed between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100. After the removal of the sacrificial layer 101a of the first substrate 101, a gap is created between the first substrate 101 and the lower surface (first surface) of the semiconductor thin film 100, and the support 108 supports the semiconductor thin film 100 from below (see Figure 9(B)).

[0052] Therefore, with the sacrificial layer 101a removed, the semiconductor thin film 100 can be stably supported by the support 108, preventing the semiconductor thin film 100 from falling off or tilting. Furthermore, it is possible to prevent the semiconductor thin film 100 from re-adhering to the first substrate 101 after the removal of the sacrificial layer 101a.

[0053] <Effects of Embodiment 1> As described above, the semiconductor structure 1 of Embodiment 1, as shown in Figure 9(B), includes a first substrate 101 as a substrate, a semiconductor thin film 100 formed on the first substrate 101, and a support 108 made of a resist material that supports the semiconductor thin film 100 relative to the first substrate 101 such that a gap is formed between the semiconductor thin film 100 and the first substrate 101. The support 108 is bonded to the first substrate 101 and the lower surface (first surface) of the semiconductor thin film 100. Therefore, the support 108 can separately support the semiconductor thin film 100 on the first substrate 101. In other words, even when a gap is created between the first substrate 101 and the semiconductor thin film 100, it is possible to prevent the semiconductor thin film 100 from falling off or tilting.

[0054] Furthermore, as shown in Figure 9(B), since the side surface 108c of the support 108 and the side surface 100c (second surface) of the semiconductor thin film 100 are formed continuously, the support 108 can be formed only in the minimum necessary areas. Therefore, fragments of the support 108 after the semiconductor thin film 100 has been separated from the first substrate 101 can be easily removed.

[0055] Furthermore, since multiple support structures 108 are bonded to the first substrate 101 and the lower surface of the semiconductor thin film 100, the semiconductor thin film 100 can be held in a stable state. In particular, if at least one support structure 108 is formed on the edge or corner of the semiconductor thin film 100, the semiconductor thin film 100 can be held in an even more stable state.

[0056] Furthermore, the manufacturing method for the semiconductor structure 1 of Embodiment 1 is a manufacturing method that uses a device substrate 10 as a laminated substrate on which a sacrificial layer 101a and a semiconductor thin film 100 are sequentially formed on a first substrate 101, and includes the steps of forming a void between the first substrate 101 and the semiconductor thin film 100 by removing a part of the sacrificial layer 101a, forming a support 108 that is bonded to the lower surface (first surface) of the first substrate 101 and the semiconductor thin film 100 by applying a resist material to the void, and further removing the sacrificial layer 101a after forming the support 108. As a result, a semiconductor structure 1 can be manufactured in which the semiconductor thin film 100 can be separated from the first substrate 101 by rupturing the support 108.

[0057] Furthermore, the manufacturing method for the electronic device of Embodiment 1 includes the steps of: bonding a stamp 130 as a holding member to the semiconductor thin film 100 of the semiconductor structure 1; separating the semiconductor thin film 100 held by the stamp 130 from the first substrate 101; bonding the semiconductor thin film 100 to the second substrate 120; and removing the stamp 130 from the semiconductor thin film 100. Therefore, an electronic device can be manufactured using the semiconductor thin film 100 transferred from the first substrate 101 to the second substrate 120 of the semiconductor structure 1.

[0058] Variation 1. Figures 15(A) and (B) are a plan view and a cross-sectional view showing the etching process of the support 108 in a modified example 1 of Embodiment 1. In the etching process shown in Figures 8(A) and (B) described above, the support 108 was removed except for the portion located between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100.

[0059] In contrast, in the etching process of the support 108 in the modified example 1, as shown in Figures 15(A) and (B), the support 108 is etched in such a way that, in addition to the first portion 108a located between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100, a second portion 108b extending along the side surface of the semiconductor thin film 100 is also left intact.

[0060] Figure 16(A) is a cross-sectional view showing the second stage of the etching process of the first substrate 101 in Modification 1 (i.e., the removal of the sacrificial layer 101a). Removal of the sacrificial layer 101a creates a gap between the first substrate 101 and the semiconductor thin film 100, with the first portion 108a of the support 108 supporting the semiconductor thin film 100 from below and the second portion 108b holding the semiconductor thin film 100 from the side. This results in a configuration in which the semiconductor thin film 100 is supported by the support 108 on the first substrate 101, i.e., a semiconductor structure 1A is obtained.

[0061] Figure 16(B) is a cross-sectional view showing the separation process of the semiconductor thin film 100 from the first substrate 101 in Modification 1. As explained with reference to Figure 10(A), the semiconductor thin film 100 held by the stamp 130 is separated from the first substrate 101 while the support 108 supporting the semiconductor thin film 100 is broken. The subsequent steps are as explained with reference to Figures 10(A) to 14.

[0062] In the modified example 1 of Embodiment 1, the first portion 108a of the support 108 supports the semiconductor thin film 100 from below, and the second portion 108b further holds the semiconductor thin film 100 from the side (see Figure 16(A)), thus enabling the semiconductor thin film 100 to be supported in a more stable state.

[0063] Variation 2. Figures 17(A) and 17(B) are a plan view and a cross-sectional view showing the formation process of the support 108 in a modified example 2 of Embodiment 1. In the formation process of the support 108 shown in Figures 7(A) and 7(B) described above, the support 108 was formed at the four corners of the semiconductor thin film 100.

[0064] In contrast, in the modified example 2, as shown in Figures 17(A) and (B), the support 108 is formed in the center of two opposing sides of the semiconductor thin film 100. Here, the support 108 is formed on two opposing sides of the semiconductor thin film 100 in the X direction, but it may also be formed on two opposing sides in the Y direction.

[0065] Figures 18(A) and (B) are cross-sectional views showing the etching process of the support 108 in modified example 2. As shown in Figures 18(A) and (B), the support 108 is etched, leaving the portion located between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100, and removing the rest.

[0066] Figure 18(C) is a cross-sectional view showing the second stage of the etching process of the first substrate 101 in Modification 2 (i.e., the removal of the sacrificial layer 101a). As shown in Figure 18(C), the support 108 supports the semiconductor thin film 100 with a gap created between the first substrate 101 and the semiconductor thin film 100 after the removal of the sacrificial layer 101a.

[0067] This results in a configuration in which the semiconductor thin film 100 is supported by the support 108 on the first substrate 101, i.e., a semiconductor structure 1B is obtained. The subsequent steps are as described with reference to Figures 10(A) to 14.

[0068] In the modified example 2 of Embodiment 1, the support 108 is arranged on two opposing sides of the semiconductor thin film 100, allowing the semiconductor thin film 100 to be supported in a stable state. Furthermore, because the number of support 108 is small, the support 108 can be easily broken during the separation process of the semiconductor thin film 100, and the tensile force of the stamp 130 can be reduced.

[0069] In this example, one support 108 is formed on each of the two sides of the semiconductor thin film 100, but two or more support 108 may be formed on each of the two sides of the semiconductor thin film 100. Furthermore, support 108 may be formed on three or more sides of the semiconductor thin film 100.

[0070] Variation 3. Figures 19(A) and (B) are a plan view and a cross-sectional view showing the etching process of the support 108 in Modification 3 of Embodiment 1. Modification 3 is a combination of Modification 1 and Modification 2.

[0071] In the etching process of the support 108 in the modified example 2 described above (Figures 18(A), (B)), the support 108 was removed except for the portion located between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100.

[0072] In contrast, in the etching process of the support 108 in the modified example 3, as shown in Figures 19(A) and (B), the support 108 is etched in such a way that it leaves a first portion 108a located between the upper surface of the first substrate 101 and the lower surface of the semiconductor thin film 100, and a second portion 108b extending along the side surface of the semiconductor thin film 100.

[0073] Figure 19(C) is a cross-sectional view showing the second stage of the etching process of the first substrate 101 in Modification 3 (i.e., the removal of the sacrificial layer 101a). As shown in Figure 19(C), the removal of the sacrificial layer 101a creates a gap between the first substrate 101 and the semiconductor thin film 100, with the first portion 108a of the support 108 supporting the semiconductor thin film 100 from below and the second portion 108b of the support 108 holding the semiconductor thin film 100 from the side.

[0074] This results in a configuration in which the semiconductor thin film 100 is supported by the support 108 on the first substrate 101, i.e., a semiconductor structure 1C. The subsequent steps are as described with reference to Figures 10(A) to 14.

[0075] In Modification 3 of Embodiment 1, similar to Modification 1, the first portion 108a of the support 108 supports the semiconductor thin film 100 from below, and the second portion 108b further holds the semiconductor thin film 100 from the side, thereby enabling the semiconductor thin film 100 to be supported in a more stable state.

[0076] Embodiment 2 Figure 20 is a flowchart showing the manufacturing process of the electronic device according to Embodiment 2. Figure 21 is a cross-sectional view showing the process of forming a buffer layer 202, a lower barrier layer 203, sacrificial layers 204, 205 and a semiconductor thin film 200 on a first substrate 201 in Embodiment 2.

[0077] The first substrate 201 is, for example, an InP (indium phosphide) substrate. The first substrate 201 is a substrate on which an epitaxial layer is grown on its upper surface (main surface), and is also referred to as a substrate (or growth substrate).

[0078] On the first substrate 201, a buffer layer 202 which is an InP layer, a lower barrier layer 203 which is an InGaAs (indium gallium arsenide) layer, a first sacrificial layer 204 which is an InGaAsP (indium gallium arsenide phosphide) layer, a second sacrificial layer 205 which is an InP layer, an upper barrier layer 206 which is an InGaAs layer, an n-type cladding layer 207 which is an n-InP layer, an active layer 208 which is an i-InGaAs layer, a p-type cladding layer 209 which is a p-InP layer, and a contact layer 210 which is a p-InGaAs layer are formed by epitaxial growth (step S201 in Figure 20).

[0079] Of these layers, the thickness of the lower barrier layer 203 is preferably 700 nm or more. This is because, in the patterning process of the device substrate 20 described later, groove G1 (Figure 22(C)) is formed up to partway through the lower barrier layer 203.

[0080] Furthermore, the thickness of the first sacrificial layer 204 is preferably greater than the thickness of the second sacrificial layer 205, for example, twice as much. For example, the thickness of the first sacrificial layer (InGaAsP) 204 is 100nm to 600nm, and the thickness of the second sacrificial layer (InP) 205 is 50nm to 300nm.

[0081] The thickness of the upper barrier layer 206 is, for example, 100 nm to 600 nm. The lower barrier layer 203 and the upper barrier layer 206 are composed of InGaAs, where if the concentration of In is 0.53, the concentration of Ga is, for example, 0.47, and the concentration of As is, for example, 1.

[0082] The five layers, the upper barrier layer 206, the n-type cladding layer 207, the active layer 208, the p-type cladding layer 209, and the contact layer 210, constitute the semiconductor thin film 200. The first substrate 201, the buffer layer 202, the lower barrier layer 203, and the semiconductor thin film 200 constitute the device substrate 20 as a multilayer substrate.

[0083] Figures 22(A) and (B) are a cross-sectional view and a plan view showing the first stage of the patterning process for the device substrate 20. Figure 22(C) is an enlarged view of the area enclosed by the dotted line P1 in Figure 22(A).

[0084] As shown in Figures 22(A) to (C), the device substrate 20 is etched from the contact layer 210 to the lower barrier layer 203 (step S202 in Figure 20). This forms grooves G1 that extend from the contact layer 210 to the lower barrier layer 203, and the semiconductor thin film 200 is fragmented.

[0085] Figures 23(A) and (B) are a cross-sectional view and a plan view showing the second stage of the patterning process for the device substrate 20. Figure 23(C) is an enlarged view of the area enclosed by the dotted line P1 in Figure 23(A).

[0086] As shown in Figures 23(A) to (C), the device substrate 20 is etched from the contact layer 210 to the upper surface of the upper barrier layer 206. That is, a groove G2 is formed that extends from the contact layer 210 to the upper surface of the upper barrier layer 206. As a result, the laminate consisting of four layers from the n-type cladding layer 207 to the contact layer 210 is patterned such that its area is smaller than that of the upper barrier layer 206.

[0087] The horizontal etching width D1 on the upper surface of the upper barrier layer 206 is greater than the thickness D2 of the upper barrier layer 206. That is, D1 > D2 holds true. This etching width D1 corresponds to the distance from the side surface of the upper barrier layer 206 to the side surface of the four-layer laminate (the laminate from the n-type cladding layer 207 to the contact layer 210).

[0088] Figures 24(A) and (B) are a cross-sectional view and a plan view showing the process of forming a protective film 211 on the device substrate 20. Figure 24(C) is an enlarged view of the area enclosed by the dotted line P1 in Figure 24(A).

[0089] As shown in Figures 24(A) to (C), a protective film 211 is formed to cover the top and sides of the semiconductor thin film 200 (i.e., the laminate from the upper barrier layer 206 to the contact layer 210) (step S203 in Figure 20). The protective film 211 is formed of, for example, Al2O3 (sapphire), Si3N4 (silicon nitride), or SiO2 (silicon carbide).

[0090] Since the area of ​​the four-layer laminate from the n-type cladding layer 207 to the contact layer 210 is smaller than the area of ​​the upper barrier layer 206, the protective film 211 can be prevented from reaching the sides of the sacrificial layers 204 and 205. This prevents the etching of the sacrificial layers 204 and 205 from being hindered in the etching process described next.

[0091] Figure 25 is a schematic diagram showing the first stage of the etching process for the sacrificial layer 204 and the second sacrificial layer 205. As shown in Figure 25, the first sacrificial layer 204 and the second sacrificial layer 205 are etched (step S204 in Figure 20). Wet etching is used as the etching method.

[0092] As the etching solution, for example, a mixture of phosphoric acid and hydrogen peroxide, or a mixture of citric acid and hydrogen peroxide solution is used. The etching rate of the second sacrificial layer 205 is 2 to 1000 times that of the first sacrificial layer 204 relative to the etching solution used. This ratio of etching rates can be adjusted by the respective compositions of the first sacrificial layer 204 and the second sacrificial layer 205.

[0093] Etching of the first sacrificial layer 204 and the second sacrificial layer 205 proceeds from their sides (periphery) toward the center. As etching progresses, the etching solution penetrates the region between the lower barrier layer 203 and the upper barrier layer 206 from the periphery.

[0094] Due to the aforementioned etching rate ratio, etching of the second sacrificial layer 205 proceeds faster than etching of the first sacrificial layer 204. As a result, the second sacrificial layer 205 shrinks faster than the first sacrificial layer 204, and the etching solution penetrates above the first sacrificial layer 204.

[0095] In other words, the first sacrificial layer 204 is etched not only from the sides (around the edges) but also from above. As a result, the first sacrificial layer 204 is etched in a tapered shape, as shown in Figure 25.

[0096] The first stage of etching stops with both the first sacrificial layer 204 and the second sacrificial layer 205 remaining between the lower barrier layer 203 and the upper barrier layer 206. Therefore, at this stage, the semiconductor thin film 200 is supported by the first sacrificial layer 204 and the second sacrificial layer 205. Also, a void is created between the lower barrier layer 203 and the upper barrier layer 206, which forms the support 212 described next.

[0097] Figure 26 is a cross-sectional view showing the formation process of the support 212. As shown in Figure 26, the support 212 is formed on the first substrate 201 using a resist (step S205 in Figure 20). For the resist (photoresist), for example, a negative type resist is used, but a positive type resist may also be used.

[0098] Specifically, a resist is formed on the first substrate 201 so as to cover the entire semiconductor thin film 200, then the resist is exposed and cured using a predetermined photomask, and the unexposed areas (uncured areas) are removed by development to form a support 212 of a predetermined shape.

[0099] The resist also penetrates between the lower barrier layer 203 and the upper barrier layer 206 (i.e., around the sacrificial layers 204 and 205). The light exposing the resist is reflected from the upper surface of the lower barrier layer 203 or the lower surface of the upper barrier layer 206, curing the resist that has penetrated between these barrier layers 203 and 206.

[0100] Figure 27 is a plan view showing the arrangement of the support 212. As shown in Figure 27, the support 212 is formed on two of the four sides of the semiconductor thin film 200 that are opposite in the X direction. The support 212 may also be formed on the two sides of the semiconductor thin film 200 that are opposite in the Y direction, on all four sides, or at the four corners. The planar shape of the support 212 is a rectangle in Figure 27, but it may be other shapes.

[0101] In other words, the support 212 only needs to be formed in such a way that it can support the semiconductor thin film 100 during the removal process of the sacrificial layers 204 and 205, which will be described next. From the viewpoint of supporting the semiconductor thin film 200, it is desirable to have two or more support 212s.

[0102] Figure 28 is a cross-sectional view showing the second stage of the etching process for sacrificial layers 204 and 205 (i.e., the removal of sacrificial layers 204 and 205). As shown in Figure 28, etching is performed using the same etching solution as in the first stage of the etching process described with reference to Figure 25 to remove sacrificial layers 204 and 205 (step S206 in Figure 20).

[0103] As a result, a gap is created between the lower barrier layer 203 and the upper barrier layer 206, and the semiconductor thin film 200 is supported by the support 212. This gives rise to a configuration in which the semiconductor thin film 200 is supported by the support 212 on the first substrate 201, i.e., a semiconductor structure 2.

[0104] Figure 29 is a cross-sectional view showing the process of separating the semiconductor thin film 200 from the first substrate 201. As shown in Figure 29, a stamp 230, which serves as a retaining member, is attached to the upper surface of the semiconductor thin film 200. The material of the stamp 230 is the same as that of the stamp 130 in Embodiment 1.

[0105] By moving the stamp 230 away from the first substrate 201, the support 212 is fractured, and the semiconductor thin film 200 is separated from the first substrate 201 (step S207 in Figure 20).

[0106] Figure 30(A) is a cross-sectional view showing the process of removing the support 212 from the underside of the semiconductor thin film 200. As shown in Figure 30(A), fragments of the support 212 adhering to the underside of the semiconductor thin film 200 are removed by etching or CMP (step S208 in Figure 20).

[0107] Figure 30(B) is a cross-sectional view showing the process of removing the upper barrier layer 206 of the semiconductor thin film 200. As shown in Figure 30(B), the bottommost upper barrier layer 206 (InGaAs layer) of the semiconductor thin film 200 is removed by etching.

[0108] As described above, the distance from the side of the upper barrier layer 206 to the side of the n-type cladding layer 207 (etching width D1) is greater than the thickness D2 of the upper barrier layer 206. Therefore, the upper barrier layer 206 is completely removed by vertical etching before the horizontal etching reaches the n-type cladding layer 207.

[0109] Although the laminate from the upper barrier layer 206 to the contact layer 210 was described as the semiconductor thin film 200, for convenience, the laminate after the removal of the upper barrier layer 206 (i.e., the laminate from the n-type cladding layer 207 to the contact layer 210) will also be referred to as the semiconductor thin film 200.

[0110] Figures 31(A) and (B) are cross-sectional views showing the process of transferring the semiconductor thin film 200 to the second substrate 220. As shown in Figure 31(A), the semiconductor thin film 200 held by the stamp 230 is transferred to the second substrate 220 (step S209 in Figure 20). The second substrate 220 is, for example, a Si substrate and is also called a transfer substrate. The upper surface of the second substrate 220 has high smoothness with a surface roughness of 10 nm or less.

[0111] The lower surface of the semiconductor thin film 200 (i.e., the lower surface of the n-type cladding layer 207) is the interface formed when the n-type cladding layer 207 was epitaxially grown, and therefore has high smoothness with a surface roughness of 10 nm or less. If the surface roughness is rougher than 10 nm, the lower surface of the semiconductor thin film 200 may be smoothed by CMP or the like. The lower surface of the semiconductor thin film 100 and the upper surface of the second substrate 220 are joined by intermolecular forces.

[0112] Subsequently, as shown in Figure 31(B), the stamp 230 is peeled off and removed from the upper surface of the semiconductor thin film 200, and the protective film 211 covering the semiconductor thin film 200 is removed by etching or the like.

[0113] Figure 31(C) is a cross-sectional view showing the process of forming electrodes 221 and 222. As shown in Figure 31(C), electrode 221 is formed as the first electrode on the upper surface of the contact layer 210 of the semiconductor thin film 200, and electrode 222 is formed as the second electrode on the second substrate 220 so as to be in contact with the side surface of the n-type cladding layer 207 (step S210 in Figure 20).

[0114] Electrodes 221 and 222 are formed from metallic materials such as Au, Al (aluminum), Cu (copper), Ti, and Pt. This forms an electronic device comprising a second substrate 220, a semiconductor thin film 200 (n-type cladding layer 207, active layer 208, p-type cladding layer 209, and contact layer 210), and electrodes 221 and 222. The electronic device is, for example, a photodiode or an LED.

[0115] <Effects of Embodiment 2> In Embodiment 2, a void is formed between the lower barrier layer 203 and the upper barrier layer 206 during the etching process (first stage) of the sacrificial layers 204 and 205, and the support 212 is formed in this void. Therefore, even with a void created between the lower barrier layer 203 and the upper barrier layer 206 following the removal of the sacrificial layers 204 and 205, the semiconductor thin film 200 can be stably supported by the support 212.

[0116] Furthermore, since a first sacrificial layer 204 with a slow etching rate is provided on the first substrate 201 side, and a second sacrificial layer 205 with a fast etching rate is provided on the semiconductor thin film 200 side, the junction surface between the second sacrificial layer 205 and the semiconductor thin film 200 becomes smaller first during the etching process. Therefore, even if the sacrificial layers 204 and 205 cannot be completely removed, the semiconductor thin film 200 can be easily peeled off from the second sacrificial layer 205.

[0117] In this explanation, we described a case where a first sacrificial layer 204 with a slow etching rate is provided on the first substrate 201 side, and a second sacrificial layer 205 with a fast etching rate is provided on the semiconductor thin film 200 side. However, the positions of the first sacrificial layer 204 and the second sacrificial layer 205 may be reversed.

[0118] Variation 1. Figure 32 is a cross-sectional view showing the formation process of the support 212 in modified example 1 of Embodiment 2. In the formation process of the support 212 shown in Figures 26 and 27 described above, a portion of the support 212 was also formed on the side and top surfaces of the lower barrier layer 203.

[0119] In contrast, in Modification 1, as shown in Figure 32, the support 212 is formed only between the lower barrier layer 203 and the upper barrier layer 206. Such a configuration can be achieved by exposure and development of the resist that forms the support 212, or by etching after the support 212 has been formed.

[0120] Figure 33 is a plan view showing the arrangement of the support 212 in Modification 1. As shown by the dashed line in Figure 33, the support 212 is formed so as not to protrude from the underside of the semiconductor thin film 200 (i.e., between the lower barrier layer 203 and the upper barrier layer 206).

[0121] Figure 34 is a cross-sectional view showing the removal process of sacrificial layers 204 and 205 (i.e., the second stage of the etching process) in Modification 1. Removal of sacrificial layers 204 and 205 creates a gap between the lower barrier layer 203 and the upper barrier layer 206, and the semiconductor thin film 200 is supported by the support 212. This results in a configuration in which the semiconductor thin film 200 is supported by the support 212 on the first substrate 201, i.e., a semiconductor structure 2A is obtained.

[0122] Figure 35 is a cross-sectional view showing the separation process of the semiconductor thin film 200 from the first substrate 201 in Modification 1. As shown in Figure 35, a stamp 230 is attached to the upper surface of the semiconductor thin film 200, and the semiconductor thin film 200 is pulled upward. This causes the support 212 to break, and the semiconductor thin film 200 is separated from the first substrate 201. The subsequent steps are as described with reference to Figures 30(A) to 31(C).

[0123] In the modified example 1 of Embodiment 2, since all parts of the support 212 except for the portion located between the lower barrier layer 203 and the upper barrier layer 206 are removed, the support 212 can be fractured with less force in the separation process shown in Figure 35. In addition, since there are fewer fragments of the support 212 adhering to the upper barrier layer 206, the removal of such fragments becomes easier.

[0124] Embodiment 3 Figure 36 is a flowchart showing the manufacturing process of the electronic device according to Embodiment 3. Figures 37(A) and (B) are a cross-sectional view and a plan view showing the process of forming a semiconductor thin film 300 on the first substrate 301 in Embodiment 3.

[0125] The first substrate 301 is, for example, a Si(111) substrate and is also referred to as a substrate (or growth substrate). Figures 37(A) and (B) show only a portion of the first substrate 301, but the first substrate 301 as a whole is a disc-shaped object with a diameter of 6 or 8 inches.

[0126] As shown in Figures 37(A) and (B), a buffer layer 302 which is an AlN layer, an n-type cladding layer 303 which is an nGaN layer, an active layer 304 which is an InGaN layer, and a p-type cladding layer 305 which is a pGaN layer are formed on the first substrate 301 by epitaxial growth (step S301 in Figure 36).

[0127] The buffer layer 302, the n-type cladding layer 303, the active layer 304, and the p-type cladding layer 305 constitute the semiconductor thin film 300. The first substrate 301 and the semiconductor thin film 300 constitute the device substrate 30 as a multilayer substrate.

[0128] The buffer layer 302 is a layer for forming the n-type cladding layer 303, and its band gap is approximately 2.0 eV. The n-type cladding layer 303 is the cathode-side layer of the two cladding layers that sandwich the active layer 304, and its band gap is approximately 3.4 eV. The active layer 304 is an emitting or light-absorbing layer, and its band gap is approximately 3.2 eV. The p-type cladding layer 305 is the anode-side layer of the two cladding layers that sandwich the active layer 304, and its band gap is approximately 3.4 eV.

[0129] Figures 38(A) and (B) are a plan view and a cross-sectional view showing the patterning process of the device substrate 30. As shown in Figures 38(A) and (B), the first substrate 301, buffer layer 302, n-type cladding layer 303, active layer 304, and p-type cladding layer 305 are patterned (step S302 in Figure 36). Patterning is performed by forming a resist (not shown) on the p-type cladding layer 305 and then using dry etching or the like.

[0130] The dry etching conditions are set so that the side surface of the semiconductor thin film 300 is inclined, as shown in Figure 38(B). However, the side surface of the semiconductor thin film 300 is not limited to an inclined surface; it may also be a vertical surface (i.e., a surface perpendicular to the top surface of the first substrate 301).

[0131] Dry etching is performed until the depth (over-etching amount) t from the top surface of the first substrate 301 is 50 to 10000 nm. As a result, a sacrificial layer 301a with approximately the same area as the bottom surface of the buffer layer 302 is formed near the top surface of the first substrate 301.

[0132] Figures 39(A) and (B) are cross-sectional views showing the first step of the etching process for the first substrate 301. As shown in Figures 39(A) and (B), the sacrificial layer 301a of the first substrate 301 is etched in the (100) direction by wet etching using KOH or TMAH (step S303 in Figure 36).

[0133] Etching of the sacrificial layer 301a proceeds from the side (periphery) of the sacrificial layer 301a inward. As a result, the central part of the sacrificial layer 301a remains between the first substrate 301 and the semiconductor thin film 300, supporting the semiconductor thin film 100. Additionally, a void is created around the sacrificial layer 301a.

[0134] Figures 40(A) and (B) are a plan view and a cross-sectional view showing the resist 306 formation process. As shown in Figures 40(A) and (B), the resist 306 is formed on the first substrate 301 so as to surround the semiconductor thin film 300 (step S304 in Figure 36). The resist 306 also fills the gap between the first substrate 301 and the semiconductor thin film 300.

[0135] For the resist 306 (photoresist), for example, a negative-type resist having a photosensitive wavelength in the G line (wavelength 436 nm) is used. A positive-type resist may be used instead of a negative-type resist.

[0136] Figure 41 is a cross-sectional view showing the exposure process of the resist 306. As shown in Figure 41, the semiconductor thin film 300 is irradiated with light L from above (i.e., from the side opposite to the first substrate 301) through the photomask 310 (step S305 in Figure 36). The G-line is used as the light L. The photomask 310 has a plurality of apertures 311.

[0137] Of the resist 306, the portion irradiated with G-rays that have passed through the photomask 310 hardens. Furthermore, the maximum band gaps of the buffer layer 302, n-type cladding layer 303, active layer 304, and p-type cladding layer 305 are 3.4 eV, which converts to a wavelength of 387 nm, shorter than the wavelength of the G-ray (436 nm). Therefore, the G-ray penetrates the semiconductor thin film 300.

[0138] Therefore, the G-ray irradiates not only the resist 306 on the semiconductor thin film 300, but also the resist 306 located between the first substrate 301 and the semiconductor thin film 300. In other words, the resist 306 located between the first substrate 301 and the semiconductor thin film 300 also hardens in the portion irradiated by the G-ray.

[0139] Figures 42(A) and (B) are a plan view and a cross-sectional view showing the process of developing the resist 306. As shown in Figures 42(A) and (B), developing the resist 306 removes the unexposed portions of the resist 306 (step S306 in Figure 36). The development of the resist 306 forms the support 307.

[0140] In the example shown in Figure 42(A), eight support structures 307 are formed around a sacrificial layer 301a located in the center of the lower surface of the semiconductor thin film 300. If the X direction along one side of the semiconductor thin film 300 is defined as the row direction and the Y direction along the other side as the column direction, then support structures 307 are formed in eight locations, excluding the second row and second column of a 3x3 configuration.

[0141] The support 307 is formed, for example, in a columnar shape. The cross-sectional shape of the support 307 in the XY plane is rectangular, but other shapes are also possible. The number and arrangement of the support 307 are not limited to the example shown in Figure 42(A). From the viewpoint of supporting the semiconductor thin film 300, it is desirable to have two or more support 307s, and it is also desirable to arrange them as evenly as possible.

[0142] Figures 43(A) and (B) are a plan view and a cross-sectional view showing the second stage of the etching process of the first substrate 301 (i.e., the removal of the sacrificial layer 301a). As shown in Figures 43(A) and (B), the sacrificial layer 301a is removed by wet etching using KOH or TMAH (step S307 in Figure 36). As a result, the semiconductor thin film 300 is supported by the support 307 on the first substrate 301.

[0143] Figures 44(A) and (B) are a plan view and a cross-sectional view showing the process of removing the support 307 from the upper surface of the semiconductor thin film 300. As shown in Figures 44(A) and (B), the support 307 formed on the upper surface of the semiconductor thin film 300 is removed, for example, by an O2 ashing process. Note that if the presence of the support 307 on the semiconductor thin film 300 does not affect the bonding of the stamp 330 (Figure 45(A)), this step may be omitted.

[0144] Figure 45(A) is a cross-sectional view showing the separation process of the semiconductor thin film 300 from the first substrate 301. As shown in Figure 45(A), a stamp 330 is attached to the upper surface of the semiconductor thin film 300 as a retaining member. The material of the stamp 330 is the same as that of the stamp 130 in Embodiment 1.

[0145] By moving the stamp 330 away from the first substrate 301, the support 307 is fractured, and the semiconductor thin film 300 is separated from the first substrate 301 (step S308 in Figure 36).

[0146] Figure 45(B) is a cross-sectional view showing the process of removing the support 307 from the semiconductor thin film 300. As shown in Figure 45(B), fragments of the support 307 adhering to the lower surface of the semiconductor thin film 300 are removed, for example, by an O2 ashing treatment (step S309 in Figure 36).

[0147] Figure 46(A) is a cross-sectional view showing the process of transferring the semiconductor thin film 300 to the second substrate 320. As shown in Figure 46(A), the semiconductor thin film 300 held by the stamp 330 is transferred to the second substrate 320 (step S310 in Figure 36). The second substrate 320 is, for example, a glass substrate and is also called a transfer substrate. The upper surface of the second substrate 320 has high smoothness with a surface roughness of 10 nm or less.

[0148] The lower surface of the buffer layer 302 of the semiconductor thin film 300 has high smoothness with a surface roughness of 10 nm or less because it is the interface formed when the buffer layer 302 was epitaxially grown. If the surface roughness is rougher than 10 nm, the lower surface of the semiconductor thin film 300 may be smoothed by CMP or the like. The lower surface of the semiconductor thin film 300 and the upper surface of the second substrate 320 are joined by intermolecular forces.

[0149] Figures 46(B) and (C) are cross-sectional views showing the process of patterning the semiconductor thin film 300 to form electrodes 321 to 324. As shown in Figure 46(B), after peeling off the stamp 330 from the top surface of the semiconductor thin film 300, the semiconductor thin film 300 is patterned (step S311 in Figure 36). Specifically, a portion of the semiconductor thin film 300 is etched from the p-type cladding layer 305 to partway through the n-type cladding layer 303 to form a stepped shape.

[0150] Furthermore, as shown in Figure 46(C), electrodes 321 and 322 are formed on the upper surface of the second substrate 320. In addition, an anode electrode 323 is formed on the upper surface of the p-type cladding layer 305 of the semiconductor thin film 300, and a cathode electrode 324 is formed on the upper surface of the n-type cladding layer 303 exposed by the etching. Electrodes 321 to 324 are formed from metallic materials such as Au, Al, Cu, Ti, or Pt.

[0151] Figures 47(A) and (B) are plan and cross-sectional views and a cross-sectional view, respectively, showing the process of forming the wiring layers 325, 326 and the insulating layers 327, 328. As shown in Figures 47(A) and (B), the wiring layer 325 is formed to extend from the anode electrode 323 of the semiconductor thin film 300 to the electrode 321 on the second substrate 320. The wiring layer 326 is formed to extend from the cathode electrode 324 of the semiconductor thin film 300 to the electrode 322 on the second substrate 320.

[0152] Furthermore, the insulating layer 327 is formed between the top and side surfaces of the semiconductor thin film 300 and the wiring layer 325. The insulating layer 328 is formed between the top and side surfaces of the semiconductor thin film 300 and the wiring layer 326.

[0153] This forms an electronic device comprising a second substrate 320, a semiconductor thin film 300, and electrodes 321-324, etc. The electronic device is, for example, an LED or a photodiode.

[0154] In the case of an LED electronic device, light is emitted from the active layer 304 by passing a current between the anode electrode 323 and the cathode electrode 324 via electrodes 321 and 322. When the band gap of the active layer 304 (InGaN) is 3.2 eV, the emission wavelength is 387 nm.

[0155] <Effects of Embodiment 3> In Embodiment 3, a resist 306 is formed to cover the semiconductor thin film 300, and a support 307 is formed by irradiating the resist 306 with light that has passed through the semiconductor thin film 300. As a result, multiple support 307 can be provided as evenly as possible between the upper surface of the first substrate 301 and the lower surface (first surface) of the semiconductor thin film 300 (see Figures 43(A) and (B)). Therefore, the semiconductor thin film 300 can be supported in a stable state even after the removal of the sacrificial layer 301a.

[0156] Furthermore, since the support 307 can be formed so as not to protrude outward from the semiconductor thin film 300, interference with the surrounding semiconductor thin film 300 can be prevented.

[0157] Figures 48(A) and (B) are a plan view and a cross-sectional view showing the entire first substrate 301 and the semiconductor thin film 300 supported by the support 307 on the first substrate 301. As shown in Figures 48(A) and (B), the semiconductor thin films 300 are densely arranged on the first substrate 301. Since there is no support 307 in the space between adjacent semiconductor thin films 300 (indicated by the symbol C in Figure 48(B)), when selectively picking (separating) the semiconductor thin film 300 from the first substrate 301, the picking can be performed without interference with adjacent semiconductor thin films 300.

[0158] Furthermore, in Embodiment 3, the degree of freedom in the arrangement and shape of the support 307 is increased by changing the arrangement and shape of the opening 311 of the photomask 310. This point will be explained in the following Modifications 1 and 2.

[0159] Variation 1. Figure 49 is a cross-sectional view showing the exposure process of the resist 306 in Modification 1 of Embodiment 3. In Modification 1, exposure is performed using a photomask 310A. The photomask 310A differs from the photomask 310 shown in Figure 41 in the position and shape of the opening 311. Other exposure conditions are as described with reference to Figure 41.

[0160] Figures 50(A) and (B) are a plan view and a cross-sectional view showing the development process of the resist 306 in Modified Example 1. As shown in Figures 50(A) and (B), in Modified Example 1, multiple (24 in this case) supports 307 are formed around the sacrificial layer 301a located in the center of the lower surface of the semiconductor thin film 300.

[0161] Specifically, if the X-direction along one side of the semiconductor thin film 300 is defined as the row direction and the Y-direction along the other side is defined as the column direction, then support bodies 307 are formed at 24 locations, excluding the 3rd row and 3rd column, out of a total of 5 rows and 5 columns. The support bodies 307 are formed, for example, in the shape of pillars. The cross-sectional shape of the support bodies 307 in the XY plane is rectangular, but other shapes are also possible.

[0162] In the modified example 1 of Embodiment 3, there are many supports 307 that support the semiconductor thin film 300, and they are evenly arranged along the lower surface of the semiconductor thin film 300, so the semiconductor thin film 300 can be supported in a more stable state.

[0163] Variation 2. Figures 51(A) and (B) are a plan view and a cross-sectional view showing the development process of the resist 306 in Modification 2 of Embodiment 3. In Modification 2, the arrangement and shape of the opening 311 of the photomask 310 (Figure 41) used for exposure of the resist 306 are further modified, and two types of supports 308 and 309 with different shapes are formed between the upper surface of the first substrate 301 and the lower surface of the semiconductor thin film 300.

[0164] The support 309 is formed at four locations that sandwich the sacrificial layer 301a (located in the center of the lower surface of the semiconductor thin film 300) from both sides in the X direction and both sides in the Y direction. The support 308 is formed in the parts corresponding to the four corners of a rectangle that surrounds the sacrificial layer 301a and has two sides in the X direction and two sides in the Y direction.

[0165] Support 308 has an L-shaped cross-section in the XY plane, combining a rectangle that is longer in the X direction and a rectangle that is longer in the Y direction. Support 309 has a quadrilateral (more specifically, rectangular) cross-section in the XY plane.

[0166] In the modified example 2 of Embodiment 3, the semiconductor thin film 300 can be supported in a more stable state by two types of supports 308 and 309 with different shapes. Here, two types of supports 308 and 309 are formed, but three or more types of supports with different shapes may be formed. The cross-sectional shape of the supports is not limited to L-shapes or rectangles, but may be other shapes as well.

[0167] Embodiment 4 Figure 52 is a flowchart showing the manufacturing process of the electronic device according to Embodiment 4. Figures 53(A) and (B) are a plan view and a cross-sectional view showing the process of forming a sacrificial layer 402, a thin film layer 403, an n-type cladding layer 404, an active layer 405, and a p-type cladding layer 406 on a first substrate 401 in Embodiment 4.

[0168] The first substrate 401 is, for example, an Al2O3 (sapphire) substrate, and is also referred to as a substrate (or growth substrate). Figures 53(A) and (B) show only a portion of the first substrate 401, but the whole is a disc-shaped structure with a diameter of 6 or 8 inches.

[0169] As shown in Figures 53(A) and (B), a sacrificial layer 402 which is an SiO2 layer, a thin film layer 403 which is a GaN layer, an n-type cladding layer 404 which is an nGaN layer, an active layer 405 which is an InGaN layer, and a p-type cladding layer 406 which is a pGaN layer are formed on the first substrate 401 (step S401 in Figure 52).

[0170] The sacrificial layer 402, which is an SiO2 layer, is formed by CVD or sputtering. The sacrificial layer 402 is not limited to an SiO2 layer; it may also be an OSION (silicon oxynitride) layer or a ZnO (zinc oxide) layer. The thin film layer 403, which is a GaN layer, is formed by sputtering.

[0171] The n-type cladding layer 404 is the cathode-side layer of the two cladding layers that sandwich the active layer 405. The active layer 405 is either a light-emitting layer or a light-absorbing layer. The p-type cladding layer 406 is the anode-side layer of the two cladding layers that sandwich the active layer 405. The n-type cladding layer 404, the active layer 405, and the p-type cladding layer 406 are all formed by epitaxial formation.

[0172] The thin film layer 403, the n-type cladding layer 404, the active layer 405, and the p-type cladding layer 406 constitute the semiconductor thin film 400. The first substrate 401 and the semiconductor thin film 400 constitute the device substrate 40 as a multilayer substrate.

[0173] Figures 54(A) and (B) are a plan view and a cross-sectional view showing the patterning process of the device substrate 40. As shown in Figures 54(A) and (B), the sacrificial layer 402, the n-type cladding layer 404, the active layer 405, and the p-type cladding layer 406 are patterned (step S402 in Figure 52). The patterning is performed by forming a resist (not shown) on the p-type cladding layer 406 and then using dry etching or the like.

[0174] The dry etching conditions are set so that the side surface of the semiconductor thin film 400 is inclined, as shown in Figure 54(B). However, the side surface of the semiconductor thin film 400 is not limited to an inclined surface; it may also be a vertical surface (i.e., a surface perpendicular to the top surface of the first substrate 401).

[0175] Figures 55(A) and (B) are cross-sectional views showing the first step in the process of etching the sacrificial layer 402. As shown in Figures 55(A) and (B), the sacrificial layer 402 is etched by wet etching using an acid-based etching solution (step S403 in Figure 52). The acid-based etching solution is, for example, a solution of hydrofluoric acid, hydrochloric acid, sulfuric acid, nitric acid, or phosphoric acid.

[0176] Etching of the sacrificial layer 402 proceeds from the sides (periphery) of the sacrificial layer 402 toward the inside. As a result, the central part of the sacrificial layer 402 remains between the first substrate 401 and the semiconductor thin film 400, supporting the semiconductor thin film 400. In addition, a void is created around the sacrificial layer 402.

[0177] Figures 56(A) and (B) are a plan view and a cross-sectional view showing the process of forming the resist 407. As shown in Figures 56(A) and (B), the resist 407 is formed on the first substrate 401 so as to surround the semiconductor thin film 400 (step S404 in Figure 52). The resist 407 also fills the gap between the first substrate 401 and the semiconductor thin film 400.

[0178] For the resist 407 (photoresist), for example, a negative-type resist having a photosensitive wavelength in the I-line (wavelength 365 nm) is used. A positive-type resist may be used instead of a negative-type resist.

[0179] Figure 57 is a cross-sectional view showing the exposure process of the resist 407. As shown in Figure 57, the semiconductor thin film 400 is irradiated with light L from below (i.e., from the first substrate 401 side) through the photomask 410 and the first substrate 401 (step S405 in Figure 52). I-line light is used as the light L. The photomask 410 has a plurality of apertures 411.

[0180] Of the resist 407, the portion irradiated with I-rays that have passed through the photomask 410 and the first substrate 401 hardens. In other words, of the resist 407 located between the first substrate 401 and the semiconductor thin film 400, the portion irradiated with I-rays hardens.

[0181] Figures 58(A) and (B) are a plan view and a cross-sectional view showing the process of developing the resist 407. As shown in Figures 58(A) and (B), developing the resist 407 removes the unexposed portions of the resist 407 (step S406 in Figure 52). The development of the resist 407 forms the support 408.

[0182] In the example shown in Figure 58(A), multiple (e.g., 8) support structures 408 are formed around a sacrificial layer 402 located in the center of the lower surface of the semiconductor thin film 400. Specifically, if the X-direction along one side of the semiconductor thin film 400 is defined as the row direction and the Y-direction along the other side as the column direction, then support structures 408 are formed at 8 locations in a 3x3 configuration, excluding the 2nd row and 2nd column.

[0183] The arrangement pattern of the support structures 408 is not limited to the example shown in Figure 58(A), but from the viewpoint of supporting the semiconductor thin film 400, it is desirable to have two or more support structures 408, and it is also desirable to arrange them as evenly as possible.

[0184] Figures 59(A) and (B) are a plan view and a cross-sectional view showing the second stage of the etching process for the sacrificial layer 402 (i.e., the removal of the sacrificial layer 402). As shown in Figures 59(A) and (B), the sacrificial layer 402 is removed by wet etching using the acid-based etching solution described above (step S407 in Figure 52). As a result, the semiconductor thin film 400 is supported by the support 408 on the first substrate 401.

[0185] Figure 60(A) is a cross-sectional view showing the separation process of the semiconductor thin film 400 from the first substrate 401. As shown in Figure 60(A), a stamp 430, which serves as a retaining member, is attached to the upper surface of the semiconductor thin film 400. The material of the stamp 430 is the same as that of the stamp 130 in Embodiment 1.

[0186] By moving the stamp 430 away from the first substrate 401, the support 408 is fractured, and the semiconductor thin film 400 is separated from the first substrate 401 (step S408 in Figure 52).

[0187] Figure 60(B) is a cross-sectional view showing the process of removing fragments of the support 408 from the underside of the semiconductor thin film 400. As shown in Figure 60(B), fragments of the support 408 adhering to the underside of the semiconductor thin film 400 are removed, for example, by an O2 ashing process (step S409 in Figure 52).

[0188] Figure 61(A) is a cross-sectional view showing the process of transferring the semiconductor thin film 400 to the second substrate 420. As shown in Figure 61(A), the semiconductor thin film 400 held by the stamp 430 is transferred to the second substrate 420 (step S410 in Figure 52). The second substrate 420 is, for example, a Si substrate, but may also be a glass substrate. The upper surface of the second substrate 420 has high smoothness with a surface roughness of 10 nm or less.

[0189] The lower surface of the semiconductor thin film 400 (more specifically, the lower surface of the thin film layer 403) has high smoothness with a surface roughness of 10 nm or less because it is the interface formed when the thin film layer 403 was epitaxially grown. If the surface roughness is rougher than 10 nm, the lower surface of the semiconductor thin film 400 may be smoothed by CMP or the like. The lower surface of the semiconductor thin film 400 and the upper surface of the second substrate 420 are joined by intermolecular forces.

[0190] Figures 61(B) and (C) are cross-sectional views showing the process of patterning the semiconductor thin film 400 to form electrodes 421 to 424. As shown in Figure 61(B), after peeling off the stamp 430 from the top surface of the semiconductor thin film 400, the semiconductor thin film 400 is patterned (step S411 in Figure 52). Specifically, a portion of the semiconductor thin film 400 is etched from the p-type cladding layer 406 to partway through the n-type cladding layer 404 to form a stepped shape.

[0191] Furthermore, as shown in Figure 61(C), electrodes 421 and 422 are formed on the upper surface of the second substrate 420. In addition, an anode electrode 423 is formed on the upper surface of the p-type cladding layer 406 of the semiconductor thin film 400, and a cathode electrode 424 is formed on the upper surface of the n-type cladding layer 404 exposed by the etching process. Electrodes 421 to 424 are formed from metallic materials such as Au, Al, Cu, Ti, or Pt.

[0192] Figures 62(A) and (B) are plan and cross-sectional views and a cross-sectional view, respectively, showing the process of forming wiring layers 425, 426 and insulating layers 427, 428. As shown in Figures 62(A) and (B), wiring layer 425 is formed to extend from the anode electrode 423 of the semiconductor thin film 400 to the electrode 421 on the second substrate 420. Wiring layer 426 is formed to extend from the cathode electrode 424 of the semiconductor thin film 400 to the electrode 422 on the second substrate 420.

[0193] Furthermore, the insulating layer 427 is formed between the top and side surfaces of the semiconductor thin film 400 and the wiring layer 425. The insulating layer 428 is formed between the top and side surfaces of the semiconductor thin film 400 and the wiring layer 426.

[0194] This forms an electronic device comprising a second substrate 420, a semiconductor thin film 400, and electrodes 421-424, etc. The electronic device is, for example, an LED or a photodiode. If the electronic device is an LED, light is emitted from the active layer 405 by passing a current between the anode electrode 423 and the cathode electrode 424 via electrodes 421 and 422.

[0195] Here, the first substrate 401 is a sapphire substrate (Al2O3), but it may also be made of a SiC substrate or a GaN substrate. Since SiC and GaN transmit the G line (436 nm), if the G line is used for exposure of the resist 407, the resist 407 can be exposed through the first substrate 401.

[0196] <Effects of Embodiment 4> In Embodiment 4, a support 408 is formed by exposing a resist 407, which is formed to cover the semiconductor thin film 400, through the first substrate 401. Therefore, multiple support 408s can be formed as uniformly as possible in the XY plane between the upper surface of the first substrate 401 and the lower surface (first surface) of the semiconductor thin film 400 (see Figures 59(A) and (B)). As a result, the semiconductor thin film 400 can be supported in a stable state even after the removal of the sacrificial layer 402.

[0197] Furthermore, since the support 408 can be formed so as not to protrude beyond the semiconductor thin film 400, interference with the surrounding semiconductor thin film 400 can be prevented.

[0198] Furthermore, since the semiconductor thin film 400 is exposed by light transmitted through the first substrate 401, no hardened resist 407 is formed on the upper part of the semiconductor thin film 400. Therefore, the step of removing the resist 407 (hardened portion) on the semiconductor thin film 400, as shown in Figures 44(A) and (B) of Embodiment 3, becomes unnecessary, and the manufacturing process can be simplified.

[0199] Variation 1. Figure 63 is a cross-sectional view showing the exposure process of the resist 407 in Modification 1 of Embodiment 4. In Modification 1, exposure is performed using a photomask 410A. The photomask 410A differs from the photomask 410 shown in Figure 57 in the position and shape of the aperture 411. Other exposure conditions are as described with reference to Figure 57.

[0200] Figures 64(A) and (B) are a plan view and a cross-sectional view showing the development process of the resist 407 in Modified Example 1. As shown in Figures 64(A) and (B), in Modified Example 1, multiple (24 in this case) supports 408 are formed around a sacrificial layer 402 located in the center of the lower surface of the semiconductor thin film 400.

[0201] Specifically, if the X-direction along one side of the semiconductor thin film 400 is defined as the row direction and the Y-direction along the other side is defined as the column direction, then support structures 408 are formed at 24 locations, excluding the 3rd row and 3rd column, out of a total of 5 rows and 5 columns. The support structures 408 are formed, for example, in a columnar shape. The cross-sectional shape of the support structures 408 in the XY plane is rectangular, but other shapes are also possible.

[0202] In the modified example 1 of Embodiment 4, the number of supports 408 that support the semiconductor thin film 400 is large, and they are evenly arranged along the lower surface of the semiconductor thin film 400, so the semiconductor thin film 400 can be supported in a more stable state.

[0203] Furthermore, as described in Modification 2 of Embodiment 3 (Figures 51(A), (B)), two or more supports with different shapes may be formed.

[0204] Variation 2. Figure 65(A) is a cross-sectional view showing the process of removing the thin film layer 403 from the semiconductor thin film 400 in Modification 2 of Embodiment 4. In Modification 2, as shown in Figure 65(A), after the step of removing the support 408 from the bottom surface of the semiconductor thin film 400 (step S409 in Figure 52), the thin film layer 403, which is the bottommost layer of the semiconductor thin film 400, is also removed.

[0205] Figure 65(B) is a cross-sectional view showing the transfer process of the semiconductor thin film 400 to the second substrate 420 in Modification 2. As shown in Figure 65(B), a metal film 429 is pre-formed on the upper surface of the second substrate 420. The area of ​​the metal film 429 is larger than the area of ​​the lower surface of the semiconductor thin film 400. The material of the metal film 429 is the same as that of the metal film 122 described with reference to Figure 12.

[0206] Figure 66(A) is a cross-sectional view showing the semiconductor thin film 400 transferred to the second substrate 420 in Modification 2. As shown in Figure 66(A), the lower surface of the semiconductor thin film 400 (i.e., the lower surface of the n-type cladding layer 404) is bonded to the metal film 429 on the second substrate 420 by intermolecular forces. Annealing may be performed if necessary.

[0207] Figure 66(B) is a cross-sectional view showing the process of forming electrodes 421 and 423 in modified example 2. As shown in Figure 66(B), electrode 421 is formed on the upper surface of the second substrate 420, and anode electrode 423 is formed on the upper surface of the p-type cladding layer 406 of the semiconductor thin film 400.

[0208] Figures 67(A) and (B) are a plan view and a cross-sectional view showing the formation process of the wiring layer 425 and the insulating layer 427 in modified example 2. As shown in Figures 67(A) and (B), the wiring layer 425 is formed so as to extend from the anode electrode 423 of the semiconductor thin film 400 to the electrode 421 on the second substrate 420. The insulating layer 427 is formed between the top and side surfaces of the semiconductor thin film 400 and the wiring layer 425. The metal film 429 on the second substrate 420 functions as the cathode electrode.

[0209] This forms an electronic device comprising a second substrate 420, a semiconductor thin film 400, an electrode 421, and a metal film 429, etc. The electronic device is, for example, an LED or a photodiode.

[0210] In a modified example 2 of Embodiment 4, the thin film layer 403 is removed from the semiconductor thin film 400, and the n-type cladding layer 404 of the semiconductor thin film 400 is bonded to the metal film 429 on the second substrate 420, thereby allowing the metal film 429 to be used as a cathode electrode.

[0211] Although preferred embodiments have been described in detail above, this disclosure is not limited to the embodiments described above, and various improvements or modifications can be made.

[0212] For example, in the first embodiment described above, the sacrificial layer 101a of the first substrate 101 was completely removed in the second step of the etching process (see Figures 9(A) and 9(B)). However, as shown in Figure 68(A), the sacrificial layer 101a may be partially left without being completely removed.

[0213] If a portion of the sacrificial layer 101a is left intact, as shown in Figure 68(B), fragments of the sacrificial layer 101a may adhere to the underside of the semiconductor thin film 100 when it is separated from the first substrate 101. In this case, the fragments of the sacrificial layer 101a can be removed from the underside of the semiconductor thin film 100 by etching or CMP.

[0214] Similarly, in the second stage of the etching process for sacrificial layers 204 and 205 in Embodiment 2 (Figure 28), the second stage of the etching process for sacrificial layer 301a in Embodiment 3 (Figures 43(A) and 43(B)), and the second stage of the etching process for sacrificial layer 402 in Embodiment 4 (Figure 59(A)), a portion of the sacrificial layer may be left intact instead of being completely removed.

[0215] Furthermore, in the embodiments 1 to 4 described above, examples were explained in which a semiconductor thin film formed (deposited) on a first substrate by epitaxial growth or the like is separated from the first substrate (see Figures 16(B), 29, 45(A), and 60(A)). However, this disclosure is also applicable when separating an integrated film as a semiconductor thin film from the first substrate.

[0216] Here, an integrated film refers to a thin film in which multiple semiconductor elements are integrated, as explained below, and is used in various electronic devices. Semiconductor elements that can be used include light-emitting elements, photodetectors, and transistors. Multiple semiconductor elements with the same configuration may be integrated, or multiple semiconductor elements with different configurations may be integrated. In the following, a display is used as an example of an electronic device, but the concept is applicable not only to displays but also to various other devices such as sensors and ICs.

[0217] Figure 69(A) is a cross-sectional view showing an example in which an integrated film 500 is formed on a first substrate 501. The integrated film 500 has a sacrificial layer 502 and an insulating layer 503 laminated on the first substrate 501, a semiconductor thin film 510 formed on the insulating layer 503, and a protective layer 504 covering the upper side of the semiconductor thin film 510.

[0218] The semiconductor thin film 510 has a configuration similar to, for example, the semiconductor thin film 300 of Embodiment 3 (Figure 46(C)), but is not limited thereto.

[0219] An anode electrode 511 and a cathode electrode 512 are formed on the semiconductor thin film 510. An anode wiring 513 extends from the anode electrode 511 to the insulating layer 503, and a cathode wiring 514 extends from the cathode electrode 512 to the insulating layer 503. An insulating film 517 is formed beneath the anode wiring 513, and an insulating film 518 is formed beneath the cathode wiring 514.

[0220] The insulating layer 503 has an opening 503a through which the anode wiring 513 passes and an opening 503b through which the cathode wiring 514 passes. The anode wiring 513 passes through opening 503a and is exposed on the back surface of the insulating layer 503. The cathode wiring 514 passes through opening 503b and is exposed on the back surface of the insulating layer 503. The protective layer 504 covering the upper side of the semiconductor thin film 510 is made of a light-transmitting and insulating material.

[0221] Although Figure 69(A) shows only one semiconductor thin film 510, in the integrated film 500, multiple (for example, three) semiconductor thin films 510 are arranged, for example, in a direction perpendicular to the plane of the paper. This makes it possible to construct, for example, three-color LEDs: red, green, and blue.

[0222] Figure 69(B) is a cross-sectional view showing the process of separating the integrated film 500 shown in Figure 69(A) from the first substrate 501. As shown in Figure 69(B), the integrated film 500 can be separated from the first substrate 501 by bonding a stamp 520 to the integrated film 500 and removing the sacrificial layer 502 by etching. By transferring the integrated film 500 from the first substrate 501 to a second substrate (not shown), a semiconductor device (e.g., an LED) including a semiconductor thin film 510 is constructed.

[0223] Regarding the etching of the sacrificial layer 502, if the etching is stopped before the sacrificial layer 502 is completely removed and the support 108 described in Embodiment 1 (Figures 8(A), (B)) is formed, the integrated film 500 can be supported by the support 108 on the first substrate 501 even after the removal of the sacrificial layer 502. Instead of the support 108 of Embodiment 1, the supports of Embodiments 2 to 4 may be formed.

[0224] Furthermore, the features described in Embodiments 1 to 4 may be combined. For example, the sacrificial layers 204 and 205 (Figure 25) with different etching rates described in Embodiment 2 may be used as sacrificial layers in Embodiments 1, 3, and 4.

[0225] In Embodiment 1, the semiconductor thin film 100 was separated from the first substrate 101 by fracturing the support 108, but the invention is not limited to this example. For example, if the bonding force between the support 108 and the semiconductor thin film 100 is weak, the semiconductor thin film 100 may be peeled off from the support 108. Similarly, in Embodiment 2, the semiconductor thin film 200 may be peeled off from the support 212, in Embodiment 3, the semiconductor thin film 300 may be peeled off from the support 307 (308, 309), and in Embodiment 4, the semiconductor thin film 400 may be peeled off from the support 408. In other words, the semiconductor thin film may be separated from the first substrate by peeling the semiconductor thin film and the support without leaving any support (or fragments thereof) on the semiconductor thin film.

[0226] The various aspects of this disclosure are summarized below as an appendix. (Note 1) circuit board and A semiconductor thin film formed on the substrate, It comprises a support made of a resist material that supports the semiconductor thin film with respect to the substrate such that a gap is formed between the semiconductor thin film and the substrate, The aforementioned support is The substrate and the first surface of the semiconductor thin film facing the substrate are bonded together. A semiconductor structure characterized by the following features. (Note 2) The semiconductor thin film has a second surface that extends from the first surface in a direction different from that of the first surface. In the support, the surface of the semiconductor thin film extending from the first surface toward the substrate is continuous with the second surface of the semiconductor thin film. The semiconductor structure described in Appendix 1, characterized by the features described herein. (Note 3) The support is formed in a plane parallel to the first surface, and is located inside the edge of the semiconductor thin film. A semiconductor structure as described in Appendix 1 or 2, characterized by the features described herein. (Note 4) The semiconductor thin film has a second surface that extends from the first surface in a direction different from that of the first surface. The support is bonded to the first and second surfaces of the semiconductor thin film. The semiconductor structure described in Appendix 1, characterized by the features described herein. (Note 5) Multiple supports are bonded to the first surface of the semiconductor thin film and the substrate. A semiconductor structure as described in any one of the appendices 1 to 4, characterized by the above. (Note 6) At least one of the supports is formed on the edge or corner of the semiconductor thin film in a plane parallel to the first surface. A semiconductor structure as described in any one of the appendices 1 to 5, characterized by the above. (Note 7) The semiconductor thin film is an epitaxial layer formed on the substrate by epitaxial growth. A semiconductor structure characterized by any one of the appendices 1 to 6. (Note 8) In a method for manufacturing a semiconductor structure using a laminated substrate in which a sacrificial layer and a semiconductor thin film are sequentially formed on the substrate, A step of forming a void between the substrate and the semiconductor thin film by removing a portion of the sacrificial layer, A step of forming a support that is bonded to the substrate and the first surface of the semiconductor thin film facing the substrate by applying a resist material to the aforementioned void, The process includes a step of further removing the sacrificial layer after forming the support. A method for manufacturing a semiconductor structure, characterized by the following: (Note 9) In the process of forming the support, By irradiating the resist material with light, the support is formed. A method for manufacturing a semiconductor structure as described in Appendix 8, characterized by the features described above. (Note 10) In the process of forming the support, The support is formed by removing the portion of the resist material that was not irradiated with light. A method for manufacturing a semiconductor structure as described in Appendix 9, characterized by the features described therein. (Supplementary Note 11) In the step of forming the support, the light is transmitted through the semiconductor thin film and irradiated onto the resist material. A method for manufacturing a semiconductor structure according to Supplementary Note 9 or 10, characterized in that. (Supplementary Note 12) In the step of forming the support, the light is transmitted through the substrate and irradiated onto the resist material. A method for manufacturing a semiconductor structure according to Supplementary Note 9 or 10, characterized in that. (Supplementary Note 13) As the sacrificial layer, a first sacrificial layer and a second sacrificial layer having an etching rate faster than that of the first sacrificial layer are used. The first sacrificial layer is located between the substrate and the second sacrificial layer. A method for manufacturing a semiconductor structure according to any one of Supplementary Notes 8 to 12, characterized in that. (Supplementary Note 14) A step of bonding a holding member to the semiconductor thin film of the semiconductor structure according to any one of Supplementary Notes 1 to 6; A step of separating the semiconductor thin film held by the holding member from a first substrate as the substrate; A step of bonding the semiconductor thin film to a second substrate different from the first substrate; After bonding the semiconductor thin film to the second substrate, a step of removing the holding member from the semiconductor thin film; A method for manufacturing an electronic device having. (Supplementary Note 15) In the step of separating the semiconductor thin film from the first substrate, the semiconductor thin film held by the holding member is moved in a direction away from the first substrate, and the support is broken to separate the semiconductor thin film from the first substrate. Before bonding the semiconductor thin film to the second substrate, the method further includes a step of removing the broken support from the semiconductor thin film. A method for manufacturing an electronic device according to Supplementary Note 14, characterized in that.

Explanation of Reference Signs

[0227] 1,1A,1B,1C,2,2A Semiconductor structures, 10,20,30,40 Device substrates (laminated structures), 100,200,300,400 Semiconductor thin films (functional layers), 101,201,301,401 First substrate (substrate, growth substrate), 101a,204,205,301a,402 Sacrificial layer, 102,202,302 Buffer layer, 102 Buffer layer, 103 Contact layer, 104 Drift layer, 105 Schottky electrode, 108,212,307,308,309,408 Support, 120,220,320,420 Second substrate (transfer substrate), 130,230,330,430 Stamp (holding member), 202 Buffer layer, 203 Barrier layer, 203 Lower barrier layer, 206 Upper barrier layer, 206 Barrier layer, 207 n-type cladding layer, 208 Active layer, 209 p-type cladding layer, 210 Contact layer, 302 Buffer layer, 303 n-type cladding layer, 304 Active layer, 305 p-type cladding layer, 306, 406 Resist, 310, 310A, 410, 410A Photomask, 402 Sacrificial layer, 403 Thin film layer, 404 n-type cladding layer, 405 Active layer, 406 p-type cladding layer.

Claims

1. circuit board and A semiconductor thin film formed on the substrate, It comprises a support made of a resist material that supports the semiconductor thin film with respect to the substrate such that a gap is formed between the semiconductor thin film and the substrate, The aforementioned support is The substrate and the first surface of the semiconductor thin film facing the substrate are bonded together. A semiconductor structure characterized by the following features.

2. The semiconductor thin film has a second surface that extends from the first surface in a direction different from that of the first surface. In the support, the surface of the semiconductor thin film extending from the first surface toward the substrate is continuous with the second surface of the semiconductor thin film. The semiconductor structure according to feature 1.

3. The support is formed in a plane parallel to the first surface, and is located inside the edge of the semiconductor thin film. The semiconductor structure according to feature 1.

4. The semiconductor thin film has a second surface that extends from the first surface in a direction different from that of the first surface. The support is bonded to the first and second surfaces of the semiconductor thin film. The semiconductor structure according to feature 1.

5. Multiple supports are bonded to the first surface of the semiconductor thin film and the substrate. The semiconductor structure according to feature 1.

6. At least one of the supports is formed on the edge or corner of the semiconductor thin film in a plane parallel to the first plane. The semiconductor structure according to feature 1.

7. The semiconductor thin film is an epitaxial layer formed on the substrate by epitaxial growth. A semiconductor structure according to any one of claims 1 to 6.

8. In a method for manufacturing a semiconductor structure using a laminated substrate in which a sacrificial layer and a semiconductor thin film are sequentially formed on the substrate, A step of forming a void between the substrate and the semiconductor thin film by removing a portion of the sacrificial layer, A step of forming a support that is bonded to the substrate and the first surface of the semiconductor thin film facing the substrate by applying a resist material to the aforementioned void, The process includes a step of further removing the sacrificial layer after forming the support. A method for manufacturing a semiconductor structure, characterized by the following:

9. In the process of forming the support, By irradiating the resist material with light, the support is formed. A method for manufacturing a semiconductor structure according to claim 8.

10. In the process of forming the support, The support is formed by removing the portion of the resist material that was not irradiated with light. A method for manufacturing a semiconductor structure according to feature 9.

11. In the process of forming the support, The aforementioned light is transmitted through the semiconductor thin film and irradiated onto the resist material. A method for manufacturing a semiconductor structure according to feature 9.

12. In the process of forming the support, The aforementioned light is transmitted through the substrate and irradiated onto the resist material. A method for manufacturing a semiconductor structure according to feature 9.

13. As the sacrificial layer, a first sacrificial layer and a second sacrificial layer having a faster etching rate than the first sacrificial layer are used. The first sacrificial layer is located between the substrate and the second sacrificial layer. A method for manufacturing a semiconductor structure according to any one of claims 8 to 12, characterized by the present invention.

14. A step of bonding a retaining member to the semiconductor thin film of the semiconductor structure according to any one of claims 1 to 6, A step of separating the semiconductor thin film held by the holding member from the first substrate which serves as the substrate, A step of bonding the semiconductor thin film to a second substrate, which is different from the first substrate, After bonding the semiconductor thin film to the second substrate, the retaining member is removed from the semiconductor thin film. A method for manufacturing an electronic device having [a certain characteristic].

15. In the step of separating the semiconductor thin film from the first substrate, the semiconductor thin film held by the holding member is moved away from the first substrate, and the support is broken, thereby separating the semiconductor thin film from the first substrate. The process further includes a step of removing the fractured support from the semiconductor thin film before bonding the semiconductor thin film to the second substrate. A method for manufacturing an electronic device according to claim 14.

Images