Photovoltaic module shutdown main unit

Abstract

This invention relates to a photovoltaic module shutdown control unit, belonging to the field of photovoltaic module technology, and particularly to a photovoltaic module shutdown control unit. The invention provides a photovoltaic module shutdown control unit with good performance. The invention includes a power supply section, a storage section, a main control section, a carrier communication section, a temperature switch acquisition section, a charging section, a current acquisition section, a constant current section, a voltage acquisition section, a relay output section, a temperature value acquisition section, and a transistor control section. The power output port of the power supply section is connected to the power ports of the storage section, the main control section, the carrier communication section, the temperature switch acquisition section, the charging section, the current acquisition section, the constant current section, the voltage acquisition section, the relay output section, the temperature value acquisition section, and the transistor control section, respectively.

Description

Technical Field

[0001] This invention belongs to the field of photovoltaic module technology, and in particular relates to a photovoltaic module shutdown host. Background Technology

[0002] Existing photovoltaic (PV) module shutdown devices only monitor the voltage and current of the PV modules. If a problem is detected, they directly control a relay to shut down the module, disconnecting it from other PV modules. However, this relay-based shutdown mechanism generates strong arcing, causing significant damage to the relay and related components. As the application of PV modules expands, the functional requirements for PV module shutdown devices have increased. Summary of the Invention

[0003] The present invention addresses the above-mentioned problems by providing a photovoltaic module shutdown host with good performance.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: the present invention includes a power supply section, a storage section, a main control section, a carrier communication section, a temperature switch acquisition section, a charging section, a current acquisition section, a constant current section, a voltage acquisition section, a relay output section, a temperature value acquisition section, and a transistor control section. The power output port of the power supply section is respectively connected to the power supply ports of the storage section, the main control section, the carrier communication section, the temperature switch acquisition section, the charging section, the current acquisition section, the constant current section, the voltage acquisition section, and the relay output section. The power supply ports of the temperature acquisition section and the transistor control section are connected. The signal transmission ports of the main control section are connected to the signal transmission ports of the carrier communication section and the storage section, respectively. The acquisition signal input ports of the main control section are connected to the acquisition signal output ports of the temperature switch acquisition section, the current acquisition section, the voltage acquisition section, and the temperature acquisition section, respectively. The control signal output ports of the main control section are connected to the control signal input ports of the constant current section, the relay output section, and the transistor control section, respectively.

[0005] As a preferred embodiment, the power supply section of the present invention includes a TPS62040DGQ chip U6, an AMS1117-2.5 chip U7, a TPS62040DGQ chip U4, an RD5-110S05W chip U5, and a connector J1, wherein pin 1 of J1 is connected to PV+ and pin 2 of J1 is connected to PV-.

[0006] PV+ is connected sequentially through fuse F1 and diode D1 to VCC1, the VIN+ port of the BP48-24V chip, the positive terminal of capacitor C39, the cathode of Zener diode D2, and one end of capacitor C38. The VIN- port of the BP48-24V chip is connected to the anode of D2, the other end of capacitor C38, the negative terminal of C39, and PV-. The VOUT+ port of the BP48-24V chip is connected through diode D18 to the cathode of diode D10, +24V, one end of capacitor C36, and the positive terminal of capacitor C37. The electrode is connected to pin 1 of U5. Pin 5 of U5 is connected to pin 3 of U5, the negative terminal of C37, the other end of C36, the VOUT port of the BP48-24V chip, the anode of diode D19, the negative terminal of capacitor C143, one end of capacitor C145, and GND. The cathode of D19 is connected to pin 2 of U5 and one end of inductor L5. The other end of L5 is connected to the positive terminal of C143, pin 4 of U5, the other end of C145, +5V, and one end of resistor R18. The other end of R18 is connected to GND through the power indicator LED4.

[0007] Pin 2 of U6 is connected to one end of capacitor C41, one end of capacitor C42, 5V, pin 3 of U6, and pin 1 of U6. Pin 6 of U6 is connected to pin 4 of U6, GND, the other end of C41, and the other end of C42. Pins 9, 10, and 11 of U6 are connected to GND. Pin 5 of U6 is connected to one end of resistor R19, one end of resistor R20, one end of capacitor C40, and one end of capacitor C44. The other end of R19 is connected to one end of inductor L2, the other end of C40, one end of capacitor C43, and VCC_1.2V. The other end of L2 is connected to pins 7 and 8 of U6. The other end of R20 is connected to GND, the other end of C44, and the other end of C43.

[0008] Pin 2 of U4 is connected to pin 3 of U4, one end of resistor R15, one end of capacitor C31, one end of capacitor C30, and 5V respectively. Pin 1 of U4 is connected to the other end of resistor R15. Pin 6 of U4 is connected to pin 4 of U4, GND, the other end of C30, and the other end of C31 respectively. Pins 9, 10, and 11 of U4 are connected to GND.

[0009] Pin 5 of U4 is connected to one end of resistor R16, one end of resistor R17, one end of capacitor C32, and one end of capacitor C35. The other end of R16 is connected to one end of inductor L1, the other end of C32, one end of capacitor C34, VCC_3.3V, and one end of capacitor C33. The other end of L1 is connected to pins 7 and 8 of U4. The other end of R17 is connected to GND, the other end of C35, the other end of C34, and the other end of C33.

[0010] Pin 3 of U7 is connected to 5V, one end of capacitor C45, and one end of capacitor C46. The other end of C45 is connected to GND and the other end of C46. Pin 1 of U7 is connected to GND. Pins 2 and 4 of U7 are connected to one end of capacitor C47, one end of capacitor C48, and VCC_2.5V. The other end of C47 is connected to the other end of C48 and GND.

[0011] As another preferred embodiment, the storage section of the present invention uses an FM24V02-GTR chip U3. Pins 1, 2, 3, and 4 of U3 are connected to GND, pin 8 of U3 is connected to VCC_3.3V, pin 7 of U3 is connected to WP and one end of resistor R12, the other end of R12 is connected to GND, pin 6 of U3 is connected to SCL and one end of resistor R14, the other end of R14 is connected to VCC_3.3V and one end of resistor R13, the other end of R13 is connected to pin 5 of U3 and SDA, VCC_3.3V is connected to GND through capacitor C28, and VCC_3.3V is connected to GND through capacitor C29.

[0012] As another preferred embodiment, the main control part of the present invention includes an FPGA_JTAG interface JP1, an EPCS4SI8N chip U2, and an EP4CE15E22I7 chip U1. Pin 1 of JP1 is connected to FPGA_TCK and one end of resistor R1, and the other end of R1 is connected to GND. Pin 3 of JP1 is connected to FPGA_TDO. Pin 5 of JP1 is connected to FPGA_TMS and one end of resistor R2, and the other end of R2 is connected to VCCA and one end of resistor R3, and the other end of R3 is connected to FPGA_TDI and pin 9 of JP1. Pin 10 of JP1 is connected to GND. Pin 4 of JP1 is connected to VCCA, and pin 2 of JP1 is connected to GND.

[0013] Pins 15, 20, 16, 18, 94, 96, 97, and 21 of U1 are connected to FPGA_TDI, FPGA_TDO, FPGA_TCK, FPGA_TMS, VCCA, GND, VCCA, and GND respectively. Pin 12 of U1 is connected to FPGA_DCLK through resistor R4. Pin 92 of U1 is connected to VCC_3.3V, one end of resistor R6, and one end of resistor R7 through resistor R5. The other end of R6 is connected to pin 14 of U1, and the other end of R7 is connected to pin 9 of U1. Pin 23 of U1 is connected to CLK_48M. Pins 30, 31, and 32 of U1 are connected to WP, SCL, and SDA respectively.

[0014] Pins 1-8 of U2 are connected to FPGA_nCSO, FPGA_DATA0, VCC_3.3V, GND, FPGA_ASDO, FPGA_DCLK, VCC_3.3V, and VCC_3.3V respectively. VCC_3.3V is connected to one end of capacitor C2 and one end of capacitor C3 respectively. The other end of C2 is connected to GND and the other end of C3 respectively. VCC_3.3V is connected to GND through capacitor C1. Pin 4 of crystal oscillator X1 is connected to VCC_3.3V. Pins 2 and 3 of X1 are connected to GND and CLK_48M respectively.

[0015] Pins 58 to 61 of U1 are connected to TXD1, RT1, RXD1, and WQ_IN1 respectively, and pins 64, 65, 67 to 69, and 71 of U1 are connected to WQ_IN2, WQ_IN3, M_DOUT, M_CLK, M_CS, and M_DIN respectively.

[0016] Pins 17, 26, 40, 47, 56, 62, 81, 93, 117, 122, 130, and 139 of U1 are connected to VCC_3.3V, and pins 5, 29, 34, 38, 45, 70, 78, 84, 102, 116, 124, and 138 of U1 are connected to VCC_1.2V.

[0017] Pins 19, 27, 41, 48, 57, 63, 82, 95, 118, 123, 131, 140, 4, 22, 79, and 145 of U1 are connected to GND;

[0018] Pin 13 of U1 is connected to FPGA_DATA0 through resistor R8, and pins 8 and 6 of U1 are connected to FPGA_nCSO and FPGA_ASDO respectively.

[0019] Pins 77, 80, and 83 of U1 are connected to M_DOUT1, M_CLK1, and M_CS1 respectively.

[0020] Pins 98-101, 104, and 105 of U1 are connected to AI_DIN-2, AI_CLK-2, AI_CS-2, AI_DOUT-2, DO1, and DO2 respectively;

[0021] Connect pins 35, 107, 3, and 75 of U1 to VCCA; connect pins 37, 109, 1, and 73 of U1 to VCCD; and connect pins 36, 108, 2, and 74 of U1 to GND.

[0022] VCC_1.2V is connected to one end of capacitors C8 to C15 respectively, and the other end of C8 to C15 is connected to GND;

[0023] VCC_3.3V is connected to one end of capacitors C16 to C21 respectively, and the other end of C16 to C21 is connected to GND;

[0024] VCC_3.3V is connected to one end of capacitors C22 to C27 respectively, and the other end of C22 to C27 is connected to GND;

[0025] VCC_2.5V is connected to VCCA, one end of capacitor C4, and one end of capacitor C5 via ferrite bead FB1. The other end of C4 is connected to the other end of C5 and GND.

[0026] VCC_1.2V is connected to VCCD, one end of capacitor C6, and one end of capacitor C7 via ferrite bead FB2. The other end of C6 is connected to the other end of C7 and GND.

[0027] Pins 39, 43, 44, 50, and 51 of U1 are connected to LED1, DO3, DO4, SDA1, and SCL1 respectively.

[0028] Pin 135 of U1 is connected to VCC_3.3V via resistor R9 and LED1. Pin 136 of U1 is connected to VCC_3.3V via resistor R10 and LED2. Pin 137 of U1 is connected to VCC_3.3V via resistor R11 and LED3.

[0029] Secondly, the carrier communication part of the present invention includes a B0505LS-1W module U45, a KQ-300 chip U49, an ADUM1301ARWZ chip U47, and a connector P1. Pin 1 of U45 is connected to one end of inductor L23, one end of capacitor C149, and one end of capacitor C150. The other end of L23 is connected to 5V, the positive terminal of capacitor E24, and one end of capacitor C151. The negative terminal of E24 is connected to GND, the other end of C151, the other end of C149, the other end of C150, and pin 2 of U45. Pin 6 of U45 is connected to one end of capacitor C152, ZB5V, and the positive terminal of capacitor E25. Pin 4 of U45 is connected to the other end of C152, ZBGND1, the negative terminal of E25, and one end of capacitor C154. The other end of C154 is connected to GND.

[0030] Pin 1 of U49 is connected to one end of resistor R69, the anode of diode D12, and the cathode of diode D15 via capacitor C159. The cathode of D12 is connected to ZB5V. The other end of R69 is connected to one end of resistor R71 and the base of NPN transistor Q5. The collector of Q5 is connected to one end of capacitor C158, the cathode of Zener diode D14, and one end of inductor L27. The other end of C158 is connected to one end of resistor R73. The other end of L27 is connected to ZB5V and one end of the first primary winding of transformer T33. One end of the secondary winding of T33 is connected to PV+ via capacitor C155, and the other end of the secondary winding of T33 is connected to PV- via inductor L24. The other end of the first primary winding of T33 is connected to one end of the second primary winding of T33 and ZB5V. The other end of the second primary winding of T33 is connected to the collector of NPN transistor Q4 and capacitor C159. One end of C157 is connected to the cathode of Zener diode D13. The other end of C157 is connected to one end of resistor R72. The base of Q4 is connected to one end of resistor R68 and one end of resistor R70. The other end of R68 is connected to the anode of diode D11, the cathode of diode D16, and one end of capacitor C156. The cathode of D11 is connected to ZB5V. The anode of D16 is connected to the other end of R70, the emitter of Q4, the other end of R72, the anode of D13, ZBGND1, and D14. The anode, the other end of R73, the emitter of Q5, the other end of R71, and the anode of D15 are connected together; the other end of C156 is connected to pin 2 of U49, pin 3 of U49 is connected to pin 2 of the 74LS04 chip U50A, pin 1 of U50A is connected to pin 3 of crystal oscillator Y1, pin 4 of Y1 is connected to ZB5V, and pin 2 of Y1 is connected to ZBGND1; pins 4 to 8 of U49 are connected to TXD, RT, ZBGND1, ZB5V, and RXD respectively; U49's... Pin 9 is connected to ZBGND1 and pin 10 of U49 via capacitor C164. Pin 11 of U49 is connected to one end of inductor L32 and one end of resistor R82. The other end of L32 is connected to one end of the secondary side of transformer T43 via capacitor C167. The other end of the secondary side of T43 is connected to the other end of ZBGND1 and R82. One end of the primary side of T43 is connected to PV+ via capacitor C166, and the other end of the primary side of T43 is connected to PV- via capacitor C168.

[0031] Pins 1 to 5 of P1 are connected to RXD, RT, TXD, ZBVCC, and ZBGND1 respectively.

[0032] Pins 1-5, 7-10, and 12-16 of U47 are connected to VCC_3.3V, GND, TXD1, RT1, RXD1, VCC_3.3V, GND, ZBGND1, ZBVCC, RXD, RT, TXD, ZBGND1, and ZBVCC respectively.

[0033] In addition, the charging part of the present invention includes a TDK15-24S15 module U10, an ME4058C6SG chip U11 and a connector J4. Pin 1 of U10 is connected to +24V, pin 2 of U10 is connected to GND, pin 6 of U10 is connected to the positive terminal of capacitor C54, one end of capacitor C55 and 15VIN through inductor L6, and pin 4 of U10 is connected to the negative terminal of C54, the other end of C55 and GND.

[0034] Pin 1 of U11 is connected to one end of resistor R23 and one end of capacitor C57. The other end of C57 is connected to GND and the other end of R23. Pin 2 of U11 is connected to the cathode of diode D5, the anode of capacitor C58, and one end of capacitor C59. The anode of D5 is connected to 15VIN. The cathode of C58 is connected to GND, the other end of C59, and pin 4 of U11. Pin 5 of U11 is connected to BATIN via LED5 and resistor R25. Pin 6 of U11 is connected to one end of capacitor C60, BATIN, and one end of resistor R26. The other end of C60 is connected to GND. The other end of R26 is connected to pin 7 of U11 and one end of inductor L7. The other end of L7 is connected to the cathode of Zener diode D4 and the source of MOSFET P-type transistor Q2. The gate of Q2 is connected to pin 3 of U11, and the drain of Q2 is connected to the cathode of D5.

[0035] Pins 1 and 2 of J4 are connected to BATIN and GND respectively.

[0036] The beneficial effects of this invention.

[0037] This invention includes a temperature switch acquisition section and a temperature value acquisition section. By detecting the temperature, fires can be detected in a timely manner.

[0038] The present invention includes a relay output section, which can be used to activate fire extinguishing devices, extinguish fires promptly, and reduce losses.

[0039] The present invention incorporates a transistor control section, enabling soft shutdown operation and extending the device's lifespan. Attached Figure Description

[0040] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. The scope of protection of the present invention is not limited to the following description.

[0041] Figure 1 This is a schematic diagram of the power supply circuit of the present invention.

[0042] Figure 2 This is a schematic diagram of the storage circuit of the present invention.

[0043] Figure 3 This is a circuit diagram of the charging section of the present invention.

[0044] Figure 4This is a schematic diagram of the current acquisition circuit of this invention.

[0045] Figure 5 This is the circuit schematic of the constant current section of this invention.

[0046] Figure 6 This is a schematic diagram of the relay output section of the present invention.

[0047] Figure 7 This is a schematic diagram of the transistor control circuit of this invention.

[0048] Figure 8 This is a schematic diagram of the voltage acquisition circuit of this invention.

[0049] Figure 9 This is a schematic diagram of the temperature value acquisition circuit of this invention.

[0050] Figure 10 This is the circuit schematic diagram of the main control part of the present invention.

[0051] Figure 11 This is a schematic diagram of the carrier communication circuit of this invention.

[0052] Figure 12 This is a schematic diagram of the temperature switch acquisition circuit of the present invention. Detailed Implementation

[0053] As shown in the figure, the present invention includes a power supply section, a storage section, a main control section, a carrier communication section, a temperature switch acquisition section, a charging section, a current acquisition section, a constant current section, a voltage acquisition section, a relay output section, a temperature value acquisition section, and a transistor control section. The power output port of the power supply section is connected to the power ports of the storage section, the main control section, the carrier communication section, the temperature switch acquisition section, the charging section, the current acquisition section, the constant current section, the voltage acquisition section, the relay output section, and the temperature value acquisition section, respectively. The power supply port of the main control unit is connected to the power supply port of the transistor control section. The signal transmission port of the main control unit is connected to the signal transmission port of the carrier communication section and the signal transmission port of the storage section. The acquisition signal input port of the main control unit is connected to the acquisition signal output port of the temperature switch acquisition section, the acquisition signal output port of the current acquisition section, the acquisition signal output port of the voltage acquisition section, and the acquisition signal output port of the temperature value acquisition section. The control signal output port of the main control unit is connected to the control signal input port of the constant current section, the control signal input port of the relay output section, and the control signal input port of the transistor control section.

[0054] The power supply section includes TPS62040DGQ chip U6, AMS1117-2.5 chip U7, TPS62040DGQ chip U4, RD5-110S05W chip U5 and connector J1, with pin 1 of J1 connected to PV+ and pin 2 of J1 connected to PV-.

[0055] PV+ is connected sequentially through fuse F1 and diode D1 to VCC1, the VIN+ port of the BP48-24V chip, the positive terminal of capacitor C39, the cathode of Zener diode D2, and one end of capacitor C38. The VIN- port of the BP48-24V chip is connected to the anode of D2, the other end of capacitor C38, the negative terminal of C39, and PV-. The VOUT+ port of the BP48-24V chip is connected through diode D18 to the cathode of diode D10, +24V, one end of capacitor C36, and the positive terminal of capacitor C37. The electrode is connected to pin 1 of U5. Pin 5 of U5 is connected to pin 3 of U5, the negative terminal of C37, the other end of C36, the VOUT port of the BP48-24V chip, the anode of diode D19, the negative terminal of capacitor C143, one end of capacitor C145, and GND. The cathode of D19 is connected to pin 2 of U5 and one end of inductor L5. The other end of L5 is connected to the positive terminal of C143, pin 4 of U5, the other end of C145, +5V, and one end of resistor R18. The other end of R18 is connected to GND through the power indicator LED4.

[0056] Pin 2 of U6 is connected to one end of capacitor C41, one end of capacitor C42, 5V, pin 3 of U6, and pin 1 of U6. Pin 6 of U6 is connected to pin 4 of U6, GND, the other end of C41, and the other end of C42. Pins 9, 10, and 11 of U6 are connected to GND. Pin 5 of U6 is connected to one end of resistor R19, one end of resistor R20, one end of capacitor C40, and one end of capacitor C44. The other end of R19 is connected to one end of inductor L2, the other end of C40, one end of capacitor C43, and VCC_1.2V. The other end of L2 is connected to pins 7 and 8 of U6. The other end of R20 is connected to GND, the other end of C44, and the other end of C43.

[0057] Pin 2 of U4 is connected to pin 3 of U4, one end of resistor R15, one end of capacitor C31, one end of capacitor C30, and 5V respectively. Pin 1 of U4 is connected to the other end of resistor R15. Pin 6 of U4 is connected to pin 4 of U4, GND, the other end of C30, and the other end of C31 respectively. Pins 9, 10, and 11 of U4 are connected to GND. Pin 5 of U4 is connected to one end of resistor R16, one end of resistor R17, one end of capacitor C32, and one end of capacitor C35 respectively. The other end of R16 is connected to one end of inductor L1, the other end of C32, one end of capacitor C34, VCC_3.3V, and one end of capacitor C33 respectively. The other end of L1 is connected to pins 7 and 8 of U4. The other end of R17 is connected to GND, the other end of C35, the other end of C34, and the other end of C33 respectively.

[0058] Pin 3 of U7 is connected to 5V, one end of capacitor C45, and one end of capacitor C46. The other end of C45 is connected to GND and the other end of C46. Pin 1 of U7 is connected to GND. Pins 2 and 4 of U7 are connected to one end of capacitor C47, one end of capacitor C48, and VCC_2.5V. The other end of C47 is connected to the other end of C48 and GND.

[0059] J1 is the external power input interface, and S1 is the emergency stop switch. S1 is manually controlled; if a problem is detected or maintenance is required, turning off S1 will power off the entire host unit. The power supply section provides the necessary voltages to various parts of the host unit, including VCC_1.2V, VCC_2.5V, VCC_3.3V, and 5V.

[0060] PV+ is the positive terminal of the photovoltaic panel, and PV- is the negative terminal. The voltage between PV+ and PV- is 48V, which is converted to 24V by BP48-24V. U5 converts 24V to 5V. BATIN is connected to the positive terminal of the battery, so that the battery continues to supply power when the photovoltaic panel cannot provide the required power to the device.

[0061] U4, U6, and U7 are used to convert the voltage to the required voltage.

[0062] The storage section uses FM24V02-GTR chip U3. Pins 1, 2, 3, and 4 of U3 are connected to GND, pin 8 of U3 is connected to VCC_3.3V, pin 7 of U3 is connected to WP and one end of resistor R12, the other end of R12 is connected to GND, pin 6 of U3 is connected to SCL and one end of resistor R14, the other end of R14 is connected to VCC_3.3V and one end of resistor R13, the other end of R13 is connected to pin 5 of U3 and SDA, VCC_3.3V is connected to GND through capacitor C28, and VCC_3.3V is connected to GND through capacitor C29.

[0063] U3 is used to store the FPGA program, and the program in U3 is retrieved during FPGA operation.

[0064] Each time the device is powered off and on, the system is restored to its factory settings. The program (including temperature setpoints, power setpoints, transistor control methods, and triggering related controls by comparing detected values ​​with setpoints, as explained in detail later) is read out through U3, and the relevant circuits are controlled according to the program.

[0065] The main control unit includes an FPGA_JTAG interface JP1, an EPCS4SI8N chip U2, and an EP4CE15E22I7 chip U1. Pin 1 of JP1 is connected to FPGA_TCK and one end of resistor R1, with the other end of R1 connected to GND. Pin 3 of JP1 is connected to FPGA_TDO. Pin 5 of JP1 is connected to FPGA_TMS and one end of resistor R2, with the other end of R2 connected to VCCA and one end of resistor R3, with the other end of R3 connected to FPGA_TDI and pin 9 of JP1. Pin 10 of JP1 is connected to GND. Pin 4 of JP1 is connected to VCCA, and pin 2 of JP1 is connected to GND.

[0066] Pins 15, 20, 16, 18, 94, 96, 97, and 21 of U1 are connected to FPGA_TDI, FPGA_TDO, FPGA_TCK, FPGA_TMS, VCCA, GND, VCCA, and GND respectively. Pin 12 of U1 is connected to FPGA_DCLK through resistor R4. Pin 92 of U1 is connected to VCC_3.3V, one end of resistor R6, and one end of resistor R7 through resistor R5. The other end of R6 is connected to pin 14 of U1, and the other end of R7 is connected to pin 9 of U1. Pin 23 of U1 is connected to CLK_48M. Pins 30, 31, and 32 of U1 are connected to WP, SCL, and SDA respectively.

[0067] Pins 1-8 of U2 are connected to FPGA_nCSO, FPGA_DATA0, VCC_3.3V, GND, FPGA_ASDO, FPGA_DCLK, VCC_3.3V, and VCC_3.3V respectively. VCC_3.3V is connected to one end of capacitor C2 and one end of capacitor C3 respectively. The other end of C2 is connected to GND and the other end of C3 respectively. VCC_3.3V is connected to GND through capacitor C1. Pin 4 of crystal oscillator X1 is connected to VCC_3.3V. Pins 2 and 3 of X1 are connected to GND and CLK_48M respectively.

[0068] Pins 58 to 61 of U1 are connected to TXD1, RT1, RXD1, and WQ_IN1 respectively, and pins 64, 65, 67 to 69, and 71 of U1 are connected to WQ_IN2, WQ_IN3, M_DOUT, M_CLK, M_CS, and M_DIN respectively.

[0069] Pins 17, 26, 40, 47, 56, 62, 81, 93, 117, 122, 130, and 139 of U1 are connected to VCC_3.3V, and pins 5, 29, 34, 38, 45, 70, 78, 84, 102, 116, 124, and 138 of U1 are connected to VCC_1.2V.

[0070] Pins 19, 27, 41, 48, 57, 63, 82, 95, 118, 123, 131, 140, 4, 22, 79, and 145 of U1 are connected to GND;

[0071] Pin 13 of U1 is connected to FPGA_DATA0 through resistor R8, and pins 8 and 6 of U1 are connected to FPGA_nCSO and FPGA_ASDO respectively.

[0072] Pins 77, 80, and 83 of U1 are connected to M_DOUT1, M_CLK1, and M_CS1 respectively.

[0073] Pins 98-101, 104, and 105 of U1 are connected to AI_DIN-2, AI_CLK-2, AI_CS-2, AI_DOUT-2, DO1, and DO2 respectively;

[0074] Connect pins 35, 107, 3, and 75 of U1 to VCCA; connect pins 37, 109, 1, and 73 of U1 to VCCD; and connect pins 36, 108, 2, and 74 of U1 to GND.

[0075] VCC_1.2V is connected to one end of capacitors C8 to C15 respectively, and the other end of C8 to C15 is connected to GND;

[0076] VCC_3.3V is connected to one end of capacitors C16 to C21 respectively, and the other end of C16 to C21 is connected to GND;

[0077] VCC_3.3V is connected to one end of capacitors C22 to C27 respectively, and the other end of C22 to C27 is connected to GND;

[0078] VCC_2.5V is connected to VCCA, one end of capacitor C4, and one end of capacitor C5 via ferrite bead FB1. The other end of C4 is connected to the other end of C5 and GND.

[0079] VCC_1.2V is connected to VCCD, one end of capacitor C6, and one end of capacitor C7 via ferrite bead FB2. The other end of C6 is connected to the other end of C7 and GND.

[0080] Pins 39, 43, 44, 50, and 51 of U1 are connected to LED1, DO3, DO4, SDA1, and SCL1 respectively.

[0081] Pin 135 of U1 is connected to VCC_3.3V via resistor R9 and LED1. Pin 136 of U1 is connected to VCC_3.3V via resistor R10 and LED2. Pin 137 of U1 is connected to VCC_3.3V via resistor R11 and LED3.

[0082] The carrier communication section includes a B0505LS-1W module U45, a KQ-300 chip (KQ300 is a power line carrier chip; the TXD and RXD transmit and receive ports are TTL level; pin 5 of U49 is used to control signal reception or transmission; and then the level conversion chip U47 converts it into TXD1 and RXD1 to interact with the main control unit), U49, and an ADUM1301ARWZ chip U47 (U47 is a level conversion chip that converts the high-level amplitude of the received signal into a low-level amplitude acceptable to U1, and at the same time converts the low-level amplitude of the signal transmitted by U1 into a high-level amplitude usable for carrier communication). (Value signal) and connector P1, pin 1 of U45 is connected to one end of inductor L23, one end of capacitor C149, and one end of capacitor C150 respectively. The other end of L23 is connected to 5V, the positive terminal of capacitor E24, and one end of capacitor C151 respectively. The negative terminal of E24 is connected to GND, the other end of C151, the other end of C149, the other end of C150, and pin 2 of U45 respectively. Pin 6 of U45 is connected to one end of capacitor C152, ZB5V, and the positive terminal of capacitor E25 respectively. Pin 4 of U45 is connected to the other end of C152, ZBGND1, the negative terminal of E25, and one end of capacitor C154 respectively. The other end of C154 is connected to GND.

[0083] Pin 1 of U49 is connected to one end of resistor R69, the anode of diode D12, and the cathode of diode D15 via capacitor C159. The cathode of D12 is connected to ZB5V. The other end of R69 is connected to one end of resistor R71 and the base of NPN transistor Q5. The collector of Q5 is connected to one end of capacitor C158, the cathode of Zener diode D14, and one end of inductor L27. The other end of C158 is connected to one end of resistor R73. The other end of L27 is connected to ZB5V and one end of the first primary winding of transformer T33. One end of the secondary winding of T33 is connected to PV+ via capacitor C155, and the other end of the secondary winding of T33 is connected to PV- via inductor L24. The other end of the first primary winding of T33 is connected to one end of the second primary winding of T33 and ZB5V. The other end of the second primary winding of T33 is connected to the collector of NPN transistor Q4 and capacitor C159. One end of C157 is connected to the cathode of Zener diode D13. The other end of C157 is connected to one end of resistor R72. The base of Q4 is connected to one end of resistor R68 and one end of resistor R70. The other end of R68 is connected to the anode of diode D11, the cathode of diode D16, and one end of capacitor C156. The cathode of D11 is connected to ZB5V. The anode of D16 is connected to the other end of R70, the emitter of Q4, the other end of R72, the anode of D13, ZBGND1, and D14. The anode, the other end of R73, the emitter of Q5, the other end of R71, and the anode of D15 are connected together; the other end of C156 is connected to pin 2 of U49, pin 3 of U49 is connected to pin 2 of the 74LS04 chip U50A, pin 1 of U50A is connected to pin 3 of crystal oscillator Y1, pin 4 of Y1 is connected to ZB5V, and pin 2 of Y1 is connected to ZBGND1; pins 4 to 8 of U49 are connected to TXD, RT, ZBGND1, ZB5V, and RXD respectively; U49's... Pin 9 is connected to ZBGND1 and pin 10 of U49 via capacitor C164. Pin 11 of U49 is connected to one end of inductor L32 and one end of resistor R82. The other end of L32 is connected to one end of the secondary side of transformer T43 via capacitor C167. The other end of the secondary side of T43 is connected to the other end of ZBGND1 and R82. One end of the primary side of T43 is connected to PV+ via capacitor C166, and the other end of the primary side of T43 is connected to PV- via capacitor C168.

[0084] Pins 1 to 5 of P1 are connected to RXD, RT, TXD, ZBVCC, and ZBGND1 respectively.

[0085] Pins 1-5, 7-10, and 12-16 of U47 are connected to VCC_3.3V, GND, TXD1, RT1, RXD1, VCC_3.3V, GND, ZBGND1, ZBVCC, RXD, RT, TXD, ZBGND1, and ZBVCC respectively.

[0086] U1 sends photovoltaic panel power generation detection information and alarm information through U47. In the event of a fault or fire, it immediately sends the information to the front-end gateway via the carrier communication interface to notify the monitoring center.

[0087] Y1 is a crystal oscillator used for the carrier chip. Y1 provides a clock signal to U49 via U50A.

[0088] Pins 1 and 2 of U49 form a push-pull circuit, generating a high-frequency wave via T33. Q4 and Q5 conduct alternately. The two primary windings of T33 are concentric. When Q5 is on, it generates a positive half-cycle, and when Q4 is on, it generates a negative half-cycle, thus creating an alternating magnetic flux. This transmits the waveforms of the switching frequencies of Q5 and Q4 (controlled by U49) to the secondary winding of transformer T33, and then sends the switching frequency signal out through the bus, i.e., transmitting communication signals via the power line. T43 acts as the demodulation section for the power line carrier signal. T43 induces the communication signal on the bus and then sends it to U49 via C167 and L32.

[0089] Data transmission is achieved using power lines, eliminating the need for separate communication lines. The structure is compact and makes high use of existing components.

[0090] The temperature switch acquisition section includes EL357NB chips U16 to U19, connector J5 and B0524LS-1W module U17. Pins 1 to 6 of J5 are respectively connected to WQ_24V, WQ1, WQ_24V, WQ2, WQ_24V and WQ3.

[0091] Pin 1 of U16 is connected to one end of resistor R31, one end of resistor R33, and one end of capacitor C71. The other end of R31 is connected to WQ1. The other end of R33 is connected to WQGND, the other end of C71, and pin 2 of U16. Pin 3 of U16 is connected to GND. Pin 4 of U16 is connected to WQ_IN1 and one end of resistor R32. The other end of R32 is connected to VCC.

[0092] Pin 1 of U18 is connected to one end of resistor R34, one end of resistor R36, and one end of capacitor C74. The other end of R34 is connected to WQ2. The other end of R36 is connected to WQGND, the other end of C74, and pin 2 of U18. Pin 3 of U18 is connected to GND. Pin 4 of U18 is connected to WQ_IN2 and one end of resistor R35. The other end of R35 is connected to VCC.

[0093] Pin 1 of U19 is connected to one end of resistor R37, one end of resistor R39, and one end of capacitor C75. The other end of R37 is connected to WQ3. The other end of R39 is connected to WQGND, the other end of C75, and pin 2 of U19. Pin 3 of U19 is connected to GND. Pin 4 of U19 is connected to WQ_IN3 and one end of resistor R38. The other end of R38 is connected to VCC.

[0094] Pin 1 of U17 is connected to one end of inductor L13, one end of capacitor C68, and one end of capacitor C69. The other end of L13 is connected to 5V, the positive terminal of capacitor E6, and one end of capacitor C70. The negative terminal of E6 is connected to GND, the other end of C70, the other end of C68, the other end of C69, and pin 2 of U17. Pin 6 of U17 is connected to one end of capacitor C72, WQ_24V, and the positive terminal of capacitor E7. Pin 4 of U17 is connected to the other end of C72, WQGND, the negative terminal of E7, and one end of capacitor C73. The other end of C73 is connected to GND.

[0095] Three temperature switches (KSD301 temperature switches can be used) are connected to WQ1 to WQ3 respectively. The three temperature switches can be placed at certain intervals at different positions on the photovoltaic panel to monitor the fire situation in a timely manner, avoiding the situation where the photovoltaic panel area is large and cannot be monitored in time.

[0096] The KSD301 temperature switch has a 90°C detection pin and a 120°C detection pin.

[0097] The temperature signal detected by the temperature switch is transmitted to the main control unit after being isolated by optocouplers (U16, U18, U19).

[0098] The temperature switch acquisition section detects the temperature. When the temperature exceeds 90℃ and remains so for 5 to 10 seconds, it is determined that a fire has occurred, and U1 controls the fire extinguishing device to work through U53.

[0099] When the temperature reaches 120℃, it is determined that a fire has occurred.

[0100] Setting up temperature monitoring points at 90℃ and 120℃ respectively allows for more accurate and efficient fire detection. Some fires develop slowly, with temperatures fluctuating between 90℃ and 120℃. Other fires occur instantly, with temperatures rapidly reaching 120℃.

[0101] The temperature data acquisition section collects temperature rise changes. If the temperature rises by more than five degrees Celsius within one minute after exceeding 70 degrees Celsius, it is considered a fire.

[0102] The charging section includes a TDK15-24S15 module U10, an ME4058C6SG chip U11, and a connector J4. Pin 1 of U10 is connected to +24V, pin 2 of U10 is connected to GND, pin 6 of U10 is connected to the positive terminal of capacitor C54, one end of capacitor C55, and 15VIN through inductor L6, and pin 4 of U10 is connected to the negative terminal of C54, the other end of C55, and GND.

[0103] Pin 1 of U11 is connected to one end of resistor R23 and one end of capacitor C57. The other end of C57 is connected to GND and the other end of R23. Pin 2 of U11 is connected to the cathode of diode D5, the anode of capacitor C58, and one end of capacitor C59. The anode of D5 is connected to 15VIN. The cathode of C58 is connected to GND, the other end of C59, and pin 4 of U11. Pin 5 of U11 is connected to BATIN via LED5 and resistor R25. Pin 6 of U11 is connected to one end of capacitor C60, BATIN, and one end of resistor R26. The other end of C60 is connected to GND. The other end of R26 is connected to pin 7 of U11 and one end of inductor L7. The other end of L7 is connected to the cathode of Zener diode D4 and the source of MOSFET P-type transistor Q2. The gate of Q2 is connected to pin 3 of U11, and the drain of Q2 is connected to the cathode of D5.

[0104] Pins 1 and 2 of J4 are connected to BATIN and GND respectively.

[0105] The charging circuit's function is to charge the battery using the electricity generated by the photovoltaic panel. The battery supplies power to the device when the photovoltaic panel is unable to generate electricity normally. BATIN is connected to the positive terminal of the battery.

[0106] U11 controls the duty cycle of Q2's on / off state to control the charging of the battery. Pin 5 of U11 detects the battery voltage; when the battery voltage is detected to be lower than the set value, the duty cycle is increased to increase the charging current.

[0107] The current acquisition section includes F0305S-1W module U36, TLV2262 chip U38, ADR291 chip U39, ADS8341 chip U40, H11L1 chip U41, ADUM1300 chip U42, and current transformer U43. Pin 1 of U36 is connected to one end of inductor L20, one end of capacitor C126, and the positive terminal of capacitor E16. The other end of L20 is connected to VCC_3.3V and one end of capacitor C125. The other end of C125 is connected to GND, the other end of C126, the negative terminal of E16, pin 2 of U36, and one end of capacitor C133. The other end of C133 is connected to COM. Pin 6 of U36 is connected to one end of capacitor C124, ... One end of inductor L21 is connected to the terminal of capacitor C124. The other end of C124 is connected to pin 4 of U36 and one end of inductor L22. The other end of L21 is connected to one end of capacitor C127, the positive terminal of capacitor E17, pin 1 of S818-5 chip U37, and pin 3 of U37. Pin 2 of U37 is connected to the other end of L22, the other end of C127, the negative terminal of E17, IGND, one end of capacitor C128, the negative terminal of capacitor E18, one end of capacitor C129, one end of capacitor C130, one end of capacitor C131, and one end of capacitor C132. Pin 5 of U37 is connected to I5V, the other end of C128, the negative terminal of E18, the other end of C129, the other end of C130, the other end of C131, and the other end of C132.

[0108] Pin 3 of U38 is connected to one end of capacitor C136 and one end of resistor R56. The other end of C136 is connected to COM. The other end of R56 is connected to one end of capacitor C137, one end of resistor R55, and one end of capacitor C134. The other end of C134 is connected to CH0, pin 1 of U38, and pin 2 of U38. Pin 8 of U38 is connected to one end of capacitor C52, I5V, and one end of capacitor C135. The other end of C52 is connected to IGND. The other end of C135 is connected to COM and one end of capacitor C139. The other end of C139 is connected to IGND. ND and pins 4 of U38 are connected; the other end of R55 is connected to pin 3 of BAV199 transistor D9 (D9 is used to filter out interference during the transmission of the current detection signal. The current detection signal is an analog quantity with a relatively low signal voltage, which will generate high-frequency oscillation interference during transmission through the transmission line. The high-voltage interference signal is released through D9, and the interference voltage is clamped to the power supply voltage I5V), one end of resistor R57, and one end of resistor R58. Pin 2 of D9 is connected to I5V, pin 1 of D9 is connected to IGND, the other end of R57 is connected to Iin0, and the other end of R58 is connected to COM;

[0109] Pin 5 of U38 is connected to one end of capacitor C145 and one end of resistor R63. The other end of C145 is connected to COM. The other end of R63 is connected to one end of capacitor C146, one end of resistor R62, and one end of capacitor C143. The other end of C143 is connected to CH1, pin 7 of U38, and pin 6 of U38. The other end of R62 is connected to pin 3 of transistor D10 of BAV199, one end of resistor R64, and one end of resistor R65. Pin 2 of D10 is connected to I5V, pin 1 of D10 is connected to IGND, the other end of R64 is connected to Iin1, and the other end of R65 is connected to COM.

[0110] Pins 1 to 4 of U43 are connected to I5V, IGND, Iin0, and COM respectively. Pin 5 of U43 is connected to pin 1 of connector J12, and pin 2 of J12 is connected to pin 6 of U43.

[0111] VCC_3.3V is connected to one end of capacitor C141, one end of capacitor C142, and the positive terminal of capacitor E20, respectively. The other end of C141 is connected to the other end of capacitor C142, the negative terminal of E20, and GND, respectively.

[0112] Pin 6 of U39 is connected to +2.5V and one end of capacitor C138, the other end of C138 is connected to IGND, pin 2 of U39 is connected to I5V, and pin 4 of U39 is connected to IGND.

[0113] Pin 8 of U40 is connected to +2.5V, the positive terminal of capacitor E21, and one end of capacitor C144. The other end of C144 is connected to the negative terminal of E21 and IGND. Pins 2, 3, and 6 of U40 are connected to CH0, CH1, and COM respectively. Pins 10 and 11 of U40 are connected to IGND. Pin 14 of U40 is connected to pin 14 of ADUM1300 chip U42 and DIN. Pin 15 of U40 is connected to pin 13 of U42 and CS. Pin 16 of U40 is connected to pin 12 of U42 and CLK. Pins 9, 10, 16, 1-5, 7, and 8 of U42 are connected to IGND, I5V, and IGND respectively. The pins 12 of U40 are connected to pin 2 of module U41 of H11L1 via resistor R61. Pin 1 of U41 is connected to +5V. Pin 2 of U41 is connected to M_DOUT1 and one end of resistor R60. The other end of R60 is connected to pin 6 of U41 and VCC_3.3V. Pin 5 of U41 is grounded. Pin 7 of U40 is connected to one end of resistor R59, the positive terminal of capacitor E19, and one end of capacitor C140. The other end of R59 is connected to +5V. The negative terminal of E19 is connected to IGND and the other end of C140.

[0114] The current acquisition section of this invention can be applied to photovoltaic modules comprising two photovoltaic panels. The two photovoltaic panels can have different areas, with the larger panel having higher power output. The two panels are connected in series, and the current in both panels is equal. The voltage acquisition circuit separately acquires the voltage of each photovoltaic panel, while the current acquisition section detects the current and monitors the power generation in real time. This allows for comparison to identify which photovoltaic panel has a lower voltage and power output than normal, thus detecting potential problems (such as hot spots, short circuits, or microcracks). Cloud cover can also cause issues. After continuous monitoring for a period of time, if the voltage of a particular photovoltaic panel remains consistently lower than normal, that panel is considered to have a problem.

[0115] U43 is an FXBY20 current transformer. The current signal is converted into a voltage signal by the subsequent circuit, and then the signal is converted by A / D by U40 and sent to U42. U42 sends the detection signal to the main control section.

[0116] The current transformer U43 is placed on the output line of the photovoltaic panel. The current signal is converted into a voltage signal through the inductive current transformer U43, and then the signal is transmitted to U42 after A / D conversion through U40. U42 then sends the detection signal to the main control section.

[0117] U38A is a voltage comparator. U38A, together with R55, C137, R56, and C136, forms a second-order filter circuit. The filter circuit is used to filter out high-frequency signals in the interference. D9 is used to filter out high-voltage amplitude signals in the interference.

[0118] The function of U40 is to convert the detected analog signal into a digital signal, and then, after isolating the input and output terminals through U42, input the detected signal to U1.

[0119] The constant current section includes an F0324S-1W module U13, an EL357NB chip U14, and an AD8541ARTZ-REEL7 chip U15. Pin 1 of U13 is connected to one end of inductor L8, one end of capacitor C64, and the positive terminal of capacitor E3. The other end of L8 is connected to VCC_3.3V and one end of capacitor C63. The other end of C63 is connected to GND, the other end of C64, the negative terminal of E3, pin 2 of U13, and one end of capacitor C66. The other end of C66 is connected to LGND. Pin 6 of U13 is connected to... Connect one end of capacitor C61 and one end of inductor L9. Connect the other end of L9 to one end of capacitor C65, V24V, the positive terminal of capacitor E4, and pin 1 of LM7805S2 / TR module U12. Connect the negative terminal of E4 to LGND, the other end of C65, and one end of inductor L10. Connect the other end of L10 to pin 4 of U13 and the other end of C61. Connect pin 3 of U12 to one end of capacitor C62, the positive terminal of capacitor E5, and H5V. Connect pin 4 of U12 to LGND, the other end of C62, and the negative terminal of E5.

[0120] Pin 1 of U14 is connected to VCC (3.3V), pin 2 of U14 is connected to LED1, pin 4 of U14 is connected to H5V, pin 2 of U14 is connected to one end of resistor R29 and pin 3 of U15 through resistor R27, the other end of R29 is connected to LGND, pin 2 of U15 is connected to LGND, pin 5 of U15 is connected to VCC and one end of capacitor C50, the other end of C50 is connected to LGND, pin 1 of U15 is connected to the base of transistor Q3 of 2SC5886A through resistor R28, Q... The emitter of Q3 is connected to pin 4 of U15 and one end of resistor R30, with the other end of R30 connected to LGND. The collector of Q3 is connected to one end of capacitor C49, one end of capacitor C67, the anode of Zener diode D6, and one end of inductor L12. The other end of C49 is connected to V24V, the other end of C67, the cathode of D6, and one end of inductor L11. The other end of L11 is connected to the other end of L12 via LEDs LED6-LED10 and LED15-LED11.

[0121] The constant current section drives LEDs 6-10 and 15-11 to trigger a local alarm, enabling personnel to quickly locate the faulty photovoltaic panel. It also facilitates the use of drones to quickly identify the faulty panel (the drone is manually operated; it uses pyroelectric sensors and a video camera to detect the image below, causing LEDs 6-10 and 15-11 to illuminate, making it easier for the drone to locate the alarm position), thus guiding maintenance personnel to the location.

[0122] The voltage acquisition section includes F0305S-1W module U29, TLV2262 chip U31, ADR291 chip U32, connector J10, connector J11, AD7708 / 28 chip U34, H11L1 chip U33, and ADUM1300 chip U35. Pin 1 of U29 is connected to one end of inductor L17, one end of capacitor C102, and the positive terminal of capacitor E12. The other end of L17 is connected to VCC_3.3V and one end of capacitor C101. The other end of C101 is connected to GND, the other end of C102, the negative terminal of E12, pin 2 of U29, and one end of capacitor C109. The other end of C109 is connected to VGND. Pin 6 of U29 is connected to capacitor C10... One end of C100 is connected to one end of inductor L18. The other end of C100 is connected to pin 4 of U29 and one end of inductor L19. The other end of L18 is connected to one end of capacitor C103, the positive terminal of capacitor E13, pin 1 of S818-5 chip U30, and pin 3 of U30. Pin 2 of U30 is connected to the other end of L19, the other end of C103, the negative terminal of E13, VGND, one end of capacitor C104, the negative terminal of capacitor E14, one end of capacitor C105, one end of capacitor C106, one end of capacitor C107, and one end of capacitor C108. Pin 5 of U30 is connected to V5V, the other end of C104, the negative terminal of E14, the other end of C105, the other end of C106, the other end of C107, and the other end of C108.

[0123] Pin 3 of U31 is connected to one end of resistor R46 and one end of capacitor C112, with the other end of C112 connected to VGND. The other end of R46 is connected to one end of capacitor C113, one end of resistor R45, and one end of capacitor C111, with the other end of C113 connected to VGND. The other end of C111 is connected to pin 1, AIN1, and pin 2 of U31. Pin 8 of U31 is connected to V5V and one end of capacitor C110, with the other end of C110 connected to VGND. Pin 4 of U31 is connected to VGND. The other end of R45 is connected to pin 3 of transistor D7 of BAV199, one end of resistor R47, and one end of resistor R48, with pin 2 of D7 connected to V5V and pin 1 of D7 connected to VGND. The other end of R47 is connected to VIN1, and the other end of R48 is connected to VGND.

[0124] Pin 5 of U31 is connected to one end of resistor R50 and one end of capacitor C118, with the other end of C118 connected to VGND. The other end of R50 is connected to one end of capacitor C119, one end of resistor R49, and one end of capacitor C115, with the other end of C119 connected to VGND. The other end of C115 is connected to pin 7, AIN2, and pin 6 of U31. The other end of R49 is connected to pin 3 of transistor D8 of BAV199, one end of resistor R53, and one end of resistor R54, with pin 2 of D8 connected to V5V and pin 1 of D8 connected to VGND. The other end of R53 is connected to VIN2, and the other end of R54 is connected to VGND.

[0125] Pins 1 and 2 of J10 are connected to VIN1 and GND respectively, and pins 1 and 2 of J11 are connected to VIN2 and GND respectively.

[0126] Pin 6 of U32 is connected to +2.5V and one end of capacitor C114, the other end of C114 is connected to VGND, pin 2 of U32 is connected to V5V, and pin 4 of U32 is connected to VGND.

[0127] Pin 5 of U34 is connected to VGND, the negative terminal of capacitor C123, and one end of capacitor C121. The other end of C121 is connected to +2.5V, the positive terminal of C123, and pin 6 of U34. Pins 7 and 8 of U34 are connected to AIN1 and AIN2 respectively. Pin 12 of U34 is connected to VGND. Pin 25 of U34 is connected to pin 17 of U34, pin 4 of U34, one end of capacitor C51, and the negative terminal of capacitor E1. The positive terminal of E1 is connected to the other end of C51, V5V, pin 3 of U34, and pin 26 of U34. Pin 19 of U34... Pins 21, 20, 23, and 24 of U34 are connected to AD_SPI_CS, AD_SPI_CLK, AD_SPI_DOUT, and AD_SPI_DIN respectively. Pin 27 of U34 is connected to one end of crystal oscillator X2 and one end of capacitor C122. The other end of C122 is connected to VGND (the metal casing of crystal oscillator X2 is grounded to eliminate interference signals) and one end of capacitor C120. The other end of C120 is connected to the other end of X2 and pin 28 of U34.

[0128] Pin 1 of U33 is connected to +5V. Pin 2 of U33 is connected to AD_SPI_DOUT through resistor R52. Pin 4 of U33 is connected to M_DOUT and one end of resistor R51. The other end of R51 is connected to VCC_3.3V and pin 6 of U33. Pin 5 of U33 is connected to GND.

[0129] Pin 9 of U35 is connected to VGND, pin 10 of U35 is connected to V5V, pins 12-16 of U35 are connected to AD_SPI_CLK, AD_SPI_CS, AD_SPI_DIN, VGND, and V5V respectively; pins 1-5 and 8 of U35 are connected to VCC_3.3V, GND, M_DIN, M_CS, M_CLK, and GND respectively.

[0130] VCC_3.3V is connected to one end of capacitor C116, one end of capacitor C117, and the positive terminal of capacitor E15. The negative terminal of E15 is connected to the other end of C116, the other end of C117, and GND.

[0131] J10 and J11 are each connected to a Hall voltage sensor, and each Hall voltage sensor detects the voltage across a photovoltaic panel.

[0132] After VIN1 is divided by R47 and R48, it is then low-pass filtered (R45, C113, R46, C112, and U31A form a low-pass filter) and sent to U34 for analog-to-digital conversion. After the input and output terminals are isolated by U35, the detection signal is input to U1.

[0133] The relay output section includes F0305S-1W module U52, EL357NB chip U53, and connector J14. Pin 1 of U52 is connected to one end of inductor L35, one end of capacitor C171, and the positive terminal of capacitor E27. The other end of L35 is connected to VCC_3.3V and one end of capacitor C170. The other end of C170 is connected to GND, the other end of C171, the negative terminal of E27, pin 2 of U52, and one end of capacitor C173. The other end of C173 is connected to DOGND. Pin 6 of U52 is connected to one end of capacitor C169 and one end of inductor L36. The other end of C169 is connected to pin 4 of U52 and one end of inductor L37. The other end of inductor L37 is connected to one end of capacitor C172, DOGND, and the negative terminal of capacitor E28. The positive terminal of E28 is connected to 5VRY, the other end of C172, and the other end of L36.

[0134] Pin 1 of U53 is connected to VCC_3.3V, pin 2 of U53 is connected to DO1, pin 4 of U53 is connected to 5VRY, pin 3 of U53 is connected to one end of resistor R84 and the base of NPN transistor Q6 through resistor R83, the other end of R84 is connected to DOGND and the emitter of Q6, the collector of Q6 is connected to the anode of diode D21 and one end of the coil of relay K2, the cathode of D21 is connected to 5VRY and the other end of the coil of K2, the two ends of the controlled switch of K2 are connected to BATIN and KB respectively, and KB and BATOUT are connected to pins 1 and 2 of connector J14 respectively.

[0135] The relay output section can be used to control the operation of the GQQ90 heptafluoropropane fire extinguishing device. When a fire is detected, the fire extinguishing device is activated by controlling relay K2 to extinguish the fire and prevent it from spreading.

[0136] The relay output section is used to control the activation of the fire-fighting device and whether to supply power to the fire-fighting device. Pin 2 of U53 receives the control signal from U1, controls whether Q6 is conducting, and then controls the opening and closing of K2 to control the operation of the fire-fighting device.

[0137] Connect BATIN to the positive terminal of the battery. Connect KB to the power supply port of the fire extinguishing device.

[0138] Each pair of photovoltaic panels can correspond to one photovoltaic module shutdown host and one GQQ90 heptafluoropropane fire extinguishing device.

[0139] The GQQ90 heptafluoropropane fire extinguishing device automatically sprays upon power-up. It can be installed diagonally above the photovoltaic panel in a position that does not block the light, and the spray area covers the entire photovoltaic panel.

[0140] The temperature acquisition section includes F0305S-1W module U20, AD8541 chip U22, AD8541 chip U25, AD8541 chip U26, AD8541 chip U27, ADR291 chip U24, ADUM1401 chip U23, and AD7124-4BBCPZ chip U28. Pin 1 of U20 is connected to one end of inductor L14, one end of capacitor C78, ​​and the positive terminal of capacitor E8, respectively. The other end of L14... Pin 6 of U20 is connected to one end of capacitor C77 and VCC_3.3V respectively. The other end of C77 is connected to GND, the other end of C78, ​​the negative terminal of E8, pin 2 of U20, and one end of capacitor C81. The other end of C81 is connected to AIGND. Pin 6 of U20 is connected to one end of capacitor C76 and one end of inductor L15 respectively. The other end of C76 is connected to pin 4 of U20 and one end of inductor L16 respectively. The other end of L15 is connected to one end of capacitor C79, the positive terminal of capacitor E9, pin 1 of S818-3.3 chip U21, and pin 3 of U21 respectively. Pin 2 of U21 is connected to the other end of L16, the other end of C79, the negative terminal of E9, AIGND, and one end of capacitor C80 respectively. Pin 5 of U21 is connected to AIVCC and the other end of C80 respectively.

[0141] Pin 5 of U22 is connected to AIVCC and one end of capacitor C82, with the other end of C82 connected to AIGND. Pin 2 of U22 is connected to AIGND. Pin 1 of U22 is connected to pin 4 of U22, AIN1, and one end of capacitor C84, with the other end of C84 connected to AIGND. Pin 3 of U22 is connected to one end of resistor R40 and one end of capacitor C83, with the other end of C83 connected to AIGND. The other end of R40 is connected to IOUT1 and pin 1 of connector J6, with pin 2 of J6 connected to AIGND.

[0142] Pin 5 of U25 is connected to AIVCC and one end of capacitor C85, with the other end of C85 connected to AIGND. Pin 2 of U25 is connected to AIGND. Pin 1 of U25 is connected to pin 4 of U25, AIN2, and one end of capacitor C88, with the other end of C88 connected to AIGND. Pin 3 of U25 is connected to one end of resistor R41 and one end of capacitor C87, with the other end of C87 connected to AIGND. The other end of R41 is connected to IOUT2 ​​and pin 1 of connector J7, with pin 2 of J7 connected to AIGND.

[0143] Pin 5 of U26 is connected to AIVCC and one end of capacitor C90, with the other end of C90 connected to AIGND. Pin 2 of U26 is connected to AIGND. Pin 1 of U26 is connected to pin 4 of U26, AIN3, and one end of capacitor C95, with the other end of C95 connected to AIGND. Pin 3 of U26 is connected to one end of resistor R42 and one end of capacitor C93, with the other end of C93 connected to AIGND. The other end of R42 is connected to IOUT3 and pin 1 of connector J8, with pin 2 of J8 connected to AIGND.

[0144] Pin 5 of U27 is connected to AIVCC and one end of capacitor C97, with the other end of C97 connected to AIGND. Pin 2 of U27 is connected to AIGND. Pin 1 of U27 is connected to pin 4 of U27, AIN4, and one end of capacitor C99, with the other end of C99 connected to AIGND. Pin 3 of U27 is connected to one end of resistor R44 and one end of capacitor C98, with the other end of C98 connected to AIGND. The other end of R44 is connected to IOUT4 and pin 1 of connector J9, with pin 2 of J9 connected to AIGND.

[0145] Pin 6 of U24 is connected to +2.5V and one end of capacitor C86, the other end of C86 is connected to AIGND, pin 2 of U24 is connected to R5V, and pin 4 of U24 is connected to AIGND.

[0146] Pins 1 to 16 of U23 are connected to VCC_3.3V, GND, AI_DIN-2, AI_CLK-2, AI_CS-2, AI_DOUT-2, VCC_3.3V, GND, AIGND, AIVCC, AI_DOUT2, AI_CS2, AI_CLK2, AI_DIN2, AIGND, and AIVCC respectively.

[0147] Pin 1 of U28 is connected to AIGND via capacitor C89. Pin 2 of U28 is connected to AIVCC and one end of capacitor C91. The other end of C91 is connected to AIGND and pin 3 of U28. Pins 4, 5, 8, 9, 12, 13, and 16 of U28 are connected to IOUT1, IOUT2, IOUT3, IOUT4, +2.5V, AIGND, and AIN1 respectively. Pins 17, 20, and 21 of U28 are connected to AIN2, AIN3, and AIN4 respectively. Pin 22 of U28 is connected to the positive terminal of capacitor E11 and one end of capacitor C96. The negative terminal of E11 is connected to... Do not connect pin 23 of U28 to AIGND or the other end of C96. Connect pin 23 of U28 to AIGND and one end of capacitor C94. Connect the other end of C94 to pin 24 of U28. Connect pin 25 of U28 to AIGND. Connect pin 26 of U28 to AIVCC, one end of resistor R43, the positive terminal of capacitor E10, and one end of capacitor C92. Connect the negative terminal of E10 to the other end of C92 and AIGND. Connect the other end of R43 to pin 27 of U28. Connect pins 28, 29, 31, and 32 of U28 to AI_DOUT2, AI_DIN2, AI_CLK2, and AI_CS2 respectively.

[0148] J6 to J9 are each connected to a thermistor. C83, C87, C93, and C98 are used for low-pass filtering. The detection signal is then sent to the operational amplifier AD8541, then to U28 for analog-to-digital conversion, and then to U1 via U23 (U23 is a level conversion chip that converts the voltage amplitude of the input signal into a voltage amplitude that U1 can receive).

[0149] As mentioned above, in this invention, one photovoltaic module shutdown host corresponds to two photovoltaic panels connected in series, and a thermistor can be placed on each side of each photovoltaic panel.

[0150] The temperature acquisition section tracks temperature rise changes. If the temperature exceeds 70 degrees Celsius and the temperature rises by more than five degrees Celsius within one minute (a rapid temperature rise is unlikely under normal circumstances), a fire is detected. The U1 controller activates the constant current section to trigger an alarm, and simultaneously controls the relay output to activate the fire extinguishing device. By using temperature rise changes to determine if a fire has occurred, the system differentiates it from natural temperature rise patterns, making the assessment more accurate.

[0151] The temperature switch acquisition section and the temperature value acquisition section jointly determine the fire situation by detecting temperature point values ​​and temperature change values, respectively. This detection method can determine the fire situation more accurately.

[0152] The transistor control section includes F0305S-1W module U8, F0315S-1W module U54, ADuM1251 chip U57, GP8202 chip U58, XL2596S-ADJ chip U59, and CRG40T60AN3H transistor Q8. Pin 1 of U8 is connected to one end of inductor L3, one end of capacitor C175, and the positive terminal of capacitor E2. The other end of L3 is connected to VCC_3.3V and one end of capacitor C174. C174 is also connected to... One end is connected to GND, the other end of C175, the negative terminal of E2, pin 2 of U8, and one end of capacitor C181. The other end of C181 is connected to PGND. Pin 6 of U8 is connected to one end of capacitor C53 and one end of inductor L4. The other end of C53 is connected to pin 4 of U8 and one end of inductor L39. The other end of inductor L39 is connected to one end of capacitor C176, PGND, and the negative terminal of capacitor E29. The positive terminal of E29 is connected to 5VRY, the other end of C176, and the other end of L4.

[0153] Pin 1 of U54 is connected to one end of inductor L41, one end of capacitor C185, and the positive terminal of capacitor E32. The other end of L41 is connected to VCC_3.3V and one end of capacitor C184. The other end of C184 is connected to GND, the other end of C185, the negative terminal of E32, pin 2 of U54, and one end of capacitor C187. The other end of C187 is connected to PGND. Pin 6 of U54 is connected to one end of capacitor C183 and one end of inductor L42. The other end of C183 is connected to pin 4 of U54 and one end of inductor L43. The other end of inductor L43 is connected to one end of capacitor C186, PGND, and the negative terminal of capacitor E33. The positive terminal of E33 is connected to 5VRY, the other end of C186, and the other end of L42.

[0154] Pin 1 of U57 is connected to VCC_3.3V. Pin 2 of U57 is connected to SDA1 and one end of resistor R21. The other end of R21 is connected to VCC_3.3V and one end of resistor R74. The other end of R74 is connected to SCL1 and pin 3 of U57. Pin 4 of U57 is connected to GND. Pin 5 of U57 is connected to PGND. Pin 6 of U57 is connected to one end of resistor R76 and U58_SCL. The other end of R76 is connected to 5VRY and one end of resistor R75. The other end of R75 is connected to pin 7 of U57 and U58_SDA. Pin 8 of U57 is connected to 5VRY.

[0155] VCC_3.3V is connected to one end of capacitor C153 and one end of capacitor C160 respectively. The other end of C153 is connected to GND and the other end of C160 respectively. 5VRY is connected to one end of capacitor C161 and one end of capacitor C162 respectively. The other end of C161 is connected to PGND and the other end of C162 respectively.

[0156] Pins 1, 2, 4, and 6 of U58 are connected to U58_SCL, U58_SDA, 15VRY, and FB respectively. Pin 5 of U58 is connected to pin 7 of U58, PGND, and one end of capacitor C188. The other end of C188 is connected to pin 8 of U58.

[0157] Pin 1 of U59 is connected to 15VRY, one end of capacitor C191, and one end of capacitor C192. The other end of C191 is connected to the other end of C192, pin 5 of U59, pin 3 of U59, the anode of diode D22, the cathode of capacitor C189, one end of capacitor C190, and PGND. The cathode of D22 is connected to pin 2 of U59 and one end of inductor L44. The other end of L44 is connected to the anode of C189, the other end of C190, and VA. Pin 4 of U59 is connected to FB.

[0158] The collector of Q8 is connected to PV+. The gate of Q8 is connected to one end of resistor R22, VA, and the cathode of Zener diode D3. The anode of D3 is connected to the anode of Zener diode D17. The cathode of D17 is connected to PGND, the other end of resistor R22, the emitter of Q8, and PV+_OUT.

[0159] The positive output electrode PV+ of the photovoltaic module is connected to PV+_OUT via Q8, and Q8 controls whether PV+_OUT is connected to PV+.

[0160] PV+_OUT connects to the photovoltaic panels of the next group of photovoltaic modules. The previous group of photovoltaic modules is connected in series with the next group. Each group of photovoltaic modules corresponds to a photovoltaic module shutdown master unit. The photovoltaic module shutdown master unit controls Q8 to disconnect the photovoltaic modules of this group from the next group of photovoltaic modules. At the same time, the control center receives the alarm signal sent by the photovoltaic module shutdown master unit and controls the photovoltaic module shutdown master unit of the previous group of photovoltaic modules to disconnect the previous group of photovoltaic modules from the current group of photovoltaic modules.

[0161] U57 is a digital isolator. The main control section is the low-voltage section, while the Q8 control circuit is the high-voltage section. The digital isolator isolates the high and low voltage components, preventing the main control section from being interfered with or damaged by the high-voltage section.

[0162] U58 receives digital control signals, outputs analog linear control signals through FB, and then controls the working state of Q8 through U59.

[0163] Pin 6 of U58 outputs the FB signal, which is linearly adjustable. FB controls the voltage at pin 4 of U59, thereby changing the output voltage VA of U59 and controlling Q8. Q8 can be controlled to operate in the conduction region, gradually transitioning to the amplification region, and then gradually transitioning to the cutoff region. This results in very low resistance in the conduction region, approximately zero, gradually increasing until the resistance in the cutoff region reaches infinity. During this process, the current flowing through Q8 decreases slowly, preventing arcing (when multiple photovoltaic modules are connected in series at high voltage, using existing relays for disconnection would generate strong arcing), thus achieving a soft-turn-off process and extending the device's lifespan.

[0164] When a fire is detected, Q8 is simultaneously shut down to cut off the downstream circuit.

[0165] It is understood that the above specific description of the present invention is only for illustrating the present invention and is not limited to the technical solutions described in the embodiments of the present invention. Those skilled in the art should understand that modifications or equivalent substitutions can still be made to the present invention to achieve the same technical effect; as long as the use needs are met, they are all within the protection scope of the present invention.

Claims

1. A photovoltaic module shutdown host computer, comprising a power supply part, a storage part, a master control part, a carrier communication part, a temperature switch acquisition part, a charging part, a current acquisition part, a constant current part, a voltage acquisition part, a relay output part, a temperature value acquisition part and a triode control part, characterized in that The power output ports of the power supply part are connected with the power supply ports of the storage part, the power supply ports of the main control part, the power supply ports of the carrier wave communication part, the power supply ports of the temperature switch collection part, the power supply ports of the charging part, the power supply ports of the current collection part, the power supply ports of the constant current part, the power supply ports of the voltage collection part, the power supply ports of the relay output part, the power supply ports of the temperature value collection part and the power supply ports of the triode control part respectively; the signal transmission ports of the main control part are connected with the signal transmission ports of the carrier wave communication part and the signal transmission ports of the storage part respectively; the collection signal input ports of the main control part are connected with the collection signal output ports of the temperature switch collection part, the collection signal output ports of the current collection part, the collection signal output ports of the voltage collection part and the collection signal output ports of the temperature value collection part respectively; and the control signal output ports of the main control part are connected with the control signal input ports of the constant current part, the control signal input ports of the relay output part and the control signal input ports of the triode control part respectively. The triode control part comprises F0305S-1W module U8, F0315S-1W module U54, ADuM1251 chip U57, GP8202 chip U58, XL2596S-ADJ chip U59 and CRG40T60AN3H tube Q8. The main control part comprises FPGA_JTAG interface JP1, EPCS4SI8N chip U2 and EP4CE15E22I7 chip U1. The carrier wave communication part comprises B0505LS-1W module U45, KQ-300 chip U49, ADUM1301ARWZ chip U47 and connector P1. The 6-pin output FB signal of U58 is linearly adjustable, controls the voltage of the 4-pin of U59, and then changes the output voltage value VA of U59 to control Q8; Q8 works in the conduction zone, gradually transitions to the amplification zone, and the amplification zone can gradually transition to the cutoff zone; the resistance gradually and slowly increases to infinity in the cutoff zone; the current flowing through Q8 slowly decreases in this process, avoiding the occurrence of arc drawing, which is a soft shutdown process, and the working life of the device is long.

2. The photovoltaic module shutdown host of claim 1, wherein The power supply part comprises TPS62040DGQ chip U6, AMS1117-2.5 chip U7, TPS62040DGQ chip U4, RD5-110S05W chip U5 and connector J1, the 1-pin of J1 is connected with PV+, and the 2-pin of J1 is connected with PV-. The PV+ is connected to the VCC1, the VIN+ port of the BP48-24V chip, the positive pole of the capacitor C39, the negative pole of the capacitor C38, the negative pole of the capacitor C39 and the PV- in sequence through the fuse F1 and the diode D1, the VIN- port of the BP48-24V chip is connected to the anode of the D2, the other end of the C38, the negative pole of the C39 and the PV- in sequence, the VOUT+ port of the BP48-24V chip is connected to the cathode of the diode D10, the +24V, one end of the capacitor C36, the positive pole of the capacitor C37, the 1 pin of the U5 in sequence through the diode D18, the 5 pin of the U5 is connected to the 3 pin of the U5, the negative pole of the C37, the other end of the C36, the VOUT port of the BP48-24V chip, the anode of the diode D19, the negative pole of the capacitor C143, one end of the capacitor C145, GND in sequence, the cathode of the D19 is connected to the 2 pin of the U5 and one end of the inductor L5 in sequence, the other end of the L5 is connected to the positive pole of the C143, the 4 pin of the U5, the other end of the C145, +5V and one end of the resistor R18 in sequence, the other end of the R18 is connected to GND through the power indicator lamp LED4; the 2 pin of the U6 is connected to one end of the capacitor C41, one end of the capacitor C42, 5V, the 3 pin of the U6 and the 1 pin of the U6 in sequence, the 6 pin of the U6 is connected to the 4 pin of the U6, GND, the other end of the C41 and the other end of the C42 in sequence, the 9, 10 and 11 pins of the U6 are connected to GND, the 5 pin of the U6 is connected to one end of the resistor R19, one end of the resistor R20, one end of the capacitor C40 and one end of the capacitor C44 in sequence, the other end of the R19 is connected to one end of the inductor L2, the other end of the C40, one end of the capacitor C43 and VCC_1.2V in sequence, the other end of the L2 is connected to the 7 and 8 pins of the U6, the other end of the R20 is connected to GND, the other end of the C44 and the other end of the C43 in sequence; the 2 pin of the U4 is connected to the 3 pin of the U4, one end of the resistor R15, one end of the capacitor C31, one end of the capacitor C30 and 5V in sequence, the 1 pin of the U4 is connected to the other end of the resistor R15, the 6 pin of the U4 is connected to the 4 pin of the U4, GND, the other end of the C30 and the other end of the C31 in sequence, the 9, 10 and 11 pins of the U4 are connected to GND; the 5 pin of the U4 is connected to one end of the resistor R16, one end of the resistor R17, one end of the capacitor C32 and one end of the capacitor C35 in sequence, the other end of the R16 is connected to one end of the inductor L1, the other end of the C32, one end of the capacitor C34, VCC_3.3V and one end of the capacitor C33 in sequence, the other end of the L1 is connected to the 7 and 8 pins of the U4, the other end of the R17 is connected to GND, the other end of the C35, the other end of the C34 and the other end of the C33 in sequence; the 3 pin of the U7 is connected to 5V, one end of the capacitor C45 and one end of the capacitor C46 in sequence, the other end of the C45 is connected to GND and the other end of the C46 in sequence, the 1 pin of the U7 is connected to GND, the 2 and 4 pins of the U7 are connected to one end of the capacitor C47, one end of the capacitor C48 and VCC_2.5V in sequence, the other end of the C47 is connected to the other end of the C48 and GND in sequence.

3. The photovoltaic module shutdown host of claim 1, wherein The storage part adopts FM24V02-GTR chip U3, the 1, 2, 3, 4 pins of U3 are connected with GND, the 8 pin of U3 is connected with VCC_3.3V, the 7 pin of U3 is connected with WP and one end of resistor R12 respectively, the other end of R12 is connected with GND, the 6 pin of U3 is connected with SCL and one end of resistor R14 respectively, the other end of R14 is connected with VCC_3.3V and one end of resistor R13 respectively, the other end of R13 is connected with the 5 pin of U3 and SDA respectively, VCC_3.3V is connected with GND through capacitor C28, VCC_3.3V is connected with GND through capacitor C29.

4. The photovoltaic module shutdown host of claim 1, wherein The charging part includes TDK15-24S15 module U10, ME4058C6SG chip U11 and connector J4, the 1 pin of U10 is connected with +24V, the 2 pin of U10 is connected with GND, the 6 pin of U10 is connected with the positive pole of capacitor C54, one end of capacitor C55 and 15VIN through inductor L6 respectively, the 4 pin of U10 is connected with the negative pole of C54, the other end of C55 and GND respectively; the 1 pin of U11 is connected with one end of resistor R23 and one end of capacitor C57 respectively, the other end of C57 is connected with GND and the other end of R23 respectively, the 2 pin of U11 is connected with the cathode of diode D5, the positive pole of capacitor C58 and one end of capacitor C59 respectively, the anode of D5 is connected with 15VIN, the negative pole of C58 is connected with GND, the other end of C59 and the 4 pin of U11 respectively, the 5 pin of U11 is connected with BATIN through LED5 and resistor R25 in sequence, the 6 pin of U11 is connected with one end of capacitor C60, BATIN and one end of resistor R26 respectively, the other end of C60 is connected with GND, the other end of R26 is connected with the 7 pin of U11 and one end of inductor L7 respectively, the other end of L7 is connected with the cathode of voltage stabilizing diode D4 and the source of MOSFET P tube Q2 respectively, the gate of Q2 is connected with the 3 pin of U11, the drain of Q2 is connected with the cathode of D5; the 1 and 2 pins of J4 are connected with BATIN and GND respectively.

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