GaN Terahertz Thin Film Circuit Fabrication Method

Abstract

This invention belongs to the technical field of basic electrical components, and specifically relates to a method for fabricating GaN terahertz thin-film circuits. This invention is based on n-on-a-substrate... ‑ ‑GaN layer / n + - The GaN layer material is first used to form the cathode and anode of the GaN Schottky diode, followed by etching to remove the n-layer material outside the GaN Schottky diode region. + A GaN layer is laid onto a thin-film dielectric, followed by the fabrication of terahertz circuit transmission lines on the surface of the dielectric. The underlying Si layer of the substrate is then removed, resulting in a monolithic integrated circuit of a GaN terahertz Schottky diode and a thin-film low-loss transmission line. The GaN terahertz thin-film circuit achieved by this invention has advantages such as high operating frequency, low loss, and high process yield, and is widely applicable in the field of GaN frequency multipliers, detectors, and other chips in the terahertz frequency band.

Description

Technical Field

[0001] This invention discloses a method for fabricating GaN terahertz thin-film circuits, which relates to semiconductor integrated circuit fabrication technology and belongs to the technical field of basic electrical components. Background Technology

[0002] Compared to materials such as Si, GaAs, and InP, the wide bandgap of third-generation semiconductor GaN enables GaN Schottky diodes (SBDs) to possess high reverse breakdown voltages, which in turn result in a wide range of varactor ratios. Therefore, using GaN Schottky diodes to fabricate terahertz frequency multiplier circuits holds promise for overcoming the bottleneck of insufficient output power in GaAs Schottky diodes and achieving a significant increase in the output power of terahertz frequency multipliers.

[0003] Currently, terahertz circuits based on GaN SBDs generally adopt a hybrid integration approach, where the die is a GaN SBD and the terahertz circuit substrate is quartz (SiO2), assembled together using methods such as gold wire bonding or conductive adhesive bonding. However, this hybrid integration method suffers from drawbacks such as low operating frequency, low yield, and low efficiency. In 2019, the University of Electronic Science and Technology of China published a paper titled "A Novel 220GHz GaNDiode On-Chip Tripler With High Driven Power" (IEEE Electron Device Lett., vol. 40, no. 5, pp.780-783, 2019), reporting a 220GHz GaN frequency multiplier. This 220GHz GaN frequency multiplier uses a hybrid circuit design and has an efficiency of only about 2%.

[0004] As operating frequencies increase, on the one hand, it is necessary to monolithically integrate the die with the terahertz circuit to overcome the low yield and high parasitics of manual assembly methods; on the other hand, to achieve operation in the THz and above frequency bands, terahertz circuits require the use of micron-scale low-loss thin-film transmission media to suppress transmission loss at high frequencies. In terahertz circuits based on GaAs SBDs, a self-terminating etching layer is typically inserted into the SBD epitaxial layer, and micron-scale GaAs thin-film circuits can be relatively easily realized through wet etching. However, GaN wet etching is difficult to implement due to the need for a strong alkaline and high-temperature process environment, and self-terminating etching is also difficult to achieve. Therefore, low-loss thin-film GaN terahertz monolithic integrated circuits and substrate-free GaN terahertz thin-film circuits have not yet been developed, which greatly restricts the application of GaN SBDs in the terahertz frequency band.

[0005] To overcome the low assembly accuracy of hybrid-circuit GaN SBDs, an improved approach involves fabricating GaN-based SBD devices with vertical electrodes on a diamond substrate circuit. This is achieved through photolithographically precise metal-to-metal bonding, reducing matching losses caused by assembly errors. However, this improved approach has two drawbacks: Firstly, the metal-to-metal direct bonding process connecting the substrate circuit and the SBD device still presents assembly accuracy issues. Secondly, while the improved approach fabricates the SBD device on a diamond substrate, the relatively high permittivity and loss tangent of diamond mean that using a diamond substrate still results in significant losses in terahertz circuits.

[0006] On the other hand, existing technologies have proposed an improved GaN SBD scheme that fabricates SBD devices on thick diamond substrates. This improved scheme uses a diamond substrate as the device substrate structure, which can improve the heat dissipation performance of GaN terahertz diodes, reduce the internal junction temperature and internal parasitic capacitance of the device, and improve the power withstand level of GaN terahertz diodes. However, the thickness of the diamond substrate used is 30-150 μm, and the thick diamond substrate leads to large signal transmission loss and low operating frequency of GaN SBD.

[0007] Overcoming the shortcomings of existing technologies has become one of the key challenges that urgently need to be addressed in the field of semiconductor integrated circuit fabrication technology.

[0008] Due to its low dielectric constant and loss tangent, SiO2 is currently the optimal transmission medium for terahertz circuits. However, there is currently no method for monolithically integrating GaN SBDs with low-loss SiO2 thin films. In recent years, breakthroughs have been achieved in the epitaxial growth of GaN materials on silicon-on-insulator (SOI) substrates, laying the foundation for monolithic integration of SiO2 thin films and GaN SBDs. This invention aims to propose a method for fabricating GaN terahertz monolithic integrated circuits on thin-film dielectrics, with the goal of realizing the fabrication of thin-film GaN terahertz monolithic integrated circuits and improving their operating frequency. Summary of the Invention

[0009] The objective of this invention is to address the shortcomings of the aforementioned background technology by providing a method for fabricating GaN terahertz thin film circuits, based on the n-type substrate of the invention. + -GaN / n --GaN layer diode material, after completing the cathode and anode preparation, then the metal transmission line is prepared on the thin film dielectric. Finally, the bottom Si in the substrate is removed by dry or wet method. This solves the technical problem that GaN terahertz diodes and thin film low-loss transmission lines cannot be monolithically integrated, and realizes the invention purpose of preparing micron-scale GaN terahertz thin film circuits with high operating frequency, low loss and high process yield.

[0010] To achieve the above-mentioned objectives, the present invention employs the following two technical solutions:

[0011] Technical Solution 1: A method for fabricating GaN terahertz thin-film circuits, which involves fabricating GaN terahertz circuits on SiO2 thin films to obtain GaN terahertz thin-film circuits based on SiO2 thin films, specifically including nine steps:

[0012] Step 1: Epitaxially grow n on the SOI substrate sequentially + -GaN layer, n - -GaN layer, SOI substrate from bottom to top consists of bottom layer Si, buried layer SiO2 and top layer Si;

[0013] Step 2: In n - - Photolithographic pattern above the GaN layer, etched away n - -GaN layer, forming n - -GaN layer mesa, etching depth and n - -The GaN layer has a consistent thickness;

[0014] Step 3: In the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form a cathode ohmic contact;

[0015] Step 4: In n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact;

[0016] Step 5: Photolithographic isolation pattern, sequentially etching n + - The top layer of Si in the GaN layer and SOI substrate extends to the surface of the buried SiO2 layer in the SOI substrate;

[0017] Step 6: Photolithographically etch air bridges on the surface of the buried SiO2 layer exposed in the SOI substrate, deposit interconnect metal, and strip to form terahertz circuit transmission lines;

[0018] Step 7: Bond the front side of the wafer to the carrier using organic materials;

[0019] Step 8: Thin out the bottom layer Si in the SOI substrate, and then use dry etching or wet etching to completely remove the bottom layer Si in the SOI substrate from the back side of the wafer until the buried SiO2 in the SOI substrate is completely exposed.

[0020] Step 9: Use organic reagents to peel the wafer from the carrier to obtain the GaN terahertz thin film circuit based on SiO2 thin film.

[0021] A further preferred embodiment of the method for fabricating GaN terahertz thin-film circuits based on SiO2 thin films of the present invention is: the n-phase epitaxially grown in step one... + - The doping concentration of the GaN layer is 6E18 / cm² 3 Up to 2E20 / cm 3 Between, n in step one, epitaxial growth - - The doping concentration of the GaN layer is 1E17 / cm² 3 Up to 5E17 / cm 3 between.

[0022] A further preferred embodiment of the method for fabricating GaN terahertz thin film circuits based on SiO2 thin film of the present invention is that the thickness of the top layer Si of the SOI substrate is between 0.2 μm and 2 μm.

[0023] A further preferred embodiment of the method for fabricating GaN terahertz thin film circuits based on SiO2 thin film of the present invention is that the thickness of the buried SiO2 layer on the SOI substrate is between 2 μm and 8 μm.

[0024] A further preferred embodiment of the method for fabricating GaN terahertz thin film circuits based on SiO2 thin film of the present invention is that the interconnect metal is Au, Cu, or Al, and the deposition thickness is between 1 μm and 6 μm.

[0025] The GaN terahertz thin-film circuit based on SiO2 thin film includes: a buried SiO2 layer, a terahertz circuit transmission line, a top layer of Si, and n-type silicon nanofibers on its surface. + The cathode ohmic contact layer, composed of GaN layers, has n formed on its surface. - -GaN layer mesa, formed on n + - The cathode ohmic contact on the surface of the GaN layer is formed on the n - -Anode contact on the surface of the GaN layer mesa; the top layer Si is located above the buried SiO2 layer, the terahertz transmission line is located above the buried SiO2 layer, and the two ends of the terahertz transmission line are connected to the anode contact and the cathode ohmic contact, respectively.

[0026] Technical Solution 2: A method for fabricating GaN terahertz thin film circuits, which involves fabricating GaN terahertz circuits on high-resistivity GaN thin films to obtain substrate-free GaN terahertz thin film circuits, including the following steps:

[0027] Step 1: Epitaxially grow a high-resistivity GaN layer and an n-layer on a Si substrate sequentially. + -GaN layer, n - -GaN layer;

[0028] Step 2: In n - - Photolithographic pattern above the GaN layer, etched away n - -GaN layer until n is exposed + - The surface of the GaN layer forms n - -GaN layer mesa;

[0029] Step 3: In the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form a cathode ohmic contact;

[0030] Step 4: In n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact;

[0031] Step 5: Photolithography isolation pattern, etching n + -The GaN layer continues until the surface of the high-resistivity GaN layer is exposed;

[0032] Step 6: Photolithographically etch air bridges on the surface of the high-resistivity GaN layer, deposit interconnect metal, and strip to form terahertz circuit transmission lines;

[0033] Step 7: Bond the front side of the wafer to the carrier using organic materials;

[0034] Step 8: Completely remove the Si substrate from the back side of the wafer;

[0035] Step 9: Use organic reagents to peel the wafer off the carrier to obtain a substrate-free GaN terahertz thin film circuit.

[0036] A further optimization of the substrate-free GaN terahertz thin film circuit fabrication method of the present invention is as follows: the thickness of the high-resistivity GaN layer epitaxially grown in step one is between 2 μm and 6 μm, and the resistivity is higher than 1E6 Ω·cm.

[0037] A further optimization of the substrate-free GaN terahertz thin film circuit fabrication method of the present invention is: in step eight, the Si substrate is completely removed from the back side of the wafer by dry etching or wet etching.

[0038] A substrate-free GaN terahertz thin-film circuit includes: a high-resistivity GaN layer, a terahertz transmission line, a cathode ohmic contact layer formed on the surface of the high-resistivity GaN layer, and an n-type ohmic contact layer formed on the surface of the cathode ohmic contact layer. - -GaN layer mesa and cathode ohmic contact, formed on n - - The anode contact is located on the mesa surface of the GaN layer. The terahertz transmission line is situated above the high-resistivity GaN layer, with its two ends connected to the anode contact and the cathode ohmic contact, respectively. The cathode ohmic contact layer is n. + -GaN layer.

[0039] The present invention, by adopting the above technical solution, has the following beneficial effects:

[0040] (1) The present invention proposes a method for fabricating GaN terahertz thin film circuit based on SiO2 thin film. By using GaN epitaxial technology on SOI substrate, the terahertz circuit transmission line is fabricated on SiO2 material with low dielectric constant and low loss, which greatly suppresses the transmission loss in the terahertz band. The fabricated GaN terahertz thin film circuit has the technical advantages of extremely low transmission loss and extremely high operating frequency compared with GaN SBD terahertz circuit on thick SiC, diamond and other substrates.

[0041] (2) The substrate-free GaN terahertz thin film circuit preparation method proposed in technical solution 2 of the present invention grows a high-resistivity GaN thin film material on a Si substrate. Taking advantage of the characteristic that the Si substrate is easily etched and removed, and the preparation process of the present invention which does not require wet etching, it can realize the micron-scale GaN thin film required for terahertz circuit. The process is simple and the yield is high. It overcomes the inherent defects of the prior art that cannot prepare substrate-free GaN terahertz thin film circuits. The prepared GaN terahertz thin film circuit has the technical advantages of low transmission loss and high operating frequency compared with GaN SBD terahertz circuits with thick SiC, diamond and other substrates.

[0042] (3) The two GaN terahertz thin film circuit fabrication processes proposed in this invention overcome the errors and parasitic parameters caused by micro-assembly or bonding processes, overcome the inherent defects of assembled terahertz circuits, and have the advantages of low loss, high operating frequency and high process yield. They are suitable for the fabrication of GaN frequency multipliers and detectors in the terahertz band. Attached Figure Description

[0043] Figures 1 to 9 This describes the GaN terahertz thin film circuit obtained in each process step of fabricating a GaN terahertz monolithic integrated circuit based on SiO2 thin film in one embodiment of the present invention.

[0044] Figure 10 This is a flowchart of the method for fabricating GaN terahertz thin film circuits based on SiO2 thin film according to the present invention.

[0045] Figures 11 to 19 The GaN terahertz thin film circuit obtained in each process step of fabricating a substrate-free GaN terahertz thin film circuit in one embodiment of the present invention.

[0046] Figure 20 This is a flowchart of the substrate-free GaN terahertz thin film circuit fabrication method of the present invention. Detailed Implementation

[0047] The technical solution of the invention will now be described in detail with reference to the accompanying drawings.

[0048] To overcome the shortcomings of existing GaN SBD-based terahertz circuits, which suffer from high transmission loss and low operating frequency, it is necessary to fabricate the transmission medium under the terahertz transmission line as a thin film medium. At the same time, to minimize transmission loss and increase operating frequency, the transmission line needs to be fabricated on a low-loss thin film. This invention aims to propose a method for fabricating GaN terahertz thin film circuits by fabricating GaN terahertz diodes on SiO2 thin films. This invention also aims to propose a substrate-free method for fabricating GaN terahertz thin film circuits to overcome the inherent defects of hybrid integrated terahertz circuits.

[0049] Specific Implementation Example 1: Method for Fabricating GaN Terahertz Thin Film Circuits Based on SiO2 Thin Films

[0050] like Figure 10 As shown, the method for preparing GaN terahertz monolithic integrated circuits based on SiO2 thin films according to the present invention includes nine steps.

[0051] Step 1: Epitaxially grow n on the SOI substrate sequentially. + -GaN layer, n - -GaN layer, SOI substrate, from bottom to top: bottom layer Si, buried layer SiO2 and top layer Si

[0052] Epitaxial growth was performed on an SOI substrate with a thickness of 2 μm and a doping concentration of 5E19 / cm². -3 n + -GaN layer 301 with a thickness of 150nm and a doping concentration of 3E17 / cm² -3 n - -GaN layer 302, wherein the SOI substrate consists of a 1mm thick bottom layer Si 201, a 4μm thick buried layer SiO2 202, and a 1μm thick top layer Si 203 from bottom to top. Preferably, the bottom layer Si 201 is selected from the 100 crystal plane of Si, and the top layer Si 203 is selected from the 111 crystal plane of Si. The GaN terahertz thin film circuit formed after step one is as follows: Figure 1 As shown.

[0053] Step two, in n - - Photolithographic pattern above the GaN layer, etched away n - -GaN layer, forming n - -GaN layer mesa

[0054] In n - - The photolithographic pattern above the GaN layer 302 is etched away. - -GaN layer 302 until exposed n + -GaN layer 301 surface, forming n - -GaN layer 302 mesa, the GaN terahertz thin film circuit formed after step two is as follows Figure 2 As shown.

[0055] Step 3, in the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form the cathode ohmic contact.

[0056] In the exposed n + - A cathode pattern is photolithographically patterned above the GaN layer 301, metallized, and annealed to form the cathode ohmic contact 401. The GaN terahertz thin film circuit formed after step three is as follows: Figure 3 As shown.

[0057] Step four, in n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact.

[0058] In n - - Photolithographically pattern the anode pattern on the GaN layer 302 mesa, metallize to form the anode contact 402, and the resulting GaN terahertz thin film circuit after step four is as follows: Figure 4 As shown.

[0059] Step 5: Photolithographically etch the isolation pattern, then sequentially etch n... + -The top Si layer in the GaN layer and SOI substrate is exposed until the surface of the buried SiO2 layer in the SOI substrate is exposed.

[0060] Photolithographic isolation pattern, etched n in sequence + -The surface of the GaN layer 301 and the top Si2O3 layer in the SOI substrate to the buried SiO22O2 layer in the SOI substrate, the GaN terahertz thin film circuit formed after step five is as follows: Figure 5 As shown.

[0061] Step 6: Photolithographically etch air bridges on the surface of the buried SiO2 layer exposed in the SOI substrate, deposit interconnect metals, and lift off to form terahertz circuit transmission lines.

[0062] Air bridges were photolithographically etched on the buried SiO2 2O2 layer in the SOI substrate, a 3 μm thick Au interconnect metal 403 was deposited, and then stripped to form terahertz circuit transmission lines. This completes the fabrication of terahertz circuit transmission lines on a low-loss SiO2 thin film. The GaN terahertz thin film circuit formed after step six is ​​shown below. Figure 6 As shown.

[0063] Step 7: Bond the front side of the wafer to the carrier using organic materials.

[0064] The wafer is bonded to the SiC carrier 502 using a high-temperature organic wax 501. The GaN terahertz thin-film circuit formed after step seven is as follows: Figure 7 As shown.

[0065] Step 8: Thin out the bottom layer Si in the SOI substrate, and then completely remove the bottom layer Si in the SOI substrate from the back side of the wafer using dry etching or wet etching until the buried SiO2 layer in the SOI substrate is fully exposed.

[0066] The bottom layer Si2O1 in the SOI substrate is thinned, and then F-based dry etching is used to completely remove the bottom layer Si2O1 from the back side of the SOI substrate down to the buried SiO22O2 layer in the SOI substrate. The GaN terahertz thin film circuit formed after step eight is as follows: Figure 8 As shown.

[0067] Step nine: The wafer is peeled off from the carrier using an organic reagent to obtain a GaN terahertz thin-film circuit based on SiO2 thin film.

[0068] The wafer is peeled from the SiC carrier 502 using the organic reagent toluene, completing the fabrication of the GaN terahertz monolithic integrated circuit. The GaN terahertz thin-film circuit formed after step nine is shown below. Figure 9 As shown.

[0069] Depend on Figure 9 It can be seen that the GaN terahertz monolithic thin-film circuit prepared by the method of the present invention integrates a GaN terahertz Schottky diode with a SiO2 thin film monolithically. This GaN terahertz thin-film circuit includes: a buried SiO2 layer, terahertz circuit transmission lines, a top Si layer, and n-type diodes on its surface. + The cathode ohmic contact layer, composed of GaN layers, has n formed on its surface. - -GaN layer mesa, forming the n + - The cathode ohmic contact on the surface of the GaN layer is formed on the n - -Anode contact on the surface of the GaN layer mesa; the top layer Si is located above the buried SiO2 layer, the terahertz transmission line is located above the buried SiO2 layer, and the two ends of the terahertz transmission line are connected to the anode contact and the cathode ohmic contact, respectively.

[0070] Specific Example 2: Substrate-free GaN Terahertz Thin Film Circuit Fabrication Method

[0071] Figure 20 As shown, the method for manufacturing a substrate-free GaN terahertz thin film circuit according to the present invention includes nine steps.

[0072] Step 1: Epitaxially grow a high-resistivity GaN layer and an n-layer on a Si substrate sequentially. + -GaN layer, n - -GaN layer

[0073] A high-resistivity GaN layer 202 with a thickness of 4 μm and a resistivity of 5E6 Ω·cm is epitaxially grown sequentially on a Si substrate 201. A 1 μm thick GaN layer 202 with a doping concentration of 6E19 / cm is also epitaxially grown on the substrate 201.-3 n + -GaN layer 301 with a thickness of 200 nm and a doping concentration of 2E17 / cm -3 n - -GaN layer 302, the GaN terahertz thin film circuit formed after step one is as follows Figure 11 As shown.

[0074] Step two, in n - - Photolithographic pattern above the GaN layer, etched away n - -GaN layer until n is exposed + - The surface of the GaN layer forms n - -GaN layer mesa

[0075] In n - - The photolithographic pattern above the GaN layer 302 is etched away. - -GaN layer 302 to n + -GaN layer 301, forming n - -GaN layer 302 mesa, the GaN terahertz thin film circuit formed after step two is as follows Figure 12 As shown.

[0076] Step 3, in the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form the cathode ohmic contact.

[0077] In the exposed n + - A cathode pattern is photolithographically patterned above the GaN layer 301, metallized, and annealed to form the cathode ohmic contact 401. The GaN terahertz thin film circuit formed after step three is as follows: Figure 13 As shown.

[0078] Step four, in n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact.

[0079] In n - - Photolithographically pattern the anode pattern on the GaN layer 302 mesa, metallize to form the anode contact 402, and the resulting GaN terahertz thin film circuit after step four is as follows: Figure 14 As shown.

[0080] Step 5: Photolithography isolation pattern, etching n + -GaN layer to the surface exposing the high-resistivity GaN layer

[0081] Photolithographic isolation pattern, etching n + -From the surface of GaN layer 301 to the high-resistivity GaN layer 202, the GaN terahertz thin film circuit formed after step five is as follows: Figure 15 As shown.

[0082] Step 6: Photolithographically etch air bridges on the surface of the high-resistivity GaN layer, deposit interconnect metals, and peel off to form terahertz circuit transmission lines.

[0083] Air bridges were photolithographically etched on the high-resistivity GaN layer 202, a 4μm thick Au interconnect metal 403 was deposited, and then stripped to form terahertz circuit transmission lines. This completed the fabrication of terahertz transmission lines on a thin-film high-resistivity GaN layer. The GaN terahertz thin-film circuit formed after step six is ​​shown below. Figure 16 As shown.

[0084] Step 7: Bond the front side of the wafer to the carrier using organic materials.

[0085] The wafer is bonded to the SiC carrier 502 using a high-temperature organic wax 501. The GaN terahertz thin-film circuit formed after step seven is as follows: Figure 17 As shown.

[0086] Step 8: Use dry etching or wet etching to completely remove the Si substrate from the back side of the wafer.

[0087] Using TMAH solution, the Si substrate 201 is removed in a water bath at 80°C. The GaN terahertz thin film circuit formed after step eight is as follows: Figure 18 As shown.

[0088] Step nine: The wafer is peeled off from the carrier using an organic reagent to obtain a substrate-free GaN terahertz thin-film circuit.

[0089] The wafer is peeled from the SiC carrier 502 using the organic reagent toluene, completing the fabrication of the GaN terahertz monolithic integrated circuit. The GaN terahertz thin-film circuit formed after step nine is shown below. Figure 19 As shown.

[0090] Depend on Figure 19 As can be seen, the substrate-free GaN terahertz thin-film circuit prepared by the method of the present invention integrates a GaN terahertz Schottky diode with a high-resistivity GaN thin film monolithically. This GaN terahertz thin-film circuit includes: a high-resistivity GaN layer, a terahertz transmission line, a cathode ohmic contact layer formed on the surface of the high-resistivity GaN layer, and an n-type diode formed on the surface of the cathode ohmic contact layer. - -GaN layer mesa and cathode ohmic contact, formed on n - - The anode contact is located on the mesa surface of the GaN layer. The terahertz transmission line is situated above the high-resistivity GaN layer, with its two ends connected to the anode contact and the cathode ohmic contact, respectively. The cathode ohmic contact layer is n. + -GaN layer.

[0091] The above embodiments are merely illustrative examples of the present invention and do not limit its scope of protection. Those skilled in the art can make partial modifications. For example, resistors, capacitors, and other devices can be fabricated on an SOI substrate to form a SiO2 thin-film terahertz thin-film circuit. Resistors, capacitors, and other devices can be fabricated on a GaN thin-film material epitaxially grown on a Si substrate, and then the Si substrate can be peeled off to form a substrate-free GaN terahertz thin-film circuit. The fabrication method of the present invention can also be used for GaN terahertz monolithic integrated circuits, not limited to the specific diode structure involved in this embodiment. Any equivalent substitutions that conform to the spirit of the invention fall within the scope of protection of the present invention.

Claims

1. A method for fabricating GaN terahertz thin-film circuits, characterized in that, Fabricating GaN terahertz circuits on SiO2 thin films includes the following steps: Step 1: Epitaxially grow n on the SOI substrate sequentially + -GaN layer, n - -GaN layer, wherein the SOI substrate consists of bottom layer Si, buried layer SiO2 and top layer Si from bottom to top; Step 2: In the n - The photolithographic pattern above the GaN layer is etched away to remove the n- - -GaN layer, forming n - -GaN layer mesa, etching depth and n - -The GaN layer has a consistent thickness; Step 3: In the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form a cathode ohmic contact; Step 4: In the n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact; Step 5: Photolithographic isolation pattern, sequentially etching the n... + -GaN layer and top Si in the SOI substrate until the surface of buried SiO2 in the SOI substrate is exposed; Step 6: Photolithographically etch air bridges on the surface of the buried SiO2 exposed in the SOI substrate, deposit interconnect metal, and strip to form terahertz circuit transmission lines; Step 7: Bond the front side of the wafer to the carrier using organic materials; Step 8: Thin out the bottom layer Si in the SOI substrate and completely remove the bottom layer Si in the SOI substrate from the back side of the wafer until the buried SiO2 in the SOI substrate is completely exposed; Step 9: Use organic reagents to peel the wafer from the carrier to obtain a GaN terahertz thin film circuit based on SiO2 thin film.

2. The method for fabricating GaN terahertz thin-film circuits according to claim 1, characterized in that, The epitaxial growth in step one, n + - The doping concentration of the GaN layer is 6E18 / cm² 3 Up to 2E20 / cm 3 Between, the n epitaxial growth in step one - - The doping concentration of the GaN layer is 1E17 / cm² 3 Up to 5E17 / cm 3 between.

3. The method for fabricating GaN terahertz thin-film circuits according to claim 1, characterized in that, The thickness of the top layer Si of the SOI substrate is between 0.2 μm and 2 μm.

4. The method for fabricating GaN terahertz thin-film circuits according to claim 1, characterized in that, The thickness of the buried SiO2 layer in the SOI substrate is between 2 μm and 8 μm.

5. The method for fabricating GaN terahertz thin-film circuits according to claim 1, characterized in that, The interconnecting metal is gold, copper, or aluminum, and the deposition thickness is between 1 μm and 6 μm.

6. The method for fabricating GaN terahertz thin-film circuits according to claim 1, characterized in that, Step eight involves using dry etching or wet etching to completely remove the underlying Si from the SOI substrate from the back side of the wafer.

7. A GaN terahertz thin-film circuit based on SiO2 thin film, characterized in that, The GaN terahertz thin film circuit is fabricated using the method described in claim 1. The GaN terahertz thin film circuit comprises: a buried SiO2 layer, terahertz circuit transmission lines, a top Si layer, and n-type silicon nanofibers on its surface. + A cathode ohmic contact layer composed of a GaN layer is formed on the surface of the cathode ohmic contact layer. - -GaN layer mesa, formed in the n + - The cathode ohmic contact on the surface of the GaN layer is formed in the n - -Anode contact on the surface of the GaN layer mesa; the top layer Si is located above the buried SiO2 layer, the terahertz circuit transmission line is located above the buried SiO2 layer, and the two ends of the terahertz circuit transmission line are connected to the anode contact and the cathode ohmic contact, respectively.

8. A method for fabricating GaN terahertz thin-film circuits, characterized in that, Fabricating GaN terahertz circuits on high-resistivity GaN thin films includes the following steps: Step 1: Epitaxially grow a high-resistivity GaN layer and an n-layer on a Si substrate sequentially. + -GaN layer, n - -GaN layer; Step 2: In the n - The photolithographic pattern above the GaN layer is etched away to remove the n- - -GaN layer until the n is exposed + - The surface of the GaN layer forms n - -GaN layer mesa; Step 3: In the exposed n + - Photolithographically pattern the cathode above the GaN layer, metallize and anneal to form a cathode ohmic contact; Step 4: In the n - - Photolithographically pattern the anode pattern on the GaN layer mesa, and metallize it to form the anode contact; Step 5: Photolithography to isolate the n-shaped pattern, etching the n-shaped pattern. + - GaN layer until the surface of the high-resistivity GaN layer is exposed; Step 6: Photolithographically etch air bridges on the surface of the high-resistivity GaN layer, deposit interconnect metal, and strip to form terahertz circuit transmission lines; Step 7: Bond the front side of the wafer to the carrier using organic materials; Step 8: Completely remove the Si substrate from the back side of the wafer; Step 9: Use organic reagents to peel the wafer off the carrier to obtain a substrate-free GaN terahertz thin film circuit.

9. The method for fabricating GaN terahertz thin-film circuits according to claim 8, characterized in that, The thickness of the high-resistivity GaN layer epitaxially grown in step one is between 2 μm and 6 μm, and the resistivity is higher than 1E6 Ω·cm.

10. The method for fabricating GaN terahertz thin film circuits according to claim 8, characterized in that, Step eight involves completely removing the Si substrate from the back side of the wafer using either dry etching or wet etching.

11. A substrate-free GaN terahertz thin-film circuit, characterized in that, The GaN terahertz thin film circuit is fabricated using the method described in claim 8. The GaN terahertz thin film circuit includes: a high-resistivity GaN layer, a terahertz circuit transmission line, a cathode ohmic contact layer formed on the surface of the high-resistivity GaN layer, and an n-type ohmic contact layer formed on the surface of the cathode ohmic contact layer. - -GaN layer mesa and cathode ohmic contact are formed in the n - - The anode contact on the mesa surface of the GaN layer, the terahertz circuit transmission line is located above the high-resistivity GaN layer, and the two ends of the terahertz circuit transmission line are respectively connected to the anode contact and the cathode ohmic contact.

12. The substrate-free GaN terahertz thin-film circuit according to claim 11, characterized in that, The cathode ohmic contact layer is n + -GaN layer.

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