Display panel and display device

Abstract

The present invention provides a display panel and a display device, including a display area and a fan-out area. In the display area, the display panel includes: pixel units arranged in an array, including a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged sequentially in a first direction; there is a first gap between the first sub-pixel and the second sub-pixel, a second gap between the second sub-pixel and the third sub-pixel, and a third gap between the third sub-pixel and the first sub-pixel; signal lines extending in a second direction, including data signal lines and gate signal lines, the second direction being perpendicular to the first direction; wherein, the data signal lines and the gate signal lines are located in different gaps among the first gap, the second gap, and the third gap. By optimizing the pixel layout, the distance between the data signal lines and the gate signal lines is increased, the coupling effect between the data signal lines and the gate signal lines is reduced, and the moiré problem of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of displays, and in particular, to a display panel and a display device. Background Art

[0002] Micro-LED borderless display technology places all the display driver integrated circuits (Display Driver Integrated Circuit, abbreviated as DDIC) on one side of the display panel, that is, a single-sided pin-out design, to ensure that there is no non-display area on the other three sides, thereby achieving borderless display. The single-sided pin-out design means that the horizontal gate signal lines in the display area need to be converted into vertical gate signal lines through vias and finally connected to the DDIC at the lower end of the display area.

[0003] However, the data signal lines in the display area are also vertically arranged, and in the prior art (please refer to Figure 1 ), the vertical gate signal lines and data signal lines are arranged adjacent to each other, which will cause a strong coupling effect between the gate signal and the data signal, and then cause the display panel to have diagonal mura, seriously affecting the quality of the display panel. Summary of the Invention

[0004] The present invention provides a display panel to reduce the diagonal lines of the borderless Micro-LED display panel and improve the quality of the display panel.

[0005] To solve the above problems, the technical solution provided by the present invention is as follows:

[0006] The present invention provides a display panel, including a display area and a fan-out area. In the display area, the display panel includes:

[0007] Pixel units arranged in an array, including a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence in a first direction; there is a first gap between the first sub-pixel and the second sub-pixel, a second gap between the second sub-pixel and the third sub-pixel, and a third gap between the third sub-pixel and the first sub-pixel;

[0008] Signal lines extending in a second direction, including data signal lines and gate signal lines, where the second direction is perpendicular to the first direction;

[0009] Among them, the data signal lines and the gate signal lines are located in different gaps among the first gap, the second gap, and the third gap.

[0010] Optionally, in some embodiments of the present invention, in the same gap, the number of data signal lines is less than or equal to 2.

[0011] Optionally, in some embodiments of the present invention, the data signal lines include a first data signal line, a second data signal line, and a third data signal line. The first data signal line is electrically connected to the first sub-pixel, the second data signal line is electrically connected to the second sub-pixel, and the third data signal line is electrically connected to the third sub-pixel. The data signal lines and the gate signal lines are arranged in one or more of the following three ways:

[0012] The first data signal line and the second data signal line are located in the first gap, the third data signal line is located in the second gap, and the gate signal line is located in the third gap;

[0013] The first data signal line and the second data signal line are located in the first gap, the third data signal line is located in the third gap, and the gate signal line is located in the second gap;

[0014] The first data signal line is located in the third gap, the second data signal line and the third data signal line are located in the second gap, and the gate signal line is located in the first gap.

[0015] Optionally, in some embodiments of the present invention, the signal lines further include a power signal line, a common signal line, and a reference signal line, and at least one of the power signal line, the common signal line, and the reference signal line is disposed between the data signal lines and the gate signal lines.

[0016] Optionally, in some embodiments of the present invention, in the first direction, the display panel includes a first-order pixel unit, a last-order pixel unit, a first side, and a second side. The first side is located on the side of the first-order pixel unit away from the last-order pixel unit, and the second side is located on the side of the last-order pixel unit away from the first-order pixel unit. The gate signal line is also located in at least one of the first side or the second side.

[0017] Optionally, in some embodiments of the present invention, the data signal lines are only located within the gaps or are located in different sides from the gate signal lines.

[0018] Optionally, in some embodiments of the present invention, the data signal lines and the gate signal lines are located in the same film layer of the display panel;

[0019] Alternatively, the data signal lines and the gate signal lines are located in different film layers of the display panel.

[0020] Optionally, in some embodiments of the present invention, the display panel includes a substrate, and a metal light-shielding layer, an insulating layer, and a source-drain layer sequentially disposed on the substrate. The data signal line is disposed in the source-drain layer, and the gate signal line is located in the metal light-shielding layer.

[0021] Optionally, in some embodiments of the present invention, in the fan-out region, the display panel includes a data lead-out line and a scan lead-out line. The data lead-out line is electrically connected to the data signal line, and the scan lead-out line is electrically connected to the gate signal line. The display panel includes a substrate, and a metal light-shielding layer, an insulating layer, and a source-drain layer sequentially disposed on the substrate. The scan lead-out line is disposed in the metal light-shielding layer, and the data lead-out line is disposed in the source-drain layer.

[0022] The present invention also provides a display device, including a frame and the display panel according to any one of the embodiments of the present invention, and the display panel is disposed in the frame.

[0023] The present invention provides a display panel and a display device. By optimizing the pixel layout, the display panel arranges the data signal line and the gate signal line in different gaps between pixels, avoiding the adjacency of the data signal line and the gate signal line, increasing the distance between the data signal line and the gate signal line. By disposing the gate signal line in the metal light-shielding layer, the distance between the gate signal line and the data signal line is increased in the film thickness direction, reducing the coupling effect between the data signal line and the gate signal line, and improving the moiré problem of the display panel. Description of the Drawings

[0024] The following will make the technical solutions and other beneficial effects of the present application obvious by describing the specific embodiments of the present application in detail in conjunction with the drawings.

[0025] Figure 1 It is a schematic diagram of the planar structure of an existing display panel;

[0026] Figure 2 It is a schematic diagram of the planar structure of the display panel provided by the embodiment of the present invention;

[0027] Figure 3 It is a comparison diagram of the effects of the data signal of an existing display panel and the display panel provided by the embodiment of the present invention being affected by the scan signal;

[0028] Figure 4 It is a schematic diagram of the cross-sectional structure of an existing display panel;

[0029] Figure 5 It is a schematic diagram of the cross-sectional structure of the display panel provided by the embodiment of the present invention;

[0030] Figure 6Schematic diagram of the preparation structure of the display panel provided by the embodiment of the present invention. Detailed implementation manners

[0031] Next, in combination with the specific implementation manners of the present invention, the technical solutions in the implementation manners and / or embodiments of the present invention will be clearly and completely described. Obviously, the implementation manners and / or embodiments described below are only a part of the implementation manners and / or embodiments of the present invention, rather than all of the implementation manners and / or embodiments. Based on the implementation manners and / or embodiments in the present invention, all other implementation manners and / or embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0032] The directional terms mentioned in the present invention, such as [up], [down], [left], [right], [front], [back], [inside], [outside], [side], etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for explaining and understanding the present invention, rather than for limiting the present invention. The terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features.

[0033] Aiming at the problem of moiré in the existing borderless Micro-LED display panel, the present invention provides a display panel that can solve this problem.

[0034] In one embodiment, please refer to Figure 2 , Figure 2 which is a schematic diagram of the planar structure of the display panel provided by the embodiment of the present invention. As Figure 2 shown, the display panel provided by the embodiment of the present invention includes a display area and a fan-out area. In the display area, the display panel includes:

[0035] Pixel units arranged in an array, including a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3 arranged in sequence in a first direction; there is a first gap between the first sub-pixel P1 and the second sub-pixel P2, a second gap between the second sub-pixel P2 and the third sub-pixel P3, and a third gap between the third sub-pixel P3 and the first sub-pixel P1;

[0036] Signal lines extending in a second direction, including data signal lines (D1 / D2 / D3) and gate signal lines (G1 / G2), the second direction being perpendicular to the first direction;

[0037] wherein, the data signal lines and the gate signal lines are located in different gaps among the first gap, the second gap, and the third gap.

[0038] In an embodiment of the present invention, by optimizing the pixel layout, the data signal lines and the gate signal lines are arranged in different gaps between the pixels, avoiding the adjacency of the data signal lines and the gate signal lines, increasing the distance between the data signal lines and the gate signal lines, reducing the coupling effect between the data signal lines and the gate signal lines, and improving the moiré problem of the display panel.

[0039] In an embodiment of the present invention, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 are respectively one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel. In one of the gaps, the number of the data signal lines is less than or equal to 2, so as to facilitate wiring.

[0040] In one embodiment, please refer to Figure 2 , the data signal lines include a first data signal line D1, a second data signal line D2, and a third data signal line D3. The first data signal line D1 is electrically connected to the first sub-pixel P1, the second data signal line D2 is electrically connected to the second sub-pixel P2, and the third data signal line D3 is electrically connected to the third sub-pixel P3. In one implementation, the first data signal line D1 and the second data signal line D2 are located in the first gap, the third data signal line D3 is located in the second gap, and the gate signal line is located in the third gap; in another implementation, the first data signal line D1 and the second data signal line D2 are located in the first gap, the third data signal line D3 is located in the third gap, and the gate signal line is located in the second gap; in one implementation, the first data signal line D1 is located in the third gap, the second data signal line D2 and the third data signal line D3 are located in the second gap, and the gate signal line is located in the first gap. The setting manner of the data signal lines and the gate signal lines can be any one, two, or three of the above implementations.

[0041] Further, in the first direction, the display panel includes a first-order pixel unit, a last-order pixel unit, a first side, and a second side. The first side is located on the side of the first-order pixel unit away from the last-order pixel unit, and the second side is located on the side of the last-order pixel unit away from the first-order pixel unit. In one embodiment, the gate signal line is also located within the first side, the third data signal line D3 is also located within the second side, or the data signal line is only located within the gap; in another embodiment, the gate signal line is also located within the second side, the first data signal line D1 is also located within the first side, or the data signal line is only located within the gap; in yet another embodiment, the gate signal line is also located within the first side and the second side, and the data signal line is only located within the gap.

[0042] Furthermore, the signal lines further include a power supply signal line VDD, a common signal line VSS, and a reference signal line Vref, and at least one of the power supply signal line VDD, the common signal line VSS, and the reference signal line Vref is disposed between the data signal line and the gate signal line. As Figure 2 shown, the power supply signal line VDD is disposed adjacent to the first gate signal line and is located on the side close to the first data signal line, and the common signal line VSS and the reference signal line Vref are disposed adjacent to each other and are located on the side close to the third data signal line. In this way, the distance between the data signal line and the gate signal line is further increased, the coupling effect between the data signal line and the gate signal line is reduced, and the moiré problem of the display panel is further improved.

[0043] Please refer to Figure 3 , Figure 3 In (a) of [reference], the effect diagram of the data signal of the existing display panel affected by the gate signal is shown, Figure 3 In (b) of [reference], the effect diagram of the data signal of the display panel provided by the embodiment of the present invention affected by the scan signal is shown. It can be Figure 3 seen that, compared with the existing display panel, the data signal of the display panel provided by the embodiment of the present invention is less affected by the gate signal, indicating that the display panel provided by the embodiment of the present invention reduces the coupling effect between the data signal line and the gate signal line.

[0044] In one embodiment, please refer to Figure 5 , Figure 5The cross-sectional structural schematic diagram of the display panel provided by the embodiment of the present invention is shown. The display panel includes a substrate 10, and a metal light-shielding layer 44, a buffer layer 21, a semiconductor active layer 31, a gate insulating layer 22, a gate layer 32, an interlayer insulating layer 23, a source-drain layer 33, and a passivation layer 24, which are sequentially disposed on the substrate 10. A data signal line 41 is disposed in the source-drain layer 33, and the gate signal line 42 extending along the second direction may be in the same film layer as the data signal line 41, as Figure 4 shown; the gate signal line 42 may also be in a different film layer from the data signal line 41. In one embodiment, the gate signal line 42 is disposed in the metal light-shielding layer 44, and the gate signal line 42 in the gate layer is connected to the gate signal line 43 through a via. By disposing the gate signal line 42 from the source-drain layer 33 into the metal light-shielding layer 44, the gate signal line 42 and the data signal line 41 are separated by the buffer layer 21 and the interlayer insulating layer 23, increasing the distance between the gate signal line 42 and the data signal line 41 in the film thickness direction, reducing the coupling effect between the data signal line 41 and the gate signal line 42, and further improving the moire problem of the display panel.

[0045] In one embodiment, in the fan-out region, the display panel includes a data lead-out line and a scan lead-out line. The data lead-out line is electrically connected to the data signal line, and the scan lead-out line is electrically connected to the gate signal line; the scan lead-out line is disposed in the metal light-shielding layer, and the data lead-out line is disposed in the source-drain layer. Similarly, in this embodiment, by disposing the scan lead-out line in the metal light-shielding layer, the distance between the gate signal line 42 and the data signal line 41 is increased in the film thickness direction, the coupling effect between the data signal line 41 and the gate signal line 42 is reduced, and the moire problem of the display panel is further improved.

[0046] The present invention also provides a method for manufacturing a display panel for manufacturing the display panel provided by the embodiment of the present invention. For details, please refer to Figure 6 .

[0047] Correspondingly, the present invention also provides a display device. The display device includes a frame body and the display panel according to any one of the embodiments of the present invention, and the display panel is disposed in the frame body.

[0048] In summary, the embodiment of the present invention provides a display panel and a display device. By optimizing the pixel layout, the data signal line and the gate signal line are arranged in different gaps between pixels, avoiding the adjacency of the data signal line and the gate signal line, and increasing the distance between the data signal line and the gate signal line. By arranging the gate signal line in the metal light-shielding layer, the distance between the gate signal line and the data signal line is increased in the film thickness direction, reducing the coupling effect between the data signal line and the gate signal line, and improving the moiré problem of the display panel.

[0049] The display panel and the display device provided by the embodiment of the present invention have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A display panel, characterized in that, It includes a display area and a fan-out area. In the display area, the display panel includes: Pixel units arranged in an array, including a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence in a first direction; there is a first gap between the first sub-pixel and the second sub-pixel, a second gap between the second sub-pixel and the third sub-pixel, and a third gap between the third sub-pixel and the first sub-pixel; Signal lines extending in a second direction, including data signal lines and gate signal lines, where the second direction is perpendicular to the first direction; A substrate and a metal light-shielding layer, a buffer layer, an interlayer insulating layer, and a source-drain layer sequentially disposed on the substrate, and the data signal lines and the gate signal lines are located in different film layers of the display panel; Among them, the data signal lines and the gate signal lines are located in different gaps among the first gap, the second gap, and the third gap; The data signal lines are disposed in the source-drain layer, and the gate signal lines are located in the metal light-shielding layer.

2. The display panel according to claim 1, wherein In the same gap, the number of data signal lines is less than or equal to 2.

3. The display panel according to claim 2, wherein The data signal lines include a first data signal line, a second data signal line, and a third data signal line. The first data signal line is electrically connected to the first sub-pixel, the second data signal line is electrically connected to the second sub-pixel, and the third data signal line is electrically connected to the third sub-pixel; the setting manners of the data signal lines and the gate signal lines are one or more of the following three: The first data signal line and the second data signal line are located in the first gap, the third data signal line is located in the second gap, and the gate signal line is located in the third gap; The first data signal line and the second data signal line are located in the first gap, the third data signal line is located in the third gap, and the gate signal line is located in the second gap; The first data signal line is located in the third gap, the second data signal line and the third data signal line are located in the second gap, and the gate signal line is located in the first gap.

4. The display panel according to claim 1, characterized in that, The signal lines further include a power supply signal line, a common signal line, and a reference signal line, and at least one of the power supply signal line, the common signal line, and the reference signal line is disposed between the data signal lines and the gate signal lines.

5. The display panel according to claim 1, characterized in that, In the first direction, the display panel includes a first-rank pixel unit, a last-rank pixel unit, a first side, and a second side. The first side is located on the side of the first-rank pixel unit facing away from the last-rank pixel unit, and the second side is located on the side of the last-rank pixel unit facing away from the first-rank pixel unit; the gate signal lines are also located in at least one of the first side or the second side.

6. The display panel according to claim 5, characterized in that The data signal lines are only located in the gaps or are located in different sides from the gate signal lines.

7. The display panel according to claim 1, characterized in that, In the fan-out area, the display panel includes data lead-out lines and scan lead-out lines. The data lead-out lines are electrically connected to the data signal lines, and the scan lead-out lines are electrically connected to the gate signal lines. The display panel includes a substrate and a metal light-shielding layer, an insulating layer, and a source-drain layer that are sequentially disposed on the substrate. The scan lead-out lines are disposed in the metal light-shielding layer, and the data lead-out lines are disposed in the source-drain layer.

8. A display device, characterized in that, It includes a frame body and the display panel according to any one of claims 1 to 7, and the display panel is disposed in the frame body.

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