A quantum circuit optimization method based on greedy algorithm
Through the quantum line optimization method based on greedy algorithm, the quantum lines in the Lie-Trotter algorithm are optimized, which solves the error problem of existing methods when dealing with the non-optimization of the terms, and significantly shortens the line depth and improves the computing efficiency.
Patent Information
- Application Number
- CN202210532473.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-10
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2042-05-10
AI Technical Summary
The quantum circuit design of the existing Lie-Trotter algorithm has errors when dealing with the case where there are misalignment terms in Hamiltonian, and the current line depth reduction method is not optimal in gate cancellation strategies and depth reduction.
The quantum circuit optimization method based on greedy algorithm is adopted, and the quantum circuit is optimized by grouping the 2-local Hamiltonian quantum gates according to the Pauli operator tags and using the greedy algorithm to select quantum gates from the Pauli tag group to form the optimal sorting scheme.
This method can significantly reduce line depth, improve the computing efficiency of quantum simulation algorithms, and is suitable for all 2-local Hamiltonian quantum simulation lines, without being restricted by specific quantum hardware.
Smart Images

Figure CN114970869B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of quantum circuit optimization, and in particular relates to a quantum circuit optimization method based on a greedy algorithm. Background Art
[0002] Quantum simulation is a representative application of quantum computers, but the algorithms to implement quantum simulations consume a lot of computing resources. The current quantum computers are noisy intermediate-scale quantum (NISQ) computers, whose main characteristics are the scarcity of quantum bit resources (the number is 50-100 quantum bits), the connectivity of quantum bits is limited by constraints, and the circuit depth is limited by decoherence factors. The limitation of circuit depth hinders the effective implementation of many quantum algorithms on current quantum computers. Therefore, people have proposed algorithms that can make full use of limited resources to achieve quantum simulation, and Lie-Trotter decomposition is the most common one. For the case where the Hamiltonian of the system can be written as the addition of a polynomial number of Hermitian terms, the Lie-Trotter method represents the time evolution of the system as the product of the time evolution of each Hermitian term, and the time evolution of each Hermitian term can be decomposed into a 2-local Hamiltonian quantum gate. However, this method has errors when there are non-commutative terms in the Hamiltonian, and the errors depend on the non-commutative terms and the Trotter step size. In the quantum circuit of the Lie-Trotter algorithm, a reasonable arrangement of the order of Trotter terms is very helpful for circuit optimization. In quantum chemistry and many-body physics, Trotter terms are sorted according to the coefficient weights, because the larger the weight, the stronger the correlation, which corresponds to the actual physical meaning. This sorting can significantly reduce the error rate. The purpose of another method is to maximize the similarity of adjacent Pauli operators and use gate cancellation for adjacent identical Pauli operators to reduce the number of quantum gates and the depth of the circuit. The first method can reduce the circuit error rate, but it is not optimal in depth reduction. In the second method, the existing strategy only uses a simple dictionary-style Pauli string sorting, which is also not the optimal method in gate cancellation strategy and depth reduction.
[0003] Therefore, it is of great significance to design a better circuit depth reduction method for the quantum circuit of the general Lie-Trotter algorithm that is independent of specific hardware. Summary of the invention
[0004] Technical problem: The purpose of the present invention is to overcome the above-mentioned shortcomings and provide a quantum circuit optimization method based on a greedy algorithm, which effectively searches for the optimal sorting scheme in the sorting space of the Trotter sequence, and obtains the optimal quantum circuit after further optimization. This method is independent of the implementation of quantum hardware and is suitable for all 2-local Hamiltonian quantum simulation circuits. Compared with the best quantum circuit optimizer currently available, it can reduce the circuit depth and speed up the computational efficiency of quantum simulation algorithms and their applications.
[0005] Technical solution: In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention includes the following steps:
[0006] (1) Input the initial quantum circuit diagram;
[0007] (2) Group the 2-local Hamiltonian quantum gates in the circuit according to the Pauli operator labels;
[0008] (3) Divide the circuit into layers, and use a greedy algorithm to select the 2-localHamiltonian quantum gate of each layer from the Pauli label group in turn, and add it to the sorted list;
[0009] (4) Based on the selection of the quantum gates in the previous layer, a greedy strategy is used to select the 2-local Hamiltonian quantum gates in the next layer and add them to the sorting list until all quantum gates are selected;
[0010] (5) Optimize the 2-local Hamiltonian quantum gate according to the list sorting scheme;
[0011] (6) Output the optimized quantum circuit.
[0012] The selection of the 2-local Hamiltonian quantum gate in step (3) includes the following steps:
[0013] Layering quantum circuits;
[0014] Select the 2-local Hamiltonian quantum gates of each layer in turn according to the greedy algorithm;
[0015] Add the 2-local Hamiltonian quantum gates of each layer into the sorted list one by one.
[0016] The 2-local Hamiltonian quantum gate selection strategy in step (3) includes the following methods:
[0017] The quantum bits contained in the 2-local Hamiltonian quantum gates of each layer start from the smallest number and end with the largest number, with the best principle being to occupy all the bits;
[0018] In each layer of adjacent 2-local Hamiltonian quantum gates, the first quantum bit occupied by the latter 2-local Hamiltonian quantum gate is the same as the second quantum bit occupied by the previous 2-local Hamiltonian quantum gate;
[0019] The Pauli operator labels on the same bits of adjacent 2-local Hamiltonian quantum gates in each layer are the same.
[0020] The first 2-local Hamiltonian quantum gate of each layer in step (4) is selected in lexicographic order.
[0021] In step (4), the selection of the 2-local Hamiltonian quantum gates at each layer is based on the above strategies and also includes the following methods:
[0022] Each 2-local Hamiltonian quantum gate in the current layer is selected from the quantum gates of the Pauli operator label group in the previous layer;
[0023] Each 2-local Hamiltonian quantum gate in the current layer is selected from the group of Pauli operator labels that contains the most remaining quantum gates.
[0024] The diagonal decomposition of the 2-local Hamiltonian quantum gate in step (5) is as follows:
[0025]
[0026]
[0027] Where D x , D y Represent the diagonal matrices of the Pauli operators X and Y, respectively, and R z (θ) is a single-qubit rotation gate. P represents the Pauli operator X or Y.
[0028] Step (5) optimizes the 2-local Hamiltonian quantum gate based on the order selected in step (4):
[0029] Based on the above method, the 2-local Hamiltonian quantum gate is diagonally decomposed;
[0030] According to the quantum gate list obtained in step (4), the adjacent diagonalized gates are canceled out in sequence.
[0031] After the above optimization method is applied to the 2-local Hamiltonian quantum gates in each layer, every three adjacent 2-local Hamiltonian quantum gates will parallelize the first and third 2-local Hamiltonian quantum gates.
[0032] The first CNOT gate of the 2-local Hamiltonian quantum gate in the first layer of the circuit is canceled out in the following two ways:
[0033] DepthFirst Search (DFS) method: All 2-local Hamiltonian quantum gates in the first layer of the circuit are not operated in parallel, and then the first CNOT gates of all quantum gates are canceled out;
[0034] Edge Coloring method: All 2-local Hamiltonian quantum gates in the first layer of the circuit are first operated in parallel, and then all CNOT gates in the first row are offset.
[0035] Beneficial effects: Compared with existing methods, the present invention uses a greedy algorithm to automatically find the optimal circuit optimization solution, which is applicable to all 2-local Hamiltonian quantum simulation circuits and is not limited by specific quantum hardware. It can significantly shorten the circuit depth, improve the operating efficiency of quantum simulation algorithms, and facilitate the rapid development of quantum simulation algorithms and their applications. Compared with the best quantum circuit optimizer currently available, the present invention can significantly reduce the circuit depth on 2-local Hamiltonian circuits and reduce the number of single-bit quantum gates. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Figure 1 It is a work flow chart of the present invention;
[0037] Figure 2 This is an example diagram of a layer of 2-local Hamiltonian quantum gate in the present invention;
[0038] Figure 3 Schematic diagram of diagonal decomposition of 2-local Hamiltonian quantum gate in the present invention;
[0039] Figure 4 Schematic diagram of the parallel operation of 2-local Hamiltonian quantum gates in the present invention;
[0040] Figure 5 A schematic diagram of a CNOT gate offset operation DFS method for the first layer of the circuit in the present invention;
[0041] Figure 6Schematic diagram of the CNOT gate offset operation Edge Coloring method of the first layer of the circuit in the present invention. DETAILED DESCRIPTION
[0042] The present invention will be further described below in conjunction with the accompanying drawings.
[0043] Figure 1 The figure shows a flow chart of a circuit transformation method of quantum compilation, which includes the following steps:
[0044] (1) Input the initial quantum circuit diagram;
[0045] (2) Group the 2-local Hamiltonian quantum gates in the circuit according to the Pauli operator labels;
[0046] (3) Divide the circuit into layers, and use a greedy algorithm to select the 2-localHamiltonian quantum gate of each layer from the Pauli label group in turn, and add it to the sorted list;
[0047] (4) Based on the selection of the quantum gates in the previous layer, a greedy strategy is used to select the 2-local Hamiltonian quantum gates in the next layer and add them to the sorting list until all quantum gates are selected;
[0048] (5) Optimize the 2-local Hamiltonian quantum gate according to the list sorting scheme;
[0049] (6) Output the optimized quantum circuit.
[0050] Step (2) groups the 2-local Hamiltonian quantum gates using the Pauli operator as a label.
[0051] The Pauli string representation of a 2-local Hamiltonian quantum gate is as follows:
[0052] 9 basic two-bit quantum gates, including: X i X j , X i Y j , X i Z j , Y i Z j , Y i Y j , Y i Z j , Z i X j , Z i Y, Z i Z j . Where X, Y, Z represent Pauli operators, and the subscripts i and j represent the quantum bits that are affected.
[0053] Each 2-local Hamiltonian quantum gate has two Pauli labels, Y i X j For example, the quantum gate contains Y i and X j Two Pauli labels are therefore included in {Y i} and {X j} in both groups.
[0054] The selection of the 2-local Hamiltonian quantum gate in step (3) includes the following steps:
[0055] Layering quantum circuits;
[0056] Select the 2-local Hamiltonian quantum gates of each layer in turn according to the greedy algorithm;
[0057] Add the 2-local Hamiltonian quantum gates of each layer into the sorted list one by one.
[0058] The 2-local Hamiltonian quantum gate selection strategy in step (3) includes the following methods:
[0059] The quantum bits contained in the 2-local Hamiltonian quantum gates of each layer start from the smallest number and end with the largest number, with the best principle being to occupy all the bits;
[0060] Assume that the quantum circuit has 4 qubits and contains 2-local Hamiltonian quantum gates [Z0X1, X0X1, X1Y2, X1X2, Y1X2, Y2X3, X2X3]. The selection of 2-local Hamiltonian quantum gates in each layer should start from q0 and end at q3. The selection of 2-local Hamiltonian quantum gates in one layer is as follows: Figure 2 Shown
[0061] In each layer of adjacent 2-local Hamiltonian quantum gates, the first quantum bit occupied by the latter 2-local Hamiltonian quantum gate is the same as the second quantum bit occupied by the previous 2-local Hamiltonian quantum gate;
[0062] The Pauli operator labels on the same bits of adjacent 2-local Hamiltonian quantum gates in each layer are the same.
[0063] See also Figure 2, the order of the current layer 2-local Hamiltonian quantum gates is Z0X1→X1Y2→Y2X3.
[0064] In step (4), the first 2-local Hamiltonian quantum gate of each layer is selected in lexicographic order. In this example, the order of X0X1 and Z0X1 is used as the first 2-local Hamiltonian quantum gate of the first layer and the first 2-local Hamiltonian quantum gate of the second layer.
[0065] In step (4), the selection of the 2-local Hamiltonian quantum gates at each layer is based on the above strategies and also includes the following methods:
[0066] Each 2-local Hamiltonian quantum gate in the current layer is selected from the quantum gates of the Pauli operator label group in the previous layer;
[0067] In this example, the first layer of 2-local Hamiltonian quantum gates is selected as X0X1→X1X2→X2X3. The Pauli operator label group of this layer includes {X0}, {X1}, {X2}, {X3}. Then the second layer gives priority to selecting 2-local Hamiltonian quantum gates containing X0, X1, X2, and X3 operators. Therefore, the 2-local Hamiltonian quantum gate selected in the second layer is Z0X1→X1Y2→Y2X3.
[0068] Each 2-local Hamiltonian quantum gate in the current layer is selected from the group of Pauli operator labels that contains the most remaining quantum gates.
[0069] In the second layer, the possible options for the second 2-local Hamiltonian quantum gate are X1Y2 and Y1X2, and the remaining quantum gates in the circuit are [X1Y2, Y1X2, Y2X3]. Since there is only one quantum gate [Y1X2] left in the {X2} label group in the circuit, and there are two quantum gates [X1Y2, Y2X3] left in the {Y2} label group, the second 2-local Hamiltonian quantum gate chooses X1Y2.
[0070] The diagonal decomposition of the 2-local Hamiltonian quantum gate in step (5) is as follows:
[0071]
[0072] P is the Pauli operator X, Y. The representation in quantum circuits can be found in Figure 3 .
[0073] Step (5) optimizes the 2-local Hamiltonian quantum gate based on the order selected in step (4):
[0074] Based on the above method, the 2-local Hamiltonian quantum gate is diagonally decomposed. The Pauli Z operator itself is a diagonal matrix and no additional operations are required. The Pauli X and Y operators are diagonally decomposed into the form of the Pauli Z operator multiplied by the diagonal gate. The decomposition form can be seen in Figure 3 .
[0075] According to the quantum gate list obtained in step (4), the adjacent diagonalized gates are canceled out in sequence.
[0076] Adjacent D x and The product is the unit matrix, which can be cancelled. y and Similarly, see Figure 4 The part in the dotted box.
[0077] After the above optimization method, every three adjacent 2-local Hamiltonian quantum gates in each layer will parallelize the first and third 2-local Hamiltonian quantum gates. The parallel quantum gate numbers refer to Figure 4 .
[0078] The first CNOT gate of the 2-local Hamiltonian quantum gate in the first layer of the circuit is canceled out in the following two ways:
[0079] DFS method: All 2-local Hamiltonian quantum gates in the first layer of the circuit are not operated in parallel, and then the first CNOT gates of all quantum gates are all cancelled. In this example, the first layer of quantum gates is X0X1→X1X2→X2X3. After cancellation, see Figure 5 .
[0080] Edge Coloring method: All 2-local Hamiltonian quantum gates in the first layer of the circuit are operated in parallel first, and then all CNOT gates in the first row are offset. In this example, the first layer of quantum gates is X0X1→X1X2→X2X3. After offset, see Figure 6 .
[0081] The present invention uses the best quantum circuit optimizer as a benchmark for comparison, and selects the widely representative one-dimensional Heisenberg model, XY model and random 2-local Hamiltonian quantum circuit for optimization. The Hamiltonian form of the one-dimensional Heisenberg model and the XY model is as follows:
[0082]
[0083] After the quantum circuit optimization algorithm of the present invention is implemented on the above quantum circuit, the experimental results are compared with those before optimization as shown in the following table:
[0084] Table 1 Comparison of quantum circuit optimization results and original circuits
[0085]
[0086] After implementing the quantum circuit optimization algorithm of the present invention on the above quantum circuit, the experimental results compared with the t|ket> optimizer are shown in the following table:
[0087] Table 2 Comparison of quantum circuit optimization results with t|ket> optimizer
[0088]
[0089] After implementing the quantum circuit optimization algorithm of the present invention on the above quantum circuit, the experimental results compared with the Qiskit optimizer are shown in the following table:
[0090] Table 3 Comparison of quantum circuit optimization results with Qiskit optimizer
[0091]
[0092] The above table shows that compared with the best quantum circuit optimizer currently available, the optimization results of the present invention can reduce the number of gates by an average of 1.25x. The Edge Coloring method can reduce the circuit depth by an average of 13.8x, and the DFS method can reduce the circuit depth by an average of 6.5x. For the Heisenberg model and the XY model, the Edge Coloring method can reduce the circuit depth by a maximum of 35.9x, and the DFS method can reduce the circuit depth by a maximum of 10.4x. The effects of the existing quantum circuit optimization methods are limited and cannot optimize the 2-local Hamiltonian quantum circuit well. The method proposed in this article is universal for 2-local Hamiltonian quantum circuits and can find the best circuit optimization solution through a greedy algorithm.
Claims
1. A quantum circuit optimization method based on a greedy algorithm, characterized in that: The steps include: (1) Input the initial quantum circuit diagram; (2) Group the 2-local Hamiltonian quantum gates in the circuit; (3) Divide the circuits into layers, and use a greedy algorithm to select the 2-localHamiltonian quantum gates of each layer from the grouping obtained in step (2) and add them to the sorted list; (4) Based on the selection of the quantum gates in the previous layer, a greedy strategy is used to select the 2-local Hamiltonian quantum gates in the next layer and add them to the sorting list until all quantum gates are selected; (5) Optimize the 2-local Hamiltonian quantum gate according to the list sorting scheme; (6) Outputting the optimized quantum circuit; Step (2) grouping 2-local Hamiltonian quantum gates using Pauli operators as labels; The steps for selecting the 2-local Hamiltonian quantum gate in step (3) are: (31) Layering quantum circuits; (32) Select the 2-local Hamiltonian quantum gate of each layer in turn according to the greedy algorithm; (33) Add the 2-local Hamiltonian quantum gates of each layer into the sorted list in sequence; The 2-local Hamiltonian quantum gate selection strategy in step (32) includes the following methods: (321) The quantum bits contained in each layer of 2-local Hamiltonian quantum gates start from the smallest number and end with the largest number, with the best principle being to occupy all the bits; (322) In each layer of adjacent 2-local Hamiltonian quantum gates, the first quantum bit occupied by the latter 2-local Hamiltonian quantum gate is the same as the second quantum bit occupied by the former 2-local Hamiltonian quantum gate; (323) The Pauli operator labels on the same bits of adjacent 2-local Hamiltonian quantum gates in each layer are the same; The first 2-local Hamiltonian quantum gate of each layer in step (4) is selected in lexicographic order; The selection of the 2-local Hamiltonian quantum gates at each layer in step (4) includes the following methods: (41) Each 2-local Hamiltonian quantum gate in the current layer is selected from the quantum gates of the Pauli operator label group in the previous layer; (42) Each 2-local Hamiltonian quantum gate in the current layer is selected from the Pauli operator label group containing the most remaining quantum gates; Step (5) The method for optimizing the 2-local Hamiltonian quantum gate based on the order selected in step (4) is as follows: (51) Diagonalize the 2-local Hamiltonian quantum gate; (52) cancel out adjacent diagonalized gates in sequence according to the quantum gate list obtained in step (4); The diagonal decomposition of the 2-local Hamiltonian quantum gate in step (51) is in the following form: Where D x , D y Represent the diagonal matrices of the Pauli operators X and Y, respectively, and R z (θ) is a single-qubit rotation gate, and P represents the Pauli operator X or Y.
2. A quantum circuit optimization method based on a greedy algorithm according to claim 1, characterized in that: The following steps are also included: after the 2-local Hamiltonian quantum gates of each layer are optimized, the first and third 2-local Hamiltonian quantum gates are connected in parallel for every three adjacent 2-local Hamiltonian quantum gates.
3. The quantum circuit optimization method based on the greedy algorithm according to claim 1, characterized in that: The first CNOT gate of the 2-local Hamiltonian quantum gate in the first layer of the circuit is offset by the Depth First Search method or the Edge Coloring method.
Citation Information
Patent Citations
Method for optimizing quantum circuit simulation
CN107977541A
Novel universal quantum gate and quantum circuit optimization method
CN108334952A