A method and system for detecting functional failure of insulated gate bipolar transistor

Abstract

The present application relates to a method and system for detecting functional failure of an insulated gate bipolar transistor, which generates a color-enhanced conversion image by acquiring the current actual external image of the current transistor to be detected; if it is determined that the external morphology of the current transistor to be detected has a morphological functional failure, a functional failure indication is generated; if it is determined that the external morphology of the current transistor to be detected does not have a morphological functional failure, after installing the current transistor to be detected in a preset specific position, the current transistor internal structure arrangement data of the current transistor to be detected is obtained; it is determined whether the current transistor to be detected has an internal functional defect, and if it is determined that the current transistor to be detected has an internal functional defect, a functional failure prompt is generated. The present invention greatly improves the detection efficiency and detection accuracy, and greatly meets the user's usage needs.

Description

Technical Field

[0001] The present application relates to the field of transistor detection technology, and in particular to a method and system for detecting functional failure of an insulated gate bipolar transistor. Background Art

[0002] With the advancement of electronic technology, the application of transistors has gradually become popular and tends to be specialized, and the insulated gate bipolar transistor among transistors has gradually been widely used due to its good performance. The insulated gate bipolar transistor (IGBT) combines the advantages of power transistors and power field effect transistors, has good characteristics, and has a wide range of applications; IGBT is also a three-terminal device, and its three terminals include gate, collector and emitter.

[0003] Before the insulated gate bipolar transistor leaves the factory, or after being placed for a long time, or when the transistor is recycled, it is necessary to perform functional testing on the insulated gate bipolar transistor to check whether the detector function fails and whether it can still be used normally. There are various detection methods on the market. For example, the utility model patent with application number CN202121514610.5 discloses an automatic clamping high-frequency low-power transistor production functional detection device, which can protect the breakage rate of the transistor body during detection and reduce the occurrence of inferior products. For example, the utility model patent with application number CN201721356890.5 discloses a multifunctional transistor pin tension tester, which reduces the process of replacing the fixture, is convenient to operate and saves costs. However, the functional detection method based on the above structure still has disadvantages. For example, the above-mentioned functional detection device can protect the transistor during the test, but its detection efficiency is low. For the above-mentioned tester, although there is no need to replace the fixture based on this structure, it is low in test accuracy, so it still cannot meet the test requirements.

[0004] Therefore, although there are many detection methods for insulated gate bipolar transistors on the market, due to the limitations of their functional detection methods, they still cannot meet the needs of functional failure detection. In addition, the methods for functional failure detection of insulated gate bipolar transistors still need further improvement and upgrading to meet the needs of users and improve the efficiency of functional detection. Summary of the invention

[0005] Based on this, it is necessary to provide an insulated gate bipolar transistor functional failure detection method and system that can at least solve the problems of inaccurate detection in electrical testing methods in the prior art and inability to detect whether there is a risk of functional failure in the internal structure, in response to the above technical problems.

[0006] The technical solution of the present invention is as follows:

[0007] A method for detecting functional failure of an insulated gate bipolar transistor, the method comprising:

[0008] Step S100: Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image;

[0009] Step S200: judging whether there is a morphological function failure in the external morphology of the transistor to be tested currently according to the color enhanced conversion image, and generating a function failure indication if it is judged that there is a morphological function failure in the external morphology of the transistor to be tested currently;

[0010] Step S300: if it is determined that the external morphology of the transistor to be detected currently does not have a morphological function failure, after installing the transistor to be detected currently at a preset specific position, obtaining the current transistor internal structure arrangement data of the transistor to be detected currently based on a preset transistor internal structure detection device;

[0011] Step S400: Determine whether the current transistor to be detected has an internal functional defect based on the internal structure arrangement data of the current transistor. If it is determined that the current transistor to be detected has an internal functional defect, generate a functional failure prompt, and transport the current transistor to be detected with the internal functional defect to a functional defect area based on a preset transistor transport mechanism.

[0012] Furthermore, the current actual external image includes an actual image of the external surface and an actual image of the pin connection; the color-enhanced converted image includes an overall enhanced image after the current calibration and an enhanced image of the connection after the current calibration;

[0013] Step S100: Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image, specifically including:

[0014] Step S110: Based on a preset image driving device, the image detection device is driven to perform multi-angle image detection on the transistor to be detected, and an actual image of the outer surface and an actual image of the pin connection are obtained;

[0015] Step S120: comparing the actual image of the outer surface with a preset standard overall image, and extracting the current overall comparison damage point, and at the same time comparing the actual image of the pin connection with the standard pin connection image, and extracting the pin connection damage point;

[0016] Step S130: performing a first color enhancement process on the actual image of the outer surface and generating an overall appearance enhanced image, and performing a first color enhancement process on the actual image of the pin connection and generating a pin connection enhanced image;

[0017] Step S140: extracting damage points in the overall appearance enhanced image and generating enhanced image damage points;

[0018] Step S150: extracting the damaged points in the enhanced image of the pin connection, and generating the enhanced image of the damaged points at the connection;

[0019] Step S160: comparing the current overall comparison damage point with the enhanced image damage point, and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration;

[0020] Step S170: Compare the pin connection damage point with the enhanced image connection damage point, generate a connection determination damage point, calibrate the pin connection enhancement image according to the connection determination damage point, and generate a current calibrated connection enhancement image after calibration.

[0021] Specifically, step S200: judging whether the external morphology of the transistor to be tested currently has a morphological function failure according to the color enhanced conversion image, and generating a function failure indication if the external morphology of the transistor to be tested currently has a morphological function failure; specifically, comprising:

[0022] Step S210: Retrieving the determined overall damage point in the currently calibrated overall enhanced image, and acquiring actual overall damage degree data of the determined overall damage point;

[0023] Step S220: Compare the actual overall damage degree data with a preset standard overall damage sequence table, and generate a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value;

[0024] Step S230: acquiring actual connection damage degree data of the determined overall damage point according to the determined overall damage point in the current calibrated connection enhanced image;

[0025] Step S240: Comparing the actual connection damage degree data with a preset standard connection damage sequence table, and generating a current connection damage degree value, wherein the standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one standard connection damage data corresponds to one standard connection damage degree value, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value;

[0026] Step S250: generating a current external morphology damage value according to the current overall damage degree value and the current connection damage degree value;

[0027] Step S260: determining whether the current external morphology damage value is greater than or equal to a preset standard damage degree value;

[0028] Step S270: If it is determined that the current external morphology damage value is greater than or equal to the standard damage degree value, then it is determined that the external morphology of the current transistor to be detected has a morphological function failure, and a functional failure indication is generated; if it is determined that the current external morphology damage value is less than the standard damage degree value, then it is determined that the external morphology of the current transistor to be detected has no morphological function failure.

[0029] Furthermore, the transistor internal structure detection device includes a detection signal sending module and a detection signal receiving module;

[0030] Step S300: if it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure, then after installing the current transistor to be detected at a preset specific position, obtaining the current transistor internal structure arrangement data of the current transistor to be detected based on a preset transistor internal structure detection device; specifically comprising:

[0031] Step S310: if it is determined that the external morphology of the transistor to be detected currently does not have a morphology function failure, after installing the transistor to be detected currently at a preset specific position, obtaining a starting detection point according to the preset specific position;

[0032] Step S320: generating equally spaced detection points according to the starting detection point and a preset standard interval distance;

[0033] Step S330: Based on the detection signal sending module, starting from the starting detection point, the initial detection signal is sequentially transmitted from the front side of each of the equally spaced detection points toward the equally spaced detection points;

[0034] Step S340: receiving, based on the detection signal receiving module, an initial penetration signal of the initial detection signal after passing through the transistor to be detected currently at the rear side of each of the equally spaced detection points;

[0035] Step S350: obtaining, based on the detection signal sending module, an initial rebound signal after the initial detection signal received by the detection signal sending module rebounds through the metal pin in the transistor to be detected;

[0036] Step S360: generating current transistor internal structure arrangement data of the current transistor to be inspected according to each of the initial penetration signals and each of the initial rebound signals.

[0037] Furthermore, the current transistor internal structure arrangement data includes data of a structure area without pins and data of a structure area with pins;

[0038] Step S400: judging whether the current transistor to be detected has an internal functional defect according to the internal structure arrangement data of the current transistor, and if it is judged that the current transistor to be detected has an internal functional defect, generating a functional failure prompt, and transporting the current transistor to be detected with the internal functional defect to a functional defect area based on a preset transistor transport mechanism; specifically comprising:

[0039] Step S410: respectively obtaining the actual reception time of the initial penetration signal corresponding to the pin-free structure area data, wherein the actual reception time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal receiving module receives the initial penetration signal;

[0040] Step S420: generating an average penetration time according to each of the actual reception time, and screening out the actual reception time whose value difference with the average penetration time is greater than or equal to a preset first standard time difference, and setting it as the current initial structure abnormal point;

[0041] Step S430: respectively obtaining the actual rebound time of the initial penetration signal corresponding to the pin structure area data, wherein the actual rebound time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal sending module receives the initial rebound signal;

[0042] Step S440: generating an average rebound time according to each of the actual rebound time, and screening out the actual rebound time whose value difference with the average rebound time is greater than or equal to a preset second standard time difference, and setting it as the abnormal point at the current initial pin;

[0043] Step S450: determining whether the number of abnormal points in the current initial structure is greater than or equal to a preset first standard abnormal number; if the number of abnormal points in the current initial structure is greater than or equal to the first standard abnormal number, determining that the current transistor to be detected has an internal functional defect, generating a functional failure prompt, and transporting the current transistor to be detected with an internal functional defect to a functional defect area based on a preset transistor transport mechanism;

[0044] Step S460: If it is determined that the number of abnormal points in the current initial structure is less than the first standard abnormal number, then it is determined whether the abnormal points at the current initial pin are greater than or equal to a preset second standard abnormal amount; if it is determined that the abnormal points at the current initial pin are greater than or equal to the second standard abnormal amount, then it is determined that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated, and the current transistor to be detected with an internal functional defect is transported to a functional defect area based on a preset transistor transport mechanism; if it is determined that the abnormal point at the current initial pin is less than the second standard abnormal amount, then a current normal function indication is generated.

[0045] Furthermore, a system for detecting functional failure of an insulated gate bipolar transistor comprises:

[0046] A color enhancement module, used to obtain a current actual external image of the transistor to be detected based on a preset image detection device, perform color enhancement conversion processing on the current actual external image, and generate a color enhanced conversion image;

[0047] a failure indication module, configured to determine whether the external morphology of the transistor to be detected currently has a morphological function failure according to the color enhanced conversion image, and generate a function failure indication if it is determined that the external morphology of the transistor to be detected currently has a morphological function failure;

[0048] A specific position module, for obtaining the current transistor internal structure arrangement data of the current transistor to be detected based on a preset transistor internal structure detection device after installing the current transistor to be detected at a preset specific position if it is determined that the external shape of the current transistor to be detected does not have a shape function failure;

[0049] A function judgment module is used to judge whether the current transistor to be detected has an internal function defect based on the internal structure arrangement data of the current transistor. If it is judged that the current transistor to be detected has an internal function defect, a function failure prompt is generated, and based on a preset transistor transport mechanism, the current transistor to be detected with the internal function defect is transported to a function defect area.

[0050] Furthermore, the current actual external image includes an actual image of the outer surface and an actual image of the pin connection; the color-enhanced conversion image includes an overall enhanced image after current calibration and an enhanced image of the connection after current calibration, and the color enhancement module further includes:

[0051] An image detection module, used to drive the image detection device to perform multi-angle image detection on the transistor to be detected based on a preset image driving device, and obtain an actual image of the outer surface and an actual image of the pin connection;

[0052] A surface image module, used to compare the actual image of the outer surface with a preset standard overall image, and extract the current overall comparison damage point, and at the same time compare the actual image of the pin connection with the standard pin connection image, and extract the pin connection damage point;

[0053] A color enhancement module, used to perform a first color enhancement process on the actual image of the outer surface and generate an overall appearance enhanced image, and to perform a first color enhancement process on the actual image of the pin connection and generate an enhanced image of the pin connection;

[0054] A damage extraction module, used to extract damage points in the overall appearance enhanced image and generate enhanced image damage points;

[0055] An enhanced generation module, used for extracting damage points in the enhanced image of the pin connection and generating enhanced image damage points at the connection;

[0056] A damage point comparison module, used for comparing the current overall comparison damage point with the enhanced image damage point, and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration;

[0057] The damage determination module is used to compare the pin connection damage point with the enhanced image connection damage point and generate a connection determination damage point, calibrate the pin connection enhanced image according to the connection determination damage point, and generate a current calibrated connection enhanced image after calibration.

[0058] Furthermore, the failure indication module is also used for:

[0059] Retrieve the determined overall damage point in the currently calibrated overall enhanced image, and obtain the actual overall damage degree data of the determined overall damage point; compare the actual overall damage degree data with a preset standard overall damage sequence table, and generate a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value; according to the determined overall damage point in the currently calibrated connection enhanced image, obtain the actual connection damage degree data of the determined overall damage point; compare the actual connection damage degree data with a preset standard connection damage sequence table, and generate a current connection damage degree value, wherein the The standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one of the standard connection damage data corresponds to one of the standard connection damage degree values, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value; a current external morphology damage value is generated according to the current overall damage degree value and the current connection damage degree value; it is determined whether the current external morphology damage value is greater than or equal to a preset standard damage degree value; if it is determined that the current external morphology damage value is greater than or equal to the standard damage degree value, it is determined that the external morphology of the current transistor to be detected has a morphological function failure, and a function failure indication is generated; if it is determined that the current external morphology damage value is less than the standard damage degree value, it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure.

[0060] Furthermore, a computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above-mentioned insulated gate bipolar transistor functional failure detection method when executing the computer program.

[0061] Furthermore, a computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above-mentioned insulated gate bipolar transistor functional failure detection method are implemented.

[0062] The technical effects achieved by the present invention are as follows:

[0063] The above-mentioned insulated gate bipolar transistor functional failure detection method and system, in turn, obtains the current actual external image of the current transistor to be detected through a preset image detection device, and performs color enhancement conversion processing on the current actual external image to generate a color enhanced conversion image; judges whether the external morphology of the current transistor to be detected has morphological functional failure according to the color enhanced conversion image, and if it is judged that the external morphology of the current transistor to be detected has morphological functional failure, a functional failure indication is generated; if it is judged that the external morphology of the current transistor to be detected does not have morphological functional failure, after installing the current transistor to be detected at a preset specific position, the current transistor internal structure arrangement data of the current transistor to be detected is obtained based on a preset transistor internal structure detection device; judges whether the current transistor to be detected has an internal functional defect according to the current transistor internal structure arrangement data, and if it is judged that the current transistor to be detected has an internal functional defect, a functional failure prompt is generated, and the current transistor to be detected with an internal functional defect is transported to the functional defect area based on a preset transistor transport mechanism, thereby greatly improving the detection efficiency and detection accuracy, and greatly meeting the user's usage needs. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 It is an application scenario diagram of a method for detecting functional failure of an insulated gate bipolar transistor in one embodiment;

[0065] Figure 2 A schematic diagram of a flow chart of a method for detecting functional failure of an insulated gate bipolar transistor in one embodiment;

[0066] Figure 3 A schematic diagram of a signal flow simulation state in which a detection signal sending module and a detection signal receiving module send an initial detection signal in one embodiment;

[0067] Figure 4 A structural block diagram of an insulated gate bipolar transistor functional failure detection system in one embodiment;

[0068] Figure 5 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0069] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0070] In one embodiment, Figure 1As shown, an application scenario of the insulated gate bipolar transistor functional failure detection method is provided, and the application scenario includes an embedded terminal device, an image driving device, an image detection device and a transistor transport mechanism, wherein the image driving device, the image detection device and the transistor transport mechanism are all connected to the embedded terminal device for communication. Figure 1 The reference numeral 101 indicates a preset specific position for placing the transistor to be tested.

[0071] Furthermore, the embedded terminal device is used to obtain the current actual external image of the transistor to be detected based on a preset image detection device, and perform color enhancement conversion processing on the current actual external image to generate a color enhanced conversion image; then, based on the color enhanced conversion image, it is judged whether the external morphology of the transistor to be detected currently has a morphological function failure, and if it is judged that the external morphology of the transistor to be detected currently has a morphological function failure, a function failure indication is generated; then, if it is judged that the external morphology of the transistor to be detected currently has a morphological function failure, after installing the transistor to be detected currently at a preset specific position, the current transistor internal structure arrangement data of the transistor to be detected currently is obtained based on a preset transistor internal structure detection device; finally, based on the current transistor internal structure arrangement data, it is judged whether the transistor to be detected currently has an internal functional defect, and if it is judged that the transistor to be detected currently has an internal functional defect, a function failure prompt is generated, and based on a preset transistor transport mechanism, the transistor to be detected currently with an internal functional defect is transported to a functional defect area.

[0072] The embedded terminal device includes but is not limited to a laptop computer, a smart phone, a tablet computer, a portable wearable device, etc. The image driving device and the transistor handling mechanism both use a manipulator. The image detection device is specifically a CCD camera of model M266540.

[0073] In one embodiment, Figure 2 As shown, a method for detecting functional failure of an insulated gate bipolar transistor is provided, the method comprising:

[0074] Step S100: Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image;

[0075] Step S200: judging whether there is a morphological function failure in the external morphology of the transistor to be tested currently according to the color enhanced conversion image, and generating a function failure indication if it is judged that there is a morphological function failure in the external morphology of the transistor to be tested currently;

[0076] Step S300: if it is determined that the external morphology of the transistor to be detected currently does not have a morphological function failure, after installing the transistor to be detected currently at a preset specific position, obtaining the current transistor internal structure arrangement data of the transistor to be detected currently based on a preset transistor internal structure detection device;

[0077] Step S400: Determine whether the current transistor to be detected has an internal functional defect based on the internal structure arrangement data of the current transistor. If it is determined that the current transistor to be detected has an internal functional defect, generate a functional failure prompt, and transport the current transistor to be detected with the internal functional defect to a functional defect area based on a preset transistor transport mechanism.

[0078] Furthermore, the present invention first obtains the current actual external image, and then detects defect points in order to achieve accurate functional detection, and then performs color enhancement conversion processing on the current actual external image to generate a color enhanced conversion image, and then first detects the external functional morphology, specifically, judging whether there is a morphological functional failure in the external morphology of the current transistor to be detected based on the color enhanced conversion image, and if it is judged that there is a morphological functional failure in the external morphology of the current transistor to be detected, a functional failure indication is generated, and the first functional judgment is made at this time, that is, the judgment of the morphological functional failure, and then, in order to achieve a more accurate judgment and to judge whether an internal functional failure occurs or may occur, after the current transistor to be detected is installed in a preset specific position, based on The preset transistor internal structure detection device obtains the current transistor internal structure arrangement data of the current transistor to be detected, and then determines whether the current transistor to be detected has an internal functional defect based on the current transistor internal structure arrangement data. If it is determined that the current transistor to be detected has an internal functional defect, a functional failure prompt is generated, and based on the preset transistor transport mechanism, the current transistor to be detected with the internal functional defect is transported to the functional defect area, thereby realizing the judgment of functional failure or possible functional failure risk through the current transistor internal structure arrangement data. Compared with the electrical testing method in the prior art, it overcomes the disadvantage that the electrical testing method cannot detect whether the internal structure has the risk of functional failure, greatly improves the detection efficiency and detection accuracy, and greatly meets the user's usage needs.

[0079] In one embodiment, the current actual external image includes an actual image of the external surface and an actual image of the pin connection; the color-enhanced converted image includes an overall enhanced image after current calibration and an enhanced image of the connection after current calibration;

[0080] Step S100: Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image, specifically including:

[0081] Step S110: Based on a preset image driving device, the image detection device is driven to perform multi-angle image detection on the transistor to be detected, and an actual image of the outer surface and an actual image of the pin connection are obtained;

[0082] In order to accurately detect the external functional form, it is necessary to obtain images at multiple angles. Therefore, the image driving device drives the image detection device to perform multi-angle detection.

[0083] The actual image of the outer surface includes but is not limited to the front image and the side image of the transistor to be tested. The actual image of the pin connection includes but is not limited to the connection between the pin and the body of the transistor to be tested.

[0084] Step S120: comparing the actual image of the outer surface with a preset standard overall image, and extracting the current overall comparison damage point, and at the same time comparing the actual image of the pin connection with the standard pin connection image, and extracting the pin connection damage point;

[0085] The standard overall image is pre-set and stored, specifically, the exterior of a transistor without defects is photographed to achieve accurate comparison. The standard pin connection image is obtained by photographing the pin connection of a transistor without defects, and then the pin connection damage point is extracted through comparison.

[0086] Step S130: performing a first color enhancement process on the actual image of the outer surface and generating an overall appearance enhanced image, and performing a first color enhancement process on the actual image of the pin connection and generating a pin connection enhanced image;

[0087] Among them, the first color enhancement processing is to perform color highlighting processing on the actual image of the outer surface, specifically to perform white image protrusion processing. If there is dust on the transistor to be detected, there will be a color difference between it and the main body of the transistor to be detected. Then, through color highlighting processing, the white color is highlighted, thereby achieving the generated enhanced image of the pin connection and the defect points on the overall appearance enhanced image more distinguishable and distinguishable.

[0088] Furthermore, for example, if there are concave points or pits in the transistor to be tested, due to lighting reasons, the color of the concave points will be different from the surrounding colors when the image is collected. In this way, different colors can be highlighted one by one until the color of the concave points is different from that of other areas, thereby facilitating the subsequent improvement of the accuracy of detecting the concave points as defective points.

[0089] Different from the prior art, in this step, color enhancement processing is used to achieve more accurate screening and highlighting of defects or damage points, thereby improving the accuracy and reliability of external functional failure detection.

[0090] Step S140: extracting damage points in the overall appearance enhanced image and generating enhanced image damage points;

[0091] Step S150: extracting the damaged points in the enhanced image of the pin connection, and generating the enhanced image of the damaged points at the connection;

[0092] In order to achieve accurate defect point comparison later, enhanced image damage points and enhanced image connection damage points are generated.

[0093] Step S160: comparing the current overall comparison damage point with the enhanced image damage point, and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration;

[0094] In this step, by comparing the current overall comparison damage point with the enhanced image damage point, when the current overall comparison damage point and the enhanced image damage point exist at the same position, it means that the damage point here is the determined existing damage point, that is, the determined overall damage point is generated, and then the overall appearance enhanced image is calibrated to generate the current calibrated overall enhanced image.

[0095] Further, if the current overall comparison damage points are P1 coordinates, P2 coordinates and P3 coordinates, and the enhanced image damage points are P1 coordinates, P2 coordinates and Q1 coordinates, then the same are P1 coordinates and P2 coordinates, so the determined overall damage points are the P1 coordinates and P2 coordinates, and then, the overall appearance enhanced image is calibrated, and the fixed damage points in the current calibrated overall enhanced image are the P1 coordinates and P2 coordinates.

[0096] Furthermore, the coordinates of the current overall comparison damage point and the enhanced image damage point, that is, where they are distributed on the current transistor to be detected, take the preset inflection point of the preset specific position as the coordinate origin, and select the X-axis and Y-axis to form a coordinate system, thereby realizing the positioning and coordinate acquisition of the current overall comparison damage point and the enhanced image damage point, thereby realizing accurate positioning and obtaining of the damage point.

[0097] Step S170: Compare the pin connection damage point with the enhanced image connection damage point, generate a connection determination damage point, calibrate the pin connection enhancement image according to the connection determination damage point, and generate a current calibrated connection enhancement image after calibration.

[0098] Similarly, by comparing the pin connection damage point with the enhanced image connection damage point, a connection determination damage point is generated, and then calibration is performed to generate the current calibrated connection enhancement image.

[0099] Furthermore, in this embodiment, in order to improve the accuracy of external function detection, the image detection device is driven by a preset image driving device to perform multi-angle image detection on the current transistor to be detected, and the actual image of the outer surface and the actual image of the pin connection are obtained; then, the actual image of the outer surface is compared with the preset standard overall image, and the current overall comparison damage points are extracted, and the actual image of the pin connection is compared with the standard pin connection image, and the pin connection damage points are extracted; then, the actual image of the outer surface is subjected to a first color enhancement processing, and an overall appearance enhanced image is generated, and the actual image of the pin connection is subjected to a first color enhancement processing, and an enhanced image of the pin connection is generated; then, the damage points in the overall appearance enhanced image are extracted, and enhanced image damage points are generated. ; Next, extract the damage points in the enhanced image of the pin connection, and generate the damage points of the enhanced image connection; then, in order to improve the accuracy, compare the current overall comparison damage points with the enhanced image damage points, and generate the determined overall damage points, calibrate the overall appearance enhanced image according to the determined overall damage points, and generate the current calibrated overall enhanced image after calibration; finally, compare the pin connection damage points with the enhanced image connection damage points, and generate the determined damage points of the connection, calibrate the pin connection enhanced image according to the determined damage points of the connection, and generate the current calibrated connection enhanced image after calibration, thereby realizing accurate external function detection. Compared with the appearance detection only in the prior art, the present invention further improves the accuracy and reliability of detection through color enhancement processing.

[0100] In one embodiment, step S200: judging whether there is a morphological function failure in the external morphology of the current transistor to be detected according to the color enhanced conversion image, and generating a function failure indication if it is judged that there is a morphological function failure in the external morphology of the current transistor to be detected; specifically comprising:

[0101] Step S210: Retrieving the determined overall damage point in the currently calibrated overall enhanced image, and acquiring actual overall damage degree data of the determined overall damage point;

[0102] The actual overall damage degree data is parameters such as the damage size, damage depth, and damage area of ​​the determined overall damage point. That is, the actual overall damage degree data is specific data that characterizes the damage condition of the determined overall damage point.

[0103] Step S220: Compare the actual overall damage degree data with a preset standard overall damage sequence table, and generate a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value;

[0104] In this step, the standard overall damage sequence table is pre-set, and then the actual overall damage degree data is compared with the standard overall damage data in the standard overall damage sequence table one by one, until the standard overall damage data matching the actual overall damage degree data is found, and the standard overall damage degree value corresponding to the standard overall damage data is the current overall damage degree value.

[0105] Furthermore, there are two ways to determine whether the standard overall damage data matches the actual overall damage degree data. One is that the standard overall damage data is exactly the same as the actual overall damage degree data. The second is that the data difference between the standard overall damage data and the actual overall damage degree data is a preset standard deviation, and the preset standard deviation is pre-set.

[0106] Step S230: acquiring actual connection damage degree data of the determined overall damage point according to the determined overall damage point in the current calibrated connection enhanced image;

[0107] Similarly, the actual connection damage degree data includes but is not limited to the damaged area, damaged size and damaged range.

[0108] Step S240: Comparing the actual connection damage degree data with a preset standard connection damage sequence table, and generating a current connection damage degree value, wherein the standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one standard connection damage data corresponds to one standard connection damage degree value, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value;

[0109] Step S250: generating a current external morphology damage value according to the current overall damage degree value and the current connection damage degree value;

[0110] Step S260: determining whether the current external morphology damage value is greater than or equal to a preset standard damage degree value;

[0111] Furthermore, the current external morphology damage value is generated by adding the current overall damage degree value and the current connection damage degree value.

[0112] Then, by presetting the standard damage degree value, subsequent accurate data comparison can be achieved.

[0113] Step S270: If it is determined that the current external morphology damage value is greater than or equal to the standard damage degree value, then it is determined that the external morphology of the current transistor to be detected has a morphological function failure, and a functional failure indication is generated; if it is determined that the current external morphology damage value is less than the standard damage degree value, then it is determined that the external morphology of the current transistor to be detected has no morphological function failure.

[0114] Further, when it is judged that the current external morphology damage value is greater than or equal to the standard damage degree value, it indicates that the damage degree is serious at this time and has affected or may affect the external morphology function, so a functional failure indication is generated; if it is judged that the current external morphology damage value is less than the standard damage degree value, it is judged that the external morphology of the current transistor to be tested does not have a morphology function failure.

[0115] Furthermore, unlike the prior art, this step accurately utilizes test data to determine whether a function fails, thereby achieving more accurate detection.

[0116] In one embodiment, Figure 3 Said transistor internal structure detection device comprises a detection signal sending module and a detection signal receiving module;

[0117] Step S300: if it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure, then after installing the current transistor to be detected at a preset specific position, obtaining the current transistor internal structure arrangement data of the current transistor to be detected based on a preset transistor internal structure detection device; specifically comprising:

[0118] Step S310: if it is determined that the external morphology of the transistor to be detected currently does not have a morphology function failure, after installing the transistor to be detected currently at a preset specific position, obtaining a starting detection point according to the preset specific position;

[0119] In this embodiment, Figure 3 As shown, the preset specific position corresponds to the starting detection point, that is, after obtaining the preset specific position, the starting detection point can be obtained. In this step, the starting detection point is point a1.

[0120] Then, by setting the preset specific position, the starting detection point is further limited. This eliminates the need to define the starting detection point separately. The preset specific position is used as a reference point, and after the current transistor to be detected is placed in the preset specific position, the starting detection point can be obtained immediately, thereby improving detection efficiency.

[0121] Step S320: generating equally spaced detection points according to the starting detection point and a preset standard interval distance;

[0122] like Figure 3 As shown, the standard interval distance is preset, and then the equally spaced detection points can be generated based on the standard interval distance and the starting detection point.

[0123] Figure 3 , a1, a2, a3, a4, a5, a6, a7, a8, a9 and a10 are respectively the equally spaced detection points.

[0124] Step S330: Based on the detection signal sending module, starting from the starting detection point, the initial detection signal is sequentially transmitted from the front side of each of the equally spaced detection points toward the equally spaced detection points;

[0125] Step S340: receiving, based on the detection signal receiving module, an initial penetration signal of the initial detection signal after passing through the transistor to be detected currently at the rear side of each of the equally spaced detection points;

[0126] Step S350: obtaining, based on the detection signal sending module, an initial rebound signal after the initial detection signal received by the detection signal sending module rebounds through the metal pin in the transistor to be detected;

[0127] In this step, the front side of each of the equally spaced detection points is the installation side of the detection signal sending module, and the rear side of each of the equally spaced detection points is Figure 3 The installation side of the detection signal receiving module described in.

[0128] Starting from the starting detection point a1, at each of the equally spaced detection points a2, a3, a4, a5, a6, a7, a8, a9 and a10, the detection signal sending module sends an initial detection signal to the transistor to be detected currently. Figure 3 , A1, A2, A3, A4, A5, A6, A7, A8, A9 and A10 are initial detection signals transmitted at equally spaced detection points a1, a2, a3, a4, a5, a6, a7, a8, a9 and a10 respectively.

[0129] Further, B1, B2, B3, B4, B5 and B6 are initial penetration signals of initial detection signals A1, A2, A3, A4, A5 and A6 after passing through the transistor to be detected. B7, B8, B9 and B10 are initial rebound signals of initial detection signals A7, A8, A9 and A10 after passing through the transistor to be detected.

[0130] Figure 3 The reference numeral 102 is the transistor to be detected currently.

[0131] Step S360: generating current transistor internal structure arrangement data of the current transistor to be inspected according to each of the initial penetration signals and each of the initial rebound signals.

[0132] In this embodiment, after obtaining the initial penetration signal and the initial rebound signal, it is possible to obtain which areas of the current transistor to be detected have metal distribution and which areas have no metal distribution, and then obtain the internal structure arrangement data of the current transistor, that is, the internal structure arrangement data of the current transistor is detected by signal detection. The internal structure arrangement data of the current transistor is the distribution data of the metal pins inside the current transistor to be tested.

[0133] In this embodiment, the detection signal sending module and the detection signal receiving module are both millimeter wave radars. When the electromagnetic waves sent by the millimeter wave radar encounter metal, the electromagnetic waves will rebound, that is, they will rebound when they encounter the internal pins of the insulated gate bipolar transistor.

[0134] When the electromagnetic wave encounters other parts of the transistor to be detected, it will penetrate a part of it. Although there is a huge loss, there is still a part that can penetrate, so it is used for detection.

[0135] Of course, the above-mentioned millimeter wave radar is only an example. In the actual production and application process, the selection and setting of the detection signal sending module and the detection signal receiving module should be selected by those skilled in the art to realize the functions required in this step, thereby realizing the detection function. That is, not limited to the above-mentioned millimeter wave radar, the specific models or sensors of the detection signal sending module and the detection signal receiving module are set as needed, and the present invention does not make specific limitations.

[0136] Therefore, by utilizing the electromagnetic radiation sent by the millimeter-wave radar and the rebound of the metal, the internal structure distribution of the metal tube to be detected is carried out, that is, the area inside which the metal pins of the metal tube to be detected extend is known, thereby facilitating subsequent detection.

[0137] In the present invention, by setting up a millimeter-wave radar, there is no need to perform electrical testing. Compared with the disadvantages of power consumption and inconvenient operation in the electrical testing scheme in the prior art, the present invention can set multiple preset specific positions at the same time, thereby realizing multi-station detection, thereby achieving efficient and convenient testing.

[0138] In one embodiment, the current transistor internal structure arrangement data includes non-pin structure area data and pin structure area data;

[0139] like Figure 3 As shown, the X1 area is the pin-free structure area, and the data generated according to the initial penetration signals B1, B2, B3, B4, B5 and B6 are the data of the pin-free structure area. Similarly, the X2 area is the data of the pin-within structure area. The data generated according to the initial rebound signals B7, B8, B9 and B10 are the data of the pin-within structure area.

[0140] Step S400: judging whether the current transistor to be detected has an internal functional defect according to the internal structure arrangement data of the current transistor, and if it is judged that the current transistor to be detected has an internal functional defect, generating a functional failure prompt, and transporting the current transistor to be detected with the internal functional defect to a functional defect area based on a preset transistor transport mechanism; specifically comprising:

[0141] Step S410: respectively obtaining the actual reception time of the initial penetration signal corresponding to the pin-free structure area data, wherein the actual reception time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal receiving module receives the initial penetration signal;

[0142] In this embodiment, Figure 3As shown, the actual reception time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal receiving module receives the initial penetration signal. One initial penetration signal corresponds to one initial detection signal, and one initial detection signal corresponds to one actual reception time. Specifically, each actual reception time is the time from when the initial detection signals A1, A2, A3, A4, A5 and A6 are sent to when the initial penetration signals B1, B2, B3, B4, B5 and B6 are received.

[0143] Step S420: generating an average penetration time according to each of the actual reception time, and screening out the actual reception time whose value difference with the average penetration time is greater than or equal to a preset first standard time difference, and setting it as the current initial structure abnormal point;

[0144] In this embodiment, the average time consumption is generated based on each of the actual reception time consumptions. The average penetration time consumption is used to characterize the time required for the millimeter wave to penetrate the normal area of ​​the transistor to be detected. If the difference between the value of the average penetration time consumption and the average penetration time consumption is greater than or equal to the preset first standard time difference, it means that bubbles may appear at this point, causing air to appear inside it, or it has other impurities that cause it to consume too much time. At this time, the equally spaced detection points corresponding to the actual reception time consumption time consumption that differs from the average penetration time consumption by a value greater than or equal to the preset first standard time difference are the current initial structural abnormality points.

[0145] Step S430: respectively obtaining the actual rebound time of the initial penetration signal corresponding to the pin structure area data, wherein the actual rebound time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal sending module receives the initial rebound signal;

[0146] In this embodiment, the actual bounce time is the time taken from the transmission of A7, A8, A9 and A10 to the reception of the initial bounce signals B7, B8, B9 and B10. The initial penetration signals A7, A8, A9 and A10 correspond to one actual bounce time respectively.

[0147] Step S440: generating an average rebound time according to each of the actual rebound time, and screening out the actual rebound time whose value difference with the average rebound time is greater than or equal to a preset second standard time difference, and setting it as the abnormal point at the current initial pin;

[0148] In this embodiment, similarly, the average rebound time is used to characterize the rebound time of the normal area. If the difference between the average rebound time and the value is greater than or equal to the preset second standard time difference, it means that there are bubbles or other impurities near the pins at the corresponding point or area, and these other impurities or bubbles are the causes of functional failure or possible failure, and all need to be filtered out.

[0149] Furthermore, the first standard time difference and the second standard time difference are both preset.

[0150] Step S450: determining whether the number of abnormal points in the current initial structure is greater than or equal to a preset first standard abnormal number; if the number of abnormal points in the current initial structure is greater than or equal to the first standard abnormal number, determining that the current transistor to be detected has an internal functional defect, generating a functional failure prompt, and transporting the current transistor to be detected with an internal functional defect to a functional defect area based on a preset transistor transport mechanism;

[0151] In this step, the first standard abnormal number is preset. If it is determined that the number of abnormal points in the current initial structure is greater than or equal to the first standard abnormal number, it is determined that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated.

[0152] Step S460: If it is determined that the number of abnormal points in the current initial structure is less than the first standard abnormal number, then it is determined whether the abnormal points at the current initial pin are greater than or equal to a preset second standard abnormal amount; if it is determined that the abnormal points at the current initial pin are greater than or equal to the second standard abnormal amount, then it is determined that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated, and the current transistor to be detected with an internal functional defect is transported to a functional defect area based on a preset transistor transport mechanism; if it is determined that the abnormal point at the current initial pin is less than the second standard abnormal amount, then a current normal function indication is generated.

[0153] Furthermore, in this step, the second standard abnormal amount is preset and used to determine whether there is a functional failure. By determining whether the abnormal point at the current initial pin is greater than or equal to the preset second standard abnormal amount, if it is determined that the abnormal point at the current initial pin is greater than or equal to the second standard abnormal amount, it is determined that the current transistor to be detected has an internal functional defect, that is, regardless of whether the number of abnormal points in the current initial structure exceeds the standard or the abnormal point at the current initial pin exceeds the standard, it is determined to be a functional failure, thus achieving multi-angle and multi-directional accurate determination.

[0154] On the other hand, the values ​​of the first standard abnormal amount and the second standard abnormal amount may be the same or different, which is preset by those skilled in the art.

[0155] Therefore, the present invention determines whether there is a function failure, or whether there is a possibility of a function failure, based on the number of abnormal points in the current initial structure and the number of abnormal points at the current initial pins, thereby ensuring that the products that have been tested are of stable quality and there is no possibility of subsequent function failure, thereby greatly improving the efficiency of function failure detection. Compared with the short-term test results brought by the electrical testing method in the prior art, which cannot detect the possible risks caused by defects in its internal structure, the present invention can be more precise and can achieve high-quality and high-accuracy detection, thereby greatly meeting the user's usage needs.

[0156] In one embodiment, Figure 4 As shown, a system for detecting functional failure of an insulated gate bipolar transistor is provided, the system comprising:

[0157] A color enhancement module, used to obtain a current actual external image of the transistor to be detected based on a preset image detection device, perform color enhancement conversion processing on the current actual external image, and generate a color enhanced conversion image;

[0158] a failure indication module, configured to determine whether the external morphology of the transistor to be detected currently has a morphological function failure according to the color enhanced conversion image, and generate a function failure indication if it is determined that the external morphology of the transistor to be detected currently has a morphological function failure;

[0159] A specific position module, for obtaining the current transistor internal structure arrangement data of the current transistor to be detected based on a preset transistor internal structure detection device after installing the current transistor to be detected at a preset specific position if it is determined that the external shape of the current transistor to be detected does not have a shape function failure;

[0160] A function judgment module is used to judge whether the current transistor to be detected has an internal function defect based on the internal structure arrangement data of the current transistor. If it is judged that the current transistor to be detected has an internal function defect, a function failure prompt is generated, and based on a preset transistor transport mechanism, the current transistor to be detected with the internal function defect is transported to a function defect area.

[0161] In one embodiment, the current actual external image includes an actual image of the outer surface and an actual image of the pin connection; the color-enhanced converted image includes a current calibrated overall enhanced image and a current calibrated connection enhanced image, and the color enhancement module further includes:

[0162] An image detection module, used to drive the image detection device to perform multi-angle image detection on the transistor to be detected based on a preset image driving device, and obtain an actual image of the outer surface and an actual image of the pin connection;

[0163] A surface image module, used to compare the actual image of the outer surface with a preset standard overall image, and extract the current overall comparison damage point, and at the same time compare the actual image of the pin connection with the standard pin connection image, and extract the pin connection damage point;

[0164] A color enhancement module, used to perform a first color enhancement process on the actual image of the outer surface and generate an overall appearance enhanced image, and to perform a first color enhancement process on the actual image of the pin connection and generate an enhanced image of the pin connection;

[0165] A damage extraction module, used to extract damage points in the overall appearance enhanced image and generate enhanced image damage points;

[0166] An enhanced generation module, used for extracting damage points in the enhanced image of the pin connection and generating enhanced image damage points at the connection;

[0167] A damage point comparison module, used for comparing the current overall comparison damage point with the enhanced image damage point, and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration;

[0168] The damage determination module is used to compare the pin connection damage point with the enhanced image connection damage point and generate a connection determination damage point, calibrate the pin connection enhanced image according to the connection determination damage point, and generate a current calibrated connection enhanced image after calibration.

[0169] In one embodiment, the failure indication module is further configured to:

[0170] Retrieve the determined overall damage point in the currently calibrated overall enhanced image, and obtain the actual overall damage degree data of the determined overall damage point; compare the actual overall damage degree data with a preset standard overall damage sequence table, and generate a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value; according to the determined overall damage point in the currently calibrated connection enhanced image, obtain the actual connection damage degree data of the determined overall damage point; compare the actual connection damage degree data with a preset standard connection damage sequence table, and generate a current connection damage degree value, wherein the The standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one of the standard connection damage data corresponds to one of the standard connection damage degree values, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value; a current external morphology damage value is generated according to the current overall damage degree value and the current connection damage degree value; it is determined whether the current external morphology damage value is greater than or equal to a preset standard damage degree value; if it is determined that the current external morphology damage value is greater than or equal to the standard damage degree value, it is determined that the external morphology of the current transistor to be detected has a morphological function failure, and a function failure indication is generated; if it is determined that the current external morphology damage value is less than the standard damage degree value, it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure.

[0171] In one embodiment, the specific position module is also used for: if it is determined that there is no morphological function failure in the external morphology of the current transistor to be detected, then after the current transistor to be detected is installed in a preset specific position, obtaining a starting detection point according to the preset specific position; generating equally spaced detection points according to the starting detection point and a preset standard spacing distance; based on the detection signal sending module, starting from the starting detection point, transmitting an initial detection signal in sequence from the front side of each of the equally spaced detection points toward the equally spaced detection points; based on the detection signal receiving module, receiving an initial penetration signal after the initial detection signal passes through the current transistor to be detected at the rear side of each of the equally spaced detection points; based on the detection signal sending module, obtaining an initial rebound signal after the initial detection signal received by the detection signal sending module bounces off the metal pin in the current transistor to be detected; and generating the current transistor internal structure arrangement data of the current transistor to be detected according to each of the initial penetration signals and each of the initial rebound signals.

[0172] In one embodiment, the function judgment module is also used to: respectively obtain the actual reception time of the initial penetration signal corresponding to the pin-free structure area data, wherein the actual reception time is the time from the detection signal sending module sending the initial detection signal to the detection signal receiving module receiving the initial penetration signal; generate an average penetration time according to each of the actual reception times, and filter out the actual reception time whose value difference with the average penetration time is greater than or equal to a preset first standard time difference, and set it as the current initial structure abnormal point; respectively obtain the actual rebound time of the initial penetration signal corresponding to the pin-with structure area data, wherein the actual rebound time is the time from the detection signal sending module sending the initial detection signal to the detection signal sending module receiving the initial rebound signal; generate an average rebound time according to each of the actual rebound times, and filter out the actual rebound time whose value difference with the average rebound time is greater than or equal to a preset second standard time difference. time, and set it as the abnormal point at the current initial pin; judge whether the number of abnormal points in the current initial structure is greater than or equal to a preset first standard abnormal number. If it is judged that the number of abnormal points in the current initial structure is greater than or equal to the first standard abnormal number, it is judged that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated. Based on the preset transistor transport mechanism, the current transistor to be detected with an internal functional defect is transported to a functional defect area; if it is judged that the number of abnormal points in the current initial structure is less than the first standard abnormal number, it is judged whether the abnormal point at the current initial pin is greater than or equal to a preset second standard abnormal amount. If it is judged that the abnormal point at the current initial pin is greater than or equal to the second standard abnormal amount, it is judged that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated. Based on the preset transistor transport mechanism, the current transistor to be detected with an internal functional defect is transported to a functional defect area; if it is judged that the abnormal point at the current initial pin is less than the second standard abnormal amount, a current normal function indication is generated.

[0173] In one embodiment, Figure 5 As shown, a computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps described in the above-mentioned insulated gate bipolar transistor functional failure detection method when executing the computer program.

[0174] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the above-mentioned insulated gate bipolar transistor functional failure detection method.

[0175] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0176] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0177] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for detecting functional failure of an insulated gate bipolar transistor, characterized in that: The method comprises: Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image; Determining whether there is a morphological function failure in the external morphology of the transistor to be detected according to the color enhanced conversion image, and generating a function failure indication if it is determined that there is a morphological function failure in the external morphology of the transistor to be detected; If it is determined that the external morphology of the transistor to be detected currently does not have a morphological function failure, after installing the transistor to be detected currently at a preset specific position, obtaining the current transistor internal structure arrangement data of the transistor to be detected currently based on a preset transistor internal structure detection device; Determine whether the transistor to be detected currently has an internal functional defect according to the internal structure arrangement data of the current transistor; if it is determined that the transistor to be detected currently has an internal functional defect, generate a functional failure prompt, and transport the transistor to be detected currently with the internal functional defect to a functional defect area based on a preset transistor transport mechanism; The current actual external image includes an actual image of the external surface and an actual image of the pin connection; the color enhanced conversion image includes an overall enhanced image after the current calibration and an enhanced image of the connection after the current calibration; Based on a preset image detection device, a current actual external image of the transistor to be detected is obtained, and a color enhancement conversion process is performed on the current actual external image to generate a color enhancement conversion image, specifically including: Based on a preset image driving device, the image detection device is driven to perform multi-angle image detection on the transistor to be detected, and an actual image of the outer surface and an actual image of the pin connection are obtained; Compare the actual image of the outer surface with a preset standard overall image, and extract the current overall comparison damage point, and compare the actual image of the pin connection with a standard pin connection image, and extract the pin connection damage point; Performing a first color enhancement process on the actual image of the outer surface and generating an overall appearance enhanced image, and performing a first color enhancement process on the actual image of the pin connection and generating a pin connection enhanced image; Extracting damaged points in the overall appearance enhanced image and generating enhanced image damaged points; Extracting the damaged points in the enhanced image of the pin connection and generating the enhanced image of the damaged points at the connection; Comparing the current overall comparison damage point with the enhanced image damage point and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration; Comparing the pin connection damage point with the enhanced image connection damage point, and generating a connection determination damage point, calibrating the pin connection enhancement image according to the connection determination damage point, and generating a current calibrated connection enhancement image after calibration; The transistor internal structure detection device comprises a detection signal sending module and a detection signal receiving module; If it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure, after the current transistor to be detected is installed at a preset specific position, the current transistor internal structure arrangement data of the current transistor to be detected is obtained based on a preset transistor internal structure detection device; specifically including: If it is determined that the external morphology of the transistor to be detected currently does not have a morphology function failure, after installing the transistor to be detected currently at a preset specific position, obtaining a starting detection point according to the preset specific position; Generating equally spaced detection points according to the starting detection point and a preset standard interval distance; Based on the detection signal sending module, starting from the starting detection point, the initial detection signal is sequentially emitted from the front side of each of the equally spaced detection points toward the equally spaced detection points; Based on the detection signal receiving module, an initial penetration signal of the initial detection signal after passing through the transistor to be detected is received at the rear side of each of the equally spaced detection points; Acquiring, based on the detection signal sending module, an initial rebound signal after the initial detection signal received by the detection signal sending module rebounds through the metal pin in the transistor to be detected; The current transistor internal structure arrangement data of the current transistor to be detected is generated according to each of the initial penetration signals and each of the initial rebound signals.

2. The method for detecting functional failure of an insulated gate bipolar transistor according to claim 1, characterized in that: Determining whether there is a morphological function failure in the external morphology of the current transistor to be detected according to the color enhanced conversion image, and generating a function failure indication if it is determined that there is a morphological function failure in the external morphology of the current transistor to be detected; specifically comprising: Retrieving a determined overall damage point in the currently calibrated overall enhanced image, and acquiring actual overall damage degree data of the determined overall damage point; Comparing the actual overall damage degree data with a preset standard overall damage sequence table, and generating a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value; According to the determined overall damage point in the currently calibrated enhanced image of the connection, obtaining actual connection damage degree data of the determined overall damage point; The actual connection damage degree data is compared with a preset standard connection damage sequence table, and a current connection damage degree value is generated, wherein the standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one standard connection damage data corresponds to one standard connection damage degree value, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value; Generate a current external morphology damage value according to the current overall damage degree value and the current connection damage degree value; Determine whether the current external morphology damage value is greater than or equal to a preset standard damage degree value; If it is judged that the current external morphology damage value is greater than or equal to the standard damage degree value, then it is judged that the external morphology of the current transistor to be detected has a morphological function failure, and a functional failure indication is generated; if it is judged that the current external morphology damage value is less than the standard damage degree value, then it is judged that the external morphology of the current transistor to be detected does not have a morphological function failure.

3. The method for detecting functional failure of an insulated gate bipolar transistor according to claim 2, characterized in that: The current transistor internal structure arrangement data includes data of a structure area without pins and data of a structure area with pins; Determine whether the transistor to be detected currently has an internal functional defect according to the internal structure arrangement data of the current transistor; if it is determined that the transistor to be detected currently has an internal functional defect, generate a functional failure prompt, and transport the transistor to be detected currently with the internal functional defect to a functional defect area based on a preset transistor transport mechanism; Specifically include: Respectively obtain the actual reception time of the initial penetration signal corresponding to the pin-free structure area data, wherein the actual reception time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal receiving module receives the initial penetration signal; Generate an average penetration time according to each of the actual reception time, and select the actual reception time whose value difference with the average penetration time is greater than or equal to a preset first standard time difference, and set it as the current initial structure abnormal point; Respectively obtain the actual rebound time of the initial penetration signal corresponding to the pin structure area data, wherein the actual rebound time is the time from when the detection signal sending module sends the initial detection signal to when the detection signal sending module receives the initial rebound signal; Generate an average rebound time according to each of the actual rebound time, and select the actual rebound time whose value difference with the average rebound time is greater than or equal to the preset second standard time difference, and set it as the abnormal point at the current initial pin; Determine whether the number of abnormal points in the current initial structure is greater than or equal to a preset first standard abnormal number. If it is determined that the number of abnormal points in the current initial structure is greater than or equal to the first standard abnormal number, determine that the current transistor to be detected has an internal functional defect, generate a functional failure prompt, and transport the current transistor to be detected with the internal functional defect to a functional defect area based on a preset transistor transport mechanism; If it is determined that the number of abnormal points in the current initial structure is less than the first standard abnormal number, then it is determined whether the abnormal points at the current initial pin are greater than or equal to a preset second standard abnormal amount; if it is determined that the abnormal points at the current initial pin are greater than or equal to the second standard abnormal amount, then it is determined that the current transistor to be detected has an internal functional defect, and a functional failure prompt is generated, and the current transistor to be detected with an internal functional defect is transported to a functional defect area based on a preset transistor transport mechanism; if it is determined that the abnormal point at the current initial pin is less than the second standard abnormal amount, then a current normal function indication is generated.

4. An insulated gate bipolar transistor functional failure detection system, characterized in that: The system comprises: A color enhancement module, used to obtain a current actual external image of the transistor to be detected based on a preset image detection device, perform color enhancement conversion processing on the current actual external image, and generate a color enhanced conversion image; a failure indication module, configured to determine whether the external morphology of the transistor to be detected currently has a morphological function failure according to the color enhanced conversion image, and generate a function failure indication if it is determined that the external morphology of the transistor to be detected currently has a morphological function failure; A specific position module, for obtaining the current transistor internal structure arrangement data of the current transistor to be detected based on a preset transistor internal structure detection device after installing the current transistor to be detected at a preset specific position if it is determined that the external shape of the current transistor to be detected does not have a shape function failure; A function judgment module, used to judge whether the current transistor to be detected has an internal function defect according to the internal structure arrangement data of the current transistor, and if it is judged that the current transistor to be detected has an internal function defect, generate a function failure prompt, and transport the current transistor to be detected with the internal function defect to a function defect area based on a preset transistor transport mechanism; The current actual external image includes an actual image of the outer surface and an actual image of the pin connection; the color enhancement conversion image includes an overall enhanced image after the current calibration and an enhanced image of the connection after the current calibration, and the color enhancement module also includes: An image detection module, used to drive the image detection device to perform multi-angle image detection on the transistor to be detected based on a preset image driving device, and obtain an actual image of the outer surface and an actual image of the pin connection; A surface image module, used to compare the actual image of the outer surface with a preset standard overall image, and extract the current overall comparison damage point, and at the same time compare the actual image of the pin connection with the standard pin connection image, and extract the pin connection damage point; A color enhancement module, used to perform a first color enhancement process on the actual image of the outer surface and generate an overall appearance enhanced image, and to perform a first color enhancement process on the actual image of the pin connection and generate an enhanced image of the pin connection; A damage extraction module, used to extract damage points in the overall appearance enhanced image and generate enhanced image damage points; An enhanced generation module, used for extracting damage points in the enhanced image of the pin connection and generating enhanced image damage points at the connection; A damage point comparison module, used for comparing the current overall comparison damage point with the enhanced image damage point, and generating a determined overall damage point, calibrating the overall appearance enhanced image according to the determined overall damage point, and generating a current calibrated overall enhanced image after calibration; A damage determination module, used for comparing the pin connection damage point with the enhanced image connection damage point, and generating a connection determination damage point, calibrating the pin connection enhancement image according to the connection determination damage point, and generating a current calibrated connection enhancement image after calibration; The transistor internal structure detection device comprises a detection signal sending module and a detection signal receiving module; The specific position module is also used for: if it is determined that there is no morphological function failure in the external morphology of the current transistor to be detected, then after the current transistor to be detected is installed in a preset specific position, obtaining a starting detection point according to the preset specific position; generating equally spaced detection points according to the starting detection point and a preset standard spacing distance; based on the detection signal sending module, transmitting initial detection signals in sequence from the front side of each of the equally spaced detection points toward the equally spaced detection points starting from the starting detection point; based on the detection signal receiving module, receiving an initial penetration signal after the initial detection signal passes through the current transistor to be detected at the rear side of each of the equally spaced detection points; based on the detection signal sending module, obtaining an initial rebound signal after the initial detection signal received by the detection signal sending module bounces off the metal pin in the current transistor to be detected; and generating the current transistor internal structure arrangement data of the current transistor to be detected according to each of the initial penetration signals and each of the initial rebound signals.

5. The insulated gate bipolar transistor functional failure detection system according to claim 4, characterized in that: The failure indication module is also used for: Retrieve the determined overall damage point in the currently calibrated overall enhanced image, and obtain the actual overall damage degree data of the determined overall damage point; compare the actual overall damage degree data with a preset standard overall damage sequence table, and generate a current overall damage degree value, wherein the standard overall damage sequence table includes standard overall damage data and standard overall damage degree values, one standard overall damage data corresponds to one standard overall damage degree value, and the standard overall damage degree value corresponding to the standard overall damage data that matches the actual overall damage degree data is the current overall damage degree value; according to the determined overall damage point in the currently calibrated connection enhanced image, obtain the actual connection damage degree data of the determined overall damage point; compare the actual connection damage degree data with a preset standard connection damage sequence table, and generate a current connection damage degree value, wherein the The standard connection damage sequence table includes standard connection damage data and standard connection damage degree values, one of the standard connection damage data corresponds to one of the standard connection damage degree values, and the standard connection damage degree value that matches the standard connection damage data that matches the actual connection damage degree data is the current connection damage degree value; a current external morphology damage value is generated according to the current overall damage degree value and the current connection damage degree value; it is determined whether the current external morphology damage value is greater than or equal to a preset standard damage degree value; if it is determined that the current external morphology damage value is greater than or equal to the standard damage degree value, it is determined that the external morphology of the current transistor to be detected has a morphological function failure, and a function failure indication is generated; if it is determined that the current external morphology damage value is less than the standard damage degree value, it is determined that the external morphology of the current transistor to be detected does not have a morphological function failure.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 3 are implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.

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