Driving method of pixel circuit, pixel circuit

Abstract

The present invention discloses a driving method and a pixel circuit for a pixel circuit. The pixel circuit includes at least two driving transistors connected in parallel, and the aspect ratios of the at least two driving transistors are different; the driving method of the pixel circuit includes: obtaining the maximum display brightness value of a preset area in the to-be-displayed picture; determining whether the maximum display brightness value of the preset area is greater than a first preset value; if the maximum display brightness value of the preset area is greater than the first preset value, when the to-be-displayed gray level in the preset area is less than a preset gray level, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive; if the maximum display brightness value of the preset area is less than or equal to the first preset value, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive. The present invention can improve the mura phenomenon.

Description

Technical Field

[0001] Embodiments of the present invention relate to display technology, and in particular, to a driving method and a pixel circuit for a pixel circuit. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more extensive, and correspondingly, the requirements for display panels are also getting higher and higher.

[0003] A display panel includes a plurality of pixel circuits, and the display is realized by driving the pixel circuits to emit light. However, when the existing driving method of pixel circuits drives the pixel circuits to emit light so that the display panel displays, the display panel is prone to mura (non-uniform display) problems, seriously affecting the display effect. Summary of the Invention

[0004] The present invention provides a driving method and a pixel circuit for a pixel circuit to improve the mura phenomenon.

[0005] In a first aspect, an embodiment of the present invention provides a driving method for a pixel circuit. The pixel circuit includes at least two driving transistors connected in parallel, and the aspect ratios of the at least two driving transistors are different. The driving method of the pixel circuit includes:

[0006] Obtain the maximum display brightness value of a preset area in the to-be-displayed picture;

[0007] Determine whether the maximum display brightness value of the preset area is greater than a first preset value;

[0008] If the maximum display brightness value of the preset area is greater than the first preset value, when the gray level to be displayed in the preset area is less than a preset gray level, control the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive;

[0009] If the maximum display brightness value of the preset area is less than or equal to the first preset value, control the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive.

[0010] Optionally, the at least two driving transistors include a first driving transistor and a second driving transistor, and the aspect ratio of the first driving transistor is greater than the aspect ratio of the second driving transistor;

[0011] After the maximum display brightness value of the preset area is greater than the first preset value, it includes:

[0012] Determine whether the maximum display brightness value of the preset area is greater than a second preset value;

[0013] If the maximum display brightness value of the preset area is greater than a second preset value, obtain the gray level to be displayed in the preset area. If the gray level to be displayed is less than or equal to a first preset gray level, control the second driving transistor in the pixel circuit corresponding to the preset area to drive. If the gray level to be displayed is greater than the first preset gray level, control the first driving transistor and the second driving transistor in the pixel circuit corresponding to the preset area to drive simultaneously;

[0014] If the maximum display brightness value of the preset area is greater than a first preset value and less than or equal to the second preset value, obtain the gray level to be displayed corresponding to the preset area. If the gray level to be displayed is less than or equal to a second preset gray level, control the second driving transistor in the pixel circuit corresponding to the preset area to drive. If the gray level to be displayed is greater than the second preset gray level, control the first driving transistor in the pixel circuit corresponding to the preset area to drive;

[0015] Wherein, the preset gray level is greater than the second preset gray level, and the second preset gray level is greater than the first preset gray level.

[0016] Optionally, the preset area is the entire area of the picture to be displayed.

[0017] Optionally, the pixel circuit includes:

[0018] At least two driving transistors, a first node, a second node, a control node, a light-emitting module, and at least two selection modules corresponding to the at least two driving transistors one by one;

[0019] The first node is used to access a first power supply voltage, the second node is used to be electrically connected to the light-emitting module, and the control node is used to access a data voltage;

[0020] The control end of the selection module accesses a control signal, and the selection module is used to control the connection state of at least one of the first end of the corresponding driving transistor and the first node, the second end of the driving transistor and the second node, and the control end of the driving transistor and the control node according to the control signal.

[0021] In a second aspect, an embodiment of the present invention further provides a pixel circuit for implementing the driving method of the pixel circuit in the first aspect, characterized in that the pixel circuit includes: at least two driving transistors, a first node, a second node, a control node, a light-emitting module, at least two selection modules corresponding to the at least two driving transistors one by one, and at least two control modules corresponding to the at least two selection modules one by one;

[0022] The first node is used to access a first power supply voltage, the second node is used to be electrically connected to the light-emitting module, and the control node is used to access a data voltage;

[0023] The control module is configured to write a control signal to the control terminal of the selection module;

[0024] The selection module is configured to control the connection state of at least one of the first end of the driving transistor to the first node, the second end of the driving transistor to the second node, and the control end of the driving transistor to the control node according to the control signal.

[0025] Optionally, the first end of the selection module is electrically connected to the first end of the corresponding driving transistor, the second end of the selection module is electrically connected to the first node, and the control end of the selection module is electrically connected to the corresponding control module;

[0026] Alternatively, the first end of the selection module is electrically connected to the second end of the corresponding driving transistor, the second end of the selection module is electrically connected to the second node, and the control end of the selection module is electrically connected to the corresponding control module;

[0027] Alternatively, the first end of the selection module is electrically connected to the control end of the corresponding driving transistor, the second end of the selection module is electrically connected to the control node, and the control end of the selection module is electrically connected to the corresponding control module.

[0028] Optionally, the pixel circuit further includes at least two first storage modules corresponding to the at least two selection modules one by one;

[0029] The first storage module is configured to maintain the potential of the control terminal of the corresponding selection module;

[0030] Wherein, the first end of the control module receives the corresponding control signal, the second end of the control module is electrically connected to the control terminal of the corresponding selection module, and the control end of the control module receives the first scan signal; the first end of the first storage module is electrically connected to the control terminal of the corresponding selection module, and the second end of the first storage module receives a preset voltage.

[0031] Optionally, the pixel circuit further includes a first initialization module configured to write an initialization signal to the control node according to the first scan signal; the pixel circuit further includes a data writing module configured to write a data voltage to the first node according to a second scan signal.

[0032] Optionally, the control end of the control module receives the first scan signal; or the control end of the control module receives the second scan signal.

[0033] Optionally, the pixel circuit further includes a first light-emitting control module, a second light-emitting control module, a threshold compensation module, a second storage module, and a data writing module;

[0034] A first end of the first light-emitting control module is connected to the first power supply voltage, a second end of the first light-emitting control module is electrically connected to the first node, and a control end of the first light-emitting control module is connected to an enable signal;

[0035] A first end of the data writing module is connected to a data voltage, a second end of the data writing module is electrically connected to the first node, and a control end of the data writing module is connected to a second scan signal;

[0036] A first end of the second storage module is connected to the first power supply voltage, and a second end of the second storage module is electrically connected to the control node;

[0037] A first end of the threshold compensation module is electrically connected to the second node, a second end of the threshold compensation module is electrically connected to the control node, and a control end of the threshold compensation module is connected to the second scan signal;

[0038] A first end of the second light-emitting control module is electrically connected to the second node, a second end of the second light-emitting control module is electrically connected to a first end of the light-emitting module, and a control end of the second light-emitting control module is connected to the enable signal;

[0039] A second end of the light-emitting module is connected to a second power supply voltage.

[0040] The technical solution of the embodiment of the present invention adopts a driving method for a pixel circuit, including: obtaining a maximum display brightness value of a preset area in a to-be-displayed picture; determining whether the maximum display brightness value of the preset area is greater than a first preset value; if the maximum display brightness value of the preset area is greater than the first preset value, when the to-be-displayed gray level in the preset area is less than a preset gray level, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive; if the maximum display brightness value of the preset area is less than or equal to the first preset value, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive. When the maximum display brightness value is small or the maximum display brightness value is large but the actual display gray level is small, this embodiment can drive with a driving transistor with a smaller aspect ratio, so as to achieve more precise current control, and further improve the mura phenomenon. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a flowchart of a driving method for a pixel circuit provided by an embodiment of the present invention;

[0042] Figure 2 It is a circuit structure schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0043] Figure 3 Flow chart of another driving method for the pixel circuit provided by the embodiment of the present invention;

[0044] Figure 4 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0045] Figure 5 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0046] Figure 6 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0047] Figure 7 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0048] Figure 8 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0049] Figure 9 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0050] Figure 10 Schematic diagram of the circuit structure of another pixel circuit provided by the embodiment of the present invention;

[0051] Figure 11 Schematic diagram of the structure of a display panel provided by the embodiment of the present invention. Detailed implementation manners

[0052] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. In addition, it should be noted that for the convenience of description, only parts related to the present invention are shown in the drawings rather than all the structures.

[0053] As mentioned in the background art, the existing driving method of the pixel circuit will cause mura problems in the display panel during driving. After careful research by the applicant, it is found that the reason for this technical problem is that: the pixel circuit includes a driving transistor. When the brightness of the image to be displayed is relatively low, the voltage difference between the gate and source of the driving transistor is close to the threshold voltage of the driving transistor. The difference in the threshold voltages of the driving transistors in different pixel circuits results in uneven display when displaying the same brightness.

[0054] Based on the above technical problems, the present invention proposes the following solutions:

[0055] Figure 1A flowchart of a driving method for a pixel circuit provided by an embodiment of the present invention Figure 2 A schematic diagram of the circuit structure of a pixel circuit provided by an embodiment of the present invention. Refer to Figure 1 and Figure 2 , the pixel circuit includes at least two driving transistors connected in parallel, and the aspect ratios of the at least two driving transistors are different. The driving method of the pixel circuit includes:

[0056] Step S11, obtaining the maximum display brightness value of a preset area in the to-be-displayed picture;

[0057] Specifically, the preset area may be, for example, a certain part of the display panel. The maximum display brightness value is the maximum display brightness of the display panel corresponding to the preset area. The maximum display brightness value can be adjusted by a brightness bar displayed on the terminal by the display panel, and can be directly obtained by the driving chip (there is a preset one-to-one correspondence between the brightness bar percentage and the maximum brightness of the picture);

[0058] Step S12, determining whether the maximum display brightness value of the preset area is greater than a first preset value; if the maximum display brightness value of the preset area is greater than the first preset value, determining the driving states of at least two driving transistors according to the to-be-displayed gray levels of the preset area; if the maximum display brightness value of the preset area is less than or equal to the first preset value, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive.

[0059] Specifically, more precise current control can be achieved by controlling the operation of the driving transistor with a smaller aspect ratio in the pixel circuit. Taking the pixel circuit including two driving transistors (driving transistor M3-1 and driving transistor M3-2) as an example, the two driving transistors are in a parallel relationship. Assume that the aspect ratio of driving transistor M3-1 is greater than that of driving transistor M3-2. The driving transistor can control its working state under the control of the corresponding selection module 101; when only driving transistor M3-1 is selected, only the driving transistor M3-1 with a larger aspect ratio works; when only driving transistor M3-2 is selected, only the driving transistor M3-2 with a smaller aspect ratio works; when driving transistor M3-1 and driving transistor M3-2 are selected, driving transistor M3-1 and driving transistor M3-2 work in parallel, which is equivalent to a driving transistor with an aspect ratio greater than that of driving transistor M3-1; driving with the driving transistor with a smaller aspect ratio is more beneficial to the picture display at low brightness. The reason is that the driving current formula of the driving transistor is Assume that the maximum display brightness is high brightness. At this time, the data voltage corresponding to 255 gray levels is the lowest, for example, 2V, and the corresponding gamma register value is 0x0FFF. The data voltage corresponding to 0 gray level is the highest, for example, 7V, and the corresponding gamma register value is 0x000. Assume that 16 gray levels need to be displayed. When driving with a driving transistor with a relatively large width-to-length ratio, a relatively large data voltage Vdata is required to make the driving current Ids satisfy the brightness corresponding to 16 gray levels. Assume that the required data voltage at this time is 4.5V. When driving with a driving transistor with a relatively small width-to-length ratio, a relatively small data voltage Vdata is required to make the driving current Ids satisfy the brightness corresponding to 16 gray levels. Assume that the required data voltage at this time is 3.5V. From the above analysis, when driving with a driving transistor with a relatively small width-to-length ratio, the adjustable range of the data voltage at low gray levels is larger (3.5V - 7V), so it has a more refined current control ability, and thus can reduce the mura phenomenon.

[0060] It can be judged by the driving chip of the display panel whether the maximum display brightness value of the preset area is greater than the first preset value. The first preset value can be set according to the specific display environment. For example, when the brightness of the display environment is relatively large (such as during the day), the first preset value can be relatively large. When the brightness of the display environment is relatively small (such as at night), the first preset value can be relatively small. In this embodiment, the first preset value can be set to 51.8 nit. Of course, it can also be other values. If the maximum display brightness value of the preset area is less than or equal to the first preset value, it means that the overall brightness required to be displayed in the preset area is relatively low. At this time, regardless of the gray level to be displayed in the preset area of the to-be-displayed picture, it is driven by controlling the driving transistor with the smallest width-to-length ratio, so as to achieve more refined current control and thus improve the mura phenomenon. When the maximum display brightness value of the preset area in the to-be-displayed picture is greater than the first preset value, it means that the maximum brightness value that can be displayed in the preset area of the to-be-displayed picture is relatively large at this time. However, when the gray level in the preset area of the to-be-displayed picture is relatively small, the actual displayed brightness is still relatively small. At this time, the driving transistor with the smallest width-to-length ratio in the pixel circuit can still be controlled to drive, so as to still improve the mura phenomenon when the maximum display brightness value is relatively large but the actual gray level to be displayed is relatively low. From the above analysis, when the maximum display brightness value is relatively small or the maximum display brightness value is relatively large but the actual displayed gray level is relatively small, this embodiment can drive with a driving transistor with a relatively small width-to-length ratio, so as to achieve more refined current control and thus improve the mura phenomenon.

[0061] The driving method of the pixel circuit adopted in the technical solution of this embodiment includes: obtaining the maximum display brightness value of a preset area in the to-be-displayed picture; determining whether the maximum display brightness value of the preset area is greater than a first preset value; if the maximum display brightness value of the preset area is greater than the first preset value, when the to-be-displayed gray level in the preset area is less than a preset gray level, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive; if the maximum display brightness value of the preset area is less than or equal to the first preset value, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive. When the maximum display brightness value is small or the maximum display brightness value is large but the actual display gray level is small, this embodiment can drive with a driving transistor with a small aspect ratio, so as to achieve more precise current control and further improve the mura phenomenon.

[0062] Exemplarily, as Figure 3 shown, Figure 3The flowchart of another driving method for a pixel circuit provided by an embodiment of the present invention. First, step S121 may be executed to determine whether the maximum display brightness value of a preset area is greater than a second preset value. If so, it indicates that the actual brightness to be displayed is in the high brightness band, and then step S122 is executed to determine whether the gray scale to be displayed is less than a first preset gray scale. If so, it indicates that the gray scale to be displayed is small, that is, the actual brightness to be displayed is small. At this time, step S123 is executed to control the second driving transistor in the pixel circuit corresponding to the preset area to drive. Thus, when the actual display brightness is small, the driving transistor with a small aspect ratio can be made to work, and further, the current can be adjusted more finely, improving the mura phenomenon. If the execution result of step S122 is negative, it means that the actual brightness to be displayed is large. At this time, step S124 is executed to control the first driving transistor and the second driving transistor in the pixel circuit corresponding to the preset area to drive simultaneously. Thus, when driving in a high brightness situation using a driving transistor with a large aspect ratio, the required driving voltage can be reduced, ensuring that the light-emitting unit can emit light normally at high brightness. If the execution result of step S121 is negative, then step S125 is executed to determine whether the maximum display brightness value of the preset area is greater than a first preset value, where the first preset value is less than the second preset value, and the second preset value may be, for example, 90 nit. If so, it means that the actual brightness to be displayed is in the middle brightness band, and then step S126 is executed to determine whether the gray scale to be displayed is less than or equal to a second preset gray scale. The second preset gray scale is greater than the first preset gray scale. For example, the first preset gray scale is 16 and the second preset gray scale is 32. If the gray scale to be displayed in the middle brightness band is less than the second preset gray scale, it means that the actual brightness to be displayed is small. At this time, step S127 can be executed to control the second driving transistor in the pixel circuit corresponding to the preset area to drive. Thus, when the actual display brightness is small, the driving transistor with a small aspect ratio can be made to work, and further, the current can be adjusted more finely, improving the mura phenomenon. If the execution result of step S126 is negative, it means that the actual brightness to be displayed is large. At this time, step S128 is executed to control the first driving transistor in the pixel circuit corresponding to the preset area to drive. Thus, when driving in a middle brightness situation using a driving transistor with a large aspect ratio, the required driving voltage can be reduced, ensuring that the light-emitting unit can emit light normally at middle brightness. If the execution result of step S125 is negative, it means that it is in the low brightness band. At this time, step S129 can be executed to control the second driving transistor in the pixel circuit corresponding to the preset area to drive. Thus, when the actual display brightness is small, the driving transistor with a small aspect ratio can be made to work, and further, the current can be adjusted more finely, improving the mura phenomenon.

[0063] Optionally, the preset area is the entire area of the picture to be displayed. Such a setting can control the display panel as a whole, that is, the same driving transistor is used to drive all the pixel circuits in the display panel, which is beneficial to the design of the pixel circuit.

[0064] Exemplarily, as Figure 2 shown, the pixel circuit includes: at least two driving transistors (taking driving transistors M3-1 and M3-2 as examples in this embodiment), a first node A1, a second node A2, a control node A3, a light-emitting module 102, and at least two selection modules 101 corresponding to the at least two driving transistors one by one; the first node A1 is used to access a first power supply voltage VDD, the second node A2 is used to be electrically connected to the light-emitting module 102, and the control node A3 is used to access a data voltage Vdata; the control terminals of the selection modules 101 access control signals (Sw1, Sw2), and the selection modules 101 are used to control the connection states of at least one of the first end of the corresponding driving transistor to the first node A1, the second end of the driving transistor to the second node A2, and the control end of the driving transistor to the control node A3 according to the control signals.

[0065] Specifically, Figure 2 the selection module 101 in is used to control the connection state between the second end of the corresponding driving transistor and the second node A2. When Sw2 is a conduction signal (such as a low level) and Sw1 is a cut-off signal (such as a high level), the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistors M3-1 and M3-2 work simultaneously and are in a parallel state, equivalently acting as a driving transistor with a large aspect ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signals Sw1 and Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0066] In some other embodiments, as Figure 4 shown, Figure 4 is a schematic circuit diagram of another pixel circuit provided by an embodiment of the present invention, Figure 4The selection module 101 therein is used to control the connection state between the control terminal of the corresponding driving transistor and the control node A3. When Sw2 is a conduction signal and Sw1 is a cut-off signal, the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistors M3-1 and M3-2 work simultaneously and are in a parallel state, equivalently acting as a driving transistor with a large width-to-length ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signal Sw1 and the control signal Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0067] In some other embodiments, such as Figure 5 shown, Figure 5 is a schematic circuit diagram of another pixel circuit provided by an embodiment of the present invention, Figure 5 The selection module 101 therein is used to control the connection state between the first terminal of the corresponding driving transistor and the first node A1. When Sw2 is a conduction signal and Sw1 is a cut-off signal, the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistors M3-1 and M3-2 work simultaneously and are in a parallel state, equivalently acting as a driving transistor with a large width-to-length ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signal Sw1 and the control signal Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0068] Combined with Figure 2 、 Figure 4 and Figure 5, the selection module 101 can be implemented by a transistor. For example, it can be a P-type transistor, and in some other embodiments, it can also be an N-type transistor. The pixel circuit may further include a data writing module, a first light emission control module, a threshold compensation module, a second light emission control module, a first initialization module, a second initialization module, and a second storage module. Among them, the data writing module includes a first transistor M1, the first light emission control module includes a second transistor M2, the threshold compensation module is a dual-gate transistor including a sub-transistor M4-1 and a sub-transistor M4-2, the second light emission control module includes a fifth transistor M5, the first initialization module is a dual-gate transistor including a sub-transistor M6-1 and a sub-transistor M6-2, the second initialization module includes a seventh transistor M7, and the second storage module includes a first capacitor C1. The first end of the first transistor M1 is connected to the data voltage Vdata, the second end of the first transistor M1 is electrically connected to the first end of the second transistor M1, and the control end of the first transistor M1 is connected to the second scan signal Scan2. The second end of the second transistor M2 is connected to the first power supply voltage VDD, and the control end of the second transistor M2 is connected to the enable signal EM. The first end of the sub-transistor M4-2 is electrically connected to the control node A3, the second end of the sub-transistor M4-2 is electrically connected to the first end of the sub-transistor M4-1, the second end of the sub-transistor M4-1 is electrically connected to the second node A2, and the control ends of the sub-transistor M4-1 and the sub-transistor M4-2 are both connected to the second scan signal Scan2. The first end of the fifth transistor M5 is connected to the second node A2, the second end of the fifth transistor M5 is electrically connected to the first end of the light emission module 102, and the control end of the fifth transistor M5 is connected to the enable signal EM. The first end of the sub-transistor M6-2 is electrically connected to the control node A3, the second end of the sub-transistor M6-2 is electrically connected to the first end of the sub-transistor M6-1, the second end of the sub-transistor M6-1 is connected to the initialization signal Vref, and the control ends of the sub-transistor M6-2 and the sub-transistor M6-1 are both connected to the first scan signal Scan1. The first end of the seventh transistor M7 is electrically connected to the first end of the light emission module 102, the second end of the seventh transistor M7 is connected to the initialization signal Vref, and the control end of the seventh transistor M7 is connected to the first scan signal Scan1. The first end of the first capacitor C1 is connected to the first power supply voltage VDD, and the second end of the first capacitor C1 is electrically connected to the control node A3. The second end of the light emission module 102 is connected to the second power supply voltage VSS. The working process of the pixel circuit includes an initialization stage, a data writing stage, and a light emission stage. Among them, the selection module corresponding to the driving transistor that needs to be driven needs to be turned on during the light emission stage and the data writing stage.

[0069] In the initialization stage, the first scan signal Scan1 is at a low level, the seventh transistor M7, the sub-transistor M6-1, and the sub-transistor M6-2 are turned on, and the initialization signal Vref initializes the control node A3 and the first end of the light-emitting module 102 to prevent the residual of the previous frame signal from affecting the current frame signal.

[0070] In the data writing stage, the second scan signal Scan2 is at a low level, the first transistor M1, the sub-transistor M4-1, and the sub-transistor M4-2 are turned on, and the data voltage Vdata is written to the control node A3 through the first transistor M1, the first node A1, the driving transistor, the second node A2, the sub-transistor M4-1, and the sub-transistor M4-2. When the potential difference between the control node A3 and the second node A2 is the threshold voltage of the driving transistor, the driving transistor is turned off, so that the control node A3 stores the threshold voltage information of the driving transistor, eliminating the influence of the threshold voltage difference of the driving transistor on the light-emitting brightness, and the first capacitor C1 stores the potential of the control node A3.

[0071] In the light-emitting stage, the enable signal EM is at a low level, the second transistor M2, the driving transistor, and the fifth transistor M5 are turned on, and the light-emitting module 102 emits light according to the driving current generated by the driving transistor.

[0072] In the above embodiment, the control ends of the corresponding selection modules in all pixel circuits can be connected to a signal terminal, and the control method is simpler.

[0073] For the display panel using the above pixel circuit, if it is necessary to control the selection module of the local pixel circuit, a signal line needs to be connected out for each selection module, and the wiring difficulty is extremely high. Therefore, it can be applied to the same control of the selection modules in all pixel circuits at the same time, that is, the preset area is the entire area of the to-be-displayed picture.

[0074] Based on the same inventive concept, in order to make the preset area not be the entire area of the to-be-displayed picture, that is, the preset area is smaller than the entire area of the to-be-displayed picture, the embodiment of the present invention further provides a pixel circuit. Figure 6 For the circuit structure schematic diagram of another pixel circuit provided by the embodiment of the present invention, refer to Figure 6, the pixel circuit includes: at least two driving transistors (taking driving transistor M3-1 and driving transistor M3-2 as examples in this embodiment), a first node A1, a second node A2, a control node A3, a light-emitting module 102, at least two selection modules 101 corresponding to the at least two driving transistors one by one, and at least two control modules 103 corresponding to the at least two selection modules one by one; the first node A1 is used to access the first power supply voltage VDD, the second node A2 is used to be electrically connected to the light-emitting module 102, and the control node A3 is used to access the data voltage Vdata; the control module 103 is used to write control signals (Sw1, Sw2) into the control terminals of the selection modules according to the first scan signal; the selection module 101 is used to control the connection state of at least one of the first end of the corresponding driving transistor to the first node A1, the second end of the driving transistor to the second node A2, and the control end of the driving transistor to the control node A3 according to the control signal.

[0075] Specifically, in this embodiment, the differential configuration of the selection modules in different pixel circuits can be realized in a scanning manner. For example, the control modules of the pixel circuits in the same row are all connected to the same scan signal line, each selection module of the pixel circuit corresponds to a control data line, the control data line is used to input the control signal, and the selection modules corresponding to the driving transistors with the same aspect ratio in the same column are connected to the same control data line; when it is necessary to control a selection module in a certain pixel circuit, when the first scan signal scans to this row, the corresponding control signal can be input on the corresponding control data line, and then the selection module of this pixel circuit is selected. After the first scan signal scans past this row, due to the influence of parasitic capacitance and the like, the signal line connected to the control terminal of the selection module will maintain the control signal for a period of time, so as to ensure that during the data writing stage and the light-emitting stage, the selection module corresponding to the driving transistor that needs to be driven is in the on state, and the selection module corresponding to the driving transistor that does not need to be driven is in the off state.

[0076] The technical solution of this embodiment adopts a pixel circuit including at least two driving transistors, a first node, a second node, a control node, a light-emitting module, at least two selection modules corresponding to the at least two driving transistors one by one, and at least two control modules corresponding to the at least two selection modules one by one; the first node is used to access a first power supply voltage, the second node is used to be electrically connected to the light-emitting module, and the control node is used to access a data voltage; the control module is used to write a control signal into the control end of the selection module according to a first scan signal; the selection module is used to control the connection state of at least one of the first end of the driving transistor and the first node, the second end of the driving transistor and the second node, and the control end of the driving transistor and the control node according to the control signal. When the first scan signal scans to this row, a corresponding control signal is input on the corresponding control data line, and then the selection module of the pixel circuit is selected. After the first scan signal scans past this row, due to the corresponding selection module being turned off, the signal line connected to the control end of the selection module will maintain the control signal for a period of time due to the influence of parasitic capacitance, etc., so as to ensure that during the data writing stage and the light-emitting stage, the selection module corresponding to the driving transistor that needs to be driven is in the on state, and the selection module corresponding to the driving transistor that does not need to be driven is in the off state. Therefore, only a small number of signal lines are needed to realize the independent control of the selection module in a single pixel circuit, so that when the preset area in the to-be-displayed picture is not the entire to-be-displayed picture, local adjustment can also be performed to improve the mura phenomenon of the local picture.

[0077] Optionally, continue to refer to Figure 6 , the pixel circuit may further include at least two first storage modules corresponding to the at least two selection modules one by one; the first storage module is used to maintain the potential of the control end of the corresponding selection module; wherein, the first end of the control module accesses the corresponding control signal, the second end of the control module is electrically connected to the control end of the corresponding selection module, and the control end of the control module accesses the first scan signal; the first end of the first storage module is electrically connected to the control end of the corresponding selection module, and the second end of the first storage module accesses a preset voltage.

[0078] Specifically, the first storage module may be a second capacitor C2. The first end of the second capacitor C2 is electrically connected to the control end of the corresponding selection module, and the second end of the second capacitor C2 accesses a preset voltage. The preset voltage may be, for example, a second power supply voltage VSS. By setting the first storage module, the potential holding ability of the control end of the selection module can be greatly improved, so as to ensure that the selection module that needs to be turned on remains on during the light-emitting stage and the data writing stage, and the selection module that needs to be turned off is in the off state.

[0079] Optionally, Figure 7 is a schematic circuit diagram of another pixel circuit provided by an embodiment of the present invention. Refer to Figure 7, the control module may include a ninth transistor (including two ninth transistors M9-1 and M9-2 in this embodiment). The first end of the ninth transistor is connected to a control signal, and the second end of the ninth transistor is electrically connected to the control end of the corresponding selection module 101. The selection module may include, for example, an eighth transistor, including an eighth transistor M8-1 and an eighth transistor M8-2 in this embodiment. The transistors in the pixel circuit may be, for example, P-type transistors, and may also be N-type transistors in some other embodiments. The pixel circuit may further include a data writing module, a first light emission control module, a threshold compensation module, a second light emission control module, a first initialization module, a second initialization module, and a second storage module. Among them, the data writing module is used to write a data voltage into the first node A1 according to the second scan signal Scan2, and the first initialization module is used to write an initialization signal into the control node A3 according to the first scan signal Scan1. The first end of the first light emission control module is connected to a first power supply voltage, the second end of the first light emission control module is connected to the first node, and the control end of the first light emission control module is connected to an enable signal. The first end of the data writing module is connected to the data voltage, the second end of the data writing module is connected to the first node, and the control end of the data writing module is connected to the second scan signal. The first end of the second storage module is connected to the first power supply voltage, and the second end of the second storage module is connected to the control node. The first end of the threshold compensation module is connected to the second node, the second end of the threshold compensation module is connected to the control node, and the control end of the threshold compensation module is connected to the second scan signal. The first end of the second light emission control module is connected to the second node, the second end of the second light emission control module is electrically connected to the first end of the light emission module, and the control end of the second light emission control module is connected to the enable signal. The second end of the light emission module is connected to a second power supply voltage.

[0080] The data writing module includes a first transistor M1, the first light emission control module includes a second transistor M2, the threshold compensation module is a dual-gate transistor including a sub-transistor M4-1 and a sub-transistor M4-2, the second light emission control module includes a fifth transistor M5, the first initialization module is a dual-gate transistor including a sub-transistor M6-1 and a sub-transistor M6-2, the second initialization module includes a seventh transistor M7, and the second storage module includes a first capacitor C1; a first end of the first transistor M1 is connected to a data voltage Vdata, a second end of the first transistor M1 is electrically connected to a first end of the second transistor M1, and the second end of the first transistor M1 is connected to a second scan signal Scan2; a second end of the second transistor M2 is connected to a first power supply voltage VDD, and the second end of the second transistor M2 is connected to an enable signal EM; a first end of the sub-transistor M4-2 is electrically connected to a control node A3, a second end of the sub-transistor M4-2 is electrically connected to a first end of the sub-transistor M4-1, a second end of the sub-transistor M4-1 is electrically connected to a second node A2, and a control end of the sub-transistor M4-1 and a control end of the sub-transistor M4-2 are both connected to the second scan signal Scan2; a first end of the fifth transistor M5 is connected to the second node A2, a second end of the fifth transistor M5 is connected to a first end of the light emitting module 102, and a control end of the fifth transistor M5 is connected to the enable signal EM; a first end of the sub-transistor M6-2 is electrically connected to the control node A3, a second end of the sub-transistor M6-2 is electrically connected to a first end of the sub-transistor M6-1, a second end of the sub-transistor M6-1 is connected to an initialization signal Vref, and a control end of the sub-transistor M6-2 and a control end of the sub-transistor M6-1 are both connected to a first scan signal Scan1; a first end of the seventh transistor M7 is connected to the first end of the light emitting module 102, a second end of the seventh transistor M7 is connected to the initialization signal Vref, and a control end of the seventh transistor M7 is connected to the second scan signal Scan2; a first end of the first capacitor C1 is connected to the first power supply voltage VDD, and a second end of the first capacitor C1 is electrically connected to the control node A3; a second end of the light emitting module 102 is connected to a second power supply voltage VSS; the working process of the pixel circuit includes an initialization stage, a data writing stage, and a light emitting stage; among them, the selection module corresponding to the driving transistor that needs to be driven needs to be turned on in the light emitting stage and the data writing stage.

[0081] Optionally, as Figure 7 shown, in Figure 7In the pixel circuit shown, the control terminal of the control module is also connected to the first scan signal Scan1. The control terminals of the control module and the first initialization module share a scan signal line, eliminating the need to increase the number of scan signal lines. Meanwhile, during the initialization phase, the control module can be controlled to conduct, thereby configuring the corresponding selection module in the pixel circuit, ensuring that the selection module that needs to be conductive before the data writing phase is in a conductive state, providing more time for data writing, and being more conducive to improving the mura phenomenon.

[0082] For Figure 6 and Figure 7 the pixel circuit shown, the driving process is as follows:

[0083] During the initialization phase, the first scan signal Scan1 is at a low level, the ninth transistor, the seventh transistor M7, the sub-transistor M6-1, and the sub-transistor M6-2 are conductive. The control signals (Sw1, Sw2) are written into the second capacitor C2 through the corresponding ninth transistor, thereby controlling the conduction state of the corresponding eighth transistor. The initialization signal Vref initializes the control node A3 and the first terminal of the light-emitting module 102 to prevent the residual signal of the previous frame from affecting the current frame signal.

[0084] During the data writing phase, the second scan signal Scan2 is at a low level, the first transistor M1, the sub-transistor M4-1, and the sub-transistor M4-2 are conductive. The data voltage Vdata is written into the control node A3 through the first transistor M1, the first node A1, the driving transistor, the second node A2, the sub-transistor M4-1, and the sub-transistor M4-2. When the potential difference between the control node A3 and the second node A2 is the threshold voltage of the driving transistor, the driving transistor turns off, enabling the control node A3 to store the threshold voltage information of the driving transistor, eliminating the influence of the threshold voltage difference of the driving transistor on the emission brightness, and the first capacitor C1 stores the potential of the control node A3.

[0085] During the light-emitting phase, the enable signal EM is at a low level, the second transistor M2, the driving transistor, and the fifth transistor M5 are conductive, and the light-emitting module 102 emits light according to the driving current generated by the driving transistor.

[0086] Of course, Figure 8 is a schematic diagram of the circuit structure of another pixel circuit provided by an embodiment of the present invention. Referring to Figure 8 , the control terminal of the control module is also connected to the second scan signal Scan2. The control module, the data writing module, and the threshold compensation module share a scan signal line, eliminating the need to increase the number of scan signal lines.

[0087] For Figure 8 the pixel circuit shown, the driving process is as follows:

[0088] In the initialization stage, the first scan signal Scan1 is at a low level, and the seventh transistor M7, the sub-transistor M6-1, and the sub-transistor M6-2 are turned on; the initialization signal Vref initializes the control node A3 and the first end of the light-emitting module 102 to prevent the residual signal of the previous frame from affecting the signal of this frame;

[0089] In the data writing stage, the second scan signal Scan2 is at a low level, and the ninth transistor, the first transistor M1, the sub-transistor M4-1, and the sub-transistor M4-2 are turned on; the control signals (Sw1, Sw2) are written into the second capacitor C2 through the corresponding ninth transistor, thereby controlling the conduction state of the corresponding selection module; the data voltage Vdata is written into the control node A3 through the first transistor M1, the first node A1, the driving transistor, the second node A2, the sub-transistor M4-1, and the sub-transistor M4-2. When the potential difference between the control node A3 and the potential of the second node A2 is the threshold voltage of the driving transistor, the driving transistor turns off, so that the control node A3 stores the threshold voltage information of the driving transistor, eliminating the influence of the threshold voltage difference of the driving transistor on the light-emitting brightness, and the first capacitor C1 stores the potential of the control node A3.

[0090] In the light-emitting stage, the enable signal EM is at a low level, the second transistor M2, the driving transistor, and the fifth transistor M5 are turned on, and the light-emitting module 102 emits light according to the driving current generated by the driving transistor.

[0091] Optionally, as Figures 6 to 8 shown, the first end of the selection module 101 is electrically connected to the first end of the corresponding driving transistor, the second end of the selection module is electrically connected to the first node A1, and the control end of the selection module 101 is electrically connected to the corresponding control module; the selection module 101 is used to control the connection state between the first end of the corresponding driving transistor and the first node A1. When Sw2 is a conduction signal and Sw1 is a cut-off signal, the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistor M3-1 and the driving transistor M3-2 work simultaneously and are in a parallel state, equivalently a driving transistor with a large aspect ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signal Sw1 and the control signal Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0092] In some other embodiments, as Figure 9 shown, Figure 9Schematic diagram of the circuit structure of another pixel circuit provided by an embodiment of the present invention. The first end of the selection module 101 is electrically connected to the control end of the corresponding driving transistor, the second end of the selection module 101 is electrically connected to the second node A2, and the control end of the selection module 101 is electrically connected to the corresponding control module. The selection module 101 is used to control the connection state between the second end of the corresponding driving transistor and the second node A2. When Sw2 is a conduction signal and Sw1 is a cut-off signal, the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistors M3-1 and M3-2 work simultaneously and are in a parallel state, equivalently a driving transistor with a large aspect ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signal Sw1 and the control signal Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0093] In some other embodiments, such as Figure 10 shown, Figure 10 Schematic diagram of the circuit structure of another pixel circuit provided by an embodiment of the present invention. The first end of the selection module 101 is electrically connected to the control end of the corresponding driving transistor, the second end of the selection module 101 is electrically connected to the control node A3, and the control end of the selection module 101 is electrically connected to the corresponding control module. The selection module 101 is used to control the connection state between the control end of the corresponding driving transistor and the control node A3. When Sw2 is a conduction signal and Sw1 is a cut-off signal, the driving transistor M3-1 is equivalently connected to the pixel circuit for driving, and the driving transistor M3-2 is equivalently not connected to the pixel circuit, that is, only the driving transistor M3-1 drives at this time; when Sw2 is a conduction signal and Sw1 is a conduction signal, the driving transistors M3-1 and M3-2 work simultaneously and are in a parallel state, equivalently a driving transistor with a large aspect ratio; when Sw2 is a cut-off signal and Sw1 is a conduction signal, at this time the driving transistor M3-1 is equivalently not connected to the pixel circuit, and the driving transistor M3-2 is equivalently connected to the pixel circuit for driving. It can be seen that by configuring the control signal Sw1 and the control signal Sw2, it is possible to control which driving transistor in the pixel circuit drives.

[0094] The present invention also provides a display panel, such as Figure 11 shown, Figure 11A structural schematic diagram of a display panel provided by an embodiment of the present invention. The display panel includes a plurality of pixel circuits provided by any embodiment of the present invention. The display panel can be a display panel on a mobile phone, a tablet computer, an MP3 player, an MP4 player, a smart watch, a smart helmet, or other wearable devices, etc. Since it includes the pixel circuits provided by any embodiment of the present invention, it also has the same beneficial effects, which will not be elaborated here.

[0095] Note that the above is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, it can also include more other equivalent embodiments, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A driving method for a pixel circuit, the pixel circuit including at least two driving transistors connected in parallel, the at least two driving transistors having different width-to-length ratios; characterized in that, The driving method of the pixel circuit includes: Obtaining the maximum display brightness value of a preset area in the to-be-displayed picture; Judging whether the maximum display brightness value of the preset area is greater than a first preset value; If the maximum display brightness value of the preset area is greater than the first preset value, when the to-be-displayed gray level of the preset area is less than a preset gray level, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive; If the maximum display brightness value of the preset area is less than or equal to the first preset value, controlling the driving transistor with the smallest aspect ratio in the pixel circuit corresponding to the preset area to drive.

2. The driving method of the pixel circuit according to claim 1, wherein The at least two driving transistors include a first driving transistor and a second driving transistor, and the aspect ratio of the first driving transistor is greater than that of the second driving transistor; After the maximum display brightness value of the preset area is greater than the first preset value, it includes: Judging whether the maximum display brightness value of the preset area is greater than a second preset value; If the maximum display brightness value of the preset area is greater than the second preset value, obtaining the to-be-displayed gray level of the preset area. If the to-be-displayed gray level is less than or equal to a first preset gray level, controlling the second driving transistor in the pixel circuit corresponding to the preset area to drive. If the to-be-displayed gray level is greater than the first preset gray level, controlling the first driving transistor and the second driving transistor in the pixel circuit corresponding to the preset area to drive simultaneously; If the maximum display brightness value of the preset area is greater than the first preset value and less than or equal to the second preset value, obtaining the to-be-displayed gray level corresponding to the preset area. If the to-be-displayed gray level is less than or equal to a second preset gray level, controlling the second driving transistor in the pixel circuit corresponding to the preset area to drive. If the to-be-displayed gray level is greater than the second preset gray level, controlling the first driving transistor in the pixel circuit corresponding to the preset area to drive; Wherein, the preset gray level is greater than the second preset gray level, and the second preset gray level is greater than the first preset gray level.

3. The driving method of the pixel circuit according to claim 1, wherein The preset area is the entire area of the to-be-displayed picture.

4. The driving method of the pixel circuit according to claim 3, wherein The pixel circuit includes: At least two driving transistors, a first node, a second node, a control node, a light-emitting module, and at least two selection modules corresponding to the at least two driving transistors one by one; The first node is used to access a first power supply voltage, the second node is used to be electrically connected to the light-emitting module, and the control node is used to access a data voltage; The control end of the selection module accesses a control signal, and the selection module is used to control the connection state of at least one of the first end of the corresponding driving transistor and the first node, the second end of the driving transistor and the second node, and the control end of the driving transistor and the control node according to the control signal.

5. A pixel circuit for performing the driving method of the pixel circuit according to claim 1, characterized in that, The pixel circuit includes: at least two driving transistors, a first node, a second node, a control node, a light-emitting module, at least two selection modules corresponding to the at least two driving transistors one by one, and at least two control modules corresponding to the at least two selection modules one by one; The first node is used to access a first power supply voltage, the second node is used to be electrically connected to the light-emitting module, and the control node is used to access a data voltage; The control module is used to write a control signal to the control terminal of the selection module; The selection module is used to control the connection state of at least one of the first end of the driving transistor and the first node, the second end of the driving transistor and the second node, and the control end of the driving transistor and the control node according to the control signal.

6. The pixel circuit according to claim 5, wherein The first end of the selection module is electrically connected to the first end of the corresponding driving transistor, the second end of the selection module is electrically connected to the first node, and the control end of the selection module is electrically connected to the corresponding control module; Alternatively, the first end of the selection module is electrically connected to the second end of the corresponding driving transistor, the second end of the selection module is electrically connected to the second node, and the control end of the selection module is electrically connected to the corresponding control module; Alternatively, the first end of the selection module is electrically connected to the control end of the corresponding driving transistor, the second end of the selection module is electrically connected to the control node, and the control end of the selection module is electrically connected to the corresponding control module.

7. The pixel circuit according to claim 5, wherein The pixel circuit further includes at least two first storage modules corresponding to the at least two selection modules one by one; The first storage module is used to maintain the potential of the control terminal of the corresponding selection module; Wherein, the first end of the control module accesses a corresponding control signal, the second end of the control module is electrically connected to the control terminal of the corresponding selection module, and the control end of the control module accesses a first scan signal; the first end of the first storage module is electrically connected to the control terminal of the corresponding selection module, and the second end of the first storage module accesses a preset voltage.

8. The pixel circuit according to claim 5, wherein The pixel circuit further includes a first initialization module, and the first initialization module is used to write an initialization signal to the control node according to the first scan signal; the pixel circuit further includes a data writing module, and the data writing module is used to write a data voltage to the first node according to the second scan signal.

9. The pixel circuit according to claim 8, wherein The control end of the control module accesses the first scan signal; or the control end of the control module accesses the second scan signal.

10. The pixel circuit according to claim 7, wherein, The pixel circuit further includes a first light-emitting control module, a second light-emitting control module, a threshold compensation module, a second storage module and a data writing module; The first end of the first light-emitting control module accesses the first power supply voltage, the second end of the first light-emitting control module is electrically connected to the first node, and the control end of the first light-emitting control module accesses an enable signal; The first end of the data writing module accesses a data voltage, the second end of the data writing module is electrically connected to the first node, and the control end of the data writing module accesses a second scan signal; The first end of the second storage module accesses the first power supply voltage, and the second end of the second storage module is electrically connected to the control node; The first end of the threshold compensation module is electrically connected to the second node, the second end of the threshold compensation module is electrically connected to the control node, and the control end of the threshold compensation module receives the second scan signal; The first end of the second light emission control module is electrically connected to the second node, the second end of the second light emission control module is electrically connected to the first end of the light emission module, and the control end of the second light emission control module receives the enable signal; The second end of the light emission module receives a second power supply voltage.

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