An adaptive slew rate control circuit, method, device and chip

By designing an adaptive slew rate control circuit, the current generation module outputs a current positively correlated with the input signal voltage difference, solving the problems of slow slew rate control speed and high power consumption in the prior art, and achieving fast response and low power consumption slew rate control.

CN115001424BActive Publication Date: 2025-03-28CHIPSEA TECH SHENZHEN CO LTD
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Patent Information

Application Number
CN202210582153.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-26
Publication Date
2025-03-28
Estimated Expiration
2042-05-26

AI Technical Summary

Technical Problem

In the prior art, the slew rate control circuit has a slow speed and high power consumption, making it difficult to effectively solve the problem of excessive signal establishment time.

Method used

An adaptive slew rate control circuit is designed to receive the input signal through the current generation module and output a current positively correlated with the voltage difference of the input signal to compensate for the slew rate of the output signal. The circuit includes an analog-to-digital conversion module and a current digital-to-analog conversion module, which can respond quickly and reduce power consumption.

Benefits of technology

Fast response and low power consumption are realized to adaptive slew rate control, reducing signal establishment time and improving circuit efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides an adaptive slew rate control circuit, method, device and chip, which is used for a device that provides an output signal according to a signal at a first input terminal and a second input terminal. An example circuit includes: a current generating module, which is configured to receive a signal at a first input terminal and a second input, and output a current that is positively correlated with the voltage difference between the two to the device, so as to compensate for the slew rate of the output signal provided by the above device. Another example circuit includes: multiple current generating modules; an analog-to-digital conversion module, which is configured to receive a signal at a first input terminal and a second input terminal, and convert the voltage difference between the two into a digital signal; a selection module, which is configured to select a current generating module from multiple current generating modules according to the digital signal, so that the first current output by the selected current generating module is positively correlated with the voltage difference, so as to compensate for the slew rate of the output signal provided by the above device. Through the examples of the present disclosure, low-power adaptive slew rate control can be achieved.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic circuits, and in particular to an adaptive slew rate control circuit, method, device and chip. Background Art

[0002] Slew rate refers to the situation where a large step signal is connected to the input of the op amp under large signal conditions, and the output signal waveform will also change greatly, and cutoff or saturation will occur. The maximum slope of the output voltage change is called the slew rate. The slew rate is determined by the load capacitance (or compensation capacitance) and the current. For example, in some operational amplifiers, the operating current of the circuit may change according to the change of the input common mode, which will lead to a change in the slew rate, and in some cases, it will cause the signal to take too long to settling. Therefore, the slew rate is compensated.

[0003] The slew rate control circuit in the related art usually adds several current branches controlled by switches according to the needs of the circuit, or uses a ring oscillator to determine the signal settling time for calibration. These methods are often slow and sometimes introduce additional power consumption. Summary of the invention

[0004] In view of this, the embodiments of the present disclosure provide an adaptive slew rate control circuit, method, device and chip to at least partially solve the technical problem of slew rate control.

[0005] According to one aspect of the present disclosure, an adaptive slew rate control circuit is provided, which is a device for providing an output signal based on signals at a first input terminal and a second input terminal, and includes: a current generating module, which is configured to receive signals at the first input terminal and the second input terminal, and output a current positively correlated with the voltage difference between the first input terminal and the second input terminal to the above-mentioned device to compensate for the slew rate of the output signal provided by the above-mentioned device.

[0006] In some embodiments, the adaptive slew rate control circuit further includes: an analog-to-digital conversion module, configured to receive signals from the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a digital signal, the digital signal including at least one digital bit; wherein the current generating module is configured to start according to the digital signal.

[0007] In some embodiments, the current generating module is a current digital-to-analog converter.

[0008] In some embodiments, the current generating module includes: a transconductance amplifier configured to receive signals at a first input terminal and a second input terminal, and convert a voltage difference between the first input terminal and the second input terminal into a current.

[0009] In some embodiments, the operating speed of the adaptive slew rate control circuit is greater than the operating speed of the device.

[0010] According to another aspect of the present disclosure, an adaptive slew rate control circuit is provided, which is a device for providing an output signal based on a signal at a first input terminal and a signal at a second input terminal, and includes: a plurality of current generating modules configured to output current to the above-mentioned device; an analog-to-digital conversion module configured to receive the signals at the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a digital signal; and a selection module configured to select a current generating module from the plurality of current generating modules based on the digital signal, so that a first current output by the selected current generating module is positively correlated with the voltage difference, so as to compensate for the slew rate of the output signal provided by the above-mentioned device.

[0011] In some embodiments, output ends of multiple current generating modules are connected in parallel; a selection module is configured to select a number of current generating modules corresponding to the digital signal from the multiple current generating modules, wherein the first current is the sum of the second currents output by the selected current generating modules.

[0012] In some embodiments, a plurality of current generating modules output a plurality of second currents of different magnitudes; and a selection module is configured to select a current generating module that outputs a second current of a magnitude corresponding to the digital signal from the plurality of current generating modules.

[0013] In some embodiments, at least one current generating module among the plurality of current generating modules is configured to receive signals from a first input terminal and a second input terminal, and output a second current that is positively correlated with a voltage difference between the first input terminal and the second input terminal.

[0014] In some embodiments, at least one current generating module among the plurality of current generating modules includes: a transconductance amplifier configured to receive signals at a first input terminal and a second input terminal and convert a voltage difference between the first input terminal and the second input terminal into a second current.

[0015] According to another aspect of the present disclosure, an adaptive slew rate control circuit is provided, which is a device for providing an output signal based on signals at a first input terminal and a second input terminal, and includes: an analog-to-digital conversion module, configured to receive signals at the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a digital signal; and a current digital-to-analog conversion module, configured to convert the digital signal into a current and output it to the above-mentioned device to compensate for the slew rate of the output signal provided by the device.

[0016] According to another aspect of the present disclosure, an adaptive slew rate control method is provided, which is a device for providing an output signal based on signals from a first input terminal and a second input terminal, comprising: receiving the signals from the first input terminal and the second input terminal through a current generating module, and outputting a current that is positively correlated with the voltage difference between the first input terminal and the second input terminal; and using current to compensate for the slew rate of the output signal provided by the above-mentioned device.

[0017] According to another aspect of the present disclosure, an adaptive slew rate control method is provided, which is a device for providing an output signal according to signals at a first input terminal and a second input terminal, comprising: receiving the signals at the first input terminal and the second input terminal through an analog-to-digital conversion module, and converting the voltage difference between the first input terminal and the second input terminal into a digital signal; selecting a current generating module from a plurality of current generating modules according to the digital signal, so that the currents output by the plurality of current generating modules are positively correlated with the voltage difference; and using current to compensate for the slew rate of the output signal provided by the above-mentioned device.

[0018] According to another aspect of the present disclosure, an adaptive slew rate control method is provided, which is a device for providing an output signal based on signals at a first input terminal and a second input terminal, comprising: receiving the signals at the first input terminal and the second input terminal through an analog-to-digital conversion module, and converting the voltage difference between the first input terminal and the second input terminal into a digital signal; converting the digital signal into a current through a current digital-to-analog conversion module; and using the slew rate of the output signal provided by a current compensation device.

[0019] According to another aspect of the present disclosure, there is provided a circuit for adaptive slew rate control, comprising: a device for providing an output signal according to signals at a first input terminal and a second input terminal; and an adaptive slew rate control circuit according to an embodiment of the present disclosure.

[0020] According to another aspect of the present disclosure, a chip is provided, comprising: a device for providing an output signal according to signals of a first input terminal and a second input terminal; and an adaptive slew rate control circuit of an embodiment of the present disclosure.

[0021] According to yet another aspect of the present disclosure, an electronic device is provided, comprising: a circuit or chip for adaptive slew rate control according to an embodiment of the present disclosure.

[0022] One or more technical solutions provided in the embodiments of the present disclosure can realize adaptive slew rate control with lower power. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Further details, features and advantages of the present disclosure are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0024] Figure 1 A schematic diagram of the structure of a circuit system according to an exemplary embodiment of the present disclosure is shown;

[0025] Figure 2 A schematic structural diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure is shown;

[0026] Figure 3 Another structural schematic diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure is shown;

[0027] Figure 4 A schematic structural diagram of a transconductance amplifier according to an exemplary embodiment of the present disclosure is shown;

[0028] Figure 5 Another structural schematic diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure is shown;

[0029] Figure 6 Another structural schematic diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure is shown;

[0030] Figure 7 A schematic structural diagram of an operational amplifier circuit according to an exemplary embodiment of the present disclosure is shown;

[0031] Figure 8 The schematic diagram shows the structure of an adaptive slew rate control circuit using a transconductance amplifier. DETAILED DESCRIPTION

[0032] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0033] It should be understood that the various steps described in the method embodiments of the present disclosure may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this respect.

[0034] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "according to" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc. mentioned in this disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0035] It should be noted that the modifications of "one" and "plurality" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0036] Figure 1 A schematic diagram of a circuit system according to an exemplary embodiment of the present disclosure is shown. Figure 1 As shown, the circuit system 100 includes: a device 110 and an adaptive slew rate control circuit 120. The device 110 includes a first input terminal 111, a second input terminal 112 and an output terminal 113. The device 110 is configured to provide an output signal via the output terminal 113 according to signals at the first input terminal 111 and the second input terminal 112.

[0037] In some embodiments, one of the first input terminal 111 or the second input terminal 112 is configured to receive a reference signal, and the other input terminal is configured to receive an input signal.

[0038] In some embodiments, the input is differential and the output can be either differential or single-ended relative to a reference. As an implementation, one output can be used and the other ignored. Alternatively, to avoid sacrificing gain, a differential to single-ended stage can be used after the differential stage. The device 110 is capable of amplifying the difference between the two input signal voltages while suppressing signals common to both inputs.

[0039] In some embodiments, the device 110 is configured to amplify a voltage difference between the first input terminal 111 and the second input terminal 112 .

[0040] In some embodiments, device 110 includes an operational amplifier circuit.

[0041] When a large step signal is connected to the input of the device 110, the output signal waveform will also change greatly, and a cut-off or saturation phenomenon will occur. The maximum slope of the output voltage change is called the slew rate. In some embodiments, the slew rate is determined by the load capacitance (or compensation capacitance) and the current. For example, in some operational amplifiers, the operating current of the circuit may change according to the change of the input common mode, which in turn causes the slew rate to change, and in some cases, it will cause the signal to take too long to settling.

[0042] In addition, higher slew rates require higher operating currents, which results in higher power consumption.

[0043] The adaptive slew rate control circuit 120 is configured to adaptively control the slew rate of the output signal provided by the device 110 based on the voltage difference between the first input terminal 111 and the second input terminal 112 .

[0044] The adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure is described below with reference to the accompanying drawings.

[0045] Figure 2 FIG. 4 shows a schematic diagram of a structure of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure. Figure 2 As shown, the adaptive slew rate control circuit 200 includes: a current generating module 210. The current generating module 210 is configured to receive signals from a first input terminal and a second input terminal, and output a current positively correlated with the voltage difference between the first input terminal and the second input terminal to the device 110 to compensate for the slew rate of the output signal provided by the device 110. Since the current used to compensate for the slew rate is positively correlated with the voltage difference between the first input terminal and the second input terminal, the corresponding current is provided to compensate for the slew rate in response to the change of the voltage difference, which can reduce the power consumption of the circuit and has a faster response speed than the current branch controlled by the switch.

[0046] In some embodiments, Figure 3 As shown, the adaptive slew rate control circuit 200 further includes: an analog-to-digital conversion module 220. The analog-to-digital conversion module 220 is configured to receive a signal from a first input terminal and a second input terminal, and convert a voltage difference between the signal from the first input terminal and the signal from the second input terminal into a digital signal, wherein the digital signal includes at least one digital bit. The current generating module 210 is configured to be started according to a digital signal output by the analog-to-digital conversion module 220. The analog-to-digital conversion module 220 outputs a digital signal, which can enable the current generating module 210 to output current to supplement the slew rate according to the magnitude of the voltage difference, thereby further reducing power consumption.

[0047] As an example, the digital signal includes one digital bit, and the current generating module 210 is enabled when the digital signal is at a high level. The analog-to-digital conversion module 220 outputs a 1-bit digital signal, which can enable the current generating module 210 to output current to supplement the slew rate when the voltage difference is greater than or equal to the threshold value. The slew rate can be supplemented when the voltage difference is large, which can further reduce power consumption.

[0048] In this embodiment, the analog-to-digital conversion module 220 has a higher conversion rate than other circuits, so that the adaptive slew rate control circuit 200 has a faster response speed. The analog-to-digital conversion module 220 can use various types of analog-to-digital converters. Generally, there is no requirement for the accuracy of the analog-to-digital conversion module 220, and an analog-to-digital conversion module with a higher conversion speed is selected, such as a Flash analog-to-digital converter, a pipeline analog-to-digital converter, etc. This embodiment is not limited to this.

[0049] As an embodiment, the current generating module 210 may include: a transconductance amplifier. The transconductance amplifier is configured to receive signals from a first input terminal and a second input terminal, and convert the voltage difference between the signals from the first input terminal and the second input terminal into a current. Generally, when the signal from the first input terminal is equal to the signal from the second input terminal, the transconductance amplifier hardly outputs a current, and the greater the voltage difference between the signals from the first input terminal and the second input terminal, the greater the current output by the transconductance amplifier, and therefore the current converted by the transconductance amplifier is positively correlated with the input voltage difference.

[0050] As an example, Figure 4 As shown, the transconductance amplifier includes: a transconductance input stage 410, a current mirror 421 and a current mirror 422. The transconductance input stage 410 converts the input signal ( Figure 4 The voltage difference (represented as Vip and Vin) in the circuit is converted into current. When Vin and Vip are equal, no current is output. When Vin and Vip differ greatly, there will be a significant difference in the current of the two input tube branches, and the difference in current will be reflected at IPD1 and IPD2 through current mirrors 421 and 422, thereby outputting current to compensate for the slew rate through the current. The larger the input voltage difference, the larger the current output at IPD1 and IPD2.

[0051] refer to Figure 4 As shown, the transconductance input stage 410 has two bias current input terminals, which receive bias currents IB1 and IB2 respectively. Figure 3As shown, the transconductance amplifier can be enabled by controlling the on and off of the bias currents IB1 and IB2 based on the digital signal output by the analog-to-digital conversion module 220. When the bias currents IB1 and IB2 are turned on, the transconductance amplifier is enabled to output current for slew rate compensation; when the bias currents IB1 and IB2 are turned off, the transconductance amplifier does not output current.

[0052] Figure 5 2 shows another structural schematic diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure, as shown in FIG. Figure 5 As shown, the adaptive slew rate control circuit 500 includes: a plurality of current generating modules ( Figure 5 , current generating modules 510a to 510d), analog-to-digital conversion module 520 and selection module 530. It should be understood that Figure 5 The current generating modules 510a to 510d are merely exemplary and are not intended to limit the number of current generating modules.

[0053] refer to Figure 5 As shown, the analog-to-digital conversion module 520 is configured to receive signals from the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a digital signal. The selection module 530 is configured to select a current generating module from the current generating modules 510a to 510d according to the digital signal, so that the current output by the selected current generating module is positively correlated with the voltage difference. Based on the control of the digital signal, multi-level control can be achieved.

[0054] In this embodiment, the analog-to-digital conversion module 520 may include various types of analog-to-digital converters. Generally, the accuracy of the analog-to-digital conversion module 520 is not required, and an analog-to-digital conversion module with a higher conversion speed is selected, such as a Flash analog-to-digital converter, a pipeline analog-to-digital converter, etc. This embodiment does not limit this. In practical applications, an analog-to-digital converter with a corresponding number of bits can be selected based on aspects such as slew rate control accuracy, such as 2 bits, 3 bits, 4 bits, etc. This embodiment does not limit this.

[0055] As an embodiment, the output ends of the current generating modules 510a to 510d are connected in parallel to output a current, which is the superposition of the output currents of one or more current generating modules 510a to 510d. The current magnitude output by each current generating module in the current generating modules 510a to 510d is the same or different. The selection module 530 is configured to select a number of current generating modules corresponding to the digital signal output by the analog-to-digital conversion module 520 from the current generating modules 510a to 510d. Exemplarily, in the case where the current magnitude output by each current generating module in the current generating modules 510a to 510d is the same, the larger the voltage difference, the more current generating modules are selected, and the larger the current used to compensate for the slew rate.

[0056] As an example, the digital bits output by the analog-to-digital conversion module 520 include 2 binary digital bits. When the two binary digital bits are "00", the selection module 530 selects one current generating module from the current generating modules 510a to 510d. When the two binary digital bits are "01", the selection module 530 selects two current generating modules from the current generating modules 510a to 510d. When the two binary digital bits are "10", the selection module 430 selects three current generating modules from the current generating modules 510a to 510d. When the two binary digital bits are "11", the selection module 530 selects four current generating modules from the current generating modules 510a to 510d. As an example, the selection module 530 may encode the binary digital bits output by the analog-to-digital conversion module 520 into a thermometer code, and each thermometer code may correspond to an enable control terminal of a current generating module. As an example, the currents output by the current generating modules 510a to 510d are all I. In the above example, the currents used to compensate for the slew rate are I, 2*I, 3*I and 4*I respectively, but are not limited thereto.

[0057] As another example, the digital signal output by the analog-to-digital conversion module 520 is a thermometer code, the selection module 530 is a transmission line between the analog-to-digital conversion module 520 and the current generating modules 510a to 510d, and each bit of the thermometer code may correspond to an enable control terminal of a current generating module.

[0058] As another embodiment, the current generating modules 510a to 510d output a plurality of currents of different magnitudes. The selecting module 530 selects a current generating module that outputs a current of a magnitude corresponding to the digital signal from the current generating modules 510a to 510d. The current generating modules 510a to 510d output a plurality of second currents of different magnitudes, for example, the magnitudes of the currents output by the current generating modules 510a to 510d increase in sequence.

[0059] As an example, the digital bits output by the analog-to-digital conversion module 520 include 2 binary digital bits. When the two binary digital bits are "00", the current generating module 510a is selected, and the current is I_a; when the two binary digital bits are "01", the current generating module 510b is selected, and the current is I_b; when the two binary digital bits are "10", the current generating module 510c is selected, and the current is I_c; when the two binary digital bits are "11", the current generating module 510d is selected, and the current is I_d. Wherein, I_a <I_b<I_c<I_d。

[0060] As an implementation manner, at least some of the current generation modules 510a to 510d are configured to receive signals from a first input terminal and a second input terminal, and output a current that is positively correlated with the voltage difference between the first input terminal and the second input terminal. Thus, fast response can be achieved. Optionally, all of the current generation modules 510a to 510d receive signals from the first input terminal and the second input terminal, and output a current that is positively correlated with the voltage difference between the first input terminal and the second input terminal.

[0061] As an example, all of the current generation modules 510a to 510d receive signals from the first input terminal and the second input terminal, and output a current that is positively correlated with the voltage difference between the first input terminal and the second input terminal. When the voltage difference is V1, each of the current generation modules 510a to 510d outputs a current of I1, and the corresponding digital signal is D1. The selection module 530 selects 1 current generation module based on D1, and the current for compensating the slew rate is I1; when the voltage difference is V2, each of the current generation modules 510a to 510d outputs a current of I2, and the corresponding digital signal is D2. The selection module 530 selects 2 current generation modules based on D2, and the current for compensating the slew rate is 2*I2. When the voltage difference is V3, each of the current generation modules 510a to 510d outputs a current of I3, and the corresponding digital signal is D3. The selection module 530 selects 3 current generation modules based on D3, and the current for compensating the slew rate is 3*I3. Since the current output by each current generation module is positively correlated with the voltage difference, when V1 < V2 < V3 < V4, I1 < I2 < I3 < I4, and fast response can be achieved.

[0062] As another example, all of the current generation modules 510a to 510d receive signals from the first input terminal and the second input terminal, and output a current that is positively correlated with the voltage difference between the first input terminal and the second input terminal. The currents output by the current generation modules 510a to 510d are a*I(V), b*I(V), c*I(V), and d*I(V) respectively, and a < b < c < d. When the voltage difference is V1, the currents output by the current generation modules 510a to 510d are a*I(V1), b*I(V1), c*I(V1), and d*I(V1) respectively, and the corresponding digital signal is D1. The selection module 530 selects the current generation module 510a based on D1, and the current for compensating the slew rate is a*I(V1); when the voltage difference is V2, the currents output by the current generation modules 510a to 510d are a*I(V2), b*I(V2), c*I(V2), and d*I(V2) respectively, and the corresponding digital signal is D2. The selection module 530 selects the current generation module 510b based on D2, and the current for compensating the slew rate is b*I(V2). Since V1 < V2, a*I(V1) < a*I(V2) < b*I(V2).

[0063] As an implementation manner, at least some of the current generation modules 510a to 510d are current digital-to-analog converters.

[0064] As an implementation manner, at least some of the current generation modules 510a to 510d include: a transconductance amplifier configured to receive signals at a first input terminal and a second input terminal, and convert a voltage difference between the first input terminal and the second input terminal into a current. Wherein, the magnitude of the current is positively correlated with the voltage difference.

[0065] Figure 6 Shows a further structural schematic diagram of an adaptive slew rate control circuit according to an exemplary embodiment of the present disclosure, as Figure 6 shown, the adaptive slew rate control circuit 600 includes: an analog-to-digital conversion module 610 and a current digital-to-analog conversion module 620.

[0066] Referring to Figure 6 shown, the analog-to-digital conversion module 610 is configured to receive signals at a first input terminal and a second input terminal, and convert a voltage difference between the first input terminal and the second input terminal into a digital signal. The current digital-to-analog conversion module 620 is configured to convert the digital signal output by the analog-to-digital conversion module 610 into a current and output it to the device 110 to compensate for the slew rate of the output signal. Thus, adaptive multi-level slew rate control is achieved.

[0067] In this embodiment, the analog-to-digital conversion module 610 may include various types of analog-to-digital converters, for example, Flash analog-to-digital converters, pipelined analog-to-digital converters, etc. This embodiment does not make any limitations in this regard. In practical applications, an analog-to-digital converter with a corresponding number of bits can be selected based on aspects such as slew rate control accuracy, for example, 2-bit, 3-bit, 4-bit, etc. This embodiment does not make any limitations in this regard.

[0068] As an example, taking 2-bit analog-to-digital conversion as an example, the analog-to-digital conversion module 610 converts the voltage difference between the first input terminal and the second input terminal into a digital signal including 2 digital bits, and the current digital-to-analog conversion module 620 converts this digital signal into a current. For example, when the voltage difference is V1, the digital signal output by the analog-to-digital conversion module 610 is "00", and the current digital-to-analog conversion module 620 receives this digital signal and outputs a current of I1 after digital-to-analog conversion; when the voltage difference is V2, the digital signal output by the analog-to-digital conversion module 610 is "01", and the current digital-to-analog conversion module 620 receives this digital signal and outputs a current of I2 after digital-to-analog conversion; when the voltage difference is V3, the digital signal output by the analog-to-digital conversion module 610 is "10", and the current digital-to-analog conversion module 620 receives this digital signal and outputs a current of I3 after digital-to-analog conversion. When V1 < V2 < V3, I1 < I2 < I3.

[0069] Figure 7 FIG. 4 shows a schematic diagram of a structure of an operational amplifier circuit according to an exemplary embodiment of the present disclosure, as shown in FIG. Figure 7 As shown, the operational amplifier circuit includes: an operational amplifier 710 and an adaptive slew rate control circuit 720. The operational amplifier 710 receives Vin and Vip and outputs Vout based on Vin and Vip. The adaptive slew rate control circuit 720 includes an analog-to-digital converter (ADC) 721 and a current digital-to-analog converter (IDAC) 722.

[0070] refer to Figure 7 As shown, the analog-to-digital converter 721 receives Vin and Vip, and converts the voltage difference between Vin and Vip into a digital signal, and the digital signal controls the current digital-to-analog converter 722. The current digital-to-analog converter 722 outputs a current based on the digital signal.

[0071] Figure 8 FIG. 4 shows a schematic diagram of a structure of an adaptive slew rate control circuit using a transconductance amplifier. Figure 8 As shown, the current digital-to-analog converter 722 includes a plurality of IDAC units ( Figure 8 Each IDAC unit receives Vin and Vip, and the voltage difference between Vin and Vip is converted into a current signal. The output terminals of the IDAC units 722a to 722n are connected in parallel to output IPD1 and IPD2. Exemplarily, the IDAC unit may be a transconductance amplifier, such as the aforementioned Figure 4 transconductance amplifier.

[0072] The input signals Vin and Vip enter the analog-to-digital converter 721, and the corresponding digital code is generated according to the size of the differential mode (voltage difference) of the input signal. The digital code is used to achieve: when the differential mode signal is very small, a single IDAC unit works, and the larger the differential mode signal, the more IDAC units work. This achieves slew rate compensation for circuits with higher slew rate requirements.

[0073] The slew rate is automatically adjusted in real time, that is, the operational amplifier keeps working, and the adaptive slew rate control circuit also keeps working, and can compensate the slew rate in real time according to the input signal. The required power consumption is smaller than other compensation schemes, and different current gears can be provided through ADCs with different bits according to the application scenario.

[0074] The above is a detailed introduction to the adaptive slew rate control circuit provided by the present disclosure. Specific examples are used in this article to illustrate the principles and implementation methods of the present disclosure. The description of the above embodiments is only used to help understand the method of the present disclosure and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present disclosure, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present disclosure.

Claims

1. An adaptive slew rate control circuit, a device for providing an output signal according to a signal at a first input terminal and a second input terminal, characterized in that: include: a current generating module configured to receive signals of the first input terminal and the second input terminal, and output a current positively correlated with a voltage difference between the first input terminal and the second input terminal to the device to compensate for a slew rate of the output signal provided by the device; an analog-to-digital conversion module, configured to receive signals from the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a digital signal, wherein the digital signal includes at least one digital bit; Wherein, the current generating module is configured to be started according to the digital signal.

2. The adaptive slew rate control circuit according to claim 1, characterized in that: The current generating module comprises: The transconductance amplifier is configured to receive the signals of the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into the current.

3. The adaptive slew rate control circuit according to claim 1, characterized in that: The operating speed of the adaptive slew rate control circuit is greater than the operating speed of the device.

4. An adaptive slew rate control circuit, a device for providing an output signal according to a signal at a first input terminal and a signal at a second input terminal, characterized in that: include: a plurality of current generating modules configured to output current to the device; an analog-to-digital conversion module, configured to receive signals from the first input terminal and the second input terminal, and convert a voltage difference between the first input terminal and the second input terminal into a digital signal; The selection module is configured to select a current generating module from the multiple current generating modules according to the digital signal, so that the first current output by the selected current generating module is positively correlated with the voltage difference to compensate for the slew rate of the output signal provided by the device.

5. The adaptive slew rate control circuit according to claim 4, characterized in that: The output ends of the multiple current generating modules are connected in parallel; The selection module is configured to select current generating modules whose number corresponds to the digital signal from the multiple current generating modules, wherein the first current is the sum of the second currents output by the selected current generating modules.

6. The adaptive slew rate control circuit according to claim 4, characterized in that: The multiple current generating modules output multiple second currents of different magnitudes; The selection module is configured to select a current generating module that outputs a second current having a magnitude corresponding to the digital signal from among the multiple current generating modules.

7. The adaptive slew rate control circuit according to any one of claims 4 to 6, characterized in that: At least one of the multiple current generating modules is configured to receive signals from the first input terminal and the second input terminal, and output a second current that is positively correlated with the voltage difference between the first input terminal and the second input terminal.

8. The adaptive slew rate control circuit according to any one of claims 4 to 6, characterized in that: The current generating module is a current digital-to-analog converter.

9. The adaptive slew rate control circuit according to any one of claims 4 to 6, characterized in that: At least one of the plurality of current generating modules comprises: The transconductance amplifier is configured to receive signals at the first input terminal and the second input terminal, and convert the voltage difference between the first input terminal and the second input terminal into a second current.

10. An adaptive slew rate control circuit, a device for providing an output signal according to signals at a first input terminal and a second input terminal, characterized in that: include: an analog-to-digital conversion module, configured to receive signals from the first input terminal and the second input terminal, and convert a voltage difference between the first input terminal and the second input terminal into a digital signal; The current digital-to-analog conversion module is configured to convert the digital signal into a current and output the current to the device to compensate for the slew rate of the output signal provided by the device.

11. An adaptive slew rate control method, a device for providing an output signal according to a signal at a first input terminal and a second input terminal, characterized in that: include: Converting the voltage difference between the first input terminal and the second input terminal into a digital signal through an analog-to-digital conversion module, wherein the digital signal includes at least one digital bit; Start the current generating module according to the digital signal; The current generating module receives signals from the first input terminal and the second input terminal, and outputs a current that is positively correlated with a voltage difference between the first input terminal and the second input terminal; The current is used to compensate for a slew rate of the output signal provided by the device.

12. An adaptive slew rate control method, a device for providing an output signal according to a signal at a first input terminal and a second input terminal, characterized in that: include: Receiving signals from the first input terminal and the second input terminal through an analog-to-digital conversion module, and converting a voltage difference between the first input terminal and the second input terminal into a digital signal; selecting a current generating module from a plurality of current generating modules according to the digital signal, so that the current output by the plurality of current generating modules is positively correlated with the voltage difference; The current is used to compensate for a slew rate of the output signal provided by the device.

13. An adaptive slew rate control method, a device for providing an output signal according to signals at a first input terminal and a second input terminal, characterized in that: include: receiving signals from the first input terminal and the second input terminal through an analog-to-digital conversion module, and converting a voltage difference between the first input terminal and the second input terminal into a digital signal; Converting the digital signal into current through a current digital-to-analog conversion module; The current is used to compensate for a slew rate of the output signal provided by the device.

14. A circuit for adaptive slew rate control, characterized in that: include: means for providing an output signal in dependence upon the signal at the first input and the second input; An adaptive slew rate control circuit according to any one of claims 1 to 10.

15. A chip, characterized in that: include: means for providing an output signal in dependence upon the signal at the first input and the second input; An adaptive slew rate control circuit according to any one of claims 1 to 10.

16. An electronic device, characterized in that: include: The adaptive slew rate control circuit according to any one of claims 1 to 10, the adaptive slew rate controlled circuit according to claim 14, or the chip according to claim 15.

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