Semiconductor processing chamber, manufacturing apparatus, and cleaning method

Abstract

The application discloses a semiconductor processing cavity, a manufacturing device and a cleaning method, and relates to the technical field of semiconductor manufacturing devices, and aims to solve the problem caused by the deposition of by-products in the processing cavity after dry etching of a device. The semiconductor processing cavity comprises a cover body, an inert gas channel, an outer electrode and a protection ring located at the outer periphery of the outer electrode. The projection of the outer electrode on the cover body is located in a non-central region of the cover body. The inert gas channel has a first part and a second part in communication. The first part passes through the cover body and the outer electrode and is used for introducing inert gas into the semiconductor processing cavity from the side of the outer electrode away from the cover body. The second part passes through the cover body and the protection ring and is used for introducing inert gas into the semiconductor processing cavity from the side of the protection ring away from the cover body and the inner side surface of the protection ring. The semiconductor manufacturing device comprises the semiconductor processing cavity. The semiconductor processing cavity cleaning method is used for cleaning the semiconductor processing cavity.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a semiconductor processing cavity, a manufacturing device and a cleaning method. BACKGROUND

[0002] A conventional semiconductor processing cavity, after dry etching, has by-products attached in the cavity. The inner electrode and the protection ring of the cavity, which are located in the poor gas flow area, are prone to by-product accumulation. As the by-products increase, the etching in the etching process is affected by the residual by-products, which can cause abnormal feature size of the product and other problems. The conventional processing method is to clean and maintain the cavity regularly. As the service cycle of the cavity increases, the maintenance frequency also increases. SUMMARY

[0003] The present application aims to provide a semiconductor processing cavity, a manufacturing device and a cleaning method to solve the problems caused by the deposition of by-products in the cavity after dry etching of the device.

[0004] In a first aspect, the present application provides a semiconductor processing cavity, comprising: a cover, an inert gas channel, an outer electrode, and a protection ring located at the outer periphery of the outer electrode. The projection of the outer electrode on the cover is located in the non-central area of the cover. The inert gas channel has a first part and a second part connected in communication. The first part passes through the cover and the outer electrode, and is used to introduce inert gas into the semiconductor processing cavity from the side of the outer electrode away from the cover. The second part passes through the cover and the protection ring, and is used to introduce inert gas into the semiconductor processing cavity from the side of the protection ring away from the cover and the inner side of the protection ring.

[0005] Compared with the prior art, the first part of the inert gas channel can introduce inert gas, so that the inert gas enters the semiconductor processing cavity through the cover and the outer electrode, and the dry etching gas or by-products existing on the side of the outer electrode away from the cover are pushed out of the semiconductor processing cavity. The second part of the inert gas channel is used to introduce the inert gas into the semiconductor processing cavity through the cover and the protection ring, and then through the side of the protection ring away from the cover, so as to push the dry etching gas or by-products on the side of the protection ring away from the cover out of the semiconductor processing cavity. That is, through the inert gas channel, the inert gas can be used to clean and blow the parts in the poor gas flow area of the cavity, so that these areas and parts will not have by-products attached and deposited, and the cleanliness of the cavity is maintained, so that the subsequent dry etching is not affected by the above dry etching gas or by-products, and finally the precision and quality of etching are not affected.

[0006] In a second aspect, the present application further provides a semiconductor manufacturing device comprising the semiconductor processing cavity of the above technical solution.

[0007] Compared with the prior art, the semiconductor manufacturing equipment provided by the present application has the same beneficial effects as the semiconductor processing cavity described in the technical solution above, which will not be repeated here.

[0008] In a third aspect, the present application further provides a semiconductor processing cavity cleaning method, which is applied to the semiconductor manufacturing equipment having the technical solution above, and the semiconductor processing cavity cleaning method comprises:

[0009] After the semiconductor processing cavity completes dry etching on the semiconductor processing piece, the inert gas is introduced into the semiconductor processing cavity through the inert gas passage, and the inert gas is used to clean the semiconductor processing cavity in situ.

[0010] Compared with the prior art, after the dry etching is completed in the processing cavity, the inert gas is used for in-situ cleaning, and the by-products generated in the dry etching are blown away before they are deposited in the processing cavity, so that the by-products will not be deposited in the processing cavity. BRIEF DESCRIPTION OF DRAWINGS

[0011] The accompanying drawings, which are included to provide a further understanding of the present application, form a part of the present application and illustrate the illustrative embodiments of the present application and its description, which do not constitute improper limitations on the present application. In the drawings:

[0012] Figure 1 The structure schematic diagram of the semiconductor processing cavity provided for the embodiments of the present application is shown in the figure;

[0013] Figure 2 The structure schematic diagram of the protection ring provided for the embodiments of the present application is shown in the figure.

[0014] Reference signs:

[0015] 1-cover, 2-inert gas passage, 3-inner electrode, 4-outer electrode, 5-protection ring, 51-groove, 52-first gas outlet, 53-third gas outlet, 6-control ring. DETAILED DESCRIPTION

[0016] In order to make the technical problems to be solved by the present application, the technical solutions and the beneficial effects more clear and explicit, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and do not limit the present application.

[0017] It should be noted that when an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0018] In addition, the terms "first", "second", "third", etc. are used herein only to describe different instances, and are not used to indicate or imply relative importance or a number of indications of the technical features indicated. Therefore, the technical features defined as "first", "second", "third", etc. can explicitly or implicitly include one or more of the technical features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.

[0019] In the description of the present application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", etc. indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0020] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connection" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be direct connection, or indirect connection through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0021] In semiconductor manufacturing technology, plasma etching is the most commonly used technology in dry etching. Plasma is generated by radio frequency technology. Under the action of radio frequency, gas generates neutral ions, electrons, active free radicals, positively charged ions and negatively charged ions. Among them, the positively charged ions physically bombard the substrate or the target under the action of the electric field, and the active free radicals are adsorbed on the target surface and chemically react with the target surface to generate volatile products (also known as by-products).

[0022] After conventional semiconductor processing chamber is subjected to dry etching, the above-mentioned by-products will be attached in the processing chamber. The parts such as inner electrode, protection ring and control ring of the processing chamber located in the area with poor gas flow are prone to by-product accumulation. With the increase of by-products and the attachment time, the by-products will be deposited on the above-mentioned parts. In the subsequent etching process, the by-products exist under the action of the electric field and have the possibility of etching the wafer. At the same time, the by-products can also react with the reaction gas for subsequent etching, so that the etching cannot be carried out as expected, that is, the by-products remaining in the processing chamber are prone to cause problems such as abnormal feature size of the product. At present, the common processing method is to periodically open the chamber for cleaning and maintenance. With the increase of the use cycle of the processing chamber, the maintenance frequency is correspondingly increased.

[0023] To solve the above technical problems, referring to Figure 1 , the embodiment of the present application provides a semiconductor processing cavity, which comprises a cover 1, an inert gas channel 2, an outer electrode 4, and a protection ring 5 located at the periphery of the outer electrode 4, and the projection of the inner electrode 3 on the cover 1 is located in the central region of the cover 1. The inert gas channel 2 has a first part and a second part in communication, the first part of the inert gas channel 2 passes through the cover 1 and the outer electrode 4, and is used for introducing the inert gas into the semiconductor processing cavity from the side of the outer electrode 4 away from the cover 1. The second part of the inert gas channel 2 passes through the cover 1 and the protection ring 5, and is used for introducing the inert gas into the semiconductor processing cavity from the side of the protection ring 5 away from the cover 1 and the inner side surface of the protection ring 5.

[0024] As shown in Figure 1 , the above semiconductor processing cavity can be a semiconductor processing cavity of model 2300 Flex Series. The semiconductor processing cavity is provided with a cover 1, an inner electrode 3, an outer electrode 4, a protection ring 5, and a control ring 6 as shown in Figure 1 . The projection of the outer electrode 4 on the cover 1 is located in a non-central region of the cover 1. The above-mentioned inner electrode 3, outer electrode 4, protection ring 5, and control ring 6 and other components are located in a region with poor gas flow in the processing cavity (the region is shown as a dashed box in Figure 1 ), and the above-mentioned by-product deposition phenomenon is prone to occur in daily use.

[0025] As shown in Figure 1 , the above inert gas channel 2 has multiple parts or branches, which are used for guiding the inert gas to flow to the corresponding components and blow away in the above-mentioned region. The first part of the inert gas channel 2 passes through the cover 1 and the outer electrode 4, and the inert gas flows out of the outer electrode 4 after being introduced into the first part of the inert gas channel 2. Therefore, the inert gas sweeps the surface of the outer electrode 4, and improves the gas flow around the outer electrode 4, so that the by-products on the outer electrode 4 and around the outer electrode 4 are blown away by the inert gas. That is, the inert gas channel 2 can prevent the outer electrode 4 from being attached by the by-products.

[0026] As shown in Figure 1 , the second part of the above inert gas channel 2 passes through the cover 1 and the protection ring 5, and the inert gas flows out of the protection ring 5 after being introduced into the second part of the inert gas channel 2. Therefore, the inert gas sweeps the surface of the protection ring 5, and improves the gas flow around the protection ring 5, so that the by-products on the protection ring 5 and around the protection ring 5 are blown away by the inert gas. That is, the inert gas channel 2 can prevent the protection ring 5 from being attached by the by-products.

[0027] As shown in Figure 1 and Figure 2As shown in the figure, the protective ring 5 has a groove 51 on the side close to the outer electrode 4. The second part of the inert gas channel 2 includes at least one first gas outlet 52, which is located at the bottom of the groove 51. Therefore, when the inert gas is blown out of the first gas outlet 52 of the groove 51, the by-products accumulated in the groove 51 can be blown away. At the same time, the distance between the side of the groove 51 close to the cover 1 and the cover 1 is greater than or equal to the distance between the side of the outer electrode 4 away from the cover 1 and the cover 1. That is, the highest level of the side wall of the groove 51 is lower than the lowest level of the outer electrode 4, so that when the inert gas is blown out of the groove 51, it will not be blocked by the outer electrode 4, ensuring the degree of gas flow around the groove 51, and the by-products can be blown away smoothly.

[0028] As shown in the figure, Figure 2 the semiconductor processing chamber further includes a control ring 6 on the side of the protective ring 5 away from the cover 1. The second part of the inert gas channel 2 includes at least one second gas outlet 53. The at least one second gas outlet 53 is located on the surface of the protective ring 5 facing the pressure control ring 6. In the existing semiconductor processing chamber, the control ring 6 is immediately adjacent to the protective ring 5, and the gap between the two is small, so the gas flow is poor. Through the second gas outlet 53, the inert gas can pass into the gap between the two and blow away the by-products there.

[0029] As shown in the figure, Figure 1 the inert gas channel 2 further has a third part passing through the cover 1 and the inner electrode 3. After the inert gas enters the third part of the inert gas channel 2, it will flow out of the inner electrode 3. Therefore, the inert gas will sweep the surface of the inner electrode 3, and at the same time, the gas flow around the inner electrode 3 will be improved, so that the by-products on and around the inner electrode 3 will be blown away by the inert gas. That is, the use of the inert gas channel 2 can prevent the inner electrode 3 from being attached by the by-products.

[0030] As shown in the figure, Figure 1 the distance between the side of the inner electrode 3 away from the cover 1 and the cover 1 is less than the distance between the side of the outer electrode 4 away from the cover 1 and the cover 1. That is, the lowest level of the inner electrode 3 is higher than the lowest level of the outer electrode 4. Therefore, the gas flow around the outer periphery of the inner electrode 3 is guaranteed, and in combination with the effect of the inert gas blown out of the second gas outlet 53 in the groove 51 of the protective ring 5. The inert gas introduced by the inert gas channel 2 flows from the originally poor flow area to the center of the processing chamber, is not blocked by the inner electrode 3, blows the by-products from the originally poor flow area to the center of the processing chamber, and then is blown away downward by the inert gas blown out of the third part of the inert gas channel 2, and is pumped out of the processing chamber to the outside of the processing chamber.

[0031] Compared with the prior art, the first part of the inert gas channel 2 can be connected to the inert gas, so that the inert gas enters the semiconductor processing chamber through the cover body 1 and the outer electrode 4, and the dry etching gas or by-products existing on the side of the outer electrode 4 away from the cover body 1 is pushed out of the semiconductor processing chamber. The second part of the inert gas channel 2 is used to connect the inert gas to the semiconductor processing chamber through the cover body 1 and the protection ring 5, and then the dry etching gas or by-products on the side of the protection ring 5 away from the cover body 1 is pushed out of the semiconductor processing chamber. That is, through the inert gas channel 2, the parts in the area with poor gas flow in the processing chamber can be purged and cleaned by the inert gas, so that the area and the parts do not have deposits caused by the attachment of by-products, the cleanliness of the processing chamber is maintained, and the subsequent dry etching is not affected by the dry etching gas or by-products, and finally the precision and quality of the etching are not affected.

[0032] The embodiment of the present application also provides a semiconductor manufacturing equipment including the semiconductor processing chamber and a gas supply device connected to the inert gas channel, and the gas supply device is used to provide the inert gas to the semiconductor processing chamber through the inert gas channel. The inert gas can be nitrogen or argon.

[0033] The gas supply device can have many specific forms, which are not limited herein. For example, the gas supply device can include an inert gas supply source, a gas supply pipeline and a control assembly. The gas supply pipeline is located between the inert gas supply source and the semiconductor processing chamber. The control assembly is arranged on the gas supply pipeline, and is used to adjust the flow of the inert gas flowing through the gas supply pipeline according to the requirement, and prevent the inert gas from flowing back.

[0034] It should be understood that the above examples are not limited to the semiconductor manufacturing equipment provided by the embodiment of the present application.

[0035] Compared with the prior art, the semiconductor manufacturing equipment provided by the present application has the same beneficial effects as the semiconductor processing chamber described in the above technical solution, which will not be repeated here.

[0036] In a third aspect, the embodiment of the present application also provides a semiconductor processing chamber cleaning method applied to the semiconductor manufacturing equipment having the above technical solution, and the semiconductor processing chamber cleaning method includes:

[0037] After the semiconductor processing chamber completes the dry etching of the semiconductor processing piece, the inert gas is introduced into the semiconductor processing chamber through the inert gas channel, and the inert gas is used to clean the semiconductor processing chamber in situ. The in-situ cleaning time can be 1 minute to 10 minutes.

[0038] Before opening the processing chamber after each dry etching process, the above-mentioned cleaning method can effectively remove byproducts from the processing chamber. This prevents the deposition of byproducts within the processing chamber and also prevents the possibility of corrosion caused by the reaction of oxygen and moisture in the air with the byproducts after the processing chamber is opened.

[0039] When the cleaning method provided in this embodiment of the invention is used, the time required for traditional wafer-less auto cleaning (WAC) can be reduced, and this step can even be eliminated. By using the above cleaning method, the service life of components in areas with poor gas flow can be extended, and the impact of byproducts during the etching process can be reduced, thus minimizing process variations in etching.

[0040] Compared with existing technologies, after dry etching is completed in the processing chamber, inert gas is used for in-situ cleaning. Before the by-products generated by dry etching adhere and precipitate in the processing chamber, the by-products are purged, so that the by-products will not be deposited inside the processing chamber.

[0041] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0042] Although the invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely exemplary descriptions of the invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if such modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include such modifications and modifications.

Claims

1. A semiconductor processing cavity, characterized in that, The semiconductor processing chamber comprises: a cover, an inert gas channel, an outer electrode, and a protection ring located at the outer periphery of the outer electrode; wherein the projection of the outer electrode on the cover is located at a non-central region of the cover; the internal structure corresponding to the semiconductor processing chamber is a chamber structure with by-products attached after dry etching; the side of the protection ring close to the outer electrode has a groove; the distance between the groove close to the cover and the cover is greater than or equal to the distance between the side of the outer electrode away from the cover and the cover; the inert gas channel has a first part and a second part in communication; the first part passes through the cover and the outer electrode, and is used for introducing inert gas from the side of the outer electrode away from the cover into the semiconductor processing chamber; the second part includes at least one first gas outlet; the at least one first gas outlet is located at the bottom of the groove; the second part passes through the cover and the protection ring, and is used for introducing the inert gas from the side of the protection ring away from the cover and the inner side surface of the protection ring into the semiconductor processing chamber; the semiconductor processing chamber further comprises a control ring located at the side of the protection ring away from the cover, and the second part includes at least one second gas outlet; the at least one second gas outlet is located on the surface of the protection ring facing the control ring.

2. The semiconductor processing chamber of claim 1, wherein, The semiconductor processing chamber further comprises an inner electrode, the projection of the inner electrode on the cover is located at the central region of the cover, and the outer electrode is located at the outer periphery of the inner electrode; the inert gas channel further has a third part, and the third part passes through the cover and the inner electrode.

3. The semiconductor processing chamber of claim 2, wherein, The distance between the side of the inner electrode away from the cover and the cover is less than the distance between the side of the outer electrode away from the cover and the cover.

4. A semiconductor manufacturing apparatus characterized by comprising: The semiconductor processing chamber comprises any one of claims 1 to 3.

5. The semiconductor manufacturing apparatus according to claim 4, wherein Further comprising a gas supply device in communication with the inert gas channel, the gas supply device being used for providing the inert gas to the semiconductor processing chamber through the inert gas channel.

6. A method for cleaning a semiconductor processing chamber, comprising: The semiconductor processing chamber cleaning method is applied to the semiconductor manufacturing equipment of any one of claims 4 to 5, and the semiconductor processing chamber cleaning method comprises: after the semiconductor processing chamber completes dry etching on a semiconductor processing piece, the inert gas is introduced into the semiconductor processing chamber through the inert gas channel, and the inert gas is used for in-situ cleaning of the semiconductor processing chamber.

7. The semiconductor processing cavity cleaning method according to claim 6, characterized in that, The in-situ cleaning time is 1 minute to 10 minutes.

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