EAST divertor coil power supply control system and method

By designing a power control system for the EAST lower divertor coil and utilizing closed-loop calculations of the main controller and pulse unit, fast response and high output power current control were achieved. This solved the problem of irregular current waveforms in the EAST lower divertor coil during operation in various discharge configurations and enabled the synchronization and expansion capabilities of the power module.

CN115037131BActive Publication Date: 2026-04-03安徽省金屹电气技术有限公司 +1
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-30
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing technologies struggle to meet the requirements of rapid response and high output power of the EAST lower divertor coil in various discharge configurations, and the current waveform is irregular.

Method used

Design an EAST divertor coil power supply control system, including a main controller and multiple pulse units. Through logic serial/parallel units, bidirectional bus drivers, receiving units, and driving units, closed-loop calculation and data distribution are realized to ensure rapid tracking of current signals and synchronous operation of multiple power supply modules.

Benefits of technology

It enables rapid tracking of the given current issued by the upper-level central control system, allows multiple power modules to operate synchronously with equal timing, and allows for free expansion of the number of modules, simplifying device expansion.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115037131B_ABST
    Figure CN115037131B_ABST
Patent Text Reader

Abstract

This application discloses a power supply control system and method for a divertor coil under EAST (Electronic Assay System). The system includes a main controller and multiple pulse units. The main controller samples the given current signal and the current value of the power module issued by the EAST central control system, and performs closed-loop calculation. After the closed-loop calculation, the pulse data is distributed to multiple pulse units. The pulse units generate pulse trains for the power modules based on the received pulse data, periodic trigger signals, and the power module serial number of their unit. These pulse trains are then transmitted to the power modules via a downstream driver and a transmitting optical port. Simultaneously, the pulse units receive status signals transmitted by the power modules through the receiving optical port and receiver, and upload a status data frame composed of the statuses of all power modules driven by their unit to the main controller. This application achieves fast tracking of the given current issued by the upper-level central control system, allows multiple power modules to operate synchronously with equal arithmetic timing, and allows for flexible expansion of the number of modules, simplifying device expansion.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of power supply technology, specifically to a power supply control system and method for a divertor coil under EAST. Background Technology

[0002] Nuclear fusion can achieve truly carbon-free emissions and is a clean energy source that can completely solve the human energy crisis in the future, making a significant contribution to achieving carbon peaking and carbon neutrality. The EAST (Experimental Advanced Superconducting Tokamak) device, as a world-leading magnetic confinement nuclear fusion experimental device, is listed as a major national science and technology infrastructure. In recent years, with a new round of multi-faceted upgrades and renovations, it has achieved several world firsts. The lower divertor, as a key component of the EAST device that can effectively utilize the heat energy generated by plasma, plays a crucial role in achieving the experimental goals of the entire device through precise and rapid control. This is because the impedance of the lower divertor coil is very small (inductance in the μH range, internal resistance in the mΩ range), but the power requirement is in the MW range, and it needs to achieve various discharge configurations. This requires the power supply to not only have a short transient response time and high output power, but also be able to output irregular current waveforms. Summary of the Invention

[0003] Therefore, this application provides an EAST downdivertor coil power supply control system and method to solve the problem of how the downdivertor coil can achieve multiple discharge configurations in the prior art.

[0004] To achieve the above objectives, this application provides the following technical solution:

[0005] In a first aspect, an EAST divertor coil power supply control system includes a main controller and multiple pulse units. Each pulse unit includes a logic serial / parallel unit, a bidirectional bus driver, a receiving unit, and a driving unit. The bidirectional bus driver, the receiving unit, and the driving unit are all electrically connected to the logic serial / parallel unit. The receiving unit and the driving unit are also connected to a power supply module. The bidirectional bus driver is communicatively connected to the main controller via a data bus.

[0006] The main controller is used to sample the given current signal issued by the EAST master control system and the current value of the power supply module, and perform closed-loop calculation. After the closed-loop calculation, the pulse data is distributed to multiple pulse units.

[0007] The logic serial / parallel unit is used to generate a pulse train for the power module and output it based on the received pulse data, periodic trigger signal, and power module serial number of this unit;

[0008] The driving unit is used to transmit the pulse train output by the logic serial / parallel unit to the power module;

[0009] The receiving unit is used to receive the status signal sent by the power module;

[0010] The serial / parallel logic unit uploads the status data frame of the power module driven by this unit to the main controller.

[0011] Preferably, each driving unit includes a driver and a transmitting optical port. The input terminal of the driver is electrically connected to the logic serial / parallel unit, and the output terminal of the driver is electrically connected to the transmitting optical port. The driver is used to convert the pulse train output by the logic serial / parallel unit into the voltage required by the transmitting optical port and to provide the required driving current.

[0012] Preferably, the optical transmission port has four ports.

[0013] Preferably, each receiving unit includes a receiver and a receiving optical port. The input terminal of the receiver is electrically connected to the receiving optical port, and the output terminal of the receiver is electrically connected to the logic serial / parallel unit. The receiver is used to convert the serial pulse of the receiving optical port into the logic level of the logic serial / parallel unit.

[0014] Preferably, the optical receiving port has two ports.

[0015] Preferably, the pulse unit has 8 pulses.

[0016] Preferably, both the receiving unit and the driving unit are provided in four units.

[0017] Preferably, the power supply module is a full-bridge power supply module.

[0018] Preferably, the bidirectional bus driver is connected to the main controller via an 8-bit data bus and an 8-bit address bus.

[0019] Secondly, a method for controlling the power supply of the divertor coil under EAST includes:

[0020] initialization;

[0021] Determine whether a power module configuration command has been received;

[0022] If a power module configuration command is received, the power module's running sequence number ID_M is initialized, and the number of power modules and the power module enable / disable information are written into each pulse unit.

[0023] Read the running sequence number ID_S assigned to each pulse unit;

[0024] Determine whether ID_M and ID_S are equal;

[0025] If ID_M and ID_S are equal, then the pulse unit configuration is complete;

[0026] Determine if a run command has been received;

[0027] If a run command is received, current sampling, closed-loop calculation of each power module, and writing pulse data to the pulse unit are performed.

[0028] Compared with the prior art, this application has at least the following beneficial effects:

[0029] This application provides a power supply control system for a divertor coil under EAST (Electronic Toll Collection) system, comprising a main controller and multiple pulse units. The main controller samples the given current signal and the current value of the power module issued by the EAST central control system, performs closed-loop calculations, and distributes the pulse data to multiple pulse units. Each pulse unit generates a pulse train for the power module based on the received pulse data, a periodic trigger signal, and the power module's serial number, transmitting the pulse train to the power module via a downstream driver and a transmitting optical port. Simultaneously, it receives status signals transmitted by the power module through a receiving optical port and a receiver, and uploads a status data frame composed of the statuses of all power modules driven by the unit to the main controller. This application achieves rapid tracking of the given current issued by the upper-level central control system, allows multiple power modules to operate synchronously with equal timing, and enables flexible expansion of the number of modules, simplifying device expansion. Attached Figure Description

[0030] To more intuitively illustrate the prior art and this application, several exemplary figures are provided below. It should be understood that the specific shapes and structures shown in the figures should not generally be regarded as limiting conditions for implementing this application; for example, based on the technical concept disclosed in this application and the exemplary figures, those skilled in the art are able to easily make conventional adjustments or further optimizations to the addition / reduction / classification, specific shapes, positional relationships, connection methods, size ratios, etc. of certain units (components).

[0031] Figure 1 This application provides a structural block diagram of an EAST divertor coil power supply control system.

[0032] Figure 2 The block diagram of the pulse unit structure provided in this application;

[0033] Figure 3 A flowchart of a divertor coil power supply control method for EAST provided in this application;

[0034] Figure 4 The pulse generation mechanism of the multi-power supply module provided in this application;

[0035] Figure 5 This is a schematic diagram of the main circuit of the power module provided in this application;

[0036] Figure 6 Calculation of the power module voltage provided in this application;

[0037] Figure 7 The diagram shows the operating effect of 28kA / 60Hz provided for this application. Detailed Implementation

[0038] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0039] In the description of this application: unless otherwise stated, "a plurality of" means two or more. The terms "first," "second," "third," etc., in this application are intended to distinguish the objects referred to and do not have any special meaning in terms of technical connotation (e.g., they should not be construed as an emphasis on importance or order). Expressions such as "including," "comprising," and "having" also mean "not limited to" (certain units, components, materials, steps, etc.).

[0040] The terms used in this application, such as "upper," "lower," "left," "right," and "middle," are generally used to facilitate intuitive understanding by referring to the accompanying drawings, and are not absolute limitations on the positional relationships in the actual product. Changes in these relative positional relationships, without departing from the technical concept disclosed in this application, should also be considered within the scope of this application.

[0041] Please see Figure 1 This application provides a power supply control system for the divertor coil of EAST, including a main controller M_Control. The main controller is used to sample the given current signal Iref issued by the EAST master control system and the current values ​​I1~I32 of all power supply modules, and perform closed-loop calculation. After the closed-loop calculation, the pulse data is distributed to multiple pulse units. The main controller communicates with the host computer through the CAN bus.

[0042] Pulse_I to Pulse_VIII are eight expandable pulse units used to generate four pulse trains for each power module based on received pulse data, periodic trigger signals, and the unit's power module serial number. These pulse trains are then transmitted to the power modules via the subsequent driver and transmit optical port. Simultaneously, they receive two status signals transmitted by the power modules via receive optical port and receiver, and upload a status data frame composed of the status signals of all power modules driven by this unit to the main controller M_Control. Each pulse unit drives four power modules, therefore the number of pulse channels is... The number of status signal channels is The main controller M_Control and the pulse unit Pulse_X (X=I-VIII) communicate bidirectionally via a parallel 8-bit data bus (Data_Bus[7:0]) and an 8-bit address bus (Addr_Bus[7:0]). R / W is the read / write selector, with a high level for read operation and a low level for write operation.

[0043] The Triger signal is a periodic trigger signal issued by the main controller. The rising edge indicates the start of a new working cycle for the entire system. All pulse units use this signal as the time base to determine the starting point of the generated pulse.

[0044] The power supply module is a 4-switch full-bridge circuit, requiring 4 drive signals per module and 2 status signals to return. To limit the output inrush current, the pulses between multiple power supply modules need to be phase-shifted.

[0045] Please see Figure 2 The pulse unit includes a logic serial / parallel unit, a bidirectional bus driver, a receiving unit, and a driving unit. The receiving unit includes a receiver and a receiving optical port, and the driving unit includes a driver and a transmitting optical port.

[0046] Specifically, the function of the logic serial / parallel unit is to convert data from serial to parallel or from parallel to serial according to timing requirements. Serial-to-parallel conversion converts the parallel data sent by the main controller M_Control into serial pulses according to timing, and drives the transmit optical port through the driver (drives the power module through the optical fiber); parallel-to-serial conversion is the process of "packaging" the status signals returned by the receiver and the power module through the receive optical port into parallel data.

[0047] Each pulse unit contains 4 sets of optical ports, each set including 4 transmit optical ports and 2 receive optical ports. Among the 4 transmit optical ports, L_T_x (x=1,2,3,4) represents the left bridge up pulse of the x-th power module driven by this pulse unit, L_B_x (x=1,2,3,4) represents the left bridge down pulse, R_T_x (x=1,2,3,4) represents the right bridge up pulse, and R_B_x (x=1,2,3,4) represents the right bridge down pulse; L_S_x (x=1,2,3,4) represents the left bridge state of the x-th power module driven by this pulse unit, and R_S_x (x=1,2,3,4) represents the right bridge state.

[0048] The bidirectional bus driver serves as the interface between the logic serial / parallel unit and the main controller. Its main functions are to perform level conversion between different chips and ensure signal integrity.

[0049] The driver converts the serial pulses output from the logic serial / parallel unit to the voltage required by the transmitting optical port and provides the necessary driving current; the receiver converts the serial pulses from the receiving optical port to the logic level of the logic serial / parallel unit and provides debouncing function.

[0050] This application enables rapid tracking of the given current issued by the superior central control system, allows multiple power modules to operate synchronously with equal timing, and allows for free expansion of the number of modules, thus easily expanding the device capacity.

[0051] The implementation process is as follows:

[0052] 1. Address and data definition:

[0053] The master controller M_Control and the pulse unit Pulse_x communicate bidirectionally via a parallel 8-bit data bus (Data_Bus[7:0]) and an 8-bit address bus (Addr_Bus[7:0]). M_Control is the master, initiating the write / read operation. Since the data bus width is 8 bits, data exceeding 8 bits requires multiple addresses. The master controller M_Control can expand to 8 pulse units. The high 3 bits of the address bus, Addr_Bus[7:5], are used to distinguish pulse units, as shown in Table 1 for “xxx”. The 3 bits (bits_000~bits_111) correspond to Pulse_I~Pulse_VIII, and the remaining 5 bits (Addr_Bus[4:0]) define the address of the data within that pulse unit. For the same pulse unit, there are shared data within the unit and data from the power module driven by that unit.

[0054] Table 1: Parallel Address and Data Definitions

[0055]

[0056] In the pulse unit shared data, the address bits_xxx11111 is used to set the total number of power modules in the system. The minimum value is 1 and the maximum value is 32. See label A in Table 1.

[0057] The four addresses bits_xxx11011~bits_xxx11110 transmit a total of 4 bytes of 32-bit data to set the enable / disable of the power module. In the whole system, the power module #1 driven by the pulse unit Pulse_I corresponds to the least significant bit of this data, and so on. The power module #4 driven by the pulse unit Pulse_VIII corresponds to the most significant bit of this data, as shown in label B in Table 1.

[0058] Address bits_xxx11010 is used to read the status of the four power modules driven by the pulse unit. The least significant bit in the 8-bit data corresponds to the left bridge status L_S_1 of power module #1, and so on. The most significant bit corresponds to the right bridge status R_S_4 of power module #1, see label C in Table 1.

[0059] For the four power modules driven by this pulse unit, addresses 2 (bits_xxx00000~bits_xxx00001) are used to send pulse data to power module #1, addresses 2 (bits_xxx00010~bits_xxx00011) are used for pulse data to power module #2, addresses 2 (bits_xxx00100~bits_xxx001011) are used for pulse data to power module #3, and addresses 2 (bits_xxx00110~bits_xxx00111) are used for pulse data to power module #4. The data is 16 bits, where the highest bit is the voltage sign bit and the remaining 15 bits are the duty cycle, see label D in Table 1.

[0060] Because some of the four power modules driven by the pulse unit may be disabled, the operation process ensures that the pulses of all enabled power modules run in an arithmetic progression. The running order may not be consistent with the sequence number of their hardware connection locations. Therefore, a power module running sequence number ID_S is defined. This sequence number is determined by the pulse unit based on its hardware address and enable state, read back by the main controller, and compared with the running sequence number ID_M assigned to all power modules by the main controller. If ID_S matches ID_M, the configuration is considered successful. Address bits_xxx01000 corresponds to power module #1, address bits_xxx01001 corresponds to power module #2, address bits_xxx01010 corresponds to power module #3, and address bits_xxx01011 corresponds to power module #4. See label E in Table 1.

[0061] To illustrate this more clearly, consider this example: if the total number of power supply modules is 32, and 3 modules are enabled, the 32-bit enable / disable data would be:

[0062] If bits_(MSB)0101_0000_0000_0000_0000_0000_0000_1000(LSB), then the sequence number of power module #4 of Pulse_I is 1, the sequence number of power module #1 of Pulse_VIII is 2, and the sequence number of power module #3 of Pulse_VIII is 3.

[0063] 2. Control methods

[0064] Please see Figure 3This application also provides a method for controlling the power supply of a divertor coil under EAST, comprising:

[0065] S1: Initialization;

[0066] Specifically, after power-on, the main controller completes its own initialization and waits for configuration instructions from the host computer's CAN bus.

[0067] S2: Determine whether a power module configuration command has been received;

[0068] S3: If a power module configuration command is received, initialize the power module's running sequence number ID_M, and write the number of power modules and the power module enable / disable information into each pulse unit;

[0069] S4: Read the running sequence number ID_S assigned to each pulse unit;

[0070] S5: Determine whether ID_M and ID_S are equal;

[0071] S6: If ID_M and ID_S are equal, then the pulse unit configuration is complete;

[0072] S7: Determine if a run command has been received;

[0073] S8: If a running command is received, current sampling, closed-loop calculation of each power module, and writing pulse data to the pulse unit are performed.

[0074] S9: Determine if there is a fault and whether a run command has been received;

[0075] S10: If there is no fault and no shutdown command is received, a new work cycle will begin after the work cycle delay expires; otherwise, shutdown will occur.

[0076] 3. Mechanism of arithmetic progression pulse generation

[0077] The pulses of multiple power modules in the system are completed by the main controller and each pulse unit in cooperation. The main controller provides the time base of the working cycle and completes the pulse data (voltage symbol + duty cycle) of each power module. Each pulse unit determines the delay of the pulse reference time start point of the module relative to the working cycle time base according to the working sequence number of the power module driven by the unit, and generates pulse signals according to the pulse data sent by the main controller.

[0078] Please see Figure 4 The entire system's main controller and pulse unit operate at a frequency of 250MHz. The main controller uses a counter with an overflow-to-zero value of 50000 as its duty cycle counter, with a count value of Triger_Cnt and a counting period of... In other words, the system operating frequency is 5kHz. When the Triger_Cnt count reaches 50000, it restarts from 0. At this time, the periodic trigger signal (Triger) changes from low to high, and this rising edge is the zero-point reference for the entire system's operating cycle time. Let the number of enabled power modules in the system be k, and the overflow zero value of another counter T_Slice of the main controller be 50000 / k. That is, the entire operating cycle is divided into k segments to determine the pulse data calculation time for each enabled power module. When the first T_Slice overflow point after the rising edge of Triger begins, the pulse data calculation for the power module with working sequence number 1 begins, and so on, starting from the kth T_Slice overflow point. The time length occupied by the main controller for calculating the pulse data is T_1, T_2...T_k in the figure. After the pulse data calculation is completed, it is immediately written to the corresponding pulse unit.

[0079] Each pulse unit contains a counter synchronized with the T_Slice in the main controller. The counter determines the pulse's reference time start based on the operating sequence number of the power supply module driven by that unit. Figure 4 As shown, the first T_Slice overflow point after the rising edge of the Triger is used as the pulse reference time start point P_k for the power module with working sequence number k. Similarly, the second T_Slice overflow point is used as the pulse reference time start point for the power module with working sequence number 1. In other words, the pulse reference time start point is one T_Slice cycle later than P_k compared to the pulse calculation time start point of the module. This ensures that the pulse data used when the pulse occurs is the latest and has the shortest delay.

[0080] Inside the pulse unit, each power module uses a carrier counter (CW_Cnt_k). This counter uses an up-down mode, and its full overflow value is Triger_Cnt / 2 = 25000. Taking a pulse data of +18000 as an example, it represents a positive voltage, with a duty cycle D = 18000 / 25000 = 0.72. The pulse unit outputs 0 voltage at the start of the pulse reference time. The carrier counter CW_Cnt_k starts counting in the up direction from 0. When CW_Cnt_k = 18000, the pulse unit outputs a positive voltage. The carrier counter CW_Cnt_k starts counting in the down direction from 25000. When CW_Cnt_k = 18000, the pulse unit outputs 0 voltage. The diagram shows the pulse diagrams for power modules M_k, M_1, and M_2. Because their respective pulse reference time starts are each delayed by the same T_Slice time, equal phase delay of the pulses is achieved.

[0081] Please see Figure 5When the pulse unit outputs a positive voltage, pulses L_T_x and R_B_x are at high level (H), and R_T_x and L_B_x are at low level (L). When the output voltage is negative, the opposite is true. When the output voltage is 0, all four pulses are at low level (L).

[0082] 4. Algorithm

[0083] To facilitate the explanation of the voltage calculation method for the power supply module, the following is used: Figure 5 The main circuit and power supply module consist of multiple identical full-bridge circuits, with the positive (+) output terminals connected to the output inductors of their respective branches. ) and resistance The components are connected in parallel and then connected to the positive terminal of the load. The negative (-) terminals of each power module are connected in parallel and then connected to the negative terminal of the load. The load inductance is L and the resistance is R. The output voltage of the module. denoted as the output current, u as the voltage across the load, and i as the total load current.

[0084] 5. Calculation of power supply module output voltage

[0085] Please see Figure 5 In the picture For the circuit, according to KVL's law, the steady-state voltage equation can be obtained:

[0086]

[0087]

[0088] Where s is the differential For power supply module The current, i is the total load current; it can be seen from equation (1) that the voltage at the power module port consists of two parts: the voltage on the impedance of this branch and the voltage on the load impedance.

[0089] Please see Figure 6 Conventional power supply control algorithms mostly employ dual-loop voltage and current regulation, commonly used in grid-connected or off-grid AC / DC power supply systems. However, this system is a current-source power supply. Due to the irregular output current and the requirement for fast response, the dual-loop control method is slow due to the two loops. Therefore, this system uses a feedforward + feedback control method. Figure 6 As shown, Given the sampled current, and since there are k enabled power supply modules, the given current for each power supply module is: = .

[0090] The feedforward part is obtained from equation (1). Since the control system is a digital system, it needs to be discretized. To reduce the delay, the current of the feedforward part is taken as the given current instead of the output current, resulting in:

[0091] in, : The feedforward portion of the module output voltage, FF (Feed_Forward).

[0092] The change in the given current over one control cycle;

[0093] The given current value for this control cycle;

[0094] The given current value in the previous control cycle;

[0095] T: Control cycle, which is 200µs in this system;

[0096] The feedback section uses PI control, which, after discretization, is as follows:

[0097] (3)

[0098] (4)

[0099] in,

[0100] : Feedback part of the output voltage of the M_k module, FF (Feed_Forward);

[0101] C p Integral coefficient;

[0102] C i Integral coefficient;

[0103] U i(N) : Integral amount for this period;

[0104] U i(N-1) : Integral amount of the previous period;

[0105] i e _k: Current error, i.e., i_ref_k-i_k;

[0106] 6. Performance

[0107] Please see Figure 7When all 12 power modules are enabled, and a peak current of 28kA is given at a frequency of 60Hz, the waveform on the divertor coil under EAST shows that the output current can quickly track the given current. Due to limitations of the measurement sensor, the current cannot be directly measured, resulting in the oscilloscope waveform being in volts (V) and the two channels having different turns ratios.

[0108] The technical features of the above embodiments can be combined in any way (as long as there is no contradiction in the combination of these technical features). For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; these embodiments not explicitly written should also be considered to be within the scope of this specification.

[0109] The present application has been described in a relatively specific and detailed manner above through general descriptions and specific embodiments. It should be understood that, based on the technical concept of the present application, several conventional adjustments or further innovations can be made to these specific embodiments; however, as long as they do not depart from the technical concept of the present application, the technical solutions obtained by these conventional adjustments or further innovations also fall within the protection scope of the claims of the present application.

Claims

1. A power supply control system for a divertor coil under EAST, characterized in that, It includes a main controller and multiple pulse units. Each pulse unit includes a logic serial / parallel unit, a bidirectional bus driver, a receiving unit, and a driving unit. The bidirectional bus driver, the receiving unit, and the driving unit are all electrically connected to the logic serial / parallel unit. The receiving unit and the driving unit are also connected to a power supply module. The bidirectional bus driver is communicatively connected to the main controller through a data bus. The main controller is used to sample the given current signal issued by the EAST master control system and the current value of the power supply module, and perform closed-loop calculation. After the closed-loop calculation, the pulse data is distributed to multiple pulse units. The logic serial / parallel unit is used to generate a pulse train for the power module and output it based on the received pulse data, periodic trigger signal, and power module serial number of this unit; The driving unit is used to transmit the pulse train output by the logic serial / parallel unit to the power module; The receiving unit is used to receive the status signal sent by the power module; The serial / parallel logic unit uploads the status data frame of the power module driven by this unit to the main controller. The driving unit includes a driver and a transmitting optical port. The input terminal of the driver is electrically connected to the logic serial / parallel unit, and the output terminal of the driver is electrically connected to the transmitting optical port. The driver is used to convert the pulse train output by the logic serial / parallel unit into the voltage required by the transmitting optical port and to provide the required driving current.

2. The EAST divertor coil power supply control system according to claim 1, characterized in that, The system has four optical transmission ports.

3. The EAST divertor coil power supply control system according to claim 1, characterized in that, The receiving unit includes a receiver and a receiving optical port. The input terminal of the receiver is electrically connected to the receiving optical port, and the output terminal of the receiver is electrically connected to the logic serial / parallel unit. The receiver is used to convert the serial pulse of the receiving optical port into the logic level of the logic serial / parallel unit.

4. The EAST divertor coil power supply control system according to claim 3, characterized in that, The system has two optical receiving ports.

5. The EAST divertor coil power supply control system according to claim 1, characterized in that, The pulse unit has 8 components.

6. The EAST divertor coil power supply control system according to claim 1, characterized in that, Both the receiving unit and the driving unit are provided in four units.

7. The EAST divertor coil power supply control system according to claim 1, characterized in that, The power supply module is a full-bridge power supply module.

8. The EAST divertor coil power supply control system according to claim 1, characterized in that, The bidirectional bus driver communicates with the main controller via an 8-bit data bus and an 8-bit address bus.

9. A method for controlling the power supply of a divertor coil under EAST, characterized in that, The method is applied to the EAST divertor coil power supply control system according to any one of claims 1-8, comprising: initialization; Determine whether a power module configuration command has been received; If a power module configuration command is received, the power module's running sequence number ID_M is initialized, and the number of power modules and the power module enable / disable information are written into each pulse unit. Read the running sequence number ID_S assigned to each pulse unit; Determine whether ID_M and ID_S are equal; If ID_M and ID_S are equal, then the pulse unit configuration is complete; Determine if a run command has been received; If a run command is received, current sampling, closed-loop calculation of each power module, and writing pulse data to the pulse unit are performed.

Citation Information

Patent Citations

  • Multipath pulse signal acquisition device for use in radiation detection

    CN102096088A

  • Driver parallel capacity-expansion method and structure

    CN105207453A