Image encoding and decoding method, encoding device, decoding device, and storage medium

By rearranging part of the reference image block and decoding the image using intra-block copying technology, the problem of high number of encoding bits in the prior art is solved and encoding efficiency is improved.

CN115086659BActive Publication Date: 2025-07-29TENCENT TECHNOLOGY (SHENZHEN) CO LTD
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Patent Information

Application Number
CN202110272581.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-03-12
Publication Date
2025-07-29
Estimated Expiration
2041-03-12

AI Technical Summary

Technical Problem

In the existing video encoding standards, intra-frame block copy technology fails to effectively utilize the spatial correlation of screen content videos during image decoding, resulting in a high number of coded bits.

Method used

By partially rearranged the reference image blocks of the reconstructed image blocks, a new reference image block is generated for image decoding using intra-block copying technology.

Benefits of technology

It effectively reduces the number of encoding bits required during image decoding and improves encoding efficiency.

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Abstract

The present application provides an image encoding and decoding method, an encoding device, a decoding device, and a storage medium. The method includes: parsing a bitstream to obtain a first reference image block of a to-be-reconstructed image block; rearranging some or all pixels of the first reference image block to obtain a second reference image block of the to-be-reconstructed image block; obtaining prediction information of the to-be-reconstructed image block according to the second reference image block; and performing image reconstruction on the to-be-reconstructed image block according to the prediction information. To implement image decoding using IBC technology.
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Description

Technical Field

[0001] The embodiments of the present application relate to the field of image processing technology, and in particular to an image encoding and decoding method, an encoding device, a decoding device, and a storage medium. Background Art

[0002] Current mainstream video coding standards, such as High Efficiency Video Coding (HEVC), Versatile Video Coding (VVC), and Audio Video Coding Standard (AVS)3, all employ a hybrid block-based coding framework. These methods divide the original image frame into a series of blocks and combine video coding methods such as prediction, transform, and entropy coding to achieve video data compression. Motion compensation is a commonly used prediction method in video coding and decoding. Motion compensation leverages the redundancy of video content in the temporal or spatial domains, determining the predicted value of the image block to be reconstructed based on a reference image block. These motion-compensated prediction methods include inter-frame prediction, intra-frame block copying, and intra-frame string copying.

[0003] Intra Block Copy (IBC) exploits the spatial correlation of screen content video and uses the reconstructed image pixels in the current image frame (i.e., the pixels of the reference image block) to predict the pixels of the current image block to be reconstructed, which can effectively save the number of bits in the code stream. Therefore, how to use IBC technology for image decoding is a technical problem that needs to be solved urgently in this application. Summary of the Invention

[0004] The present application provides an image encoding and decoding method, an encoding device, a decoding device, and a storage medium to implement image decoding using IBC technology.

[0005] In a first aspect, an image decoding method is provided, comprising: parsing a bitstream to obtain a first reference image block of an image block to be reconstructed; rearranging some or all of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed; obtaining prediction information of the image block to be reconstructed based on the second reference image block; and reconstructing the image block to be reconstructed based on the prediction information.

[0006] In a second aspect, an image coding method is provided, including: determining a first reference image block of an image block to be coded; rearranging some or all pixels of the first reference image block to obtain a second reference image block of the image block to be coded; obtaining prediction information of the image block to be coded based on the second reference image block; and encoding the image block to be coded based on the prediction information to obtain a coded bitstream.

[0007] In a third aspect, an image decoding device is provided, including: a parsing module, a pixel rearrangement module, a prediction module, and a reconstruction module. The parsing module is configured to parse a bitstream to obtain a first reference image block of a to-be-reconstructed image block; the pixel rearrangement module is configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the to-be-reconstructed image block; the prediction module is configured to obtain prediction information of the to-be-reconstructed image block according to the second reference image block; and the reconstruction module is configured to perform image reconstruction on the to-be-reconstructed image block according to the prediction information.

[0008] In a fourth aspect, an image encoding device is provided, including: a determination module, a pixel rearrangement module, a prediction module, an encoding module, and an output module. The determination module is configured to determine a first reference image block of a to-be-encoded image block; the pixel rearrangement module is configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the to-be-encoded image block; the prediction module is configured to obtain prediction information of the to-be-encoded image block according to the second reference image block; the encoding module is configured to encode the to-be-encoded image block according to the prediction information to obtain a bitstream; and the output module is configured to output the bitstream.

[0009] In a fifth aspect, an image encoding device is provided, and the image encoding device is configured to execute the method as in the first aspect.

[0010] In a sixth aspect, an image decoding device is provided, and the image decoding device is configured to execute the method as in the second aspect.

[0011] In a seventh aspect, a computer-readable storage medium is provided for storing a computer program, and the computer program causes a computer to execute the method according to any one of the first aspect to the second aspect.

[0012] Through the technical solution of the present application, the decoding end parses the bitstream to obtain a first reference image block of the to-be-reconstructed image block; rearranges some or all of the pixels of the first reference image block to obtain a second reference image block of the to-be-reconstructed image block; obtains prediction information of the to-be-reconstructed image block according to the second reference image block; and performs image reconstruction on the to-be-reconstructed image block according to the prediction information, so as to implement image decoding using the IBC technique. Description of the Drawings

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0014] Figure 1 It is a schematic diagram of the encoding framework provided by the embodiment of the present application;

[0015] Figure 2 Schematic diagram of the decoding framework provided by the embodiment of the present application;

[0016] Figure 3 Schematic diagram of intra block copy provided by the embodiment of the present application;

[0017] Figure 4 Flowchart of an image coding method provided by the embodiment of the present application;

[0018] Figure 5A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0019] Figure 5B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0020] Figure 6A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0021] Figure 6B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0022] Figure 7A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0023] Figure 7B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0024] Figure 8A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0025] Figure 8B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0026] Figure 9A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0027] Figure 9B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0028] Figure 10A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0029] Figure 10B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0030] Figure 11A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0031] Figure 11B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0032] Figure 12A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0033] Figure 12B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0034] Figure 13A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0035] Figure 13B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0036] Figure 14A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0037] Figure 14B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0038] Figure 15A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0039] Figure 15B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0040] Figure 16A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0041] Figure 16B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0042] Figure 17A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0043] Figure 17B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0044] Figure 18A Schematic diagram of the first reference image block provided by the embodiment of the present application;

[0045] Figure 18B Schematic diagram of the second reference image block provided by the embodiment of the present application;

[0046] Figure 19 Flowchart of an image decoding method provided by the embodiment of the present application;

[0047] Figure 20Flow chart of an image encoding method provided by an embodiment of the present application;

[0048] Figure 21A Schematic diagram of a first reference image block provided by an embodiment of the present application;

[0049] Figure 21B Schematic diagram of a second reference image block provided by an embodiment of the present application;

[0050] Figure 22A Schematic diagram of a first reference image block provided by an embodiment of the present application;

[0051] Figure 22B Schematic diagram of a second reference image block provided by an embodiment of the present application;

[0052] Figure 23 Flow chart of an image decoding method provided by an embodiment of the present application;

[0053] Figure 24 Schematic diagram of an image encoding device provided by an embodiment of the present application;

[0054] Figure 25 Schematic diagram of an image decoding device provided by an embodiment of the present application. Detailed implementation manners

[0055] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0056] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such used data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or server including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0057] Before introducing the technical solutions of the present application, the image or video encoding framework and decoding framework, and IBC technology will be described first:

[0058] I. An image or video encoding framework and a decoding framework, i.e., a hybrid encoding framework.

[0059] Exemplarily, Figure 1 is a schematic diagram of the encoding framework provided by an embodiment of this application. As Figure 1 shown, the encoding framework includes: a prediction unit 11, a residual generation unit 12, a transformation unit 13, a quantization unit 14, an inverse quantization unit 15, an inverse transformation unit 16, a reconstruction unit 17, a filtering unit 18, and an entropy encoding unit 19. The prediction unit 11 includes an inter-frame prediction unit 111 and an intra-frame prediction unit 112. The inter-frame prediction unit 111 includes a motion estimation unit 1111 and a motion compensation unit 1112.

[0060] Among them, after the encoding end receives a video, for each frame image constituting the video, the image is divided into multiple image blocks to be encoded. For the image blocks to be encoded, the prediction unit 11 first predicts the image blocks to be encoded by referring to the reconstructed image blocks, and obtains the prediction information of the image blocks to be encoded. Among them, the encoding end can use inter-frame prediction or intra-frame prediction technology to obtain the prediction information.

[0061] Specifically, the motion estimation unit 1111 in the inter-frame prediction unit 111 can search for reference images in the list of reference pictures to find the reference image blocks of the image blocks to be encoded. The motion estimation unit 1111 can generate an index indicating the reference image block and a motion vector indicating the spatial displacement between the image block to be encoded and the reference image block. The motion estimation unit 1111 can output the index of the reference image block and the motion vector as the motion information of the image block to be encoded. The motion compensation unit 1112 can obtain the prediction information of the image block to be encoded based on the motion information of the image block to be encoded.

[0062] The intra-frame prediction unit 112 can generate prediction information for the image blocks to be encoded by using an intra-frame prediction mode. Currently, there are 15 intra-frame prediction modes, including Planar mode, DC mode, and 13 angular prediction modes. The intra-frame prediction unit 112 can also use technologies such as Intra Block Copy (IBC) and Intra String Copy (ISC).

[0063] The residual generation unit 12 is used to subtract the prediction information from the original signal of the image block to be encoded to obtain a residual signal. After prediction, the amplitude of the residual signal is much smaller than the original signal. The transformation unit 13 and the quantization unit 14 are used to perform transformation and quantization operations on the residual signal. After transformation and quantization, transformed quantization coefficients are obtained. The entropy encoding unit 19 is used to encode the quantization coefficients and other indication information in the encoding through entropy encoding technology to obtain a bitstream.

[0064] Further, the encoding end also needs to reconstruct the image block to be encoded to provide reference pixels for encoding subsequent image blocks to be encoded. Specifically, after obtaining the transform quantization coefficients of the image block to be encoded, the inverse quantization unit 15 and the inverse transform unit 16 perform inverse quantization and inverse transform on the transform quantization coefficients of the image block to be encoded to obtain the reconstructed residual signal. The reconstruction unit 17 adds the reconstructed residual signal to the prediction information corresponding to the image block to be encoded to obtain the reconstructed signal of the image block to be encoded, and obtains the reconstructed image block according to the reconstructed signal. Further, the filtering unit 18 can filter the reconstructed image block, and deblocking filtering, Sample Adaptive Offset (SAO), Adaptive Loop Filter (ALF), etc. can be adopted. Among them, the reconstructed image block can be used to predict subsequent image blocks to be encoded.

[0065] Exemplarily, Figure 2 is a schematic diagram of the decoding framework provided by the embodiment of the present application. As Figure 2 shown, the decoding framework includes: an entropy decoding unit 21, a prediction unit 22, an inverse quantization unit 23, an inverse transform unit 24, a reconstruction unit 25, and a filtering unit 26. The prediction unit 22 includes: a motion compensation unit 221 and an intra prediction unit 222.

[0066] Specifically, after the decoding end obtains the bitstream, first, the entropy decoding unit 21 performs entropy decoding on the bitstream to obtain the transform quantization coefficients of the current image block to be reconstructed. Then, the inverse quantization unit 23 and the inverse transform unit 24 perform inverse quantization and inverse transform on the transform quantization coefficients to obtain the reconstructed residual signal of the current image block to be reconstructed. The prediction unit 22 predicts the current image block to be reconstructed to obtain the prediction information of the current image block to be reconstructed. If the prediction unit 22 adopts inter prediction, the motion compensation unit 221 can construct a first reference picture list (list 0) and a second reference picture list (list 1) according to the syntax elements parsed from the bitstream. In addition, the entropy decoding unit 21 can parse the motion information of the image block to be reconstructed. The motion compensation unit 221 can determine one or more reference image blocks of the image block to be reconstructed according to the motion information. The motion compensation unit 221 can generate the prediction information of the image block to be reconstructed according to one or more reference image blocks. If the prediction unit 22 adopts intra prediction, the entropy decoding unit 21 can parse the index of the intra prediction mode used, and the intra prediction unit 222 can perform intra prediction according to the index using the intra prediction mode to obtain the prediction information of the image block to be reconstructed. The intra prediction unit 222 can also adopt technologies such as IBC or ISC.

[0067] Furthermore, the reconstruction unit 25 is configured to add the prediction information to the reconstructed residual signal to obtain a reconstruction signal for the current image block to be reconstructed. Based on the reconstruction signal, the current reconstructed image block corresponding to the current image block to be reconstructed is obtained. This current reconstructed image block can be used to predict subsequent image blocks to be reconstructed. Similarly to the encoding end described above, the filtering unit 26 on the decoding end can optionally filter the current reconstructed image block.

[0068] 2. IBC Technology

[0069] IBC is an intra-frame coding tool adopted in the HEVC Screen Content Coding (SCC) extension, which significantly improves the coding efficiency of screen content. IBC technology is also adopted in AVS3 and VVC to improve the performance of screen content coding. Figure 3 The schematic diagram of intra-frame block copy provided by the embodiment of the present application is as follows Figure 3 As shown in , IBC uses the spatial correlation of screen content video and uses the coded image pixels (i.e., the pixels of the reference image block) on the current image frame to predict the pixels of the image block to be coded, which can effectively save the bits required for coding pixels. Figure 3 As shown in Figure 1, the displacement between the image block to be coded and its reference image block in IBC is called a block vector (BV). H.266 / VVC uses a BV prediction technology similar to inter-frame prediction to further save the bits required for encoding BV.

[0070] As mentioned above, IBC utilizes the spatial correlation of screen content video and uses the reconstructed image pixels in the current image frame to predict the pixels of the current image block to be reconstructed, which can effectively save the number of bits in the code stream. Therefore, how to use IBC technology for image decoding is a technical problem that needs to be solved urgently in this application.

[0071] To address this technical problem, the present application partially rearranges the pixels of a reference image block of the image block to be reconstructed, and uses the partially rearranged reference block as a reference for the image block to be reconstructed. Alternatively, the reference image block is divided into multiple pixel portions, and corresponding pixel rearrangements are applied to each of the multiple pixel portions, and the partially rearranged reference block is used as a reference for the image block to be reconstructed.

[0072] The technical solution of this application will be described in detail below:

[0073] Example 1

[0074] Figure 4 A flowchart of an image encoding method provided in an embodiment of the present application is shown in FIG. Figure 4As shown in the figure, the execution entity of the method may be the following devices, but is not limited thereto: an encoder, or an image encoding device, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a handheld device such as a smart phone, a television, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or the like. As Figure 4 As shown in the figure, the method includes the following steps:

[0075] S410: Determine a first reference image block of the image block to be encoded.

[0076] S420: Rearrange some pixels of the first reference image block to obtain a second reference image block of the image block to be encoded.

[0077] S430: Obtain prediction information of the image block to be encoded according to the second reference image block.

[0078] S440: Encode the image block to be encoded according to the prediction information to obtain a bitstream.

[0079] S450: Output the bitstream.

[0080] It should be understood that the first reference image block is the original reference image block of the image block to be encoded, that is, the reference image block used as the reference of the image block to be encoded in the prior art.

[0081] It should be understood that while rearranging some pixels of the first reference image block at the encoding end, no operation is performed on other pixels of the first reference image block except the above-mentioned some pixels, that is, the positions of other pixels of the first reference image block except the above-mentioned some pixels remain unchanged.

[0082] Optionally, the above-mentioned some pixels may form multiple pixel rows, or multiple pixel columns. Here, the number of pixels included in each row of the multiple pixel rows may be the same or different, and this application does not limit this. The number of pixels included in each column of the multiple pixel columns may be the same or different, and this application does not limit this. In this embodiment, the pixels in the pixel row are arranged horizontally, and the pixels in the pixel column are arranged vertically.

[0083] Optionally, the rearrangement method adopted by the encoding end for some pixels of the first reference image block, simply referred to as the rearrangement method, includes any one of the following, but is not limited thereto:

[0084] Implementation method 1: Some pixels form multiple pixel rows, and the encoding end rearranges the multiple pixel rows to obtain a second reference image block of the image block to be encoded.

[0085] Implementable Method 2: Multiple pixels form multiple pixel columns, and the encoding end rearranges the multiple pixel columns to obtain a second reference image block of the image block to be encoded.

[0086] An exemplary description is given for Optional Method 1:

[0087] Optionally, the encoding end can reverse the order of multiple pixel rows to obtain a second reference image block of the image block to be encoded. For example: The order of the above multiple pixel rows before rearrangement is pixel rows 0, 1, 2, 3, 4, 5, 6, 7. After reversing the order, the arrangement order of the above multiple pixel rows is 7, 6, 5, 4, 3, 2, 1. Or, the above multiple pixel rows are symmetric about the horizontal symmetry axis of the multiple pixel rows. Based on this, the encoding end performs an up-down symmetric rearrangement of the multiple pixel rows along the horizontal symmetry axis of the multiple pixel rows to obtain a second reference image block of the image block to be encoded. It can be understood that the symmetry axis can be the axis between two pixel rows or two pixel columns, or an axis composed of at least one pixel row or pixel column.

[0088] Example 1: Figure 5A This is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 5A each square represents a pixel. The pixel with texture is the pixel that does not need to be pixel rearranged, and the pixel without texture is the pixel that needs to be pixel rearranged. That is to say, Figure 5A in the 0th pixel row and the 7th pixel row remain unchanged, and the 1st - 6th pixel rows are the pixel rows that need to be pixel rearranged. Among them, the encoding end can perform an up-down symmetric rearrangement of the 1st - 6th pixel rows along the horizontal symmetry axis of the 1st - 6th pixel rows. Figure 5B This is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 5B shown, after the up-down symmetric rearrangement, the 1st pixel row and the 6th pixel row are exchanged, the 2nd pixel row and the 5th pixel row are exchanged, and the 3rd pixel row and the 4th pixel row are exchanged.

[0089] Example 2: Figure 6A This is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 6A each square represents a pixel. The pixel with texture is the pixel that does not need to be pixel rearranged, and the pixel without texture is the pixel that needs to be pixel rearranged. That is to say, Figure 6A in the 3rd pixel row and the 4th pixel row remain unchanged, and the other pixel rows are the pixel rows that need to be pixel rearranged. Among them, the encoding end can perform an up-down symmetric rearrangement of the 0th, 1st, 2nd, 5th, 6th, and 7th pixel rows along the horizontal symmetry axis of these pixel rows. Figure 6B This is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 6BAs shown, after vertical symmetric rearrangement, the 0th pixel row and the 7th pixel row are swapped, the 1st pixel row and the 6th pixel row are swapped, and the 2nd pixel row and the 5th pixel row are swapped.

[0090] Example 3: Figure 7A This is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 7A each square represents a pixel. The pixels with texture are the pixels that do not need to be pixel rearranged, and the pixels without texture are the pixels that need to be pixel rearranged. That is to say, Figure 7A in the 0th pixel row and the 1st pixel row remain unchanged, and the 2nd - 7th pixel rows are the pixel rows that need to be pixel rearranged. Among them, the encoding end can perform vertical symmetric rearrangement on the 2nd - 7th pixel rows along the horizontal symmetry axis of these pixel rows. Figure 7B This is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 7B shown, after vertical symmetric rearrangement, the 2nd pixel row and the 7th pixel row are swapped, the 3rd pixel row and the 6th pixel row are swapped, and the 4th pixel row and the 5th pixel row are swapped.

[0091] Example 4: Figure 8A This is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 8A each square represents a pixel. The pixels with texture are the pixels that do not need to be pixel rearranged, and the pixels without texture are the pixels that need to be pixel rearranged. That is to say, <s Figure 8A the pixel at the 0th row and 0th column and the pixel at the 7th row and 0th column in it remain unchanged, and the other pixels need to be pixel rearranged. Among them, the encoding end can perform vertical symmetric rearrangement on the 0th - 7th pixel rows along the horizontal symmetry axis of these pixel rows. It should be noted that the 0th pixel row does not include the pixel at the 0th row and 0th column, and the 7th pixel row does not include the pixel at the 7th row and 0th column. Figure 8B This is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 8B shown, after vertical symmetric rearrangement, the 0th pixel row and the 7th pixel row are swapped, the 1st pixel row and the 6th pixel row are swapped, the 2nd pixel row and the 5th pixel row are swapped, and the 3rd pixel row and the 4th pixel row are swapped. It should be noted that the 0th pixel row does not include the pixel at the 0th row and 0th column, and the 7th pixel row does not include the pixel at the 7th row and 0th column.

[0092] Example 5: Figure 9A This is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 9A each square represents a pixel. The pixels with texture are the pixels that do not need to be pixel rearranged, and the pixels without texture are the pixels that need to be pixel rearranged. That is to say, Figure 9AThe pixels at the 0th column of the 3rd row and the 0th column of the 4th row remain unchanged, and the other pixels need to be rearranged. Among them, the encoding end can perform up-down symmetric rearrangement on the 0th - 7th pixel rows along the horizontal symmetry axes of these pixel rows. It should be noted that the 3rd pixel row does not include the pixel at the 0th column of the 3rd row, and the 4th pixel row does not include the pixel at the 0th column of the 4th row. Figure 9B is a schematic diagram of the second reference image block provided by the embodiment of the present application, as Figure 9B shown. After the up-down symmetric rearrangement, the 0th pixel row and the 7th pixel row exchange positions, the 1st pixel row and the 6th pixel row exchange positions, the 2nd pixel row and the 5th pixel row exchange positions, and the 3rd pixel row and the 4th pixel row exchange positions. It should be noted that the 3rd pixel row does not include the pixel at the 0th column of the 3rd row, and the 4th pixel row does not include the pixel at the 0th column of the 4th row.

[0093] Example 6: Figure 10A is a schematic diagram of the first reference image block provided by the embodiment of the present application, where Figure 10A each square represents a pixel. The pixels with texture are the pixels that do not need to be rearranged, and the pixels without texture are the pixels that need to be rearranged. That is to say, Figure 10A the pixels at the 3rd column of the 3rd row and the 3rd column of the 4th row in remain unchanged, and the other pixels need to be rearranged. Among them, the encoding end can perform up-down symmetric rearrangement on the 0th - 7th pixel rows along the horizontal symmetry axes of these pixel rows. It should be noted that the 3rd pixel row does not include the pixel at the 3rd column of the 3rd row, and the 4th pixel row does not include the pixel at the 3rd column of the 4th row. Figure 10B is a schematic diagram of the second reference image block provided by the embodiment of the present application, as Figure 10B shown. After the up-down symmetric rearrangement, the 0th pixel row and the 7th pixel row exchange positions, the 1st pixel row and the 6th pixel row exchange positions, the 2nd pixel row and the 5th pixel row exchange positions, and the 3rd pixel row and the 4th pixel row exchange positions. It should be noted that the 3rd pixel row does not include the pixel at the 3rd column of the 3rd row, and the 4th pixel row does not include the pixel at the 3rd column of the 4th row.

[0094] Example 7: Figure 11A is a schematic diagram of the first reference image block provided by the embodiment of the present application, where Figure 11A each square represents a pixel. The pixels with texture are the pixels that do not need to be rearranged, and the pixels without texture are the pixels that need to be rearranged. That is to say, Figure 11AIn the 0th pixel row, 1st pixel row, the pixel at the 0th column of the 4th row, and the pixel at the 0th column of the 5th row remain unchanged, and the other pixels need to be rearranged. Among them, the encoding end can perform vertical symmetric rearrangement on the 2nd - 7th pixel rows along the horizontal symmetry axis of these pixel rows. It should be noted that the 4th pixel row does not include the pixel at the 0th column of the 4th row, and the 5th pixel row does not include the pixel at the 0th column of the 5th row. Figure 11B It is a schematic diagram of the second reference image block provided by the embodiment of the present application, as Figure 11B shown. After vertical symmetric rearrangement, the 2nd pixel row and the 7th pixel row exchange positions, the 3rd pixel row and the 6th pixel row exchange positions, and the 4th pixel row and the 5th pixel row exchange positions. It should be noted that the 4th pixel row does not include the pixel at the 0th column of the 4th row, and the 5th pixel row does not include the pixel at the 0th column of the 5th row.

[0095] An exemplary illustration is made for alternative two:

[0096] Optionally, the encoding end can perform reverse arrangement on multiple pixel columns to obtain the second reference image block of the image block to be encoded. For example: the order of the above - mentioned multiple pixel rows before rearrangement is pixel columns 0, 1, 2, 3, 4, 5, 6, 7. After reverse arrangement, the arrangement order of the above - mentioned multiple pixel columns is 7, 6, 5, 4, 3, 2, 1. Or, the above - mentioned multiple pixel columns are symmetric about the vertical symmetry axis of the multiple pixel columns. Correspondingly, the encoding end can perform left - right symmetric rearrangement on the multiple pixel columns along the vertical symmetry axis of the multiple pixel columns to obtain the second reference image block of the image block to be encoded.

[0097] Example 1: Figure 12A It is a schematic diagram of the first reference image block provided by the embodiment of the present application, where Figure 12A each square represents a pixel. The pixels with texture are the pixels that do not need to be rearranged, and the pixels without texture are the pixels that need to be rearranged. That is to say, Figure 12A in the 0th pixel column and the 7th pixel column remain unchanged, and the 1st - 6th pixel columns are the pixel columns that need to be rearranged. Among them, the encoding end can perform left - right symmetric rearrangement on the 1st - 6th pixel columns along the vertical symmetry axis of the 1st - 6th pixel columns. Figure 12B It is a schematic diagram of the second reference image block provided by the embodiment of the present application, as Figure 12B shown. After left - right symmetric rearrangement, the 1st pixel column and the 6th pixel column exchange positions, the 2nd pixel column and the 5th pixel column exchange positions, and the 3rd pixel column and the 4th pixel column exchange positions.

[0098] Example 2: Figure 13A It is a schematic diagram of the first reference image block provided by the embodiment of the present application, where Figure 13AEach box in [[]] represents a pixel. Pixels with texture are those that do not require pixel rearrangement, and pixels without texture are those that require pixel rearrangement. That is, Figure 13A In [[]], the 3rd and 4th pixel columns remain unchanged, and the other pixel columns are those that require pixel rearrangement. Among them, the encoding end can perform left - right symmetric rearrangement on the 0th, 1st, 2nd, 5th, 6th, and 7th pixel columns along the vertical symmetry axis of these pixel columns. Figure 13B It is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 13B shown, after the left - right symmetric rearrangement, the 0th pixel column and the 7th pixel column exchange positions, the 1st pixel column and the 6th pixel column exchange positions, and the 2nd pixel column and the 5th pixel column exchange positions.

[0099] Example 3: Figure 14A It is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 14A Each box in [[]] represents a pixel. Pixels with texture are those that do not require pixel rearrangement, and pixels without texture are those that require pixel rearrangement. That is, Figure 14A In [[]], the 0th and 1st pixel columns remain unchanged, and the 2nd - 7th pixel columns are those that require pixel rearrangement. Among them, the encoding end can perform left - right symmetric rearrangement on the 2nd - 7th pixel columns along the vertical symmetry axis of these pixel rows. Figure 14B It is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 14B shown, after the left - right symmetric rearrangement, the 2nd pixel column and the 7th pixel column exchange positions, the 3rd pixel column and the 6th pixel column exchange positions, and the 4th pixel column and the 5th pixel column exchange positions.

[0100] Example 4: Figure 15A It is a schematic diagram of the first reference image block provided by the embodiment of the present application. Among them, Figure 15A Each box in [[]] represents a pixel. Pixels with texture are those that do not require pixel rearrangement, and pixels without texture are those that require pixel rearrangement. That is, Figure 15A In [[]], the pixel at the 0th row and 0th column and the pixel at the 0th row and 7th column remain unchanged, and the other pixels require pixel rearrangement. Among them, the encoding end can perform left - right symmetric rearrangement on the 0th - 7th pixel columns along the vertical symmetry axis of these pixel columns. It should be noted that the 0th pixel column does not include the pixel at the 0th row and 0th column, and the 7th pixel column does not include the pixel at the 0th row and 7th column. Figure 15B It is a schematic diagram of the second reference image block provided by the embodiment of the present application. As Figure 15BAs shown, after left-right symmetric rearrangement, the 0th pixel column and the 7th pixel column have exchanged positions, the 1st pixel column and the 6th pixel column have exchanged positions, the 2nd pixel column and the 5th pixel column have exchanged positions, and the 3rd pixel column and the 4th pixel column have exchanged positions. It should be noted that the 0th pixel column does not include the pixel at the 0th row and 0th column, and the 7th pixel column does not include the pixel at the 0th row and 7th column.

[0101] Example 5: Figure 16A A schematic diagram of the first reference image block provided by an embodiment of the present application, where Figure 16A each square represents a pixel. Pixels with texture are pixels that do not need to be pixel rearranged, and pixels without texture are pixels that need to be pixel rearranged. That is to say, Figure 16A the pixels at the 0th row and 3rd column and the 0th row and 4th column in it remain unchanged, and other pixels need to be pixel rearranged. Among them, the encoding end can perform left-right symmetric rearrangement on the 0-7th pixel columns along the vertical symmetry axis of these pixel columns. It should be noted that the 3rd pixel row does not include the pixel at the 0th row and 3rd column, and the 4th pixel column does not include the pixel at the 0th row and 4th column. Figure 16B A schematic diagram of the second reference image block provided by an embodiment of the present application, as Figure 16B shown, after left-right symmetric rearrangement, the 0th pixel column and the 7th pixel column have exchanged positions, the 1st pixel column and the 6th pixel column have exchanged positions, the 2nd pixel column and the 5th pixel column have exchanged positions, and the 3rd pixel column and the 4th pixel column have exchanged positions. It should be noted that the 3rd pixel row does not include the pixel at the 0th row and 3rd column, and the 4th pixel column does not include the pixel at the 0th row and 4th column.

[0102] Example 6: Figure 17A A schematic diagram of the first reference image block provided by an embodiment of the present application, where Figure 17A each square represents a pixel. Pixels with texture are pixels that do not need to be pixel rearranged, and pixels without texture are pixels that need to be pixel rearranged. That is to say, Figure 17A the pixels at the 3rd row and 3rd column and the 3rd row and 4th column in it remain unchanged, and other pixels need to be pixel rearranged. Among them, the encoding end can perform left-right symmetric rearrangement on the 0-7th pixel columns along the vertical symmetry axis of these pixel columns. It should be noted that the 3rd pixel column does not include the pixel at the 3rd row and 3rd column, and the 4th pixel column does not include the pixel at the 3rd row and 4th column. Figure 17B A schematic diagram of the second reference image block provided by an embodiment of the present application, as Figure 17BAs shown, after left-right symmetric rearrangement, the 0th pixel column and the 7th pixel column have swapped positions, the 1st pixel column and the 6th pixel column have swapped positions, the 2nd pixel column and the 5th pixel column have swapped positions, and the 3rd pixel column and the 4th pixel column have swapped positions. It should be noted that the 3rd pixel column does not include the pixel at the 3rd row and 3rd column, and the 4th pixel column does not include the pixel at the 3rd row and 4th column.

[0103] Example 7: Figure 18A A schematic diagram of the first reference image block provided by an embodiment of the present application, where Figure 18A each square represents a pixel. The pixels with texture are the pixels that do not need to be pixel rearranged, and the pixels without texture are the pixels that need to be pixel rearranged. That is to say, Figure 18A in the 0th pixel column, the 1st pixel column, the pixels at the 4th column of the 0th row, and the pixels at the 5th column of the 0th row remain unchanged, and the other pixels need to be pixel rearranged. Among them, the encoding end can perform left-right symmetric rearrangement on the 2-7th pixel columns along the vertical symmetry axis of these pixel columns. It should be noted that the 4th pixel column does not include the pixel at the 4th column of the 0th row, and the 5th pixel column does not include the pixel at the 5th column of the 0th row. Figure 18B A schematic diagram of the second reference image block provided by an embodiment of the present application, as Figure 18B shown. After left-right symmetric rearrangement, the 2nd pixel column and the 7th pixel column have swapped positions, the 3rd pixel column and the 6th pixel column have swapped positions, and the 4th pixel column and the 5th pixel column have swapped positions. It should be noted that the 4th pixel column does not include the pixel at the 4th column of the 0th row, and the 5th pixel column does not include the pixel at the 5th column of the 0th row.

[0104] Optionally, the bitstream output by the encoding end further includes: the BV of the image block to be encoded, and this BV is used to determine the position of the first reference image block.

[0105] Optionally, the bitstream output by the encoding end further includes: the block vector resolution (BlockVector Resolution, BVR) of the BV of the image block to be encoded, which is used to indicate the accuracy of this BV.

[0106] In summary, in the present application, the encoding end can rearrange some pixels of the reference image block of the image block to be encoded, and use the reference block after partial pixel rearrangement as the reference of the image block to be encoded for encoding at the encoding end.

[0107] Embodiment 2

[0108] Figure 19The flowchart of an image decoding method provided by an embodiment of the present application, where the execution subject of the method can be the following devices, but is not limited thereto: a decoder, or a device for image decoding, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a handheld device such as a smart phone, a TV, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or the like. As Figure 19 shown, the method includes the following steps:

[0109] S1910: Parse the bitstream to obtain a first reference image block of the image block to be reconstructed.

[0110] S1920: Rearrange some pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed.

[0111] S1930: Obtain prediction information of the image block to be reconstructed according to the second reference image block.

[0112] S1940: Perform image reconstruction on the image block to be reconstructed according to the prediction information.

[0113] It should be understood that the first reference image block is the original reference image block of the image block to be reconstructed, that is, the reference image block used as the reference of the image block to be reconstructed in the prior art.

[0114] Optionally, the above bitstream includes the BV of the image block to be reconstructed. After obtaining the BV, the decoding end determines the first reference image block according to the BV.

[0115] Optionally, the above bitstream further includes: the BVR of the BV of the image block to be reconstructed, which is used to indicate the accuracy of the BV.

[0116] It should be understood that when the decoding end rearranges some pixels of the first reference image block, no operation is performed on other pixels of the first reference image block except the above-mentioned some pixels, that is, the positions of other pixels of the first reference image block except the above-mentioned some pixels remain unchanged.

[0117] Optionally, the above-mentioned some pixels can form multiple pixel rows, or multiple pixel columns. Among them, the number of pixels included in each row of the multiple pixel rows can be the same or different, and the present application does not limit this. The number of pixels included in each column of the multiple pixel columns can be the same or different, and the present application does not limit this.

[0118] Optionally, the rearrangement method adopted by the decoding end for some pixels of the first reference image block, simply referred to as the rearrangement method, includes any one of the following, but is not limited thereto:

[0119] Implementation method 1: Some pixels form multiple pixel rows, and the decoding end rearranges the multiple pixel rows to obtain a second reference image block of the image block to be reconstructed.

[0120] Implementation method 2: Some pixels form multiple pixel columns, and the decoding end rearranges the multiple pixel columns to obtain a second reference image block of the image block to be reconstructed.

[0121] An exemplary description is given for optional method 1:

[0122] Optionally, the decoding end can reverse the order of the multiple pixel rows to obtain a second reference image block of the image block to be reconstructed. For example: The order of the above multiple pixel rows before rearrangement is pixel rows 0, 1, 2, 3, 4, 5, 6, 7. After reversing the order, the order of the above multiple pixel rows is 7, 6, 5, 4, 3, 2, 1. Or, the above multiple pixel rows are symmetric about the horizontal axis of symmetry of the multiple pixel rows. Based on this, the decoding end performs vertical symmetric rearrangement of the multiple pixel rows along the horizontal axis of symmetry of the multiple pixel rows to obtain a second reference image block of the image block to be reconstructed. Specific examples can be referred to Figures 5A to 11B For the corresponding examples, the present application will not elaborate on them here.

[0123] An exemplary description is given for optional method 2:

[0124] Optionally, the decoding end can reverse the order of the multiple pixel columns to obtain a second reference image block of the image block to be reconstructed. For example: The order of the above multiple pixel columns before rearrangement is pixel columns 0, 1, 2, 3, 4, 5, 6, 7. After reversing the order, the order of the above multiple pixel columns is 7, 6, 5, 4, 3, 2, 1. Or, the above multiple pixel columns are symmetric about the vertical axis of symmetry of the multiple pixel columns. Correspondingly, the decoding end can perform left-right symmetric rearrangement of the multiple pixel columns along the vertical axis of symmetry of the multiple pixel columns to obtain a second reference image block of the image block to be reconstructed. Specific examples can be referred to Figures 12A to 18B For the corresponding examples, the present application will not elaborate on them here.

[0125] In summary, in the present application, the decoding end can rearrange some pixels of the reference image block of the image block to be reconstructed, and use the reference block after the rearrangement of some pixels as the reference for the image block to be reconstructed for image reconstruction.

[0126] Embodiment 3

[0127] Optionally, the encoding end and the decoding end can determine whether to adopt the partial pixel rearrangement method in the following manner, but not limited to this:

[0128] Implementation method 1: The encoding end and the decoding end can default to a certain partial pixel rearrangement method, or default not to use the partial pixel rearrangement method, that is, the above first reference image block is used as the reference of the image block to be encoded.

[0129] Implementation method 2: When the image block to be encoded meets the first preset condition, the encoding end determines to use the partial pixel rearrangement method; otherwise, the encoding end determines not to use the partial pixel rearrangement method. Similarly, when the image block to be reconstructed meets the first preset condition, the decoding end determines to use the partial pixel rearrangement method; otherwise, the decoding end determines not to use the partial pixel rearrangement method. Alternatively, when the image block to be encoded does not meet the first preset condition, the encoding end determines to use the partial pixel rearrangement method; otherwise, the encoding end determines to use the partial pixel rearrangement method. Similarly, when the image block to be reconstructed does not meet the first preset condition, the decoding end determines to use the partial pixel rearrangement method; otherwise, the decoding end determines to use the partial pixel rearrangement method. In short, the judgment conditions for the encoding end and the decoding end to determine whether to use the pixel rearrangement method are the same. Optionally, the bitstream output by the encoding end may include: a first flag pred_reorder_flag, which is used to indicate whether partial pixel rearrangement is performed on the first reference image block. Or, since the two use the same judgment method, the bitstream output by the encoding end may also not include: the first flag.

[0130] Implementation method 3: When the image block to be encoded meets the first preset condition, the encoding end determines to use the partial pixel rearrangement method; otherwise, the encoding end determines not to use the partial pixel rearrangement method. Or, when the image block to be encoded does not meet the first preset condition, the encoding end determines to use the partial pixel rearrangement method; otherwise, the encoding end determines to use the partial pixel rearrangement method. The decoding end does not need to use the same method as the encoding end to determine whether to use the partial pixel rearrangement method. At this time, the bitstream output by the encoding end needs to include: a first flag, which is used to indicate whether partial pixel rearrangement is performed on the first reference image block.

[0131] Implementation Mode 4: When the image block to be encoded meets the first preset condition, the encoding end determines to adopt the partial pixel rearrangement method. Similarly, when the image block to be reconstructed meets the first preset condition, the decoding end determines to adopt the partial pixel rearrangement method. Or, when the image block to be encoded does not meet the first preset condition, the encoding end determines to adopt the partial pixel rearrangement method. Similarly, when the image block to be reconstructed does not meet the first preset condition, the decoding end determines to adopt the partial pixel rearrangement method. In short, the judgment conditions for the encoding end and the decoding end to determine whether to adopt the pixel rearrangement method are the same. Optionally, the bitstream output by the encoding end may include: a first flag pred_reorder_flag, which is used to indicate whether partial pixel rearrangement is performed on the first reference image block. If the decoding end cannot determine whether to adopt the partial pixel rearrangement method based on whether the image block to be reconstructed meets the first preset condition, then the decoding end can determine whether to adopt the partial pixel rearrangement method according to the first flag.

[0132] Implementation Mode 5: When the image block to be encoded meets the first preset condition, the encoding end determines whether to rearrange some pixels of the first reference image block, and a first flag may be included in the encoded bitstream, and the first flag is used to indicate whether partial pixel rearrangement is performed on the first reference image block. Correspondingly, the decoding end can also first determine whether the image block to be reconstructed meets the first preset condition. If it does not meet the first preset condition, the decoding end does not perform pixel rearrangement on the first reference image block corresponding to the image block to be reconstructed. If it meets the first preset condition, the decoding end parses the bitstream to obtain the first flag to determine whether to perform partial pixel rearrangement on the first reference image block.

[0133] Optionally, for the encoding end, the first preset condition includes at least one of the following, but is not limited to this:

[0134] 1. The width of the image block to be encoded is less than or equal to the preset width.

[0135] 2. The height of the image block to be encoded is less than or equal to the preset height.

[0136] 3. The block vector resolution of the image block to be encoded is less than or equal to the preset resolution.

[0137] 4. The absolute value of the block vector of the image block to be encoded is greater than or equal to the first preset threshold.

[0138] 5. The absolute value of the block vector of the image block to be encoded is less than or equal to the second preset threshold.

[0139] It should be understood that the above preset width, preset height, preset resolution, first preset threshold, and second preset threshold can be set according to the actual situation, and the present application does not limit this.

[0140] An exemplary description is given for Implementation Mode 2:

[0141] Example 1. Assume that both the width and height of the image block to be encoded are less than or equal to 16. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that at least one of the width and height of the image block to be encoded is greater than 16. Then, the encoding end does not rearrange some pixels of the first reference image block.

[0142] Example 2. Assume that the block vector resolution of the image block to be encoded is less than or equal to 1 pixel precision. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the block vector resolution of the image block to be encoded is greater than 1 pixel precision. Then, the encoding end does not rearrange some pixels of the first reference image block.

[0143] Example 3. Assume that the absolute value of the block vector of the image block to be encoded is less than or equal to 3. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the absolute value of the block vector of the image block to be encoded is greater than 3. Then, the encoding end does not rearrange some pixels of the first reference image block.

[0144] Example 4. Assume that the absolute value of the block vector of the image block to be encoded is less than or equal to 1. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the absolute value of the block vector of the image block to be encoded is greater than 1. Then, the encoding end does not rearrange some pixels of the first reference image block.

[0145] An exemplary description is given for implementation method 3:

[0146] Exemplarily, assume that 1 pixel rearrangement method is allowed. If the value of the first identifier is 0, it means that no partial pixel rearrangement is performed on the first reference image block. If the value of the first identifier is 1, it means that this 1 pixel rearrangement method is used to perform partial pixel rearrangement on the first reference image block.

[0147] An exemplary description is given for implementation method 4:

[0148] Example 1. Assume that both the width and height of the image block to be encoded are less than or equal to 16. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that at least one of the width and height of the image block to be encoded is greater than 16. Then, the encoding end determines whether to rearrange some pixels of the first reference image block through the first identifier carried in the bitstream.

[0149] Example 2. Assume that the block vector resolution of the image block to be encoded is less than or equal to 1 pixel precision. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the block vector resolution of the image block to be encoded is greater than 1 pixel precision. Then, the encoding end determines whether to rearrange some pixels of the first reference image block through the first identifier carried in the bitstream.

[0150] Example 3. Assume that the absolute value of the block vector of the image block to be encoded is less than or equal to 3. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the absolute value of the block vector of the image block to be encoded is greater than 3. Then, the encoding end determines whether to rearrange some pixels of the first reference image block through the first identifier carried in the bitstream.

[0151] Example 4. Assume that the absolute value of the block vector of the image block to be encoded is less than or equal to 1. Then, the encoding end rearranges some pixels of the first reference image block to obtain the second reference image block of the image block to be encoded. Assume that the absolute value of the block vector of the image block to be encoded is greater than 1. Then, the encoding end determines whether to rearrange some pixels of the first reference image block through the first identifier carried in the bitstream.

[0152] An exemplary description is given for implementation mode five:

[0153] Example 1. Assume that both the width and height of the image block to be encoded are less than or equal to 16. Then, the encoding end carries the first identifier in the bitstream. Correspondingly, the decoding end determines that both the width and height of the image block to be reconstructed are less than or equal to 16. At this time, the decoding end obtains the first identifier by parsing the bitstream to determine whether to rearrange some pixels of the first reference image block. Assume that at least one of the width and height of the image block to be encoded is greater than 16. Then, the encoding end does not rearrange some pixels of the first reference image block. Correspondingly, the decoding end determines that at least one of the width and height of the image block to be reconstructed is greater than 16, and then the decoding end also does not rearrange some pixels of the first reference image block.

[0154] Example 2. Assume that the block vector resolution of the image block to be encoded is less than or equal to 1 pixel precision. Then, the encoding end carries the first identifier in the bitstream. Correspondingly, the decoding end determines that the block vector resolution is less than or equal to 1 pixel precision. At this time, the decoding end obtains the first identifier by parsing the bitstream to determine whether to rearrange some pixels of the first reference image block. Assume that the block vector resolution of the image block to be encoded is greater than 1 pixel precision. Then, the encoding end does not rearrange some pixels of the first reference image block. Correspondingly, the decoding end determines that the block vector resolution of the image block to be reconstructed is greater than 1 pixel precision, and then the decoding end also does not rearrange some pixels of the first reference image block.

[0155] Example 3. Assume that both the width and height of the image block to be encoded are less than or equal to 16, and the block vector resolution of the image block to be encoded is less than or equal to 1 pixel precision. Then, the encoding end carries a first identifier in the bitstream. Correspondingly, the decoding end determines that both the width and height of the image block to be reconstructed are less than or equal to 16, and the block vector resolution of the image block to be reconstructed is less than or equal to 1 pixel precision. At this time, the decoding end parses the bitstream to obtain the first identifier to determine whether to rearrange some pixels of the first reference image block. Assume that at least one of the width and height of the image block to be encoded is greater than 16, or the block vector resolution of the image block to be encoded is greater than 1 pixel precision. Then, the encoding end does not rearrange some pixels of the first reference image block. Correspondingly, if the decoding end determines that at least one of the width and height of the image block to be reconstructed is greater than 16 or the block vector resolution of the image block to be reconstructed is greater than 1 pixel precision, the decoding end also does not rearrange some pixels of the first reference image block.

[0156] Optionally, for the decoding end, the first preset condition includes at least one of the following, but is not limited thereto:

[0157] 1. The width of the image block to be reconstructed is less than or equal to a preset width.

[0158] 2. The height of the image block to be reconstructed is less than or equal to a preset height.

[0159] 3. The block vector resolution of the image block to be reconstructed is less than or equal to a preset resolution.

[0160] 4. The absolute value of the block vector of the image block to be reconstructed is greater than or equal to a first preset threshold.

[0161] 5. The absolute value of the block vector of the image block to be reconstructed is less than or equal to a second preset threshold.

[0162] It should be understood that the above preset width, preset height, preset resolution, first preset threshold, and second preset threshold can be set according to actual situations, and the present application does not limit this. For examples of the decoding end, reference can be made to the examples of the encoding end, and the present application will not elaborate on this.

[0163] Optionally, when the encoding end and the decoding end determine to adopt the partial pixel rearrangement method, further, the encoding end and the decoding end can also determine which pixel rearrangement method to use for pixel rearrangement. Specifically, it can be implemented through the following optional methods, but is not limited thereto:

[0164] Implementable method 1: Both the encoding end and the decoding end default to adopt a certain pixel rearrangement method or default not to adopt the pixel rearrangement method.

[0165] Implementation method 2: The encoding end can clearly determine the pixel rearrangement method used for partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be encoded. Similarly, the decoding end can clearly determine the pixel rearrangement method used for partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be reconstructed.

[0166] Implementation method 3: The encoding end determines the pixel rearrangement method used for partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be encoded. Further, the bitstream output by the encoding end may include: a second identifier pred_reorder_index, which is used to identify the pixel rearrangement method used during partial pixel rearrangement. That is, the decoding end does not use the same method as the encoding end to determine which pixel rearrangement method to use.

[0167] Implementation method 4: The encoding end can determine the pixel rearrangement method used for partial pixel rearrangement under certain conditions according to the positional relationship between the first reference image block and the image block to be encoded. Similarly, the decoding end can determine the pixel rearrangement method used for partial pixel rearrangement under certain conditions according to the positional relationship between the first reference image block and the image block to be reconstructed. Optionally, the bitstream may include a second identifier, pred_reorder_index, which is used to identify the pixel rearrangement method used during partial pixel rearrangement. If the decoding end cannot determine which pixel rearrangement method to use based on whether the image block to be reconstructed meets the above certain conditions, then the decoding end can determine which pixel rearrangement method to use according to the second identifier.

[0168] Implementation method 5: The encoding end carries a second identifier in the bitstream, and the decoding end determines which pixel rearrangement method to use through this second identifier.

[0169] Implementation method 6: The encoding end determines the pixel rearrangement method used for partial pixel rearrangement according to the size of the image block to be encoded. Correspondingly, the decoding end determines the pixel rearrangement method used for partial pixel rearrangement according to the size of the image block to be reconstructed.

[0170] An exemplary description is given for implementation method 2:

[0171] Exemplarily, when the first reference image block is above the current block to be encoded, it indicates that the first pixel rearrangement method is used; when the first reference image block is to the left of the current block to be encoded, it indicates that the second pixel rearrangement method is used. When the first reference image block is neither above nor to the left of the current block to be encoded, it indicates that the second pixel rearrangement method is used.

[0172] An exemplary description is given for implementation method 3:

[0173] Exemplarily, when the first reference image block is above the current block to be encoded, the value of the second identifier is 0, which is carried in the bitstream to indicate the use of the first pixel rearrangement method; when the first reference image block is to the left of the current block to be encoded, the value of the second identifier is 1, which is carried in the bitstream to indicate the use of the second pixel rearrangement method.

[0174] An exemplary description is given for Implementation Mode 4:

[0175] Exemplarily, when the first reference image block is above the current block to be encoded, it indicates the use of the first pixel rearrangement method; when the first reference image block is to the left of the current block to be encoded, it indicates the use of the second pixel rearrangement method. When the first reference image block is neither above nor to the left of the current block to be encoded, the pixel rearrangement method adopted is determined by the second identifier carried in the bitstream.

[0176] An exemplary description is given for Implementation Mode 5:

[0177] Exemplarily, when the value of the second identifier carried in the bitstream is 0, it indicates the use of the first pixel rearrangement method; when the value of the second identifier carried in the bitstream is 1, it indicates the use of the second pixel rearrangement method.

[0178] An exemplary description is given for Implementation Mode 6:

[0179] Exemplarily, if the width of the image block to be reconstructed is greater than the height, it is determined that the first pixel rearrangement method is used for partial pixel rearrangement; if the width of the image block to be reconstructed is less than or equal to the height, it is determined that the second pixel rearrangement method is used for partial pixel rearrangement. Or, if the width of the image block to be reconstructed is greater than the height, it is determined that the second pixel rearrangement method is used for partial pixel rearrangement; if the width of the image block to be reconstructed is less than or equal to the height, it is determined that the first pixel rearrangement method is used for partial pixel rearrangement.

[0180] It should be understood that for examples on the decoding side, reference can be made to the examples on the encoding side, and details are not elaborated in this application.

[0181] It should be understood that this application does not limit the first pixel rearrangement method, the second pixel rearrangement method, and the second pixel rearrangement method. For example, the first pixel rearrangement method is a method of performing up-down symmetric rearrangement on multiple pixel rows along the horizontal symmetry axis of the multiple pixel rows. The second pixel rearrangement method is a method of performing left-right symmetric rearrangement on multiple pixel columns along the vertical symmetry axis of the multiple pixel columns. The second pixel rearrangement method is a method of performing reverse arrangement on multiple pixel rows. Or, the first pixel rearrangement method is a method of performing left-right symmetric rearrangement on multiple pixel columns along the vertical symmetry axis of the multiple pixel columns. The second pixel rearrangement method is a method of performing up-down symmetric rearrangement on multiple pixel rows along the horizontal symmetry axis of the multiple pixel rows. The second pixel rearrangement method is a method of performing reverse arrangement on multiple pixel rows.

[0182] In summary, in this application, the encoding end and the decoding end can determine whether to adopt the pixel rearrangement method in the above manner. If it is determined to adopt the pixel rearrangement method, it can further determine which pixel rearrangement method to adopt.

[0183] Embodiment 4

[0184] Figure 20 is a flowchart of an image encoding method provided by an embodiment of this application. As Figure 20 shown, the execution subject of this method can be the following devices, but not limited thereto: an encoder, or an image encoding device, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a handheld device such as a smart phone, a television, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or the like. As Figure 20 shown, this method includes the following steps:

[0185] S2010: Determine the first reference image block of the image block to be encoded. The first reference image block includes N pixel parts, and N is an integer greater than 1.

[0186] S2020: Perform pixel rearrangement on the N pixel parts respectively by using the corresponding pixel rearrangement method to obtain the second reference image block of the image block to be encoded.

[0187] S2030: Obtain the prediction information of the image block to be encoded according to the second reference image block.

[0188] S2040: Encode the image block to be encoded according to the prediction information to obtain a bitstream.

[0189] S2050: Output the bitstream.

[0190] It should be understood that the first reference image block is the original reference image block of the image block to be encoded, that is, the reference image block that serves as a reference for the image block to be encoded in the prior art.

[0191] Optionally, each of the above-mentioned N pixel portions corresponds to a pixel rearrangement method. Among the N pixel rearrangement methods corresponding to at least N pixel portions, there may be some identical pixel rearrangement methods, or the pixel rearrangement methods corresponding to the N pixel portions may be completely different. The present application does not limit this.

[0192] It should be understood that the pixel rearrangement method corresponding to any one of the above-mentioned N pixel portions may be a pixel rearrangement method for rearranging all pixels, or a pixel rearrangement method for rearranging some pixels. The present application does not limit this.

[0193] It should be understood that for the partial pixel rearrangement method adopted for any one pixel portion, reference may be made to Embodiments 1 to 3 of the present application, and details are not described herein again.

[0194] Example 1 Figure 21A is a schematic diagram of the first reference image block provided by an embodiment of the present application, where Figure 21A each square represents a pixel, and the pixels with texture are the pixels adopting the first pixel rearrangement method. The remaining pixels are the pixels adopting the second pixel rearrangement method. Figure 21B is a schematic diagram of the second reference image block provided by an embodiment of the present application. As Figure 21B shown, for the pixels with texture 00, 01, 06, and 07, the first pixel rearrangement method is adopted, and the rearranged pixel order is 06, 07, 01, 00. For the pixels other than 00, 01, 06, and 07 in the 0th pixel column to the 7th pixel column, they are rearranged symmetrically about the vertical symmetry axis of these pixel columns. After the left-right symmetrical rearrangement, the 0th pixel column and the 7th pixel column are exchanged, the 1st pixel column and the 6th pixel column are exchanged, the 2nd pixel column and the 5th pixel column are exchanged, and the 3rd pixel column and the 4th pixel column are exchanged.

[0195] Example 2 Figure 22A is a schematic diagram of the first reference image block provided by an embodiment of the present application, where Figure 22A each square represents a pixel, and the pixels with texture are the pixels adopting the first pixel rearrangement method. The remaining pixels are the pixels adopting the second pixel rearrangement method. Figure 22B is a schematic diagram of the second reference image block provided by an embodiment of the present application. As Figure 22BAs shown, for pixels 00, 10, 60, and 70 with textures, the first pixel rearrangement method is adopted, and the rearranged pixel order is 60, 70, 10, 00. For the pixels other than pixels 00, 10, 60, and 70 in the 0th pixel row to the 7th pixel row, they are rearranged symmetrically up and down with respect to the horizontal symmetry axis of these pixel rows. After the up and down symmetrical rearrangement, the 0th pixel row and the 7th pixel row are swapped, the 1st pixel row and the 6th pixel row are swapped, the 2nd pixel row and the 5th pixel row are swapped, and the 3rd pixel row and the 4th pixel row are swapped.

[0196] Optionally, the encoding end and the decoding end can determine whether to adopt the pixel rearrangement method for N pixel parts in the following manner, but not limited to this:

[0197] Optionally, the encoding end determines whether the image block to be encoded meets the first preset condition; if the image block to be encoded meets the first preset condition, it is determined whether to respectively adopt the corresponding pixel rearrangement method for N pixel parts for pixel rearrangement, and a first identifier can be carried in the bitstream, and the first identifier is used to identify whether to respectively adopt the corresponding pixel rearrangement method for N pixel parts for pixel rearrangement. Then, for the decoding end, it can also determine whether the image block to be reconstructed meets the first preset condition; if the image block to be reconstructed meets the first preset condition, the bitstream is parsed to obtain the first identifier, and it is determined whether to respectively adopt the corresponding pixel rearrangement method for N pixel parts for pixel rearrangement according to the first identifier. On the contrary, if the image block to be encoded meets the first preset condition, the encoding end determines not to respectively adopt the corresponding pixel rearrangement method for N pixel parts for pixel rearrangement. For the decoding end, if the image block to be reconstructed does not meet the first preset condition, it also determines not to respectively adopt the corresponding pixel rearrangement method for N pixel parts for pixel rearrangement.

[0198] It should be understood that other methods for the encoding end and the decoding end to determine whether to adopt the pixel rearrangement method for N pixel parts can refer to Embodiments 1 to 3, and this application will not elaborate further.

[0199] Optionally, for the encoding end, the first preset condition includes at least one of the following, but not limited to this:

[0200] The width of the image block to be encoded is less than or equal to the preset width;

[0201] The height of the image block to be encoded is less than or equal to the preset height;

[0202] The block vector resolution of the image block to be encoded is less than or equal to the preset resolution;

[0203] The absolute value of the block vector of the image block to be encoded is greater than or equal to the first preset threshold;

[0204] The absolute value of the block vector of the image block to be encoded is less than or equal to a second preset threshold.

[0205] Optionally, for the decoding end, the first preset condition includes at least one of the following, but is not limited to:

[0206] The width of the image block to be reconstructed is less than or equal to a preset width;

[0207] The height of the image block to be reconstructed is less than or equal to a preset height;

[0208] The block vector resolution of the image block to be reconstructed is less than or equal to a preset resolution;

[0209] The absolute value of the block vector of the image block to be reconstructed is greater than or equal to a first preset threshold;

[0210] The absolute value of the block vector of the image block to be reconstructed is less than or equal to a second preset threshold.

[0211] Optionally, when the encoding end and the decoding end determine to use the pixel rearrangement method for N pixel parts, further, the encoding end and the decoding end can also determine which pixel rearrangement method to use for the N pixel parts for pixel rearrangement. Specifically, it can be implemented through the following optional methods, but is not limited to:

[0212] Implementation method one: When the encoding end determines to perform pixel rearrangement on N pixel parts respectively using corresponding pixel rearrangement methods, the bitstream includes: a second identifier, which is used to identify the pixel rearrangement method used for the N pixel parts. Correspondingly, the decoding end can parse to obtain the second identifier to determine the pixel rearrangement methods corresponding to the N pixel parts respectively.

[0213] It should be understood that the second identifier is used to indicate the pixel rearrangement methods corresponding to the N pixel parts respectively. For example: there are two pixel parts in the image block to be encoded. The pixel rearrangement method corresponding to the first pixel part is the 0th pixel rearrangement method, and the pixel rearrangement method corresponding to the second pixel part is the 1st pixel rearrangement method. When the value of the second identifier is 1, it means that the pixel rearrangement method corresponding to the first pixel part is the 0th pixel rearrangement method, and the pixel rearrangement method corresponding to the second pixel part is the 1st pixel rearrangement method.

[0214] Implementation method two: When the encoding end determines to perform pixel rearrangement on N pixel parts respectively using corresponding pixel rearrangement methods, it determines the pixel rearrangement method used for the N pixel parts according to the positional relationship between the first reference image block and the image block to be encoded. Similarly, when the decoding end determines to perform pixel rearrangement on N pixel parts respectively using corresponding pixel rearrangement methods, it determines the pixel rearrangement method used for the N pixel parts according to the positional relationship between the first reference image block and the image block to be reconstructed.

[0215] In the third implementable manner, the encoding end determines the pixel rearrangement method for N partial pixels according to the size of the image block to be encoded. Correspondingly, the decoding end determines the pixel rearrangement method for N partial pixels according to the size of the image block to be reconstructed.

[0216] It should be understood that for other methods of determining which pixel rearrangement method to use for rearranging N pixel parts at the encoding end and the decoding end, reference can be made to Embodiments 1 to 3, which will not be elaborated in this application.

[0217] Optionally, the bitstream output by the encoding end further includes: the BV of the image block to be encoded, and this BV is used to determine the position of the first reference image block.

[0218] Optionally, the bitstream output by the encoding end further includes: the BVR of the BV of the image block to be encoded, which is used to indicate the precision of this BV.

[0219] In summary, in this application, the encoding end can rearrange some pixels of the reference image block of the image block to be encoded, and use the reference block after partial pixel rearrangement as the reference of the image block to be encoded for encoding at the encoding end.

[0220] Embodiment 5

[0221] Figure 23 It is a flowchart of an image decoding method provided by an embodiment of this application. The execution subject of this method can be the following devices, but is not limited thereto: a decoder, or a device for image decoding, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a handheld device such as a smart phone, a television, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or the like. As Figure 23 shown, this method includes the following steps:

[0222] S2310: Parse the bitstream to obtain the first reference image block of the image block to be reconstructed. The first reference image block includes N pixel parts, and N is an integer greater than 1.

[0223] S2320: Rearrange the N pixel parts respectively using the corresponding pixel rearrangement method to obtain the second reference image block of the image block to be reconstructed.

[0224] S2330: Obtain the prediction information of the image block to be reconstructed according to the second reference image block.

[0225] S2340: Reconstruct the image block to be reconstructed according to the prediction information.

[0226] Optionally, before respectively performing corresponding pixel rearrangement methods on N pixel parts to obtain a second reference image block of the image block to be reconstructed, it further includes: determining whether the image block to be reconstructed meets a first preset condition; if the image block to be reconstructed meets the first preset condition, parsing the code stream to obtain a first identifier, where the first identifier is used to identify whether to respectively perform corresponding pixel rearrangement methods on N pixel parts; correspondingly, respectively performing corresponding pixel rearrangement methods on N pixel parts to obtain a second reference image block of the image block to be reconstructed includes: if it is determined to respectively perform corresponding pixel rearrangement methods on N pixel parts, then respectively performing corresponding pixel rearrangement methods on N pixel parts to obtain a second reference image block of the image block to be reconstructed.

[0227] Optionally, the first preset condition includes at least one of the following:

[0228] The width of the image block to be reconstructed is less than or equal to a preset width;

[0229] The height of the image block to be reconstructed is less than or equal to a preset height;

[0230] The block vector resolution of the image block to be reconstructed is less than or equal to a preset resolution;

[0231] The absolute value of the block vector of the image block to be reconstructed is greater than or equal to a first preset threshold;

[0232] The absolute value of the block vector of the image block to be reconstructed is less than or equal to a second preset threshold.

[0233] Optionally, when it is determined to respectively perform corresponding pixel rearrangement methods on N pixel parts, the code stream includes: a second identifier, where the second identifier is used to identify the pixel rearrangement method used for N pixel parts; correspondingly, respectively performing corresponding pixel rearrangement methods on N pixel parts to obtain a second reference image block of the image block to be reconstructed includes: performing pixel rearrangement on N pixel parts according to the pixel rearrangement method identified by the second identifier to obtain a second reference image block of the image block to be reconstructed.

[0234] Optionally, before respectively performing corresponding pixel rearrangement methods on N pixel parts to obtain a second reference image block of the image block to be reconstructed, it further includes: when it is determined to respectively perform corresponding pixel rearrangement methods on N pixel parts, determining the pixel rearrangement method used for N pixel parts according to the positional relationship between the first reference image block and the image block to be reconstructed.

[0235] It should be noted that for the explanation of Embodiment 5, reference can be made to Embodiment 4, and details are not repeated herein.

[0236] Embodiment 6

[0237] Figure 24 A schematic diagram of an image encoding device provided by an embodiment of the present application is shown as Figure 24 shown. The device includes:

[0238] A first determination module 2410, configured to determine a first reference image block of an image block to be encoded.

[0239] A pixel rearrangement module 2420, configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the image block to be encoded.

[0240] A prediction module 2430, configured to obtain prediction information of the image block to be encoded according to the second reference image block.

[0241] An encoding module 2440, configured to encode the image block to be encoded according to the prediction information to obtain a bitstream.

[0242] An output module 2450, configured to output the bitstream.

[0243] Optionally, some pixels form a plurality of pixel rows along the horizontal direction, and the plurality of pixel rows are symmetric about the horizontal symmetry axis of the plurality of pixel rows. The pixel rearrangement module 2420 is specifically configured to: symmetrically rearrange the plurality of pixel rows up and down along the horizontal symmetry axis of the plurality of pixel rows to obtain a second reference image block of the image block to be encoded. Wherein, the horizontal symmetry axis includes at least one pixel row.

[0244] Optionally, some pixels form a plurality of pixel columns along the vertical direction, and the plurality of pixel columns are symmetric about the vertical symmetry axis of the plurality of pixel columns. The pixel rearrangement module 2420 is specifically configured to: symmetrically rearrange the plurality of pixel columns left and right along the vertical symmetry axis of the plurality of pixel columns to obtain a second reference image block of the image block to be encoded. Wherein, the vertical symmetry axis includes at least one pixel column.

[0245] Optionally, it further includes: a judgment module 2460, configured to judge whether the image block to be encoded meets a first preset condition. The judgment module 2460 is further configured to: if the image block to be encoded meets the first preset condition, further judge whether to rearrange some pixels of the first reference image block.

[0246] Optionally, if the image block to be encoded meets the first preset condition, the bitstream includes a first identifier, and the first identifier is used to identify whether some pixels of the first reference image block are rearranged.

[0247] Optionally, the first preset condition includes at least one of the following:

[0248] The width of the image block to be encoded is less than or equal to a preset width.

[0249] The height of the image block to be encoded is less than or equal to a preset height.

[0250] The block vector resolution of the image block to be encoded is less than or equal to a preset resolution.

[0251] The absolute value of the block vector of the image block to be encoded is greater than or equal to a first preset threshold.

[0252] The absolute value of the block vector of the image block to be encoded is less than or equal to a second preset threshold.

[0253] Optionally, when it is determined to perform partial pixel rearrangement, the bitstream includes: a second identifier, which is used to identify the pixel rearrangement method adopted when performing partial pixel rearrangement.

[0254] Optionally, it further includes: a second determination module 2470, which is used to determine the pixel rearrangement method adopted when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be encoded when it is determined to perform partial pixel rearrangement.

[0255] Optionally, the second determination module 2470 is specifically used for: if the first reference image block is above the image block to be encoded, determining to adopt a first pixel rearrangement method when performing partial pixel rearrangement. If the first reference image block is to the left of the image block to be encoded, determining to adopt a second pixel rearrangement method when performing partial pixel rearrangement.

[0256] Optionally, the second determination module 2470 is used to determine the pixel rearrangement method adopted when performing partial pixel rearrangement according to the size of the image block to be encoded when it is determined to perform partial pixel rearrangement.

[0257] Optionally, the second determination module 2470 is specifically used for: if the width of the image block to be encoded is greater than the height, determining to adopt a first pixel rearrangement method when performing partial pixel rearrangement. If the width of the image block to be encoded is less than or equal to the height, determining to adopt a second pixel rearrangement method when performing partial pixel rearrangement.

[0258] Optionally, the first reference image block includes N pixel parts, where N is an integer greater than 1. The pixel rearrangement module 2420 is specifically used for: respectively performing corresponding pixel rearrangement methods on the N pixel parts to obtain a second reference image block of the image block to be encoded.

[0259] It should be understood that the apparatus embodiments and the method embodiments can correspond to each other, and similar descriptions can refer to the method embodiments. To avoid repetition, it will not be elaborated here. Specifically, Figure 24The device shown above can perform the aforementioned and other operations and / or functions of each module in the image encoding device respectively to implement the corresponding processes of the image encoding device. For the sake of brevity, they will not be elaborated here.

[0260] The device of the embodiment of the present application has been described above from the perspective of functional modules in combination with the accompanying drawings. It should be understood that the functional module can be implemented in the form of hardware, or in the form of instructions in software, or in the form of a combination of hardware and software modules. Specifically, each step of the method embodiment in the embodiment of the present application can be completed by the integrated logic circuit in the hardware in the processor and / or instructions in software. The steps of the method disclosed in combination with the embodiment of the present application can be directly embodied as being completed by the hardware decoding processor, or by the combination of the hardware and software modules in the decoding processor. Optionally, the software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps in the above method embodiment.

[0261] Embodiment 7

[0262] Figure 25 is a schematic diagram of an image decoding device provided by an embodiment of the present application. As Figure 25 shown, the device includes:

[0263] A parsing module 2510, configured to parse a bitstream to obtain a first reference image block of a to-be-reconstructed image block.

[0264] A pixel rearrangement module 2520, configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the to-be-reconstructed image block.

[0265] A prediction module 2530, configured to obtain prediction information of the to-be-reconstructed image block according to the second reference image block.

[0266] A reconstruction module 2540, configured to perform image reconstruction on the to-be-reconstructed image block according to the prediction information.

[0267] Optionally, some pixels form a plurality of pixel rows along the horizontal direction. The pixel rearrangement module 2520 is specifically configured to: rearrange the plurality of pixel rows to obtain a second reference image block of the to-be-reconstructed image block.

[0268] Optionally, the plurality of pixel rows are symmetric about the horizontal symmetry axis. The pixel rearrangement module 2520 is specifically configured to: perform up-and-down symmetric rearrangement of the plurality of pixel rows along the horizontal symmetry axis of the plurality of pixel rows to obtain a second reference image block of the to-be-reconstructed image block. Wherein, the horizontal symmetry axis includes at least one pixel row.

[0269] Optionally, some pixels form a plurality of pixel columns in the vertical direction. The pixel rearrangement module 2520 is specifically configured to: rearrange the plurality of pixel columns to obtain a second reference image block of the image block to be reconstructed.

[0270] Optionally, the plurality of pixel columns are symmetric about the vertical symmetry axis. The pixel rearrangement module 2520 is specifically configured to: perform left-right symmetric rearrangement on the plurality of pixel columns along the vertical symmetry axis of the plurality of pixel columns to obtain a second reference image block of the image block to be reconstructed. Wherein, the vertical symmetry axis includes at least one pixel column.

[0271] Optionally, it further includes: a judgment module 2550, configured to judge whether the image block to be reconstructed meets a first preset condition. If the image block to be reconstructed meets the first preset condition, the parsing module 2510 is further configured to parse the bitstream to obtain a first identifier, and the first identifier is used to identify whether partial pixel rearrangement is performed on the first reference image block.

[0272] Optionally, the first preset condition includes at least one of the following:

[0273] The width of the image block to be reconstructed is less than or equal to a preset width.

[0274] The height of the image block to be reconstructed is less than or equal to a preset height.

[0275] The block vector resolution of the image block to be reconstructed is less than or equal to a preset resolution.

[0276] The absolute value of the block vector of the image block to be reconstructed is greater than or equal to a first preset threshold.

[0277] The absolute value of the block vector of the image block to be reconstructed is less than or equal to a second preset threshold.

[0278] Optionally, the bitstream includes: a second identifier, and the second identifier is used to identify the pixel rearrangement method adopted when performing partial pixel rearrangement. Correspondingly, the pixel rearrangement module 2520 is specifically configured to: rearrange some pixels of the first reference image block according to the pixel rearrangement method identified by the second identifier to obtain a second reference image block of the image block to be reconstructed.

[0279] Optionally, it further includes: a determination module 2560, configured to determine the pixel rearrangement method adopted when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be reconstructed.

[0280] Optionally, the determination module 2560 is specifically configured to: if the first reference image block is above the image block to be reconstructed, determine to adopt a first pixel rearrangement method when performing partial pixel rearrangement. If the first reference image block is to the left of the image block to be reconstructed, determine to adopt a second pixel rearrangement method when performing partial pixel rearrangement.

[0281] Optionally, the determination module 2560 is configured to: determine a pixel rearrangement method to be used when performing partial pixel rearrangement according to the size of the image block to be reconstructed.

[0282] Optionally, the determination module 2560 is specifically configured to: if the width of the image block to be reconstructed is greater than the height, determine to use the first pixel rearrangement method when performing partial pixel rearrangement; if the width of the image block to be reconstructed is less than or equal to the height, determine to use the second pixel rearrangement method when performing partial pixel rearrangement.

[0283] Optionally, the first reference image block includes N pixel parts, where N is an integer greater than 1. The pixel rearrangement module 2520 is specifically configured to: perform pixel rearrangement on the N pixel parts respectively by using corresponding pixel rearrangement methods to obtain a second reference image block of the image block to be reconstructed.

[0284] It should be understood that the apparatus embodiments and the method embodiments can correspond to each other, and similar descriptions can refer to the method embodiments. To avoid repetition, details are not described herein again. Specifically, Figure 25 The device shown can execute the foregoing and other operations and / or functions of each module in the image decoding device respectively to implement the corresponding processes of the image decoding device. For the sake of brevity, details are not described herein again.

[0285] In the foregoing, the device according to the embodiments of the present application has been described from the perspective of functional modules with reference to the accompanying drawings. It should be understood that the functional modules can be implemented in the form of hardware, or in the form of instructions in software, or in a combination of hardware and software modules. Specifically, the steps of the method embodiments in the present application can be completed by the integrated logic circuit in the hardware in the processor and / or instructions in software. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by a combination of the hardware and software modules in the decoding processor. Optionally, the software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps in the foregoing method embodiments.

[0286] The device of the embodiment of the present application has been described above from the perspective of functional modules in combination with the accompanying drawings. It should be understood that the functional modules can be implemented in the form of hardware, or in the form of instructions in software, or in a combination of hardware and software modules. Specifically, the steps of the method embodiment in the embodiment of the present application can be completed by the integrated logic circuit in the hardware in the processor and / or instructions in the form of software. The steps of the method disclosed in combination with the embodiment of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by the combination of the hardware and software modules in the decoding processor. Optionally, the software module can be located in a mature storage medium in the art such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, register, etc. This storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps in the above method embodiment.

[0287] The present application also provides an image encoding device, which can be used to execute the corresponding method embodiment at the encoding end. The device can be an encoder or a device for image encoding, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a smart phone and other handheld devices, a television, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or other serial vector encoding devices such as the like. If it is a device for serial vector encoding, the device can include an encoder, a display, and a memory, etc. The encoder is mainly used to execute the corresponding method embodiment at the encoding end.

[0288] The present application also provides an image decoding device, which can be used to execute the corresponding method embodiment at the decoding end. The device can be a decoder or a device for image decoding, such as a desktop computer, a mobile computing device, a notebook (e.g., laptop) computer, a tablet computer, a set-top box, a smart phone and other handheld devices, a television, a camera, a display device, a digital media player, a video game console, an in-vehicle computer, or other serial vector decoding devices such as the like. If it is a device for serial vector decoding, the device can include a decoder, a display, and a memory, etc. The decoder is mainly used to execute the corresponding method embodiment at the decoding end.

[0289] In some embodiments of the present application, the memory includes but is not limited to:

[0290] Volatile memory and / or non-volatile memory. Among them, the non-volatile memory can be Read-Only Memory (ROM), Programmable ROM (PROM), Erasable PROM (EPROM), Electrically Erasable PROM (EEPROM), or flash memory. The volatile memory can be Random Access Memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double DataRate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), synch link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).

[0291] In some embodiments of the present application, the computer program can be divided into one or more modules, and the one or more modules are stored in the memory and executed by the processor to complete the method provided by the present application. The one or more modules can be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program in the image processing device.

[0292] The present application also provides a computer storage medium having a computer program stored thereon, and when the computer program is executed by the computer, the computer is enabled to execute the method of the above method embodiments. Or, the embodiments of the present application also provide a computer program product containing instructions, and when the instructions are executed by the computer, the computer is enabled to execute the method of the above method embodiments.

[0293] When implemented using software, it can be implemented in the form of a computer program product in whole or in part. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the embodiments of this application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that the computer can access or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0294] Those of ordinary skill in the art will realize that the modules and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0295] In several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division, and there can be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces, and the indirect couplings or communication connections of the devices or modules can be in electrical, mechanical, or other forms.

[0296] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network elements. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. For example, in each embodiment of this application, the various functional modules can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0297] The above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art within the technical scope disclosed by this application can easily think of changes or substitutions, which should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. An image decoding method, characterized in that, Including: Analyzing a bitstream to obtain a first reference image block of the image block to be reconstructed; Rearranging some or all of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed; Obtaining prediction information of the image block to be reconstructed according to the second reference image block; Performing image reconstruction on the image block to be reconstructed according to the prediction information.

2. The method according to claim 1, characterized in that, The some pixels form a plurality of pixel rows in the horizontal direction. Rearranging some of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed includes: Rearranging the plurality of pixel rows to obtain a second reference image block of the image block to be reconstructed.

3. The method according to claim 2, characterized in that, The plurality of pixel rows are symmetric about a horizontal axis of symmetry. Rearranging the plurality of pixel rows to obtain a second reference image block of the image block to be reconstructed includes: Performing vertical symmetric rearrangement of the plurality of pixel rows along the horizontal axis of symmetry of the plurality of pixel rows to obtain a second reference image block of the image block to be reconstructed; Wherein, the horizontal axis of symmetry includes at least one pixel row.

4. The method according to claim 1, wherein The some pixels form a plurality of pixel columns in the vertical direction. Rearranging some of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed includes: Rearranging the plurality of pixel columns to obtain a second reference image block of the image block to be reconstructed.

5. The method according to claim 4, characterized in that, The plurality of pixel columns are symmetric about a vertical axis of symmetry. Rearranging the plurality of pixel columns to obtain a second reference image block of the image block to be reconstructed includes: Performing left-right symmetric rearrangement of the plurality of pixel columns along the vertical axis of symmetry of the plurality of pixel columns to obtain a second reference image block of the image block to be reconstructed; Wherein, the vertical axis of symmetry includes at least one pixel column.

6. The method according to any one of claims 1-5, characterized in that, Before rearranging some of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed, it further includes: Judging whether the image block to be reconstructed meets a first preset condition; If the image block to be reconstructed meets the first preset condition, then analyzing the bitstream to obtain a first identifier, where the first identifier is used to identify whether partial pixel rearrangement is performed on the first reference image block.

7. The method according to claim 6, wherein The first preset condition includes at least one of the following: The width of the image block to be reconstructed is less than or equal to a preset width; The height of the image block to be reconstructed is less than or equal to a preset height; The block vector resolution of the image block to be reconstructed is less than or equal to a preset resolution; The absolute value of the block vector of the image block to be reconstructed is greater than or equal to a first preset threshold; The absolute value of the block vector of the image block to be reconstructed is less than or equal to a second preset threshold.

8. The method according to any one of claims 1-5, characterized in that, The bitstream includes: a second identifier, where the second identifier is used to identify the pixel rearrangement method adopted when performing partial pixel rearrangement; correspondingly, rearranging some of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed includes: Rearrange some pixels of the first reference image block according to the pixel rearrangement method identified by the second identifier to obtain a second reference image block of the image block to be reconstructed.

9. The method according to any one of claims 1-5, characterized in that, Before rearranging some pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed, it further includes: Determine the pixel rearrangement method to be used when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be reconstructed.

10. The method according to claim 9, characterized in that, The determining the pixel rearrangement method to be used when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the image block to be reconstructed includes: If the first reference image block is above the image block to be reconstructed, determine to use a first pixel rearrangement method when performing partial pixel rearrangement; If the first reference image block is to the left of the image block to be reconstructed, determine to use a second pixel rearrangement method when performing partial pixel rearrangement.

11. The method according to any one of claims 1-5, characterized in that, Before rearranging some pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed, it further includes: Determine the pixel rearrangement method to be used when performing partial pixel rearrangement according to the size of the image block to be reconstructed.

12. The method according to claim 11, wherein The determining the pixel rearrangement method to be used when performing partial pixel rearrangement according to the size of the image block to be reconstructed includes: If the width of the image block to be reconstructed is greater than the height, determine to use a first pixel rearrangement method when performing partial pixel rearrangement; If the width of the image block to be reconstructed is less than or equal to the height, determine to use a second pixel rearrangement method when performing partial pixel rearrangement.

13. The method according to claim 1, characterized in that, The first reference image block includes N pixel parts, where N is an integer greater than 1; the rearranging all pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed includes: Perform pixel rearrangement on the N pixel parts respectively using corresponding pixel rearrangement methods to obtain a second reference image block of the image block to be reconstructed.

14. An image encoding method, characterized in that, It includes: Determine a first reference image block of the image block to be encoded; Rearrange some or all pixels of the first reference image block to obtain a second reference image block of the image block to be encoded; Obtain prediction information of the image block to be encoded according to the second reference image block; Encode the image block to be encoded according to the prediction information to obtain an encoded bitstream.

15. The method according to claim 14, wherein The some pixels form a plurality of pixel rows along the horizontal direction, and the plurality of pixel rows are symmetric about the horizontal symmetry axis of the plurality of pixel rows. Rearranging some pixels of the first reference image block to obtain a second reference image block of the image block to be encoded includes: Perform vertical symmetric rearrangement of the plurality of pixel rows along the horizontal symmetry axis of the plurality of pixel rows to obtain a second reference image block of the image block to be encoded.

16. The method according to claim 14, wherein The some pixels form a plurality of pixel columns along the vertical direction, and the plurality of pixel columns are symmetric about the vertical symmetry axis of the plurality of pixel columns. Rearranging some pixels of the first reference image block to obtain a second reference image block of the image block to be encoded includes: Perform left-right symmetric rearrangement on the multiple pixel columns along the vertical symmetry axis of the multiple pixel columns to obtain a second reference image block of the to-be-encoded image block.

17. The method according to any one of claims 14-16, characterized in that, Before rearranging some pixels of the first reference image block to obtain a second reference image block of the to-be-encoded image block, it further includes: Determine whether the to-be-encoded image block meets a first preset condition; If the to-be-encoded image block meets the first preset condition, further determine whether to rearrange some pixels of the first reference image block.

18. The method according to claim 17, wherein If the to-be-encoded image block meets the first preset condition, the bitstream includes a first identifier, and the first identifier is used to identify whether partial pixel rearrangement is performed on the first reference image block.

19. The method according to claim 18, characterized in that The first preset condition includes at least one of the following: The width of the to-be-encoded image block is less than or equal to a preset width; The height of the to-be-encoded image block is less than or equal to a preset height; The block vector resolution of the to-be-encoded image block is less than or equal to a preset resolution; The absolute value of the block vector of the to-be-encoded image block is greater than or equal to a first preset threshold; The absolute value of the block vector of the to-be-encoded image block is less than or equal to a second preset threshold.

20. The method according to any one of claims 14 to 16, characterized in that When it is determined to perform partial pixel rearrangement, the bitstream includes: a second identifier, and the second identifier is used to identify the pixel rearrangement method adopted when performing partial pixel rearrangement.

21. The method according to any one of claims 14 to 16, characterized in that, Before rearranging some pixels of the first reference image block to obtain a second reference image block of the to-be-encoded image block, it further includes: When it is determined to perform partial pixel rearrangement, determine the pixel rearrangement method adopted when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the to-be-encoded image block.

22. The method according to claim 21, wherein The determining the pixel rearrangement method adopted when performing partial pixel rearrangement according to the positional relationship between the first reference image block and the to-be-encoded image block includes: If the first reference image block is above the to-be-encoded image block, determine to adopt a first pixel rearrangement method when performing partial pixel rearrangement; If the first reference image block is to the left of the to-be-encoded image block, determine to adopt a second pixel rearrangement method when performing partial pixel rearrangement.

23. The method according to any one of claims 14-16, characterized in that, Before rearranging some pixels of the first reference image block to obtain a second reference image block of the to-be-encoded image block, it further includes: When it is determined to perform partial pixel rearrangement, determine the pixel rearrangement method adopted when performing partial pixel rearrangement according to the size of the to-be-encoded image block.

24. The method according to claim 23, wherein The determining the pixel rearrangement method adopted when performing partial pixel rearrangement according to the size of the to-be-encoded image block includes: If the width of the to-be-encoded image block is greater than the height, determine to adopt a first pixel rearrangement method when performing partial pixel rearrangement; If the width of the to-be-encoded image block is less than or equal to the height, determine to adopt a second pixel rearrangement method when performing partial pixel rearrangement.

25. The method according to claim 14, characterized in that, The first reference image block includes N pixel parts, where N is an integer greater than 1; the rearranging all pixels of the first reference image block to obtain a second reference image block of the to-be-encoded image block includes: The N pixel portions are respectively subjected to corresponding pixel rearrangement methods to rearrange pixels, so as to obtain a second reference image block of the image block to be encoded.

26. An image decoding device, characterized in that, It includes: A parsing module, configured to parse a bitstream to obtain a first reference image block of the image block to be reconstructed; A pixel rearrangement module, configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the image block to be reconstructed; A prediction module, configured to obtain prediction information of the image block to be reconstructed according to the second reference image block; A reconstruction module, configured to reconstruct the image block to be reconstructed according to the prediction information.

27. An image encoding device, characterized in that, It includes: A determination module, configured to determine a first reference image block of the image block to be encoded; A pixel rearrangement module, configured to rearrange some or all of the pixels of the first reference image block to obtain a second reference image block of the image block to be encoded; A prediction module, configured to obtain prediction information of the image block to be encoded according to the second reference image block; An encoding module, configured to encode the image block to be encoded according to the prediction information to obtain a bitstream; An output module, configured to output the bitstream.

28. An image computer device, including a processor and a memory, where the memory stores program instructions, and the processor executes the method according to any one of claims 1-25 based on the program instructions.

29. A computer-readable storage medium, characterized in that, For storing a computer program, the computer program causes a computer to execute the method according to any one of claims 1 to 25.

Citation Information

Patent Citations

  • Intra prediction method

    CN102427530A