Display substrate and preparation method thereof, mask, display panel, and display device

Abstract

The embodiments of the present application provide a display substrate and a preparation method thereof, a mask, a display panel, and a display device. The display substrate includes a display area and a non-display area; the non-display area includes multiple signal lines and multiple protection lines, each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line, and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; within the second sub-signal line arrangement area, the second sub-signal line includes an outer edge segment, the protection line is located on the side of the outer edge segment away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance. Using the embodiments of the present application, by providing multiple protection lines, the phenomenon of multiple signal lines becoming thinner or disconnected can be improved, which is beneficial to the improvement of the display device.

Description

Technical Field

[0001] The present application relates to the field of display technology. Specifically, the present application relates to a display substrate and a preparation method thereof, a mask, a display panel, and a display device. Background Art

[0002] Display devices may include LCD (Liquid Crystal Display) display devices, LED (Liquid Crystal Display) display devices, OLED (Organic Light-Emitting Diode) display devices, etc. Among them, OLED display devices have the advantages of being light and thin, high contrast, high brightness, low energy consumption, fast response speed, flexible display, and high luminous efficiency, which gives them huge development space in the fields of electronic products, transportation, medical, industrial control, etc., and are a highly competitive next-generation display technology.

[0003] With the rapid development of display technology, in order to achieve higher display pixels and narrower bezel design, existing OLED display devices are generally designed with more signal lines, thinner line widths and more dense routing arrangements.

[0004] However, in the prior art, signal line routing requires turning in certain areas due to design requirements, resulting in changes in density. As a result, the line width of the outer edge segments near the turning positions becomes thinner due to differences in exposure energy (optical proximity effect) and etching load. Especially under extreme line width design conditions, the outer edge segments may become broken or disconnected, resulting in defects such as bright lines, thereby reducing the yield of the display device and hindering the improvement of the display device. Summary of the Invention

[0005] In response to the shortcomings of existing methods, the present application proposes a display substrate and its preparation method, mask, display panel, and display device to solve the technical problems of the existing technology, such as the line width of the outer edge segments becoming thinner, and the possibility of disconnection and open circuit of some outer edge segments, resulting in bright lines and other undesirable technical problems.

[0006] In a first aspect, an embodiment of the present application provides a display substrate, comprising: a display area and a non-display area;

[0007] The non-display area includes a plurality of signal lines and a plurality of protection lines, each signal line includes a first sub-signal line and a second sub-signal line, an extension direction of the first sub-signal line is different from an extension direction of the second sub-signal line, and an arrangement density of the plurality of first sub-signal lines is less than an arrangement density of the plurality of second sub-signal lines;

[0008] In the second sub-signal line arrangement area, the second sub-signal line includes an outer edge segment, which is a portion of the second sub-signal line close to an intersection of the first sub-signal line and the second sub-signal line;

[0009] The protection line is located on the side of the outer edge line segment away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line. The distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line.

[0010] In a possible implementation, the width of the protection line is smaller than the width of the outer edge line segment; the protection line corresponds to the outer edge line segment one-to-one, and the protection line is located on the side of the outer edge line segment at the corresponding position away from the display area.

[0011] In a possible implementation, the display area includes a pixel circuit, and the pixel circuit includes a gate layer, a source / drain layer, and a capacitor plate layer.

[0012] In a possible implementation, the plurality of signal lines and the plurality of protection lines are all provided on the same layer as the gate layer or the capacitor plate layer;

[0013] Alternatively, some of the multiple signal lines and some of the multiple protection lines are arranged in the same layer as the gate layer, and the rest of the multiple signal lines and the rest of the multiple protection lines are arranged in the same layer as the capacitor plate layer.

[0014] In a second aspect, an embodiment of the present application provides a mask for exposure to obtain any display substrate described in the first aspect, the mask comprising: a first area and a second area;

[0015] During exposure, the first area corresponds to the display area, and the second area corresponds to the non-display area;

[0016] The second region includes a pattern of a plurality of signal lines and a pattern of a plurality of protection lines to form the plurality of signal lines and the plurality of protection lines after exposure.

[0017] In a possible implementation, the first area includes a first pattern, and the first pattern is the same as a pattern of gate lines included in the display area;

[0018] Alternatively, the first area includes a first pattern, and the first pattern is the same as a pattern of the capacitor plate layer included in the display area.

[0019] In a third aspect, an embodiment of the present application provides a display panel comprising a display substrate as described in any one of the first aspects.

[0020] In a fourth aspect, an embodiment of the present application provides a display device comprising the display panel according to the third aspect.

[0021] In a fifth aspect, an embodiment of the present application provides a method for preparing a display substrate as described in any one of the first aspects, wherein the display substrate includes a display area and a non-display area, including:

[0022] providing a substrate;

[0023] Multiple signal lines and multiple protection lines are produced on one side of the substrate; each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line, and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; in the second sub-signal line arrangement area, the second sub-signal line includes an outer edge line segment, which is a part of the line segment of the second sub-signal line close to the intersection of the first sub-signal line and the second sub-signal line; the protection line is located on the side of the outer edge line segment away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line.

[0024] In one possible implementation, multiple signal lines and multiple protection lines are fabricated on one side of a substrate, including:

[0025] A gate line, a plurality of signal lines, and a plurality of protection lines are formed on one side of a substrate by a single patterning process; or a capacitor plate layer, a plurality of signal lines, and a plurality of protection lines are formed on one side of a substrate by a single patterning process; the gate line and the capacitor plate layer are both located in a display area, and the plurality of signal lines and the plurality of protection lines are located in a non-display area;

[0026] Alternatively, the gate line, part of the signal line and part of the protection line are formed on one side of the substrate by a first patterning process; and the capacitor plate layer, the remaining signal line and the remaining protection line are formed on the side of the gate line away from the substrate by a second patterning process.

[0027] The beneficial technical effects brought about by the technical solutions provided in the embodiments of the present application include:

[0028] The display substrate provided in the embodiment of the present application includes a display area and a non-display area, the non-display area includes multiple signal lines and multiple protection lines, each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line (multiple signal lines are broken lines), and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; within the second sub-signal line arrangement area, the second sub-signal line includes an outer edge line segment, which is a portion of the line segment of the second sub-signal line close to the intersection of the first sub-signal line and the second sub-signal line; the protection line is located on a side of at least part of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line. That is to say, the embodiment of the present application sets a protection line on the side of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that during the exposure process of forming the second sub-signal line, the second sub-signal line is protected, which can improve the phenomenon of multiple signal lines becoming thinner or broken. The sacrificial protection line is used to balance the uniformity of the outer edge line segment (the outer edge line segment is the partial line segment of the second sub-signal line near the turning position) and the internal signal line during exposure, and simultaneously weaken the etching load to ensure that the signal line used for signal transmission (i.e., the second sub-signal line) will not be broken under the extreme line width design, thereby improving the bright line and other defects caused by the thinning or breaking of the outer edge line segment of the wiring near the turning position, improving the yield of the display device, and facilitating the improvement of the display device. Moreover, the display substrate provided by the embodiment of the present application does not cause a load on the entire wiring distribution, does not require a complex process, and can be achieved by existing processes.

[0029] Additional aspects and advantages of the present application will be given in part in the following description, which will become apparent from the following description, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0031] Figure 1 A schematic structural diagram of a display substrate provided in an embodiment of the present application;

[0032] Figure 2 for Figure 1 The enlarged schematic diagram of P1 in the middle;

[0033] Figure 3a To correspond Figure 2A schematic diagram of a plurality of signal line patterns of a mask in the prior art at P2;

[0034] Figure 3b To adopt Figure 3a A schematic diagram of multiple signal lines of a double-layer wiring design of a display substrate obtained by exposing the mask in FIG.

[0035] Figure 4a To correspond Figure 2 A schematic diagram of a pattern of multiple signal lines of another mask in the prior art at P2;

[0036] Figure 4b To adopt Figure 4a A schematic diagram of multiple signal lines of a single-layer wiring design of a display substrate obtained by exposing the mask in FIG.

[0037] Figure 5a To correspond Figure 2 A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of a mask provided by an embodiment of the present application at P2 in the middle;

[0038] Figure 5b The embodiment of this application provides Figure 5a A schematic diagram of multiple signal lines and multiple protection lines of a double-layer wiring design of a display substrate obtained by exposing the mask in FIG.

[0039] Figure 6a To correspond Figure 2 A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of another mask provided by an embodiment of the present application at P2;

[0040] Figure 6b The embodiment of this application provides Figure 6a A schematic diagram of multiple signal lines and multiple protection lines of a single-layer wiring design of a display substrate obtained by exposing the mask in FIG.

[0041] Figure 7a To correspond Figure 2 A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of another mask provided by an embodiment of the present application at P2;

[0042] Figure 7b The embodiment of this application provides Figure 7a A schematic diagram of multiple signal lines and multiple protection lines of another single-layer routing design of a display substrate obtained by exposing the mask in FIG.

[0043] Figure 8 A schematic flow chart of a method for preparing a display substrate provided in an embodiment of the present application.

[0044] Reference numerals:

[0045] 1-display substrate, 2-display area, 3-non-display area, 31-PAD routing area, 4-signal line;

[0046] 41a - a pattern of the first type of first sub-signal line, 41b - a pattern of the first type of second sub-signal line, 42a - a pattern of the second type of first sub-signal line, 42b - a pattern of the second type of second sub-signal line, 51 - a pattern of the first type of guard line, 52 - a pattern of the second type of guard line;

[0047] 43a - a first sub-signal line located on the first layer, 43b - a second sub-signal line located on the first layer, 44a - a first sub-signal line located on the second layer, 44b - a second sub-signal line located on the second layer, 53 - a guard line located on the first layer, 54 - a guard line located on the second layer;

[0048] 45a - a third pattern of the first sub-signal line, 45b - a fourth pattern of the second sub-signal line, 55 - a third pattern of the guard line, 57 - a fourth pattern of the guard line;

[0049] 46a is a first sub-signal line located on the third layer, 46b is a second sub-signal line located on the third layer, 56 is a type of protection line located on the third layer, and 58 is another type of protection line located on the third layer. DETAILED DESCRIPTION

[0050] The present application is described in detail below. Examples of embodiments of the present application are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar components or components having the same or similar functions. In addition, if the detailed description of the known technology is not necessary for the features of the present application shown, it will be omitted. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0051] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. It should also be understood that terms such as those defined in common dictionaries should be understood to have meanings consistent with their meanings in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0052] It will be understood by those skilled in the art that, unless expressly stated otherwise, the singular forms "a", "an", "said" and "the" used herein may also include the plural forms. It should be further understood that the term "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, "connected" or "coupled" as used herein may include wireless connections or wireless couplings. The term "and / or" used herein includes all or any units and all combinations of one or more associated listed items.

[0053] The inventors of this application have conducted research and found that in the prior art, Figure 1 、 Figure 2 、 Figure 3a 、 Figure 3b 、 Figure 4a and Figure 4b As shown, Figure 2 for Figure 1 The enlarged schematic diagram of P1, Figure 3a To correspond Figure 2 Schematic diagram of multiple signal line patterns of a mask at P2, Figure 3b To adopt Figure 3a A schematic diagram of multiple signal lines of a double-layer wiring design of a display substrate obtained by exposing the mask in FIG. Figure 3b To adopt Figure 3a The multiple signal lines are obtained after the mask plate with the pattern design is exposed, etched and other composition processes. Figure 4a To correspond Figure 2 Schematic diagram of the pattern of multiple signal lines of a mask at P2, Figure 4b To adopt Figure 4a A schematic diagram of multiple signal lines of a single-layer wiring design of a display substrate obtained by exposing the mask in FIG. Figure 4b To adopt Figure 4a Multiple signal lines are obtained by using a mask plate with a pattern design through composition processes such as exposure and etching.

[0054] like Figure 1 and Figure 2As shown, the display substrate 1 includes a display area 2 and a non-display area 3. The non-display area 3 is used for the routing of various signal lines. Specifically, the non-display area 3 includes multiple signal lines 4. Due to design requirements, the signal lines 4 need to turn in certain areas, and the density of the signal lines 4 changes before and after the turning. In specific implementation, the non-display area 3 includes a PAD routing area 31. The signal lines 4 are sparsely arranged in the PAD routing area 31 and densely arranged outside the PAD area 31.

[0055] from Figure 3a and Figure 3b It can be seen that Figure 3a The signal line pattern of the mask is prepared through actual exposure, etching and other composition processes. Figure 3b The signal lines shown, where Figure 3a The mask shown includes a first type of first sub-signal line pattern 41a, a first type of second sub-signal line pattern 41b, a second type of first sub-signal line pattern 42a, and a second type of second sub-signal line pattern 42b. Figure 3a The signal lines prepared by the mask shown are as follows Figure 3b As shown, due to the difference in exposure energy and etching load, the outer edge line segment of the second sub-signal line 43b located in the first layer and the outer edge line segment of the second sub-signal line 44b located in the second layer will be obviously thin and broken. Figure 4a and Figure 4b , Figure 4b The outer edge segment of the second sub-signal line 46b located in the third layer is obviously thin and broken.

[0056] It should be noted that the outer edge line segment refers to the line segment of the second sub-signal line close to the turning position, such as Figure 3b and Figure 4b The second sub-signal line in the middle dotted frame is the outer edge line segment.

[0057] Similarly, from Figure 4a and Figure 4b It can be seen that Figure 4a The pattern of the signal line of the mask is prepared through actual exposure, etching and other composition processes Figure 4b As shown in the signal line, in the prepared signal line, the outer edge segment of the second sub-signal line 46b located in the third layer is obviously thin and broken.

[0058] The present application provides a display substrate and a preparation method thereof, a mask, a display panel, and a display device, which are intended to solve the above technical problems in the prior art.

[0059] The following describes in detail the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems with specific embodiments.

[0060] The embodiment of the present application provides a display substrate, such as Figure 1 、 Figure 2 、 Figure 5b 、 Figure 6b and Figure 7b As shown, Figure 5b 、 Figure 6b and Figure 7b Use Figure 5a 、 Figure 6a and Figure 7a The display substrate 1 includes a display area 2 and a non-display area 3;

[0061] The non-display area 3 includes a plurality of signal lines 4 and a plurality of protection lines (such as Figure 5b 、 Figure 6b and Figure 7b The protection line 53 located in the first layer, the protection line 54 located in the second layer, a protection line 56 located in the third layer and another protection line 58 located in the third layer), each signal line 4 includes a first sub-signal line (ie Figure 5b 、 Figure 6b and Figure 7b The first signal sub-line extends in a different direction than the second signal sub-line, and the arrangement density of the plurality of first signal sub-lines is less than the arrangement density of the plurality of second signal sub-lines. Within the second signal sub-line arrangement region, the second signal sub-line includes an outer edge segment, which is a portion of the second signal sub-line proximate to the intersection of the first signal sub-line and the second signal sub-line.

[0062] The protection line is located on the side of the outer edge segment away from the display area 2, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line. The distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line.

[0063] The display substrate provided in the embodiment of the present application includes a display area and a non-display area, the non-display area includes multiple signal lines and multiple protection lines, each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line (multiple signal lines are broken lines), and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; within the second sub-signal line arrangement area, the second sub-signal line includes an outer edge line segment, which is a portion of the line segment of the second sub-signal line close to the intersection of the first sub-signal line and the second sub-signal line; the protection line is located on a side of at least part of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line. That is to say, the embodiment of the present application sets a protection line on the side of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that during the exposure process of forming the second sub-signal line, the second sub-signal line is protected, which can improve the phenomenon of multiple signal lines becoming thinner or broken. The sacrificial protection line is used to balance the uniformity of the outer edge line segment (the outer edge line segment is the partial line segment of the second sub-signal line near the turning position) and the internal signal line during exposure, and simultaneously weaken the etching load to ensure that the signal line used for signal transmission (i.e., the second sub-signal line) will not be broken under the extreme line width design, thereby improving the bright line and other defects caused by the thinning or breaking of the outer edge line segment of the wiring near the turning position, improving the yield of the display device, and facilitating the improvement of the display device. Moreover, the display substrate provided by the embodiment of the present application does not cause a load on the entire wiring distribution, does not require a complex process, and can be achieved by existing processes.

[0064] In some embodiments, the line width of the protection line is smaller than the line width of the outer edge line segment; the protection line corresponds to the second sub-signal line one-to-one, and the protection line is located on the side of the outer edge line segment at the corresponding position away from the display area.

[0065] In some embodiments, the display area 2 includes a pixel circuit, and the pixel circuit includes a gate layer, a source / drain layer, and a capacitor plate layer.

[0066] In some embodiments, the plurality of signal lines and the plurality of protection lines are disposed on the same layer as the gate layer or the capacitor plate layer;

[0067] Alternatively, some of the multiple signal lines and some of the multiple protection lines are arranged in the same layer as the gate layer, and the rest of the multiple signal lines and the rest of the multiple protection lines are arranged in the same layer as the capacitor plate layer.

[0068] Alternatively, for a concrete example, see Figure 5a and Figure 5b , Figure 5a A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of a mask provided in an embodiment of the present application; Figure 5b A schematic diagram of multiple signal lines and multiple protection lines of a double-layer wiring design of a display substrate provided in an embodiment of the present application, namely Figure 5b This is a schematic diagram of multiple signal lines and multiple protection lines in a double-layer routing design obtained after exposure and other composition processes.

[0069] Figure 5a In the figure, the patterns of the multiple signal lines include a first-type first sub-signal line pattern 41a, a first-type second sub-signal line pattern 41b, a second-type first sub-signal line pattern 42a, and a second-type second sub-signal line pattern 42b; the patterns of the multiple protection lines include a first-type protection line pattern 51 and a second-type protection line pattern 52.

[0070] Figure 5b In the figure, the plurality of signal lines include a first sub-signal line 43a located on the first layer, a second sub-signal line 43b located on the first layer, a first sub-signal line 44a located on the second layer, and a second sub-signal line 44b located on the second layer; the plurality of protection lines include a protection line 53 located on the first layer and a protection line 54 located on the second layer.

[0071] Alternatively, the signal lines of the first layer can be provided on the same layer as the gate layer. During specific production, the signal lines and gates of the first layer can be produced simultaneously through a single patterning process. The signal lines of the second layer can be provided on the same layer as the capacitor plate layer. During specific production, the signal lines and capacitor plates of the second layer can be produced simultaneously through a single patterning process. Alternatively, the signal lines of the first layer can be provided on the same layer as the capacitor plate layer, and the signal lines of the second layer can be provided on the same layer as the gate layer.

[0072] from Figure 5b It can be seen that by setting the protection line, the outer edge segment (i.e., the partial segment of the second sub-signal line near the turning position) can be effectively protected, and the protection line 53 located on the first layer and the protection line 54 located on the second layer are obviously thinner and broken, but do not affect the effective signal line routing part (i.e., it does not affect the signal transmission of the first sub-signal line 43a and the second sub-signal line 43b of the first layer, and the first sub-signal line 44a and the second sub-signal line 44b of the second layer).

[0073] Optionally, in a specific example, Figure 6a A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of a mask provided in an embodiment of the present application; Figure 6bA schematic diagram of multiple signal lines and multiple protection lines of a single-layer wiring design of a display substrate provided in an embodiment of the present application, namely Figure 6b Schematic diagram of multiple signal lines and multiple protection lines in a single-layer routing design obtained after patterning processes such as exposure.

[0074] Figure 6a , the patterns of the plurality of signal lines include a third type of first sub-signal line pattern 45a and a fourth type of second sub-signal line pattern 45b, and the patterns of the plurality of guard lines include a third type of guard line pattern 55. The third type of guard line pattern 55 is an extended guard line pattern, that is, an extended line segment of the fourth type of second sub-signal line pattern 45b.

[0075] Figure 6b In the embodiment, the plurality of signal lines include a first sub-signal line 46a located in the third layer and a second sub-signal line 46b located in the third layer. The plurality of protection lines include a protection line 56 located in the third layer.

[0076] Optionally, the third layer may be provided at the same layer as the gate layer, or the third layer may be provided at the same layer as the capacitor plate layer.

[0077] from Figure 6b It can be seen that by setting the protection line, the outer edge segment (i.e., the partial segment of the second sub-signal line near the turning position) can be effectively protected. A protection line 56 located on the third layer is obviously thinner and broken, but it does not affect the effective signal line routing part (i.e., it does not affect the signal transmission of the first sub-signal line 46a and the second sub-signal line 46b of the third layer).

[0078] Optionally, in a specific example, Figure 7a A schematic diagram of a pattern of multiple signal lines and a pattern of multiple protection lines of another mask provided in an embodiment of the present application; Figure 7b A schematic diagram of multiple signal lines and multiple protection lines of a single-layer wiring design of a display substrate provided in an embodiment of the present application, namely Figure 7b Schematic diagram of multiple signal lines and multiple protection lines in a single-layer routing design obtained after patterning processes such as exposure.

[0079] Figure 7a , the plurality of signal line patterns include a third type of first sub-signal line pattern 45a and a fourth type of second sub-signal line pattern 45b, and the plurality of guard line patterns include a fourth type of guard line pattern 57. The fourth type of guard line pattern 57 is a short guard line segment and is not connected to the fourth type of second sub-signal line pattern 45b.

[0080] Figure 7bIn the embodiment, the plurality of signal lines include a first sub-signal line 46a located in the third layer and a second sub-signal line 46b located in the third layer. The plurality of protection lines include another type of protection line 58 located in the third layer.

[0081] Optionally, the third layer may be in the same layer as the gate layer, or the third layer may be in the same layer as the capacitor plate layer.

[0082] from Figure 7b It can be seen that by setting the protection line, the outer edge segment (i.e., the partial segment of the second sub-signal line near the turning position) can be effectively protected. A protection line 56 located on the third layer is obviously thinner and broken, but it does not affect the effective signal line routing part (i.e., it does not affect the signal transmission of the first sub-signal line 46a and the second sub-signal line 46b of the third layer).

[0083] Based on the same inventive concept, an embodiment of the present application provides a mask for exposing a display substrate provided by any of the above embodiments, the mask comprising: a first area and a second area;

[0084] During exposure, the first area corresponds to the display area, and the second area corresponds to the non-display area;

[0085] The second region includes a plurality of signal line patterns and a plurality of protection line patterns (eg Figure 5a 、 6a , 7a), to form a plurality of signal lines and a plurality of protection lines (such as Figure 5b 、 6b , as shown in 7b).

[0086] The mask provided in the embodiment of the present application can protect the second sub-signal line during the exposure process of forming the second sub-signal line of the display substrate by setting a pattern of protection lines in the second area, which can improve the phenomenon of thinning or disconnection of multiple signal lines. The sacrificial protection lines are used to balance the uniformity of the outer edge line segments (the outer edge line segments are part of the second sub-signal lines near the turning position) and the internal signal lines during exposure, and simultaneously weaken the etching load to ensure that the signal lines used for signal transmission (i.e., the second sub-signal lines) will not be broken under the extreme line width design, thereby improving the bright lines and other defects caused by the thinning or disconnection of the outer edge line segments near the turning position of the wiring, improving the yield of the display device, and being beneficial to the improvement of the display device. Moreover, the display substrate provided in the embodiment of the present application does not cause a load on the entire wiring distribution, does not require a complicated process, and can be achieved with the existing process.

[0087] In some embodiments, the first region includes a first pattern, and the first pattern is the same as a pattern of gate lines included in the display region;

[0088] Alternatively, the first area includes a first pattern, and the first pattern is the same as a pattern of the capacitor plate layer included in the display area.

[0089] Optionally, the width of the first sub-signal line pattern is greater than the width of the second sub-signal line pattern. In practice, due to differences in exposure energy (optical proximity effect) and etching load between the two sides of the signal line (i.e., the first sub-signal line and the second sub-signal line), in order to compensate for the first sub-signal line, the width of the first sub-signal line pattern is typically thickened, such that the width of the first sub-signal line is greater than that of the second sub-signal line.

[0090] Optionally, the protection line may be a line segment extending from the second sub-signal line (eg Figure 6a The third pattern of the protection line 55) or the protection line can also be a small line segment (eg Figure 5a The first protection line pattern 51 and the second protection line pattern 52 in FIG. Figure 7a The fourth protection line pattern 57).

[0091] Based on the same inventive concept, an embodiment of the present application provides a display panel, including a display substrate provided in any of the above embodiments.

[0092] Optionally, the display area includes a light emitting device layer, and the light emitting device includes an OLED device.

[0093] The display panel provided in the embodiment of the present application has the same inventive concept and the same beneficial effects as the previous embodiments. The contents not shown in detail in the display panel can be referred to the previous embodiments and will not be repeated here.

[0094] Based on the same inventive concept, an embodiment of the present application provides a display device, including the display panel provided in the above embodiment.

[0095] The display device provided in the embodiment of the present application has the same inventive concept and the same beneficial effects as the previous embodiments. The contents not shown in detail in the display panel can be referred to the previous embodiments and will not be repeated here.

[0096] Based on the same inventive concept, an embodiment of the present application provides a method for preparing a display substrate as provided in any of the above embodiments, wherein the display substrate includes a display area and a non-display area, such as Figure 8 As shown, the method for preparing the display substrate includes:

[0097] S1: providing a substrate;

[0098] S2: multiple signal lines and multiple protection lines are produced on one side of the substrate; each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line, and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; in the second sub-signal line arrangement area, the second sub-signal line includes an outer edge segment, which is a partial segment of the second sub-signal line close to the intersection of the first sub-signal line and the second sub-signal line; the protection line is located on the side of the outer edge segment away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line.

[0099] The manufacturing method of the display substrate provided in the embodiment of the present application comprises: forming multiple signal lines and multiple protection lines on one side of the substrate; disposing the protection line on the side of the second sub-signal line away from the display area; and extending the protection line in the same direction as the second sub-signal line and being at a preset distance from the second sub-signal line at the corresponding position. This protects the second sub-signal line during the exposure process of forming the second sub-signal line, thereby improving the phenomenon of thinning or disconnection of the multiple signal lines. The sacrificial protection line is used to balance the uniformity of the outer edge line segment (the outer edge line segment is the portion of the second sub-signal line near the turning position) and the signal line in the interior during exposure, and simultaneously weakens the etching load to ensure that the signal line used for signal transmission (i.e., the second sub-signal line) will not be broken under the extreme line width design. This can improve defects such as bright lines caused by thinning or disconnection of the outer edge line segment near the turning position of the wiring, improve the yield rate of the display device, and facilitate the improvement of the display device. In addition, the display substrate provided in the embodiment of the present application does not impose a load on the entire wiring distribution, does not require a complex process, and can be implemented with existing processes.

[0100] In some embodiments, a plurality of signal lines and a plurality of protection lines are formed on one side of a substrate, including:

[0101] A single patterning process is used to create gate lines, multiple signal lines, and multiple guard lines on one side of the substrate. Alternatively, a single patterning process is used to create a capacitor plate layer, multiple signal lines, and multiple guard lines on one side of the substrate. The gate lines and capacitor plate layer are located in the display area, while the multiple signal lines and multiple guard lines are located in the non-display area. This step corresponds to a single-layer routing design.

[0102] Alternatively, a first patterning process is used to create the gate lines, part of the signal lines, and part of the protection lines on one side of the substrate; a second patterning process is used to create the capacitor plate layer, the remaining signal lines, and the remaining protection lines on the side of the gate lines away from the substrate. This step corresponds to a double-layer routing design.

[0103] By applying the embodiments of the present application, at least the following beneficial effects can be achieved:

[0104] The display substrate provided in the embodiment of the present application includes a display area and a non-display area, the non-display area includes multiple signal lines and multiple protection lines, each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line (multiple signal lines are broken lines), and the arrangement density of the multiple first sub-signal lines is less than the arrangement density of the multiple second sub-signal lines; within the second sub-signal line arrangement area, the second sub-signal line includes an outer edge line segment, which is a portion of the line segment of the second sub-signal line close to the intersection of the first sub-signal line and the second sub-signal line; the protection line is located on a side of at least part of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line. That is to say, the embodiment of the present application sets a protection line on the side of the second sub-signal line away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that during the exposure process of forming the second sub-signal line, the second sub-signal line is protected, which can improve the phenomenon of multiple signal lines becoming thinner or broken. The sacrificial protection line is used to balance the uniformity of the outer edge line segment (the outer edge line segment is the partial line segment of the second sub-signal line near the turning position) and the internal signal line during exposure, and simultaneously weaken the etching load to ensure that the signal line used for signal transmission (i.e., the second sub-signal line) will not be broken under the extreme line width design, thereby improving the bright line and other defects caused by the thinning or breaking of the outer edge line segment of the wiring near the turning position, improving the yield of the display device, and facilitating the improvement of the display device. Moreover, the display substrate provided by the embodiment of the present application does not cause a load on the entire wiring distribution, does not require a complex process, and can be achieved by existing processes.

[0105] Those skilled in the art will appreciate that the steps, measures, and schemes in the various operations, methods, and processes discussed in this application may be interchanged, modified, combined, or deleted. Furthermore, other steps, measures, and schemes in the various operations, methods, and processes discussed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted. Furthermore, steps, measures, and schemes in the prior art that are similar to those disclosed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted.

[0106] In the description of this application, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0107] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. Throughout this application, unless otherwise specified, "plurality" means two or more.

[0108] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0109] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0110] It should be understood that although the steps in the flowcharts of the accompanying drawings are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the flowcharts of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0111] The above description is only part of the implementation methods of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A display substrate, characterized in that: include: Display area and non-display area; The non-display area includes a plurality of signal lines and a plurality of protection lines, each signal line includes a first sub-signal line and a second sub-signal line, an extension direction of the first sub-signal line is different from an extension direction of the second sub-signal line, and an arrangement density of the plurality of first sub-signal lines is less than an arrangement density of the plurality of second sub-signal lines; In the second sub-signal line arrangement area, the second sub-signal line includes an outer edge segment, and the outer edge segment is a portion of the second sub-signal line close to an intersection of the first sub-signal line and the second sub-signal line; The protection line is located on a side of the outer edge segment away from the display area, and an extension direction of the protection line is the same as an extension direction of the second sub-signal line. A distance between the protection line and the second sub-signal line at a corresponding position is a preset distance, so that the second sub-signal line is protected during an exposure process for forming the second sub-signal line. The display area includes a pixel circuit, and the pixel circuit includes a gate layer, a source and drain layer, and a capacitor plate layer; At least some of the signal lines and at least some of the protection lines are arranged in the same layer as the gate layer or the capacitor plate layer.

2. The display substrate according to claim 1, wherein: The line width of the protection line is smaller than the line width of the outer edge line segment; The protection lines correspond to the outer edge line segments one by one, and the protection lines are located at a side of the outer edge line segment at a corresponding position away from the display area.

3. The display substrate according to claim 1, wherein The plurality of signal lines and the plurality of protection lines are all provided on the same layer as the gate layer or the capacitor plate layer; Alternatively, some of the multiple signal lines and some of the multiple protection lines are arranged in the same layer as the gate layer, and the rest of the multiple signal lines and the rest of the multiple protection lines are arranged in the same layer as the capacitor plate layer.

4. A mask for exposing a display substrate according to any one of claims 1 to 3, characterized in that: include: Districts 1 and 2; During exposure, the first area corresponds to the display area, and the second area corresponds to the non-display area; The second region includes a pattern of a plurality of signal lines and a pattern of a plurality of protection lines, so as to form a plurality of the signal lines and a plurality of the protection lines after exposure.

5. The mask according to claim 4, wherein: The first area includes a first pattern, and the first pattern is the same as a pattern of gate lines included in the display area; Alternatively, the first area includes a first pattern, and the first pattern is the same as a pattern of a capacitor plate layer included in the display area.

6. A display panel, characterized in that: The display substrate comprises the display substrate according to any one of claims 1 to 3.

7. A display device, characterized in that: Comprising the display panel as claimed in claim 6.

8. A method for preparing a display substrate according to any one of claims 1 to 3, wherein the display substrate comprises a display area and a non-display area, wherein: include: providing a substrate; A plurality of signal lines and a plurality of protection lines are produced on one side of the substrate; each signal line includes a first sub-signal line and a second sub-signal line, the extension direction of the first sub-signal line is different from the extension direction of the second sub-signal line, and the arrangement density of the plurality of first sub-signal lines is less than the arrangement density of the plurality of second sub-signal lines; within the arrangement area of ​​the second sub-signal line, the second sub-signal line includes an outer edge segment, and the outer edge segment is a partial segment of the second sub-signal line close to the intersection position of the first sub-signal line and the second sub-signal line; the protection line is located on a side of the outer edge segment away from the display area, and the extension direction of the protection line is the same as the extension direction of the second sub-signal line, and the distance between the protection line and the second sub-signal line at the corresponding position is a preset distance, so that the second sub-signal line is protected during the exposure process of forming the second sub-signal line.

9. The method for preparing a display substrate according to claim 8, wherein: The method of manufacturing a plurality of signal lines and a plurality of protection lines on one side of the substrate comprises: A gate line, a plurality of signal lines, and a plurality of protection lines are formed on one side of the substrate by a single patterning process; or a capacitor plate layer, a plurality of signal lines, and a plurality of protection lines are formed on one side of the substrate by a single patterning process; the gate line and the capacitor plate layer are both located in the display area, and the plurality of signal lines and the plurality of protection lines are located in the non-display area; Alternatively, a gate line, part of the signal line and part of the protection line are formed on one side of the substrate by a first patterning process; and a capacitor plate layer, the remaining signal line and the remaining protection line are formed on the side of the gate line away from the substrate by a second patterning process.

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