Encoder and related signal processing method

Abstract

The present invention relates to an encoder, which includes a frame stage processing circuit, a coding tree unit stage processing circuit, and a coding circuit. The frame stage processing circuit is used to calculate the number of bits of a current frame according to a target bit rate and a frame rate of the encoder, and then calculate a quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter; the coding tree unit stage processing circuit is used to adjust the quantization parameter by using an adaptive quantization adjustment mode to generate an adjusted quantization parameter. The coding circuit is used to encode the current frame according to the adjusted quantization parameter to generate an output data.

Description

Technical Field

[0001] The present invention relates to bit rate control of an encoder. Background Art

[0002] In the operation of bit rate control in an encoder, it can generally be divided into constant bit rate (CBR) and variable bit rate (VBR). Among them, the constant bit rate means that the output bit rate of the encoder is a fixed value to facilitate transmission in a channel with a limited bandwidth. However, when encountering an image with a high complexity, the image quality will be sacrificed due to the limitation of the output bit rate. The variable bit rate is that the output bit rate of the encoder will be adjusted according to the signal complexity of the input source to maintain the quality of the output image. However, this method will cause troubles in subsequent signal transmission and processing because the output bit rate of the encoder cannot be determined.

[0003] Regarding the control method of the constant bit rate, in 2012, the target bit rate and the Lagrangian operator (hereinafter simply referred to as the R-λ) model were proposed, and related video coding technologies were also proposed at the Joint Collaborative Team on Video Coding (JCT-VC) meeting. In the architecture of the R-λ model, the Lagrangian operator (λ) is mainly calculated according to the target bit rate for related calculations of image signal distortion and optimization. Finally, the quantization parameter is calculated according to the Lagrangian operator to achieve the purpose of controlling the output bit rate. However, the calculation method of the above R-λ model is very complex, involving many exponential and logarithmic operations. Coupled with the fact that the calculation of the Lagrangian operator is difficult to implement with a hardware circuit, it causes difficulties in the circuit design of the encoder. Summary of the Invention

[0004] Therefore, one of the purposes of the present invention is to propose a bit rate control method for an encoder, which simplifies the architecture of the R-λ model and adds a related model of variable bit rate to solve the problems described in the background art.

[0005] In an embodiment of the present invention, an encoder is provided, which includes a frame stage processing circuit, a coding tree unit stage processing circuit, and a coding circuit. The frame stage processing circuit is configured to calculate the number of bits of a current frame according to a target bit rate and a frame rate of the encoder, and then calculate a quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter; the coding tree unit stage processing circuit is configured to adjust the quantization parameter by using an adaptive quantization adjustment mode to generate an adjusted quantization parameter. The coding circuit is configured to encode the current frame according to the adjusted quantization parameter to generate an output data.

[0006] In another embodiment of the present invention, a signal processing method applied in an encoder is provided, which includes the following steps: calculating the number of bits of a current frame according to a target bit rate and a frame rate of the encoder, and then calculating a quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter; adjusting the quantization parameter by using an adaptive quantization adjustment mode to generate an adjusted quantization parameter; and encoding the current frame according to the adjusted quantization parameter to generate an output data. Description of the Drawings

[0007] Figure 1 It is a schematic diagram of an encoder according to an embodiment of the present invention.

[0008] Figure 2 It is a flowchart of a signal processing method of an encoder according to an embodiment of the present invention. Detailed Description of the Embodiment

[0009] Figure 1 It is a schematic diagram of an encoder 100 according to an embodiment of the present invention. As Figure 1 shown, the encoder includes a frame stage processing circuit 110, a coding tree unit (CTU) stage processing circuit 120, and a coding circuit 130. In this embodiment, the encoder 100 can be used in any electronic device that needs to perform video compression. For example, the encoder 100 can be disposed in a set-top box, and is configured to receive video data of an input source and then generate output video data to a television for decoding and playing.

[0010] In this embodiment, the frame stage processing circuit 110 and the CTU stage processing circuit 120 are used to control the output bit rate, and the frame stage processing circuit 110 and the CTU stage processing circuit 120 perform simplification and improvement operations based on the R-λ model to generate quantization parameters to the backend encoding circuit 130 for encoding operations. It should be noted that since the details of the encoding circuit 130 using quantization parameters to encode image data are well known to those of ordinary skill in the art, and the operation of the encoding circuit 130 is not the focus of this application, the operation of the frame stage processing circuit 110 and the CTU stage processing circuit 120 will only be described in the specification of this application.

[0011] In the operation of the frame stage processing circuit 110, for the IPPP encoding structure of the low-delay P-frame (LDP), there are two different calculation methods for the Intra frame (I frame) and the Predicted frame (P frame). Specifically, the frame stage processing circuit 110 first calculates the average bit rate of each frame, and its calculation formula is as follows:

[0012]

[0013] where 'R picavg ' is the average bit rate of each frame, 'R tar ' is the target bit rate, and 'fps' is the frame rate. Then, the frame stage processing circuit 110 calculates the average number of bits of each frame, and its calculation formula is as follows:

[0014]

[0015] where 'SW' is the size of the smooth window, 'N coded ' is the number of encoded frames, 'R coded ' is the consumed bit rate; in this embodiment, 'SW' is used to make the output data output by the encoder 100 smoother in terms of bit rate change, and 'SW' can be any suitable constant, such as 30, 40... and so on.

[0016] Next, if the frame currently being processed by the frame stage processing circuit 110 is an Intra frame (I frame), the frame stage processing circuit 110 uses the following formula to calculate the quantization parameter:

[0017]

[0018]

[0019]

[0020] Among them, in formula (3), the node frame is divided into multiple blocks with 8*8 pixels. 'numberofblks' is the number of blocks of the node frame, H(x,y) is the Hadamard transformation, and 'τ' is the sum of the node values (intra cost) of all blocks within the node frame; in formula (4), 'T bitsI ' is the number of bits allocated to the node frame, 'f' is a floating-point number, and 'α' is a parameter; in formula (5), 'w' is the width of the node frame, 'h' is the height of the node frame, and 'β' is a parameter.

[0021] The 'QP I ' calculated by the above formula (5) is the quantization parameter of the node frame. On the other hand, 'α' and 'β' in the above formulas (4) and (5) are continuously updated as the frame encoding process progresses. Specifically, in the R-λ model, the Lagrangian operator 'λ' is calculated based on 'T bitsI ', 'α', and 'β'. Since the actual number of bits of the node frame when the encoder 100 finishes processing will be different from 'T bitsI ', 'α' and 'β' will be updated accordingly for use in the next node frame. Since 'α' and 'β' are understandable to those skilled in the R-λ model, the details of updating 'α' and 'β' are not elaborated here.

[0022] On the other hand, if the frame stage processing circuit 110 is currently processing a predicted frame (P frame), the frame stage processing circuit 110 uses the following formula to calculate the quantization parameter:

[0023]

[0024] The 'QP p ' calculated by the above formula (6) is the quantization parameter of the node frame. On the other hand, 'α' and 'β' in the above formula (6) are continuously updated as the frame encoding process progresses.

[0025] Next, in the operation of the CTU stage processing circuit 120, for the first frame, first calculate the average energy and quantization parameter adjustment base of each block (i.e., CTU block) in the frame. The size of the block can be 8*8 pixels, 16*16 pixels, or any other suitable size. The average energy and quantization parameter adjustment base of the blocks of the first frame can be a default value. The calculation formula is exemplified as follows:

[0026] avgEnergy = 3.39f………………………………………………………………(7);

[0027] avgAdj = 2.28f……………………………………………………………(8);

[0028] Among them, 'avgEnerty' refers to the average energy of the blocks of a frame, and 'avgAdj' refers to the average base for quantization parameter adjustment of the blocks of a frame.

[0029] For the calculation method of subsequent frames, the CTU stage processing circuit 120 uses the average energy and quantization parameter adjustment base of the previous frame, as well as the energy of the blocks of the current frame, to calculate the quantization parameter adjustment base of the current block. An example of its calculation formula is as follows:

[0030] qpAdj_i = avgEnergy * (energy_i - avgAdj)………………………………………(9);

[0031] Among them, 'qpAdj_i' is the quantization parameter adjustment base of the blocks of the current frame, 'energy_i' is the energy of the blocks of the current frame, 'avgEnerty' is the average energy of the blocks of the previous frame, and 'avgAdj' is the average base for quantization parameter adjustment of the blocks of the previous frame. Among them, 'energy_i' can be obtained by calculating the sum of the squares of the pixel values within the block.

[0032] Next, for each block, the CTU stage processing circuit 120 calculates the adjusted quantization parameter for use by the encoding circuit 130. An example of the calculation method of the adjusted quantization parameter is as follows:

[0033] QP lcu = baseQP + Table[baseQP] * qpAdj_i………………………………………(10);

[0034] Among them, 'QP lcu ' is the adjusted quantization parameter, 'baseQP' is the quantization parameter calculated by the frame stage processing circuit 110. That is, if the currently processed frame is a node frame, then 'baseQP' is the 'QP I ' calculated by formula (5); and if the currently processed frame is a predicted frame, then 'baseQP' is the 'QP p ' calculated by formula (6); 'Table[baseQP]' represents a corresponding value obtained by looking up the table according to 'baseQP', which can be used to represent the parameter calculated according to 'baseQP' under different target bitrates.

[0035] It should be noted that the numerical values of floating-point numbers in the above formulas (4), (5), (6), (7), and (8) are only applicable to the example description and are not limitations of the present invention. That is, the designer can set these related numerical values by himself.

[0036] Referring to the above embodiments, the frame stage processing circuit 110 is mainly responsible for controlling the encoding circuit 130 to output a fixed bit rate, and simplifies the process of calculating the quantization parameter during the calculation, so that the complexity of the hardware circuit can be simplified. In addition, by adjusting the quantization parameter through the CTU stage processing circuit 120 (i.e., adaptive quantization), the encoding circuit 130 can output high-quality image data to solve the problem of image quality degradation caused by using a fixed bit rate in the background art. On the other hand, the CTU stage processing circuit 120 uses some already encoded data (i.e., the energy and quantization parameter adjustment base of the blocks in the previous frame) when calculating the quantization parameter adjustment base to avoid the problem of pipeline delay of the hardware circuit.

[0037] In an embodiment of the present invention, the frame stage processing circuit 110 or the CTU stage processing circuit 120 further determines the difference between the current frame and the previous frame to determine whether the image data involves a scene change. For example, the CTU stage processing circuit 120 can compare the difference between at least one block (CTU block) of the current frame and the corresponding block of the previous frame, such as the difference in average energy, average pixel value, or any parameter that can represent the image content of the block, to determine whether the current frame and the previous frame involve a scene change; and if the difference between at least one row of blocks of the current frame and the corresponding blocks of the previous frame is too large, it represents whether the current frame and the previous frame involve a scene change. When it is determined that the current frame and the previous frame involve a scene change, the frame stage processing circuit 110 discards α and β calculated in the previous frame (i.e., the updated α and β), and directly uses the preset α and β and formulas (3) to (5) to calculate the quantization parameter of the current frame.

[0038] Figure 2 It is a flowchart of the signal processing method of the encoder according to an embodiment of the present invention. Referring simultaneously to Figure 1 and the content disclosed in the above embodiments, Figure 2 the process is as follows:

[0039] Step 200: The process starts.

[0040] Step 202: Receive image data.

[0041] Step 204: Determine whether the currently processed frame involves a scene change. If so, the process proceeds to step 206; if not, the process proceeds to step 208.

[0042] Step 206: Calculate quantization parameters using preset parameters.

[0043] Step 208: Calculate quantization parameters using the parameters updated in the previous frame.

[0044] Step 210: Adjust the quantization parameters using an adaptive quantization adjustment mode.

[0045] Step 212: Encode the image data using the adjusted quantization parameters

[0046] The above are only the preferred embodiments of the present invention. All equivalent changes and modifications made in accordance with the application of the present invention shall fall within the scope of the present invention.

[0047]

Description of the Drawings Reference Numerals

[0048] 100: Encoder

[0049] 110: Frame Stage Processing Circuit

[0050] 120: Coding Tree Unit Stage Processing Circuit

[0051] 130: Coding Circuit

[0052] 200~212: Steps

Claims

1. An encoder, comprising: A frame stage processing circuit, configured to calculate a number of bits of a current frame according to a target bit rate and a frame rate of the encoder, and further calculate a quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter; A coding tree unit (CTU) stage processing circuit, coupled to the frame stage processing circuit, configured to adjust the quantization parameter by using an adaptive quantization adjustment mode to generate an adjusted quantization parameter; And A coding circuit, coupled to the CTU stage processing circuit, configured to encode the current frame according to the adjusted quantization parameter to generate an output data, wherein, if the current frame is a node frame, the frame stage processing circuit calculates a sum of node values of all blocks in the current frame, and further calculates an allocated number of bits of the current frame according to the sum, the number of bits of the current frame, and a first parameter, and further calculates the quantization parameter according to the allocated number of bits, the sum, the first parameter, and a second parameter.

2. The encoder according to claim 1, wherein If the current frame is a prediction frame, the frame stage processing circuit calculates the quantization parameter according to the number of bits of the current frame, a first parameter, and a second parameter.

3. The encoder according to claim 1 or claim 2, characterized in that, The frame stage processing circuit updates the first parameter and the second parameter for use in calculating the quantization parameter of the next frame.

4. The encoder according to claim 3, characterized in that, The frame stage processing circuit or the CTU stage processing circuit determines whether the next frame and the current frame involve a scene switch. If the next frame and the current frame involve a scene switch, the frame stage processing circuit uses the first parameter and the second parameter to calculate the quantization parameter of the next frame; and if the next frame and the current frame do not involve a scene switch, the frame stage processing circuit uses the updated first parameter and the second parameter to calculate the quantization parameter of the next frame.

5. The encoder according to claim 1, characterized in that, The current frame includes a plurality of blocks, and for any block of the current frame: the CTU stage processing circuit calculates a quantization parameter adjustment base of the block of the current frame according to an energy of a corresponding block of a previous frame, a quantization parameter adjustment base, and an energy of the block; And further adjusts the quantization parameter according to the quantization parameter adjustment base of the block of the current frame to obtain the adjusted quantization parameter corresponding to the block.

6. A signal processing method applied in an encoder, comprising: Calculating a number of bits of a current frame according to a target bit rate and a frame rate of the encoder, and further calculating a quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter; Adjusting the quantization parameter by using an adaptive quantization adjustment mode to generate an adjusted quantization parameter; And Encoding the current frame according to the adjusted quantization parameter to generate an output data, wherein, if the current frame is a node frame, the step of calculating the quantization parameter of the current frame according to the number of bits of the current frame and at least one parameter includes: Calculate a sum of the node values of all blocks in the current frame; Calculate an allocated bit number of the current frame according to the sum, the bit number of the current frame, and a first parameter; and Calculate the quantization parameter according to the allocated bit number, the sum, the first parameter, and a second parameter.

7. The signal processing method according to claim 6, wherein If the current frame is a prediction frame, the step of calculating the quantization parameter of the current frame according to the bit number of the current frame and at least one parameter includes: Calculate the quantization parameter according to the bit number of the current frame, a first parameter, and a second parameter.

8. The signal processing method according to claim 6 or claim 7, characterized in that Further includes: Update the first parameter and the second parameter for use when calculating the quantization parameter of the next frame.

Images