A Method and Processing Component for IO Splitting Processing of a Four-Controlled Full-Flash Storage System

Abstract

The present invention provides a method and a processing component for IO splitting processing in a four - control all - flash storage system. The host issues an IO port across the all - flash memory to the source controller; the source controller splits the all - flash memory and also splits the IO port into several sub - interfaces; the step - source controller calculates the number of the target controller according to the starting logical address of the sub - interface; the source controller sends the starting logical address of the sub - interface to the target controller; several transmission sub - requests are generated according to the first preset rule and a data transmission is initiated to the source controller; the source controller places the transmission sub - requests at the end of the out - of - order transmission queue; the transmission sub - requests are taken out from the head of the out - of - order transmission queue in the order of first - in - first - out. If the starting transmission address is equal to the logical block transmission request address, the source controller executes the data transmission initiated by the transmission sub - request and executes the assignment process. This ensures that the data transmissions for split IOs initiated by multiple controllers can be executed sequentially.

Description

Technical Field

[0001] The present invention relates to the technical field of all-flash storage, and particularly to an IO splitting processing method and a processing component for a four-controller all-flash storage system. Background Art

[0002] All-flash storage is the development direction of the storage industry, which has much higher data throughput capacity and lower latency than traditional disk storage. In all-flash storage, solid-state drives (SSDs) or other flash media are used to replace traditional hard disk drives (HDDs) in the storage subsystem. The most obvious feature is its high IOPS.

[0003] In the current four-controller all-flash storage system, in order to give full play to the concurrent read and write capabilities of the four controllers, the logical address space of a volume with a size of KMB is divided into N data segments (the size of the data segment is usually 32MB). The data segment numbered 4N is processed by controller 0, the data segment numbered 4N + 1 is processed by controller 1, the data segment numbered 4N + 2 is processed by controller 2, and the data segment numbered 4N + 3 is processed by controller 3, where N = 0, 1, 2,.... Since the IOs issued by the host sometimes span multiple consecutive segments, it is necessary to split the IO into multiple sub-IOs at the source controller. Each sub-IO is sent by the source controller to the corresponding target controller for processing. When the sub-IOs perform data transmission, due to the different busy and idle degrees of the target controllers, the transmission order of the sub-IOs from the target controllers to the source controller is different, which usually causes disordered data transmission, resulting in data inconsistency and affecting the data processing process. Summary of the Invention

[0004] The present invention provides an IO splitting processing method for a four-controller all-flash storage system, which can ensure that the data transmission of the split IOs initiated by multiple controllers can be executed sequentially, avoiding the problem of disordered data transmission caused by the different busy and idle degrees of the target controllers and the different transmission orders of the sub-IOs from the target controllers to the source controller.

[0005] Specifically, the IO splitting processing method for a four-controller all-flash storage system includes:

[0006] Step 1: The host issues the IO port across the all-flash memory to the source controller;

[0007] Step 2: The source controller splits the all-flash memory into a preset number of storage spaces, and also splits the IO port of the all-flash memory into several sub-interfaces, so that each sub-interface belongs to a storage space for use;

[0008] Step 3: The source controller calculates the number of the target controller according to the starting logical address of the sub-interface;

[0009] Step 4: The source controller sends the starting logical address of the sub-interface to the target controller;

[0010] Step 5: The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates a number of transmission sub-requests according to the first preset rule, and initiates data transmission to the source controller;

[0011] Step 6: After receiving the transmission sub-request, the source controller places it at the end of the out-of-order transmission queue, and sets the starting transmission address and the total transmission length according to the second preset rule;

[0012] Step 7: The source controller starts data transmission, takes out the transmission sub-request from the head of the out-of-order transmission queue in the first-in-first-out order. If the starting transmission address = the logical block transmission request address, go to Step 8; otherwise, go to Step 9;

[0013] Step 8: The source controller executes the data transmission initiated by the transmission sub-request and executes the assignment process;

[0014] Step 9: The source controller puts the transmission sub-request back to the end of the out-of-order transmission queue and goes to Step 7.

[0015] Furthermore, it should be noted that in Step 2, sub_LBA_0 = LBA, sub_length_0 = (1 + sub_LBA_0 / Segment_size) * Segment_size – sub_LBA_0;

[0016] sub_LBA_i + 1 = sub_LBA_i + sub_length_i, sub_length_i + 1 = (1 + sub_LBA_i + 1 / Segment_size) * Segment_size – sub_LBA_i + 1;

[0017] where sub_LBA_i and sub_length_i respectively refer to the starting logical address and the length of sub_IO_i;

[0018] sub_LBA_0 is the starting logical address, LBA is the logical block address, sub_length_0 is the starting length, and Segment_size is the size of the data segment.

[0019] Furthermore, it should be noted that in Step 3,

[0020] Among them, the number of the target controller Target_controller_id = (starting logical address sub_LBA_i / Segment_size) % 4.

[0021] It should be further noted that the first preset rule is:

[0022] Transfer_LBA_0 = sub_LBA_i, Transfer_length_0 = 32KB;

[0023] Transfer_LBA_k + 1 = Transfer_LBA_k + Transfer_length_k;

[0024] Transfer_length_k + 1 = (sub_LBA_i + sub_length_i - Transfer_LBA_k + 1) > 32KB? 32KB : (sub_LBA_i + sub_length_i - Transfer_LBA_k + 1);

[0025] Among them, Transfer_LBA_k refers to the starting transfer address of the k-th transfer sub-request on the source controller, and Transfer_length_k refers to the transfer length of the k-th transfer sub-request.

[0026] It should be further noted that the second preset rule is:

[0027] Transfer_Start_LBA = sub_LBA_0;

[0028] Transfer_Total_Length = 0;

[0029] Among them, sub_LBA_0 refers to the starting logical address of the sub_IO numbered 0 after splitting.

[0030] It should be further noted that the execution assignment process of step eight includes:

[0031] The starting transfer address Transfer_Start_LBA = the logical block transfer request address Transfer_LBA_k + Transfer_length_k;

[0032] Transfer_Total_Length = Transfer_Total_Length + Transfer_length_k;

[0033] If Transfer_Total_Length == length, the data transfer of the IO is completed;

[0034] Transfer_length_k refers to the transfer length of the k-th transfer sub-request.

[0035] The present invention also provides an IO splitting processing component for a four-controller all-flash storage system. The IO splitting processing component includes: a host, a source controller, an all-flash memory, and multiple controllers;

[0036] The host issues the IO port across the all-flash memory to the source controller;

[0037] The source controller splits the all-flash memory into a preset number of storage spaces, and also splits the IO port of the all-flash memory into several sub-interfaces, so that each sub-interface belongs to a storage space for use;

[0038] The source controller calculates the number of the target controller according to the starting logical address of the sub-interface; wherein, the target controller is one of the multiple controllers;

[0039] The source controller sends the starting logical address of the sub-interface to the target controller;

[0040] The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates several transfer sub-requests according to the first preset rule, and initiates data transfer to the source controller;

[0041] After receiving the transfer sub-request, the source controller places it at the end of the out-of-order transfer queue, and sets the starting transfer address and transfer total length according to the second preset rule;

[0042] The source controller starts data transfer, takes out the transfer sub-request from the head of the out-of-order transfer queue in the order of first-in-first-out. If the starting transfer address = the logical block transfer request address, execute the data transfer initiated by the transfer sub-request, and execute the assignment process; put the transfer sub-request back to the end of the out-of-order transfer queue.

[0043] It should be further noted that the source controller is also used to obtain the first preset rule and the second preset rule set by the user.

[0044] It should be further noted that it further includes: a display module;

[0045] The display module is used to display the data of the IO splitting processing process and display the processing result.

[0046] It should be further explained that when the source controller is also used to execute data transmission, the source controller takes out a transmission sub-request from the head of the out-of-order transmission queue. If the sub-request is a sequential sub-request, the data transmission is executed, otherwise the sub-request is put back to the tail of the out-of-order transmission queue.

[0047] It can be seen from the above technical solutions that the present invention has the following advantages:

[0048] The IO splitting processing method and processing component of the four-controller all-flash storage system provided by the invention splits the IO across the all-flash storage into multiple sub-IOs on the source controller, where each sub-IO belongs to a storage space. Since each storage space is processed by a designated controller, the sub-IO needs to be sent from the source controller to the corresponding target controller for processing. After the target controller prepares the memory space for the sub-IO, it initiates a data transmission request to the source controller. Each sub-IO initiates several transmission sub-requests according to the length of the sub-IO and the size of the transmission unit. After each transmission sub-request arrives at the source controller, it is placed at the end of the disordered transmission queue. When the source controller performs data transmission, it takes out the transmission sub-request from the head of the disordered transmission queue. If the transmission sub-request is a sequential transmission sub-request, it executes the sub-request, otherwise it puts the sub-request back to the end of the disordered transmission queue, thereby ensuring the sequential execution of data transmission. The problem that when the sub-IO performs data transmission, due to the different busy and idle levels of the target controller, the transmission order initiated by the sub-IO from the target controller to the source controller is different, which will cause disordered data transmission and lead to data inconsistency is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solution of the present invention, the accompanying drawings required for use in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0050] Figure 1 This is a flow chart of the IO splitting processing method of the four-controller all-flash storage system;

[0051] Figure 2 The figure is a schematic diagram of the IO splitting processing components of a four-controller all-flash storage system. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0053] The present invention provides an IO splitting processing method for a four - controller all - flash storage system, and the method is to solve the problem of disordered data transmission caused by IO splitting processing across data segments.

[0054] Among them, the reference process of the IO splitting processing method for the four - controller all - flash storage system Figure 1 According to the description process, the IO splitting processing method for the four - controller all - flash storage system can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer - readable storage medium, and the computer program contains program codes for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part, and / or installed from a removable medium. When the computer program is executed by the controller, it executes various functions defined in the method and / or device of the present application.

[0055] It should be noted that the all - flash storage system shown in the present disclosure has a computer - readable signal medium or a computer - readable storage medium or any combination of the two. The computer - readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination of the above. More specific examples of the computer - readable storage medium can include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read - only memory (ROM), an erasable programmable read - only memory (EPROM (Erasable Programmable Read Only Memory)), or a flash memory, an optical fiber, a portable compact disk read - only memory (CD - ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0056] In the IO splitting processing method for the four - controller all - flash storage system of the present invention, for example, machine learning methods, deep - learning methods, etc. can be used to execute the IO splitting processing method, and different methods are applicable to different ranges.

[0057] The IO splitting processing method of the embodiment of the present disclosure can be executed by a terminal device, or by a server, or by the interaction between the terminal device and the server, but the present disclosure is not limited thereto.

[0058] Specifically, the method includes:

[0059] S101: The host sends the IO ports across the all - flash memory to the source controller;

[0060] S102: The source controller splits the all-flash memory into a preset number of storage spaces, and also splits the I / O ports of the all-flash memory into several sub-interfaces, so that each sub-interface belongs to a storage space for use;

[0061] Among them, sub_LBA_0 = LBA, sub_length_0 = (1 + sub_LBA_0 / Segment_size) * Segment_size – sub_LBA_0;

[0062] sub_LBA_i + 1 = sub_LBA_i + sub_length_i, sub_length_i + 1 = (1 + sub_LBA_i + 1 / Segment_size) * Segment_size – sub_LBA_i + 1;

[0063] Among them, sub_LBA_i and sub_length_i respectively refer to the starting logical address and length of sub_IO_i. sub_IO_i is the starting logical address of the sub-interface, Target_controller_id is the number of the target controller, sub_LBA_i is the starting logical address, Transfer_Start_LBA is the starting transfer address, Transfer_Total_Length is the total transfer length, and Transfer_LBA_k is the logical block transfer request address.

[0064] S103: The source controller calculates the number of the target controller according to the starting logical address of the sub-interface;

[0065] Specifically, Target_controller_id = (sub_LBA_i / Segment_size) % 4

[0066] S104: The source controller sends the starting logical address of the sub-interface to the target controller;

[0067] S105: The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates several transfer sub-requests according to the first preset rule, and initiates data transfer to the source controller;

[0068] The first preset rule is:

[0069] Transfer_LBA_0 = sub_LBA_i, Transfer_length_0 = 32KB;

[0070] Transfer_LBA_k + 1 = Transfer_LBA_k + Transfer_length_k;

[0071] Transfer_length_k+1 = (sub_LBA_i + sub_length_i - Transfer_LBA_k+1) > 32KB? 32KB : (sub_LBA_i + sub_length_i - Transfer_LBA_k+1);

[0072] Where Transfer_LBA_k refers to the starting transfer address of the k-th transfer sub-request on the source controller, and Transfer_length_k refers to the transfer length of the k-th transfer sub-request.

[0073] S106: After the source controller receives the transfer sub-request, it places it at the end of the out-of-order transfer queue and sets the starting transfer address and total transfer length according to the second preset rule;

[0074] The second preset rule is: Transfer_Start_LBA = sub_LBA_0;

[0075] Transfer_Total_Length = 0;

[0076] Where sub_LBA_0 refers to the starting logical address of the split sub_IO numbered 0.

[0077] S107: The source controller starts data transfer, takes out the transfer sub-request k from the head of the out-of-order transfer queue in the order of First Input First Output. If the starting transfer address = the logical block transfer request address, go to step eight, otherwise go to step nine;

[0078] S108: The source controller executes the data transfer initiated by the transfer sub-request and executes the assignment process;

[0079] The assignment process executed in step eight includes:

[0080] The starting transfer address Transfer_Start_LBA = the logical block transfer request address Transfer_LBA_k + Transfer_length_k;

[0081] Transfer_Total_Length = Transfer_Total_Length + Transfer_length_k;

[0082] If Transfer_Total_Length == length, the data transfer of the IO is completed;

[0083] Transfer_length_k refers to the transfer length of the k-th transfer sub-request.

[0084] S109: The source controller places the transfer sub-request at the end of the out-of-order transfer queue and proceeds to step seven.

[0085] Thus, based on the above-mentioned IO splitting processing method for the four-controller all-flash storage system, the IO across the all-flash memory is split into multiple sub-IOs on the source controller, where each sub-IO belongs to a storage space. Since each storage space is processed by a designated controller, it is necessary to send the sub-IOs from the source controller to the corresponding target controllers for processing. After the target controller prepares the memory space for the sub-IOs, it initiates a data transfer request to the source controller. Each sub-IO initiates several transfer sub-requests according to the length of the sub-IO and the size of the transfer unit. When each transfer sub-request arrives at the source controller, it is placed at the end of the out-of-order transfer queue. When the source controller performs data transfer, it takes out the transfer sub-request from the head of the out-of-order transfer queue. If the transfer sub-request is a sequential transfer sub-request, it executes the sub-request; otherwise, it places the sub-request back at the end of the out-of-order transfer queue, thus ensuring the sequential execution of data transfer.

[0086] Based on the above method, the present invention also provides an IO splitting processing component for a four-controller all-flash storage system, as Figure 2 shown, the IO splitting processing component includes: a host, a source controller, an all-flash memory, and multiple controllers;

[0087] The host issues the IO port across the all-flash memory to the source controller;

[0088] The source controller splits the all-flash memory into a preset number of storage spaces and also splits the IO port of the all-flash memory into several sub-interfaces so that each sub-interface belongs to a storage space for use;

[0089] The source controller calculates the number of the target controller according to the starting logical address of the sub-interface; where the target controller is one of the multiple controllers;

[0090] The source controller sends the starting logical address of the sub-interface to the target controller;

[0091] The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates several transfer sub-requests according to the first preset rule, and initiates a data transfer to the source controller;

[0092] After receiving the transfer sub-request, the source controller places it at the end of the out-of-order transfer queue and sets the starting transfer address and the total transfer length according to the second preset rule;

[0093] The source controller starts data transmission, retrieves a transmission sub-request from the head of the out-of-order transmission queue in the first-in, first-out order. If the starting transmission address = the logical block transmission request address, it executes the data transmission initiated by the transmission sub-request and performs the assignment process; then it puts the transmission sub-request back to the tail of the out-of-order transmission queue.

[0094] The user can set the first preset rule and the second preset rule according to actual splitting needs. Of course, the limiting methods of the first preset rule and the second preset rule involved in the above of the present invention can also be adopted.

[0095] When the source controller involved in the present invention is also used to execute data transmission, the source controller retrieves a transmission sub-request from the head of the out-of-order transmission queue. If the sub-request is a sequential sub-request, it executes the data transmission; otherwise, it puts the sub-request back to the tail of the out-of-order transmission queue.

[0096] The present invention also relates to a display module; the display module is used to display the data of the IO splitting processing process and display the processing result, so that the user can understand the splitting process and the splitting progress.

[0097] Exemplarily speaking, the IO splitting processing component consists of controller 0, controller 1, controller 2, and controller 3. The storage space numbered 4N + X is processed by controller X (N = 0, 1, 2.., X = 0, 1, 2, 3). For the IO across the all-flash memory, taking Figure 1 as an example, assume that the length of the IO is 130KB, the first 65KB accesses the storage space 0, and the latter 65KB accesses the storage space 1, that is, the access range crosses the storage space 0 and the storage space 1. Then after the IO is sent to controller 0, controller 0 splits it into a sub-IO 0 and a sub-IO 1 with a length of 65KB. The sub-IO 0 is processed by controller 0, and the sub-IO 1 is processed by controller 1. The data transmission is in units of 32KB. If the transmission length is less than 32KB, it is still processed as one data transmission. For example, 65KB = 2 * 32KB + 1KB, then the IO with a length of 65KB needs to generate 3 transmission sub-requests to complete the data transmission.

[0098] Based on the above IO splitting processing component, when the source controller sends sub-IOs to the corresponding target controller and the target controller has prepared the memory space, the target controller initiates data transmission to the source controller. Since the order in which the target controller initiates data transmission to the source controller is different, in order to ensure that the data transmission initiated by multiple sub-IOs belonging to the same IO is executed in sequence, the source controller places the transmission sub-requests initiated by the sub-IOs at the end of the out-of-order transmission queue. When performing data transmission, the source controller takes out the transmission sub-request from the head of the out-of-order transmission queue. If the sub-request is a sequential sub-request, data transmission is executed; otherwise, the sub-request is placed back at the end of the out-of-order transmission queue, ensuring sequential execution of data transmission. This solves the problem that when sub-IOs perform data transmission, due to the different busy / idle degrees of the target controller and the different transmission orders of the sub-IOs from the target controller to the source controller, data transmission may be out of order, resulting in data inconsistency.

[0099] The IO splitting processing method and processing component of the four-controller all-flash storage system provided by the present invention combine the units and algorithm steps of each example described in the embodiments disclosed herein, and can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0100] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An IO splitting processing method for a four - control all - flash storage system, characterized in that, The method includes: Step 1: The host issues the I / O ports across the all-flash memory to the source controller. Step 2: The source controller splits the all-flash memory into a preset number of storage spaces, and also splits the I / O ports of the all-flash memory into several sub-interfaces, so that each sub-interface belongs to a storage space for use. Step 3: The source controller calculates the number of the target controller according to the starting logical address of the sub-interface. Step 4: The source controller sends the starting logical address of the sub-interface to the target controller. Step 5: The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates several transmission sub-requests according to the first preset rule, and initiates data transmission to the source controller. Step 6: After receiving the transmission sub-request, the source controller places it at the end of the out-of-order transmission queue, and sets the starting transmission address and the total transmission length according to the second preset rule. Among them, the first preset rule is: Transfer_LBA_0 = sub_LBA_i, Transfer_length_0 = 32KB; Transfer_LBA_k+1 = Transfer_LBA_k + Transfer_length_k; Transfer_length_k+1 = (sub_LBA_i + sub_length_i - Transfer_LBA_k+1) > 32KB? 32KB : (sub_LBA_i + sub_length_i - Transfer_LBA_k+1); Where Transfer_LBA_k refers to the starting transmission address of the kth transmission sub-request on the source controller, and Transfer_length_k refers to the transmission length of the kth transmission sub-request. The second preset rule is: Transfer_Start_LBA = sub_LBA_0; Transfer_Total_Length = 0; Where sub_LBA_0 refers to the starting logical address of the sub-IO numbered 0 after splitting. Step 7: The source controller starts data transmission, takes out the transmission sub-request from the head of the out-of-order transmission queue in the order of first-in, first-out. If the starting transmission address = the logical block transmission request address, go to Step 8, otherwise go to Step 9. Step 8: The source controller executes the data transmission initiated by the transmission sub-request and executes the assignment process. Executing the assignment process includes: The starting transmission address Transfer_Start_LBA = the logical block transmission request address Transfer_LBA_k + Transfer_length_k; Transfer_Total_Length = Transfer_Total_Length + Transfer_length_k; If Transfer_Total_Length == length, the data transmission of the I / O is completed. Transfer_length_k refers to the transmission length of the kth transmission sub-request. Step Nine: The source controller puts the transmission sub-request at the end of the out-of-order transmission queue and turns to Step Seven.

2. The IO splitting processing method of the four-controller all-flash storage system according to claim 1, wherein In Step Two, sub_LBA_0 = LBA, sub_length_0 = (1 + sub_LBA_0 / Segment_size) * Segment_size – sub_LBA_0; sub_LBA_i+1 = sub_LBA_i + sub_length_i, sub_length_i+1 = (1 + sub_LBA_i+1 / Segment_size) * Segment_size – sub_LBA_i+1; where sub_LBA_i and sub_length_i respectively refer to the starting logical address and length of sub_IO_i; sub_LBA_0 is the starting logical address, LBA is the logical block address, sub_length_0 is the starting length, and Segment_size is the size of the data segment.

3. The IO splitting processing method of the four-control all-flash storage system according to claim 1, characterized in that In Step Three, wherein, the number of the target controller Target_controller_id = (starting logical address sub_LBA_i / Segment_size) % 4.

4. An IO splitting processing component of a four-control all-flash storage system, characterized in that, The IO splitting processing component adopts the IO splitting processing method of the four-controller all-flash storage system according to any one of claims 1 to 3; The IO splitting processing component includes: a host, a source controller, an all-flash memory, and multiple controllers; The host issues the IO port across the all-flash memory to the source controller; The source controller splits the all-flash memory into a preset number of storage spaces, and also splits the IO port of the all-flash memory into several sub-interfaces, so that each sub-interface belongs to a storage space for use; The source controller calculates the number of the target controller according to the starting logical address of the sub-interface; wherein, the target controller is one of the multiple controllers; The source controller sends the starting logical address of the sub-interface to the target controller; The target controller receives the starting logical address of the sub-interface, prepares the memory space, generates several transmission sub-requests according to the first preset rule, and initiates data transmission to the source controller; After receiving the transmission sub-request, the source controller places it at the end of the out-of-order transmission queue and sets the starting transmission address and the total transmission length according to the second preset rule; The source controller starts data transmission, takes out the transmission sub-request from the head of the out-of-order transmission queue in the order of first-in-first-out. If the starting transmission address = the logical block transmission request address, execute the data transmission initiated by the transmission sub-request and execute the assignment process; put the transmission sub-request back at the end of the out-of-order transmission queue.

5. The IO splitting processing component of the four-controller all-flash storage system according to claim 4, wherein The source controller is further used to obtain the first preset rule and the second preset rule set by the user.

6. The IO splitting processing component of the four-controller all-flash storage system according to claim 4, wherein It further includes: a display module; The display module is used to display the data during the IO splitting process and display the processing results.

7. The IO splitting processing component of the four-control all-flash storage system according to claim 4, characterized in that When the source controller is also used to perform data transmission, the source controller takes out the transmission sub-request from the head of the out-of-order transmission queue. If the sub-request is a sequential sub-request, it performs data transmission; otherwise, it puts the sub-request back to the tail of the out-of-order transmission queue.

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