Die bonding positioning method

Abstract

The present application relates to a die bonding positioning method, comprising: a positioning reference obtaining step, a chip image extracting step, a first image processing step, a substrate image extracting step, a second image processing step, and a correction displacement amount calculating step. Thus, the die bonding positioning method can improve the die bonding error caused by the angle, position error or image distortion between the chip and the substrate.

Description

Technical Field

[0001] This invention relates to the field of positioning methods, specifically to a die-bonding positioning method. Background Technology

[0002] During the chip-to-substrate die bonding process, a lens is used to capture images of both the chip and the substrate to facilitate positioning between them. Camera calibration is also required to ensure accurate image capture and thus achieve good die bonding quality. Furthermore, camera calibration typically uses a checkerboard or chessboard pattern to correct for errors caused by lens distortion. Therefore, reducing die bonding errors between the chip and the substrate is crucial for achieving good die bonding quality.

[0003] However, the grid size of existing checkerboard technology is larger than the pixel size of a microscope lens, making it unable to correct for microscope lens distortion. For example, with a 20X lens and a 1.3-megapixel (1.3M) camera, each pixel has a width and height of 0.265μm; however, the grid width of existing checkerboard technology is 50μm. Therefore, existing checkerboard technology cannot correct lens distortion to compensate for errors in distorted imaging. Summary of the Invention

[0004] Therefore, the purpose of this invention is to provide a die bonding positioning method that can compensate for the image distortion error of the lens to improve the die bonding error between the chip and the substrate.

[0005] The present invention provides a die-bonding positioning method to address the problems of existing technologies. The method includes: a positioning reference acquisition step, which involves setting a positioning reference photomask having a plurality of spaced-apart reference positioning marks, and placing a first optical imaging device on the lower side of the positioning reference photomask and a second optical imaging device on the upper side of the positioning reference photomask to capture images of the plurality of reference positioning marks to obtain a first reference image and a second reference image, respectively; a chip image extraction step, which uses the first optical imaging device to capture an image of the chip to obtain a chip image with chip alignment points; and a first image processing step, which combines the first reference image and the chip image to calculate vector parameters of the plurality of reference positioning marks relative to the chip alignment points, and... The chip positioning offset is obtained by averaging a plurality of the vector parameters; the substrate image extraction step is to obtain a substrate image with substrate alignment points by using the second optical imaging device to capture an image of the substrate; the second image processing step is to calculate vector parameters of a plurality of reference positioning marks relative to the substrate alignment points by combining the second reference image and the substrate image, and to obtain a substrate positioning offset by averaging a plurality of the vector parameters; and the correction displacement calculation step is to calculate the relative positional offset between the chip alignment points and the substrate alignment points based on the chip positioning offset and the substrate positioning offset, so as to adjust the displacement between the chip and the substrate according to the relative positional offset to compensate for the die bonding error caused by the angle, position error or image distortion between the chip and the substrate.

[0006] In one embodiment of the present invention, a die-bonding positioning method is provided, wherein in the positioning comparison reference acquisition step, a plurality of the reference positioning marks are spaced apart in a manner that surrounds the image comparison area.

[0007] In one embodiment of the present invention, a die-bonding positioning method is provided, wherein in the positioning comparison reference acquisition step, a plurality of the reference positioning marks are spaced apart in a manner that surrounds a circular image comparison area.

[0008] In one embodiment of the present invention, a die-bonding positioning method is provided, wherein in the chip image extraction step, the chip is held by a suction nozzle and the suction nozzle is moved above the first optical imaging device, and the first optical imaging device captures an image of the chip.

[0009] In one embodiment of the present invention, a die bonding positioning method is provided, wherein in the substrate image extraction step, the second optical imaging device is displaced above the substrate, and the second optical imaging device captures an image of the substrate.

[0010] In one embodiment of the present invention, a die-bonding positioning method is provided, wherein in the first image processing step, each of the vector parameters is a position vector with each of the reference positioning marks as a reference point and facing the chip alignment point.

[0011] In one embodiment of the present invention, a die bonding positioning method is provided, wherein in the second image processing step, each of the vector parameters is a position vector with each of the reference positioning marks as a reference point and facing the substrate alignment point.

[0012] The technical means employed by the die bonding positioning method of the present invention can achieve the following technical effects: It compensates for imaging distortion errors caused by lens distortion and improves die bonding errors caused by angular or positional errors between the chip and the substrate, or image distortion. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the steps of a die-bonding and positioning method according to an embodiment of the present invention.

[0014] Figure 2 This is a schematic diagram of the positioning comparison benchmark acquisition step in the die bonding positioning method of this invention.

[0015] Figure 3 This is another schematic diagram of the positioning comparison benchmark acquisition step in the die bonding positioning method of this invention.

[0016] Figure 4 This is a schematic diagram of the chip image extraction step in the die bonding and positioning method according to an embodiment of the present invention.

[0017] Figure 5 This is a schematic diagram of the first image processing step of the die bonding and positioning method according to an embodiment of the present invention.

[0018] Figure 6 This is a schematic diagram of the substrate image extraction step in the die bonding positioning method according to an embodiment of the present invention.

[0019] Figure 7 This is a schematic diagram of the second image processing step of the die-bonding positioning method according to an embodiment of the present invention.

[0020] Figure 8 This is a schematic diagram of the correction displacement calculation steps in the die-bonding positioning method according to an embodiment of the present invention.

[0021] Figure Labels

[0022] 100 Die-bonding positioning method

[0023] 1. Steps for obtaining the positioning and comparison benchmark

[0024] 10 Positioning reference mask

[0025] 101 Reference Positioning Marker

[0026] 11 First Optical Imaging Device

[0027] 111 First reference image

[0028] 12 Second optical imaging device

[0029] 121 Second reference image

[0030] 2. Chip Image Extraction Steps

[0031] 3. First Image Processing Step

[0032] 4. Substrate Image Extraction Steps

[0033] 5. Second Image Processing Step

[0034] 6. Steps for calculating the correction displacement

[0035] A Image Comparison Area

[0036] B substrate

[0037] B1 substrate image

[0038] B2 substrate alignment point

[0039] C chip

[0040] C1 chip image

[0041] C2 chip alignment point

[0042] S-shaped nozzle

[0043] V1 vector parameters

[0044] V2 vector parameters Detailed Implementation

[0045] The following is based on Figures 1 to 8 This description illustrates one embodiment of the present invention. It is not intended to limit the scope of the invention, but rather to provide one possible embodiment.

[0046] like Figures 1 to 8 As shown, a die-bonding positioning method 100 according to an embodiment of the present invention includes: a positioning comparison reference acquisition step 1, a chip image extraction step 2, a first image processing step 3, a substrate image extraction step 4, a second image processing step 5, and a correction displacement calculation step 6. Therefore, the present invention can compensate for the imaging distortion error caused by lens distortion, and thus improve the die-bonding error caused by the angle and position error between chip C and substrate B.

[0047] like Figures 1 to 3As shown, in the positioning comparison reference acquisition step 1, a positioning reference photomask 10 is set, wherein the positioning reference photomask 10 has a plurality of reference positioning marks 101 spaced apart. Furthermore, in this positioning comparison reference acquisition step 1, a first optical imaging device 11 is positioned below the positioning reference photomask 10, and a second optical imaging device 12 is positioned above the positioning reference photomask 10. Images are captured from the plurality of reference positioning marks 101 to obtain a first reference image 111 and a second reference image 121, respectively. That is, the first reference image 111 has a plurality of reference positioning marks 101, and the second reference image 121 also has a plurality of reference positioning marks 101. In other words, the first reference image 111 and the second reference image 121 are the results of the first optical imaging device 11 and the second optical imaging device 12 capturing images of the positioning reference photomask 10, respectively.

[0048] Specifically, such as Figures 1 to 3 As shown, in a die-bonding positioning method 100 according to an embodiment of the present invention, in step 1 of obtaining the positioning comparison reference, a plurality of the reference positioning marks 101 are spaced apart in a manner that surrounds the image comparison area A.

[0049] Furthermore, such as Figures 1 to 3 As shown, in a die-bonding positioning method 100 according to an embodiment of the present invention, in step 1 of obtaining the positioning comparison reference, a plurality of the reference positioning marks 101 are spaced apart in a manner surrounding a circular image comparison region A. Of course, the present invention is not limited to surrounding a circular image comparison region A; the plurality of reference positioning marks 101 may also surround a rectangular image comparison region (not shown in the figures of the present invention), or surround a polygonal image comparison region (not shown in the figures of the present invention).

[0050] like Figure 1 and Figure 4 As shown, the chip image extraction step 2 uses the first optical imaging device 11 to capture an image of the chip C to obtain a chip image C1 with chip alignment point C2. Specifically, the chip alignment point C2 is a feature point on the chip C, or the chip alignment point C2 is a pre-processed mark point on the chip C.

[0051] In detail, such as Figure 4 As shown, in a die-bonding positioning method 100 according to an embodiment of the present invention, in the chip image extraction step 2, the chip C is held by the suction nozzle S and the suction nozzle S is moved above the first optical imaging device 11, and the first optical imaging device 11 captures an image of the chip C.

[0052] Of course, the present invention is not limited to "first taking images of a plurality of the reference positioning marks 101 to obtain the first reference image 111, and then taking images of the chip C to obtain the chip image C1", but can also be "first taking images of the chip C to obtain the chip image C1, and then taking images of a plurality of the reference positioning marks 101 to obtain the first reference image 111".

[0053] like Figure 1 , Figures 3 to 5 As shown, the first image processing step 3 combines the first reference image 111 and the chip image C1 (that is, the chip alignment point C2 falls within the range of the image comparison area A) to calculate the vector parameters V1 of a plurality of reference positioning marks 101 relative to the chip alignment point C2, and takes the average of the plurality of vector parameters V1 to obtain the chip positioning offset. In detail, the distance of each reference positioning mark 101 to the chip alignment point C2 is not the same (that is, the vector parameters V1 of the plurality of reference positioning marks 101 relative to the chip alignment point C2 are also different), and the chip positioning offset of the chip alignment point C2 relative to the plurality of reference positioning marks 101 is obtained by taking the average of the plurality of vector parameters V1.

[0054] Specifically, such as Figure 5 As shown, in a die-bonding positioning method 100 according to an embodiment of the present invention, in the first image processing step 3, each of the vector parameters V1 is a position vector with each of the reference positioning marks 101 as a reference point and facing the chip alignment point C2.

[0055] like Figure 1 and Figure 6 As shown, in the substrate image extraction step 4, the second optical imaging device 12 captures an image of the substrate B to obtain a substrate image B1 with substrate alignment point B2. Specifically, the substrate alignment point B2 is a feature point on the substrate B, or the substrate alignment point B2 is a pre-processed mark point on the substrate B.

[0056] Furthermore, such as Figure 6 As shown, in a die bonding positioning method 100 according to an embodiment of the present invention, in the substrate image extraction step 4, the second optical imaging device 12 is moved above the substrate B, and the second optical imaging device 12 captures an image of the substrate B.

[0057] Of course, the present invention is not limited to "first taking images of a plurality of the reference positioning marks 101 to obtain the second reference image 121, and then taking images of the substrate B to obtain the substrate image B1", but can also be "first taking images of the substrate B to obtain the substrate image B1, and then taking images of a plurality of the reference positioning marks 101 to obtain the second reference image 121".

[0058] like Figure 1 , Figure 3 , Figure 6 and Figure 7 As shown, the second image processing step 5 combines the second reference image 121 and the substrate image B1 (that is, the substrate alignment point B2 falls within the range of the image comparison area A) to calculate the vector parameters V2 of a plurality of reference positioning marks 101 relative to the substrate alignment point B2, and takes the average of the plurality of vector parameters V2 to obtain the substrate positioning offset. Specifically, the distance of each reference positioning mark 101 to the substrate alignment point B2 is not the same (that is, the vector parameters V2 of the plurality of reference positioning marks 101 relative to the substrate alignment point B2 are also different), and the substrate positioning offset of the substrate alignment point B2 relative to the plurality of reference positioning marks 101 is obtained by taking the average of the plurality of vector parameters V2.

[0059] Furthermore, such as Figure 7 As shown, in a die bonding positioning method 100 according to an embodiment of the present invention, in the second image processing step 5, each of the vector parameters V2 is a position vector with each of the reference positioning marks 101 as a reference point and facing the substrate alignment point B2.

[0060] like Figure 1 and Figure 8 As shown, the correction displacement calculation step 6 calculates the relative positional offset between the chip alignment point C2 and the substrate alignment point B2 based on the chip positioning offset and the substrate positioning offset. Furthermore, in the correction displacement calculation step 6, the displacement between the chip C and the substrate B is further adjusted based on the relative positional offset to compensate for the die bonding error caused by the angle, positional error or image distortion between the chip C and the substrate B.

[0061] Specifically, the reference positioning mark 101 of the positioning reference photomask 10 serves as the same positioning reference for both the first optical imaging device 11 and the second optical imaging device 12. Therefore, in the first image processing step 3 and the second image processing step 5, the present invention can respectively obtain the chip positioning offset of the chip alignment point C2 relative to the positioning reference photomask 10 (i.e., relative to a plurality of the reference positioning marks 101) and the substrate positioning offset of the substrate alignment point B2 relative to the positioning reference photomask 10 (i.e., relative to a plurality of the reference positioning marks 101). Furthermore, since the chip positioning offset and the substrate positioning offset are respectively obtained by averaging a plurality of vector parameters V1 and a plurality of vector parameters V2, the angle and positional errors between the chip C and the substrate B, as well as the imaging distortion errors caused by image distortion, can all be calculated. In other words, the present invention can calculate the relative positional offset between the chip alignment point C2 and the substrate alignment point B2, thereby adjusting the displacement between the chip C and the substrate B to improve the die bonding error between the chip C and the substrate B.

[0062] As described above, the die-bonding positioning method 100 of this embodiment of the invention calculates the relative positional offset between the chip alignment point C2 and the substrate alignment point B2 through the positioning comparison reference acquisition step 1, the chip image extraction step 2, the first image processing step 3, the substrate image extraction step 4, the second image processing step 5, and the correction displacement calculation step 6. Furthermore, this invention can compensate for angular and positional errors between the chip C and the substrate B, as well as imaging distortion errors caused by lens distortion, based on the relative positional offset, thereby improving the die-bonding error between the chip C and the substrate B.

[0063] The above description and explanation are merely illustrative of preferred embodiments of the present invention. Those skilled in the art can make other modifications based on the above-defined scope of protection and the above description, but these modifications should still be within the scope of protection of the present invention and in line with its inventive spirit.

Claims

1. A die-bonding positioning method, characterized in that, The aforementioned die-bonding positioning method includes: The positioning comparison benchmark acquisition step involves setting up a positioning benchmark photomask, which has a plurality of benchmark positioning marks spaced apart. A first optical imaging device is set on the lower side of the positioning benchmark photomask and a second optical imaging device is set on the upper side of the positioning benchmark photomask to capture images of the plurality of benchmark positioning marks and obtain a first benchmark image and a second benchmark image respectively. The chip image extraction step involves using the first optical imaging device to capture an image of the chip to obtain a chip image with chip alignment points. The first image processing step involves combining the first reference image and the chip image to calculate vector parameters of a plurality of reference positioning marks relative to the chip alignment point, and taking the average value of the plurality of vector parameters to obtain the chip positioning offset. The substrate image extraction step involves using the second optical imaging device to capture an image of the substrate and obtain a substrate image with substrate alignment points. The second image processing step involves calculating vector parameters of a plurality of reference positioning marks relative to the substrate alignment points by combining the second reference image and the substrate image, and averaging the plurality of vector parameters to obtain the substrate positioning offset; and... The displacement calculation step involves calculating the relative positional offset between the chip alignment point and the substrate alignment point based on the chip positioning offset and the substrate positioning offset. This relative positional offset is used to adjust the displacement between the chip and the substrate to compensate for die bonding errors caused by angle, positional errors, or image distortion between the chip and the substrate.

2. The die-bonding and positioning method according to claim 1, characterized in that, In the step of obtaining the positioning and comparison reference, a plurality of the reference positioning markers are spaced apart in a manner that surrounds the image comparison area.

3. The die-bonding and positioning method according to claim 1, characterized in that, In the positioning and comparison benchmark acquisition step, a plurality of the benchmark positioning markers are spaced apart in a manner that surrounds the circular image comparison area.

4. The die-bonding and positioning method according to claim 1, characterized in that, In the chip image extraction step, the chip is held by the suction nozzle and the suction nozzle is moved above the first optical imaging device, and the first optical imaging device captures an image of the chip.

5. The die-bonding and positioning method according to claim 1, characterized in that, In the substrate image extraction step, the second optical imaging device is moved above the substrate and captures an image of the substrate.

6. The die-bonding and positioning method according to claim 1, characterized in that, In the first image processing step, each of the vector parameters is a position vector with each of the reference positioning marks as a reference point and facing the chip alignment point.

7. The die-bonding and positioning method according to claim 1, characterized in that, In the second image processing step, each of the vector parameters is a position vector with each of the reference positioning marks as a reference point and facing the substrate alignment point.

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