A decoding method, chip, electronic device, and storage medium

Abstract

The present application relates to a decoding method, a chip, an electronic device and a storage medium. Among them, the method includes: decoding first encoded data to obtain a first path expansion set including multiple candidate decoding paths; deleting redundant paths in the first path expansion set to obtain a second path expansion set; determining a target decoding path according to multiple candidate decoding paths corresponding to target frozen bits in the second path expansion set; and obtaining a target decoding result according to the target decoding path. By adopting the present application, the decoding complexity is reduced, thereby improving the decoding speed.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence technology, and in particular, to a decoding method, apparatus, electronic device, and storage medium. Background Art

[0002] Communication systems usually adopt channel coding to improve the reliability of data transmission to ensure the quality of communication. Polar codes are the first channel coding technology that has been theoretically proven to achieve channel capacity. Using polar codes for coding can improve communication performance. However, for the decoding of polar codes, the current decoding complexity is relatively high, and it is necessary to reduce the decoding complexity and improve the decoding speed. Summary of the Invention

[0003] This application provides a decoding method, a chip, an electronic device, and a storage medium.

[0004] According to one aspect of this application, a decoding method is provided, including:

[0005] Decoding first encoded data to obtain a first path expansion set including multiple candidate decoding paths;

[0006] Deleting redundant paths in the first path expansion set to obtain a second path expansion set;

[0007] Determining a target decoding path according to multiple candidate decoding paths corresponding to target frozen bits in the second path expansion set;

[0008] Obtaining a target decoding result according to the target decoding path.

[0009] According to one aspect of this application, a chip is provided, including a decoder for:

[0010] Receiving first encoded data;

[0011] Decoding the first encoded data to obtain multiple decoding paths;

[0012] Deleting redundant paths from the multiple decoding paths to obtain a target decoding path;

[0013] Obtaining a target decoding result according to the information bits corresponding to the target decoding path.

[0014] According to another aspect of this application, an electronic device is provided, including:

[0015] At least one processor; and

[0016] A memory communicatively connected to the at least one processor; wherein,

[0017] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method provided in any embodiment of the present application.

[0018] According to another aspect of the present application, there is provided a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the method provided in any embodiment of the present application.

[0019] According to another aspect of the present application, there is provided a computer program product including computer instructions that implement the method provided in any embodiment of the present application when executed by a processor.

[0020] By using the present application, the first encoded data can be decoded to obtain a first path extension set including multiple candidate decoding paths, and redundant paths are deleted in the first path extension set to terminate the extension of the redundant paths, thereby obtaining a second path extension set. The target decoding path can be determined according to multiple candidate decoding paths corresponding to the target frozen bits in the second path extension set, and thus the target decoding result can be obtained according to the target decoding path. Since the path extension is terminated in advance, the decoding complexity is reduced, and thus the decoding speed is improved.

[0021] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become easily understood through the following description. Description of the Drawings

[0022] The drawings are used to better understand the solution and do not constitute a limitation to the present application. Among them:

[0023] Figure 1 is a schematic diagram of a communication scenario according to an embodiment of the present application;

[0024] Figure 2 is a schematic flowchart of a decoding method according to an embodiment of the present application;

[0025] Figure 3 is a schematic diagram of a decoding path according to an embodiment of the present application;

[0026] Figure 4 is a schematic flowchart of a decoding method of an application example according to an embodiment of the present application;

[0027] Figure 5 is another schematic diagram of a decoding path according to an embodiment of the present application;

[0028] Figure 6 is a schematic diagram of simulating an encoding process according to an embodiment of the present application;

[0029] Figure 7 It is a schematic diagram of simulating the decoding process according to an embodiment of the present application;

[0030] Figure 8 It is a schematic diagram of the composition structure of a chip according to an embodiment of the present application;

[0031] Figure 9 It is a block diagram of an electronic device for implementing the decoding method according to an embodiment of the present application. Detailed implementation manners

[0032] The following makes an explanation of exemplary embodiments of the present application with reference to the accompanying drawings, including various details of the embodiments of the present application to facilitate understanding, which should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present application. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted below.

[0033] The term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The term "at least one" in this article means any one of multiple types or any combination of at least two of multiple types. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set composed of A, B, and C. The terms "first" and "second" in this article represent referring to multiple similar technical terms and distinguishing them, and do not mean limiting the order, or limiting that there are only two. For example, the first feature and the second feature refer to two types / two features. The first feature can be one or more, and the second feature can also be one or more.

[0034] To facilitate understanding of the technical solutions of the embodiments of the present application, the following briefly explains the technical terms and basic concepts involved in the embodiments of the present application.

[0035] 1. Polar code: It is a linear block code and is the first channel coding technology that has been theoretically proven to achieve the channel capacity. Compared with other channel coding technologies, the polar code has a regular coding structure and has a linear encoding and decoding complexity while maintaining high reliability. The polar code is also called a code with low encoding and decoding complexity.

[0036] 2. Information bit: During the encoding process of the polar code, a part of the bits in the bit sequence to be encoded are used to carry information, which is called an information bit.

[0037] 3. Frozen Bits: During the encoding process of a polar code, another part of the bits in the bit sequence to be encoded is used to carry a set fixed value (i.e., a fixed value pre-agreed upon by the transmitter and the receiver), and this fixed value is called a frozen bit or a fixed bit.

[0038] According to an embodiment of the present application, Figure 1 is a schematic diagram of a communication scenario according to an embodiment of the present application. This communication scenario exemplarily describes that information can be transmitted using a communication system. For example, at the transmitter, source coding, channel coding, and modulation mapping are performed; at the receiver, demapping and demodulation, channel decoding, source decoding, etc. are performed.

[0039] This communication system includes a network device 110 and two terminal devices 120. Optionally, this communication system may include multiple network devices 110, and the coverage range of each network device 110 may include other numbers of terminal devices 120. The embodiments of the present application do not limit this.

[0040] Optionally, this communication system may further include other network entities such as a Mobility Management Entity (MME), an Access and Mobility Management Function (AMF), etc. The embodiments of the present application do not limit this.

[0041] Among them, the network device may further include an access network device and a core network device. That is, the wireless communication system further includes multiple core networks for communicating with the access network device. The access network device may be an evolved Node B (abbreviated as eNB or e-NodeB) macro base station, a micro base station (also called a "small base station"), a pico base station, an access point (AP), a transmission point (TP), or a new generation Node B (gNodeB) in a Long-Term Evolution (LTE) system, a Next Radio (NR) system, or an Authorized Auxiliary Access Long-Term Evolution (LAA-LTE) system.

[0042] Among them, a wireless communication system usually consists of cells, each cell contains a base station (BS), the base station provides communication services to multiple mobile stations (MS), and the base station can be connected to core network devices. The base station may include a baseband unit (BBU) and a remote radio unit (RRU), the BBU and the RRU can be placed in different locations, for example: the RRU is remotely located in a high-traffic area, and the BBU is placed in the central computer room. The BBU and the RRU can also be placed in the same computer room. The BBU and the RRU can also be different components under a single rack.

[0043] It should be understood that in the embodiments of the present application, a device with communication functions in a network / system can be referred to as a communication device. Taking Figure 1 the shown communication system as an example, the communication device may include a network device and a terminal device with communication functions. The network device and the terminal device can be specific devices in the embodiments of the present application, which will not be elaborated here; the communication device may also include other devices in the communication system, such as other network entities like a network controller, a mobility management entity, etc., which are not limited in the embodiments of the present application.

[0044] According to an embodiment of the present application, a decoding method is provided. Figure 2 FIG. is a schematic flowchart of the decoding method according to an embodiment of the present application. This method can be applied to a decoding device. For example, the device can be deployed in an electronic device (such as a terminal or a server) or a chip of other processing devices in a single machine, a multi-machine or a cluster system, and can implement processing such as decoding. Among them, the terminal can be a user equipment (UE, User Equipment), a mobile device, a personal digital assistant (PDA, Personal Digital Assistant), a handheld device, a computing device, a vehicle-mounted device, a wearable device, etc. In some possible implementation manners, this method can also be implemented by a processor calling computer-readable instructions stored in a memory. As Figure 2 shown, the decoding process includes:

[0045] S201. Decode the first encoded data to obtain a first path expansion set including multiple candidate decoding paths.

[0046] In some examples, sequential decoding can be performed starting from the first bit in the first encoded data. The first bit is used as the root node of the encoding node tree and path expansion is performed. Then, the next bit is decoded, and so on, to obtain multiple candidate decoding paths, and these candidate decoding paths form the first path expansion set.

[0047] S202. Delete redundant paths in the first path extension set to obtain a second path extension set.

[0048] In some examples, redundant paths can be deleted in the first path extension set to terminate the path extension of the redundant paths, thereby obtaining a second path extension set.

[0049] S203. Determine a target decoding path according to multiple candidate decoding paths corresponding to the target frozen bits in the second path extension set.

[0050] S204. Obtain a target decoding result according to the target decoding path.

[0051] It should be noted that deleting the redundant path, that is, not performing path extension for the redundant path, thereby reducing the decoding complexity and accelerating the decoding speed.

[0052] With the present application, the first encoded data can be decoded to obtain a first path extension set including multiple candidate decoding paths, and redundant paths are deleted in the first path extension set to terminate the extension of the redundant paths, thereby obtaining a second path extension set. A target decoding path can be determined according to multiple candidate decoding paths corresponding to the target frozen bits in the second path extension set, and thus a target decoding result can be obtained according to the target decoding path. Since the path extension is terminated in advance, the decoding complexity is reduced, and thus the decoding speed is improved.

[0053] In a possible implementation manner, it further includes: determining the paths extended after the target frozen bit as redundant paths.

[0054] In some examples, the target frozen bit includes any one of the following:

[0055] 1) The last frozen bit carried in the first encoded data;

[0056] 2) The frozen bit agreed upon in advance by the sending end and the receiving end, and the frozen bit agreed upon in advance is located in the first encoded data.

[0057] In a possible implementation manner, it further includes: decoding to the target frozen bit in the first encoded data, and performing path extension at the position corresponding to the target frozen bit in a node tree (such as a coding node tree) to obtain multiple candidate decoding paths corresponding to the target frozen bit.

[0058] In a possible implementation, determining a target decoding path according to multiple candidate decoding paths corresponding to target frozen bits in a second path expansion set includes: selecting, from the multiple candidate decoding paths corresponding to the target frozen bits, a candidate decoding path with the smallest Path Metric (PM) value. Determining the candidate decoding path with the smallest PM value as the target decoding path.

[0059] In some examples, the multiple candidate decoding paths are different decoding paths, and the PM values corresponding to the different decoding paths can be calculated separately. For example, if u i is the target frozen bit and i ≥ 1, then the decoding paths can be sorted according to the PM values corresponding to the different decoding paths at the target frozen bit, so as to determine a path with the smallest PM value, keep the path with the smallest PM value, and the remaining decoding paths can be deleted, that is: taking the path with the smallest PM value as the target decoding path.

[0060] Specifically, the decoding process can be regarded as a path search process, that is, starting from the first bit in the first encoded data as the root node, sequential decoding is performed, and path expansion is performed at the corresponding bit position in the node tree (encoding node tree). A metric value (such as the PM value) can be used to evaluate the expanded paths, and the metric value is dynamically updated according to a predetermined rule as the paths are expanded. At each path expansion (i.e., decoding to the next bit), L candidate paths with the optimal path metric in the current layer are retained. Among them, the paths expanded after the target frozen bit (such as the last frozen bit in the first encoded data) can be used as redundant paths, and no path expansion is performed on the redundant paths, so as to end the path expansion in advance. Since there is no need to expand to the last layer (i.e., the last bit of decoding) after deleting the redundant paths, therefore, selecting a decoding path with the smallest PM value corresponding to the last frozen bit as the target decoding path (for example, selecting a path with a PM value of 0.21 and using it as the target decoding path), bit decision for fast decoding can be performed according to the Log Likelihood Ratio (LLR) value. Thus, a target decoding result can be obtained according to the target decoding path.

[0061] More specifically, taking the index of the target frozen bit in the first encoded data as t as an example to describe the decoding process. When i > t, only the LLR value calculation and decision are performed at the information bits after t, and no path extension or path pruning is performed. When i ≤ t, not only the LLR value calculation and decision are required at the information bits before t, but also path extension and path pruning are required. Among them, for path pruning, the number of paths obtained by path extension is compared with the threshold L of the number of paths, and path pruning is performed only when the number of paths > L. Finally, the path with the smallest metric value among the L candidate paths is output as the decoding output to obtain the maximum likelihood decoding performance.

[0062] Considering that the design of the decoder has a direct impact on the communication performance, area, power consumption, etc. of the baseband chip, and the decoding requirements of the control channel are low latency and high accuracy. In order to reduce the latency and power consumption of the decoder and improve the error correction ability of the decoder to improve the accuracy. The following encoding process of the polar code and its corresponding decoding process can be adopted during encoding, and the specific description is as follows:

[0063] After the channel polarization process, N polarized sub-channels with different reliabilities are generated. Before polar code encoding, the information to be transmitted is mapped on the sub-channels with higher reliability, and the bit sequence known to both the transmitter and the receiver (referred to as frozen bits, and the frozen bits are usually set to an all-zero sequence) is mapped on the sub-channels with lower reliability to construct the encoded bit sequence Is a binary row vector with a length of N (N is a positive integer greater than 1, which is the encoding length), and the polar code is encoded according to the following formula (1).

[0064]

[0065] Among them, G N Is the generating matrix, which is an N×N matrix, and G N Can be expressed as the following formula (2):

[0066]

[0067] Among them, Represents the n-fold Kronecker product of the matrix F, as shown in formula (3), and the matrix F is:

[0068]

[0069] During the encoding process of the polar code, the polarized sub-channels used for transmitting information bits are denoted as The polarized sub-channels used for transmitting frozen bits are denoted as (Is the complement of ), so the encoding process of the polar code, as shown in formula (4), can also be expressed as:

[0070]

[0071] Among them, is a sub - matrix of G N and is composed of all rows obtained according to the indices in the set N in the matrix G. Therefore, given the parameter vector , the polar code can be determined. is the set of information bits in, and the number of information bits is K; is the set of frozen bits in, the number of frozen bits is (N - K), which are known bits. The frozen bits can be set to 0. Moreover, as long as it is pre - agreed between the encoding end and the decoding end, the frozen bits can be set arbitrarily and can also be set to non - zero values.

[0072] After encoding at the encoding end, the codeword is sent through the channel Assume that the channel is an Additive White Gaussian Noise (AWGN) channel. At the decoding end, the received encoded data is denoted as where n can be Gaussian white noise with a mean of 0 and a variance of σ.

[0073] At the decoding end, the Successive Cancellation List (SCL) decoding algorithm can be adopted. First, set the maximum number of decoding paths L, and then start decoding from u 0 sequentially towards u N . For the i - th (i is a positive integer greater than 1) decoded bit u i , as shown in formula (5), the Log - Likelihood Ratio (LLR) corresponding to this decoded bit is:

[0074]

[0075] Among them, represents the channel transition probability of the i - th polar sub - channel, represents the decision result of u i . u i has two decision possibilities, namely or Each decision possibility is defined as a decoding path. As shown in formula (6), the Path Metric (PM value) of different decoding paths can be calculated respectively:

[0076]

[0077] The PM value is initialized to ​is the path metric value of the l-th path, is the log-likelihood ratio of the current bit, The corresponding value is calculated by formula (5). Of course, other methods can also be used in actual applications. If u i is a frozen bit, the PM value of its decoding path is updated according to the following formula (7):

[0078]

[0079] Considering that for frozen bits, the encoding end and the decoding end have already determined their values to be 0 in advance, so for the paths of frozen bits a very large penalty value can be given. Starting from u 1 for each 1-bit decoding path number will become 2 times the decoding path number of the previous bit. If the decoding path number is greater than L, then according to the PM value, all the decoding paths of this bit are sorted, and the L paths with the smallest PM values are retained for continued decoding, and the remaining decoding paths are deleted, that is, path pruning is performed. When decoding to the last bit u N select the 1 decoding path with the smallest PM value as the final decoding result. Taking a 4-bit polar code as an example, the SCL decoding process is as Figure 3 shown, where the maximum decoding path L = 2. Figure 3 Each layer in represents 1 bit, and path expansion is performed at the nodes corresponding to the coding node tree at each bit position (for example, one possibility of path expansion is 0, and another possibility is the absolute value of the LLR, and the absolute value of the LLR can be set to 1 or other values), obtaining a path expansion set composed of multiple candidate decoding paths. Among the multiple candidate decoding paths, the paths marked with thin solid lines (such as path 301, path 302, path 303, path 305, path 308, path 309, path 311, path 312, path 313, and path 314) are the retained paths, and the paths marked with dotted lines (such as path 304, path 306, path 307, path 310) are the pruned paths, and the numbers on each node represent the PM values of the paths. When decoding to the position of u 1 the PM values are 0.35, 0.41, 0.21, 0.44 respectively. The path with the smallest penalty value is selected as the target decoding path. Therefore, the path with a PM value of 0.21 is selected as the final decoding result. Thus, the decoding path indicated by the thick solid line 315 is used as the final decoding result, that is, [1, 0, 0, 0].

[0080] Considering that the SCL decoding algorithm has the advantage of high reliability, but its high reliability is achieved through path extension, and its algorithm complexity is O(LNlogN). That is, as the number of decoding paths increases, the decoding complexity also increases. In practical applications, for the design requirements of communication systems and terminal power consumption design, etc., the goal is to reduce the computational complexity of the decoder. Moreover, there are bound to be redundant paths in the process of path extension (the redundant path is: in the above path extension set, the part of the path that not only does not improve the decoding reliability but also wastes the computing power of the decoder). If the redundant path continues to be extended, the decoding complexity will continue to increase with the path extension.

[0081] In this application example, by avoiding the path extension of redundant paths, without affecting the decoding reliability, the problem that the decoding algorithm complexity of polar codes increases with path extension is solved, thereby reducing the decoding complexity and improving the decoding speed to achieve fast decoding.

[0082] The decoding method applied to polar codes in this application example is specifically described as follows:

[0083] Denote the index of the last frozen bit in the coded bit sequence as t, and denote the PM values corresponding to the 2L decoding paths decoded to u as the penalty value of the decoding path corresponding to the information bit position before t, the penalty value of the decoding path corresponding to the information bit position after t. As shown in the following formulas (8)-(9), it can be deduced that: at the last frozen bit u t retain a decoding path with the smallest PM value to continue decoding, and delete the remaining redundant paths. In other words, at the subsequent information bit u t+1 only calculate the LLR value and make a decision, without performing path extension and path pruning:

[0084]

[0085] where

[0086] then if and only if holds for all t + 1 ≤ j < N, take the equal sign. At the last frozen bit u t take the path with the smallest penalty path as follows

[0087]

[0088] In Formula (9), it holds when the decision results of all information bits after t are consistent with the LLR values. From the above proof, it can be seen that during decoding, the path expansion for the information bits after t is the expansion of redundant paths. Considering that the expansion of redundant paths does not improve the decoding performance but instead increases the complexity, it is necessary to delete such redundant paths from the path expansion set composed of multiple candidate decoding paths.

[0089] Set the bit information bit length of the first encoded data (such as the encoded bit sequence ) to be K, the code length to be N, the maximum number of decoding paths to be L. After receiving the first encoded data, decode this first encoded data, which can be decoded (or decoded) on the baseband chip of the mobile phone. L is the threshold for the number of paths. Based on the above derivation process, when i > t, only the LLR value calculation and decision are performed at the subsequent information bits, and no path expansion and path pruning are carried out. When i ≤ t, not only the LLR value calculation and decision are required, but also path expansion and path pruning are needed. Among them, for path pruning, compare the number of paths obtained by path expansion with the threshold L of the number of paths, and path pruning is only carried out when the number of paths > L. As Figure 4 shown in the decoding method, it includes the following steps:

[0090] Step 1: The decoding end determines the index of the last frozen bit in the encoded bit sequence according to the known set of frozen bits, denoted as t, that is, determine t such that t ≥ j holds for any j

[0091] Step 2: Starting from u 0 , calculate the PM value of the decoding path for u i in sequence, and save the PM value and bit decision result of each path for subsequent calculations. If , then calculate the PM value of u i according to Formulas (5) and (7); if , then calculate the PM value of u i according to Formulas (5) and (6). When i ≥ log 2 (L) + 1, there are a total of 2L decoding paths, and at this time, enter Step 3.

[0092] Step 3: Ascendingly sort the PM values of the 2L paths, such as , retain the L paths with the smallest PM values, and delete the remaining L paths.

[0093] Step 4: For the bits greater than log 2 (L) + 1, continue to calculate the PM values of the decoding paths in sequence, repeat Step 2 and Step 3, and enter Step 5 when i = t.

[0094] Step 5: For the PM values of 2L paths, such as perform ascending sorting, retain 1 path with the smallest PM value, and delete the remaining 2L - 1 paths.

[0095] Step 6: Perform a decision on the information bit u i , 0 ≤ i ≤ t, as shown in formula (10), to perform bit decision corresponding to the information bit position before t:

[0096]

[0097] Step 7: For the information bit u i , t < i < N, calculate its LLR value according to formula (5), and perform a decision as shown in formula (11) to perform bit decision corresponding to the information bit position after t:

[0098]

[0099] Step 8: Obtain the final decoding result as 0 ≤ i ≤ t, t < j < N, and the decoding ends.

[0100] The schematic diagram of the decoding path obtained based on the above decoding method is as shown in Figure 5 . Figure 5 Among them, t = 1, that is, the frozen bit is u 1 . Figure 5 Each layer in represents 1 bit, and path expansion is performed at the node corresponding to the coding node tree at each bit position (for example, one possibility of path expansion is 0, and another possibility is the absolute value of the LLR, and the absolute value of the LLR can be set to 1 or other values), obtaining a set of path expansions composed of multiple candidate decoding paths. Among the multiple candidate decoding paths, the paths marked as thin solid lines (such as path 501, path 502, path 505, path 507, path 508, path 509) are the retained paths, and the paths marked as dashed lines (such as path 503, path 504, path 506) are the pruned paths, and the number on each node represents the PM value of that path. When decoding to the u 1 position, the PM values are 0.35 and 0.21 respectively. Select the path with the smallest penalty value as the target decoding path. Therefore, select the path with a PM value of 0.21 as the final decoding result, that is: retain one decoding path with the smallest PM value at u 1 and continue decoding, delete the remaining redundant paths, and only calculate and make a decision on the LLR value at the subsequent information bits (such as u 2 , u 3 , u 4 ), without performing path expansion and path pruning until the decoding ends.

[0101] In summary, as can be seen from Equation (6), for information bits, among the two paths expanded by each node, the PM value of one of the paths must be the same as the PM value of the previous node, that is: if there are no frozen bits, then the PM value of the decoding path with the smallest final PM value must be equal to Therefore, taking the path expansion based on the SCL algorithm as an example, the path expansion performed after the last frozen bit can be regarded as redundant path expansion. In this application example, since the redundant path expansion of the redundant path is deleted, the computational complexity of the polar code decoding algorithm is significantly reduced, and the decoding speed of the polar code is accelerated.

[0102] As shown in Table 1, the decoding complexity reduction of this application example compared with the SCL algorithm is statistically analyzed under different CCEs (several CCEs can be aggregated into a PDCCH, and the number of CCEs aggregated into a PDCCH is the aggregation degree) and different decoding list lengths, and the decoding complexity of the polar code is significantly reduced.

[0103] 1CCE (108 bits) 2CCE (216 bits) 4CCE (432 bits) L＝4 32.15％ 32.15％ 32.15％ L＝8 37.5％ 37.5％ 37.5％

[0104] Table 1

[0105] As Figures 6 - 7 shown, the decoding performance of the polar code is simulated under different CCEs and different decoding list lengths respectively. Figure 6 The decoding simulation process in the case of 4 decoding paths is described exemplarily. Figure 7 The decoding simulation process in the case of 8 decoding paths is described exemplarily. It can be seen that: in the case of exactly the same performance as the SCL algorithm, this application example can reduce the decoding complexity by more than 30%. In other words, compared with the SCL algorithm, this application example does not cause performance loss while reducing the decoding complexity.

[0106] The application scenarios adopting this application example include, but are not limited to: decoding of control channels in the 5G enhanced mobile broadband (eMBB) scenario. In the future, when polar codes are adopted in more communication scenarios, fast decoding can be performed accordingly based on this principle. Since the paths expanded after the last frozen bit are redundant paths, the path expansion can be terminated in advance, and only the bit decision for fast decoding needs to be made according to the LLR value of the information bits.

[0107] It should be noted that the above examples can be combined with various possibilities in the embodiments of the present application, which will not be elaborated here.

[0108] According to an embodiment of the present application, a chip is provided. Figure 8 It is a schematic diagram of the composition structure of the chip according to the embodiment of the present application, asFigure 8 As shown in the figure, the chip includes: a decoder 801, configured to receive first encoded data, decode the first encoded data to obtain multiple decoding paths, delete redundant paths from the multiple decoding paths to obtain target decoding paths, and obtain a target decoding result according to information bits corresponding to the target decoding paths.

[0109] As Figure 8 shown in the figure, the chip may further include: an encoder 802, configured to encode data to be transmitted to obtain second encoded data and transmit the second encoded data. The data to be transmitted includes voice data or media data.

[0110] In one example, the chip may be a baseband chip. The decoder in the baseband chip can be used to decode the first encoded data. In addition to decoding, encoding can also be performed through the baseband chip. Specifically, during transmission, voice or other data signals (such as media data) are encoded with polar codes to obtain the baseband code for transmission, that is, to synthesize the baseband signal to be transmitted. During reception, the received baseband code, that is, the received baseband signal, is decoded into voice or other data signals (such as media data), so as to mainly complete the communication processing function through the baseband chip.

[0111] In a possible implementation manner, the decoder 801 is configured to determine the path extended after the target frozen bit as the redundant path.

[0112] In a possible implementation manner, the target frozen bit includes any one of the following:

[0113] The last frozen bit carried in the first encoded data;

[0114] The frozen bit agreed upon in advance by the sending end and the receiving end, and the frozen bit agreed upon in advance is located in the first encoded data.

[0115] In a possible implementation manner, the decoder 801 is configured to decode to the target frozen bit in the first encoded data; perform path extension at the position corresponding to the target frozen bit in the node tree to obtain multiple candidate decoding paths corresponding to the target frozen bit.

[0116] In a possible implementation manner, the decoder 801 is configured to select the candidate decoding path with the smallest PM value from the multiple candidate decoding paths corresponding to the target frozen bit; and determine the candidate decoding path with the smallest PM value as the target decoding path.

[0117] In the technical solution of this application, the acquisition, storage, and application of the user's personal information involved all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0118] According to an embodiment of the present application, the present application also provides an electronic device, a readable storage medium, and a computer program product.

[0119] Figure 9 FIG. shows a schematic block diagram of an exemplary electronic device 900 that can be used to implement embodiments of the present application. The electronic device is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, personal digital assistants, cellular telephones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely exemplary and are not intended to limit the implementation of the present application described and / or claimed herein.

[0120] As Figure 9 shown, the electronic device 900 includes a computing unit 901 that can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 902 or a computer program loaded from a storage unit 908 into a random access memory (RAM) 903. In the RAM 903, various programs and data required for the operation of the electronic device 900 can also be stored. The computing unit 901, the ROM 902, and the RAM 903 are connected to each other via a bus 904. An input / output (I / O) interface 905 is also connected to the bus 904.

[0121] A plurality of components in the electronic device 900 are connected to the I / O interface 905, including: an input unit 906, such as a keyboard, a mouse, etc.; an output unit 907, such as various types of displays, speakers, etc.; a storage unit 908, such as a magnetic disk, an optical disk, etc.; and a communication unit 909, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 909 allows the electronic device 900 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0122] The computing unit 901 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 901 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 901 executes the various methods and processes described above, such as the decoding method. For example, in some embodiments, the decoding method can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 908. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 900 via the ROM 902 and / or the communication unit 909. When the computer program is loaded into the RAM 903 and executed by the computing unit 901, one or more steps of the decoding method described above can be executed. Alternatively, in other embodiments, the computing unit 901 can be configured to execute the decoding method in any other suitable way (e.g., by means of firmware).

[0123] Various embodiments of the systems and techniques described above in this document can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a dedicated or general-purpose programmable processor, that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0124] The program code for implementing the methods of the present application can be written in any combination of one or more programming languages. These program codes can be provided to the processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program codes can be executed entirely on the machine, partially on the machine, as an independent software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0125] In the context of this application, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0126] To provide for interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can also be used to provide for interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic, speech, or tactile input).

[0127] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0128] A computer system can include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, a server of a distributed system, or a server incorporating a blockchain.

[0129] It should be understood that the various forms of processes shown above can be used, with steps reordered, added or deleted. For example, the steps recited in this application can be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solution of this application can be achieved, and no limitations are imposed herein.

[0130] The above specific embodiments do not constitute a limitation on the protection scope of this application. Those skilled in the art should understand that various modifications, combinations, sub - combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application shall be included within the protection scope of this application.

Claims

1. A decoding method, characterized in that, the method includes: decoding first encoded data to obtain a first path expansion set including multiple candidate decoding paths; determining paths expanded after a target frozen bit as redundant paths; deleting the redundant paths from the first path expansion set to obtain a second path expansion set; determining a target decoding path according to multiple candidate decoding paths corresponding to the target frozen bit in the second path expansion set; obtaining a target decoding result according to the target decoding path; the target frozen bit includes any one of the following: the last frozen bit carried in the first encoded data; a frozen bit agreed upon in advance by a sending end and a receiving end, and the frozen bit agreed upon in advance is located in the first encoded data.

2. The method according to claim 1, characterized in that, further includes: decoding to the target frozen bit in the first encoded data; performing path expansion at a position corresponding to the target frozen bit in a node tree to obtain multiple candidate decoding paths corresponding to the target frozen bit.

3. The method according to claim 2, characterized in that, the determining the target decoding path according to multiple candidate decoding paths corresponding to the target frozen bit in the second path expansion set includes: selecting a candidate decoding path with the smallest path metric PM value among multiple candidate decoding paths corresponding to the target frozen bit; determining the candidate decoding path with the smallest PM value as the target decoding path.

4. A chip, characterized in that, includes a decoder for: receiving first encoded data; decoding the first encoded data to obtain multiple decoding paths; determining paths expanded after a target frozen bit as redundant paths; deleting the redundant paths from the multiple decoding paths to obtain a target decoding path; obtaining a target decoding result according to information bits corresponding to the target decoding path; the target frozen bit includes any one of the following: the last frozen bit carried in the first encoded data; a frozen bit agreed upon in advance by a sending end and a receiving end, and the frozen bit agreed upon in advance is located in the first encoded data.

5. The chip according to claim 4, characterized in that, the decoder is for: decoding to the target frozen bit in the first encoded data; performing path expansion at a position corresponding to the target frozen bit in a node tree to obtain multiple candidate decoding paths corresponding to the target frozen bit.

6. The chip according to claim 5, characterized in that, the decoder is for: selecting a candidate decoding path with the smallest path metric PM value among multiple candidate decoding paths corresponding to the target frozen bit; determining the candidate decoding path with the smallest PM value as the target decoding path.

7. The chip according to any one of claims 4-6, characterized in that, further includes an encoder for: encoding data to be transmitted to obtain second encoded data; transmitting the second encoded data; wherein, the data to be transmitted includes: voice data or media data.

8. An electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and when the instructions are executed by the at least one processor, the at least one processor is enabled to execute the method according to any one of claims 1-3.

9. A non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are for causing the computer to execute the method according to any one of claims 1-3.

10. A computer program product comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1-3.

Images