Imaging apparatus and imaging method

Abstract

Provided is an imaging device that enables high resolution while reducing power during light reception. The imaging device has: a plurality of pixels arranged in a matrix to receive reflected light from a region of interest, each of the pixels having a light-receiving element that outputs an electric signal in accordance with a charge stored in one of a first charge storage unit and a second charge storage unit based on the reflected light; and a control unit that performs switching control of the first charge storage unit and the second charge storage unit using mutually different switching frequencies for each pixel region of at least some pixel groups in a captured frame composed of the plurality of pixels.

Description

Technical Field

[0001] The technology according to the present disclosure (the present technology) relates to an imaging device and an imaging method for a distance measuring device. Background Art

[0002] As time-of-flight (ToF) type distance measuring devices that measure distance based on the time of flight of light, there are known direct ToF (dToF) type distance measuring devices, which measure the distance by directly measuring the time of flight of light using a pulse wave; and indirect ToF (iToF), which measures the distance by indirectly calculating the time of flight of light using the phase of modulated light.

[0003] In these iToF distance measurement devices, light is irradiated from a light source, a light receiving element receives light reflected by a target object, and a photoelectric conversion unit in the light receiving element performs photoelectric conversion. The charge generated by the photoelectric conversion unit is distributed to multiple charge accumulation units via multiple transfer transistors. The distance to the target object is then calculated based on a phase signal corresponding to the amount of charge accumulated in the multiple charge accumulation units (for example, see Patent Document 1).

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2009-8537 Summary of the Invention

[0007] Problems to be solved by the present invention

[0008] At the same time, the above-mentioned distance measuring device is also strongly required to improve the resolution. In connection with this improvement in resolution, the data read at one time increases.

[0009] In addition, since the charge accumulation region is switched at high speed for each pixel also with respect to the exposure period, the power when receiving light increases.

[0010] Furthermore, in the case where data of a part of the pixel area is required, or even in the case where highly accurate distance measurement information of only a part of the pixels is required, power increases because light reception of all pixels is performed under the same conditions.

[0011] The present disclosure has been devised in view of the above circumstances, and an object of the present disclosure is to provide an imaging device and an imaging method that allow reduction in power when receiving light even with increased resolution.

[0012] Solution to the problem

[0013] One aspect of the present disclosure is an imaging device including: a plurality of pixels arranged in a matrix manner and receiving reflected light from a target area, each of the plurality of pixels having a light receiving element that outputs an electrical signal based on charges accumulated in any one of a first charge accumulation section and a second charge accumulation section according to the reflected light; and a control section that performs switching control of the first charge accumulation section and the second charge accumulation section by switching frequencies for each pixel area constituted by a pixel group of at least a portion of an imaging frame formed by the plurality of pixels, the switching frequencies being different from each other.

[0014] Another aspect of the present disclosure is an imaging method, comprising: receiving reflected light from a target area by a plurality of pixels arranged in a matrix manner, each of the plurality of pixels having a light receiving element; and outputting an electrical signal based on charges accumulated in a first charge accumulation portion and a second charge accumulation portion according to the reflected light, the light receiving element including a first charge accumulation portion and a second charge accumulation portion; and performing switching control of the first charge accumulation portion and the second charge accumulation portion by switching frequencies of each pixel area composed of a pixel group of at least a portion of an imaging frame formed by the plurality of pixels, the switching frequencies being different from each other. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram showing an example of the configuration of a distance measurement device in the first embodiment of the present technology.

[0016] Figure 2 It is a block diagram showing details of the light receiving section of the distance measuring device in the first embodiment of the present technology.

[0017] Figure 3 This is a flowchart for explaining a distance measurement method by the distance measurement device in the first embodiment of the present technology.

[0018] Figure 4 1 and 2 are diagrams for explaining distance measurement processing during formation of an imaging frame by the distance measurement device in the first embodiment of the present technology.

[0019] Figure 5 It is a block diagram showing an example of a case where only data of an ROI region is output in the first embodiment of the present technology.

[0020] Figure 6 An equivalent circuit of a pixel according to the first embodiment of the present technology is shown.

[0021] Figure 7 This is a block diagram illustrating an example of a case where only data of an ROI region is output in the first modification example of the first embodiment of the present technology.

[0022] Figure 8 This is a block diagram illustrating an example of a case where only data of an ROI region is output in the second modification example of the first embodiment of the present technology.

[0023] Figure 9 : is a block diagram showing an example of a case where entire area data is output in the second embodiment of the present technology.

[0024] Figure 10 is a timing chart of the distance measurement method according to the second embodiment of the present technology.

[0025] Figure 11 is a block diagram showing an example of a TGA / TGB driver in the third embodiment of the present technology.

[0026] Figure 12 is a block diagram showing one example of a driver ON / OFF control circuit in the third embodiment of the present technology.

[0027] Figure 13 : is a block diagram showing an example of a light emission timing switching circuit in a fourth embodiment of the present technology.

[0028] Figure 14 : is a block diagram showing an example of a light emission timing switching circuit in a fifth embodiment of the present technology.

[0029] Figure 15 is a block diagram showing an example of the configuration of a distance measurement device in a sixth embodiment of the present technology. DETAILED DESCRIPTION

[0030] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the representations of the drawings cited in the following description, the same or similar parts are represented by the same or similar reference numerals, and repeated descriptions will be omitted. However, the drawings are schematic, and it should be noted that each relationship between thickness and plane size, each ratio of thickness of each device and each component, etc. are different from the actual ones. Therefore, the specific thickness and size should be determined by considering the following description. In addition, in the drawings, of course, parts of the relationship and ratio between sizes that are different from each other are included.

[0031] It should be noted that the effects described in this specification are merely illustrative and non-limiting, and other effects may exist.

[0032] <First embodiment>

[0033] <Configuration of Distance Measuring Device>

[0034] Figure 1This is a block diagram illustrating an example configuration of a distance measurement device 1A in the first embodiment of the present technology. Distance measurement device 1A is a distance measurement sensor in which light is emitted from a light-emitting element; light reflected from an object OBJ (target object or imaging subject) is photoelectrically converted by a photoelectric conversion unit; the charge generated by the photoelectric conversion unit is distributed to multiple charge accumulation units via multiple transfer transistors; and the distance to the object OBJ is measured based on the amount of charge accumulated in the multiple charge accumulation units.

[0035] As shown in the figure, the distance measuring device 1A includes, for example, a system control unit 10, a light emitting unit 20, a light emitting timing adjustment unit 30, a light receiving unit 40, and a distance measurement processing unit 50. Although these components can be configured as a system on a chip (SoC) as a whole, such as a CMOS LSI, some components, such as the light emitting unit 20 and the light receiving unit 40, can be configured as separate LSIs. The distance measuring device 1A operates according to an operating clock not shown. In addition, the distance measuring device 1A includes a communication interface unit 60 for outputting data (distance measurement data) related to the distance calculated by the distance measurement processing unit 50 to the outside. Although not shown, the distance measuring device 1A is configured to be operable to communicate with a host IC provided outside via the communication interface unit 60. It should be noted that the imaging device of the present technology is configured by at least the system control unit 10 and the light receiving unit 40.

[0036] The system control section 10 is a component that completely controls the operation of the distance measuring device 1A. Typically, the system control section 10 includes a microprocessor.

[0037] The light-emitting unit 20 emits light, such as infrared light (IR), toward a target area. The light-emission timing adjustment unit 30 is a circuit that adjusts the light-emission timing of the light-emitting unit 20. For example, the light-emission timing adjustment unit 30 outputs a trigger pulse that synchronizes the reading timing of each row from the light-receiving unit 40, which will be described later, and drives the light-emitting unit 20.

[0038] The light receiving unit 40 is a sensor that outputs an electrical signal that reacts to light incident from the target area. The incident light includes light reflected from the object OBJ. In the present disclosure, the light receiving unit 40 is a CMOS image sensor that is configured by a plurality of pixels arranged in a two-dimensional matrix and includes a plurality of light receiving elements. In the present disclosure, for example, under the control of the system control unit 10, a specific pixel group (for example, a pixel group in a single row direction in an imaging frame) is activated, thereby reading an electrical signal. In addition, the pixel groups of each row are activated sequentially within one frame time, and one imaging frame for the target area is formed by the electrical signals output from each activated pixel group.

[0039] The distance measurement processing unit 50 is a component that calculates the distance to the object OBJ based on the light emitted by the light emitting unit 20 and the observation light received by the light receiving unit 40. The distance measurement processing unit 50 is generally composed of a signal processor. In the present disclosure, the distance measurement processing unit 50 includes an analog-to-digital (AD) conversion unit 51 and a distance calculation circuit 52.

[0040] The AD conversion unit 51 converts the pixel signal from an analog signal into a digital signal based on the amount of charge output and accumulated from each pixel. The pixel signal of each pixel is output to the distance calculation circuit 52. Based on the pixel signal of each pixel, the distance calculation circuit 52 calculates the distance to the object OBJ. In the distance calculation circuit 52, a distance image can be obtained by calculating the distance relative to all pixels constituting the imaging frame. The distance calculation circuit 52 sequentially outputs data related to the distance calculated for the pixels in each imaging frame (distance measurement data) to the communication interface unit 60 and the region of interest (ROI) determination unit 80.

[0041] The communication interface unit 60 is an interface circuit for outputting the calculated distance measurement data to an external host IC. For example, the communication interface unit 60 is an interface circuit compliant with the Mobile Industry Processor Interface (MIPI), but the communication interface unit 60 is not limited thereto. For example, the communication interface unit 60 may be a serial peripheral interface (SPI), LVDS, SLVS-EC, etc., or may be equipped with any of these interface circuits.

[0042] Based on the calculated distance measurement data, the ROI region determination unit 80 determines a region of interest (ROI) including, for example, the object OBJ. This determination result is output to the system control unit 10. Based on the ROI region determination result by the ROI region determination unit 80, the system control unit 10 controls the pixel drive unit 70 and the pixel modulation unit 90A, which are provided in the light receiving unit 40, to perform switching control of the two charge accumulation units within each pixel by switching between the ROI region and the region other than the ROI region at different frequencies. It should be noted that when controlling the pixel drive unit 70, the system control unit 10 may use the V (vertical) control determination unit 100, which determines the skipped read region, etc.

[0043] <Configuration of Light Receiving Section>

[0044] Figure 2 As an example, one pixel 41 is shown among a plurality of pixels arranged in a two-dimensional matrix in the light receiving section 40. The pixel 41 has a photoelectric conversion element that photoelectrically converts received light and generates electric charge according to the amount of light.

[0045] The pixel driving section 70 is connected to the light receiving section 40 via the pixel driving line 43. The pixel driving section 70 drives all the pixels of the light receiving section 40 at the same time or drives the pixels of each row thereof, etc. The pixel signals output from the pixels in the pixel line (pixel row) selected and scanned by the pixel driving section 70 are subjected to pixel modulation processing by the pixel modulation section 90A, and each processed pixel signal is supplied to the AD conversion section 51 through each vertical signal line 44.

[0046] For each pixel row of the light receiving section 40 , the AD conversion section 51 converts each pixel signal output from each pixel unit of the selected line (selected row) from an analog signal to a digital signal through each vertical signal line 44 .

[0047] Here, in the case where charge is accumulated in the charge accumulation portion of the pixel 41 for a long period of time, although distance measurement information for a target object at a long distance or a target object with low reflectivity can be easily obtained, the charge accumulation portion is easily saturated. In contrast, in the case where charge is accumulated in the charge accumulation portion for a short period of time, the charge accumulation portion is hardly saturated due to reflected light from a target object at a short distance or a target object with high reflectivity.

[0048] <Distance measurement method>

[0049] Figure 3 This is a flowchart for explaining the distance measurement method of the distance measurement device 1A in the first embodiment of the present technology.

[0050] That is, when the distance measurement process starts, first, the distance measurement device 1A selects exposure ON / OFF for each pixel (step ST1a). Note that in this step ST1a, the operating frequency of each pixel, that is, each switching frequency of the charge accumulation section, can be selected.

[0051] Subsequently, the distance measuring device 1A performs exposure customized for the ON selected area (step ST1b), reads data in the exposure area, and calculates distance measurement data for pixels of, for example, one frame based on the read data (step ST1c).

[0052] The distance measurement device 1A then determines whether the processing is complete (step ST1d). If the processing is not complete (No), the ROI region determination unit 80 determines, based on the calculated distance measurement data, whether the object OBJ serving as the ROI exists and whether the position of the ROI has changed (step ST1e). For example, if a signal indicating the end of the processing is received from the outside, the end processing is terminated. If the position of the ROI has not changed (No), the distance measurement device 1A proceeds to the aforementioned processing in step ST1b. On the other hand, if the position of the object OBJ serving as the ROI has changed (Yes), the distance measurement device 1A controls the pixel modulation unit 90A to update the exposure ON / OFF range for the pixels corresponding to the object OBJ (step ST1f), and then proceeds to the aforementioned processing in step ST1a. Note that in step ST1f, the distance measurement device 1A can control the pixel modulation unit 90A and change the operating frequency in the pixels corresponding to the object OBJ, i.e., the switching frequency of the charge accumulation unit is changed to a high frequency. In addition, each of the triggers for changing the exposed ON area and changing the switching frequency of the charge accumulation section, in addition to the determination result of the ROI area determination section 80, may be image recognition using an external camera image or receiving a signal indicating the presence of the object OBJ from the outside. In this case, the switching frequency in the pixel area corresponding to the object OBJ is changed.

[0053] Furthermore, without changing the switching frequency of the pixel area by using a signal indicating the presence of the object OBJ, the area may be cut and divided in advance, and the frequency in the divided area may be determined and input.

[0054] Furthermore, returning to the above-described process of step ST1d, when it is determined that the process is to be completed (Yes), the distance measurement device 1A ends the process as it is.

[0055] As mentioned above, Figure 4 As shown, the distance measuring device 1A can appropriately change the switching frequency of the charge accumulation unit in the pixel according to the distance to the object OBJ previously measured by the pixels of the adjacent line. In particular, when the distance to the object OBJ is short as a result of the distance measurement, its switching frequency is changed to a high switching frequency so that the distance measurement can be performed with higher distance measurement accuracy. Therefore, for example, in a scene in front of the vehicle, with respect to nearby obstacles (e.g., other vehicles), by performing distance measurement with higher distance measurement accuracy, a collision can be avoided more accurately. On the other hand, when there are no obstacles (e.g., other vehicles) nearby, its switching frequency is changed to a low switching frequency, thereby further performing distance measurement with low distance measurement accuracy, or the switching frequency is switched to "zero", thereby allowing the driving voltage of the pixel and the calculation load of the processor to be reduced, and power consumption can be suppressed.

[0056] <Power reduction by exposure time>

[0057] Figure 5 This is a block diagram showing an example of a case where data is output only for the ROI region in the first embodiment of the present technology. Figure 5 In the example of FIG. 1 , the pixel modulation section 90A includes a TGA / TGB driver 91 and a driver ON / OFF control circuit 92. The TGA / TGB driver 91 is used to output transfer signals TGA and TGB for switching the charge accumulation section within the pixel 41. Under the control of the system control section 10, the driver ON / OFF control circuit 92 controls the TGA / TGB driver 91 so that the charge accumulation section within the pixel 41 is switched only for the ROI region (in the ROI region). Figure 5 , for example, frame 1, frame 2, and frame 3 are shown).

[0058] <Pixel Equivalent Circuit>

[0059] Figure 6 An equivalent circuit of the pixel 41 is shown.

[0060] The pixel 41 includes a photodiode 41a, a discharge transistor 41b, transfer transistors 41c and 41d, conversion efficiency adjustment transistors 41e and 41f, selection transistors 41g and 41h, amplification transistors 41i and 41j, and reset transistors 41k and 41l. The discharge transistor 41b, transfer transistors 41c and 41d, conversion efficiency adjustment transistors 41e and 41f, selection transistors 41g and 41h, amplification transistors 41i and 41j, and reset transistors 41k and 41l are configured by, for example, MOS transistors.

[0061] The photodiode 41a forms a photoelectric conversion unit that photoelectrically converts incident light. The anode of the photodiode 41a is grounded. The sources of the transfer transistors 41c and 41d and the source of the discharge transistor 41b are connected to the cathode of the photodiode 41a.

[0062] The power supply voltage VDDHPX is applied to the drain of the discharge transistor 41b. A discharge signal OFG is applied to the gate of the discharge transistor 41b via the discharge control line 45a. Based on the discharge signal OFG, the discharge transistor 41b releases the charge of the photodiode 41a. Note that the discharge transistor 41b may not be included.

[0063] The drains of the transfer transistors 41c and 41d are connected to the charge accumulation sections 41m and 41n, respectively, which are configured by floating diffusion regions (floating diffusions). Transfer signals TGA and TGB output from the TGA / TGB driver 91 are applied to the gates of the transfer transistors 41c and 41d via control lines 45b and 45c, respectively. Based on the transfer signals TGA and TGB, the transfer transistors 41c and 41d transfer charge from the photodiode 41a to the charge accumulation sections 41m and 41n, respectively.

[0064] The charge accumulation portions 41m and 41n accumulate charges transferred from the photodiode 41a via the transfer transistors 41c and 41d. The potentials of the charge accumulation portions 41m and 41n are modulated according to the amount of charges accumulated in the charge accumulation portions 41m and 41n.

[0065] The sources of the conversion efficiency adjustment transistors 41e and 41f are connected to the charge accumulation units 41m and 41n, respectively. The drains of the conversion efficiency adjustment transistors 41e and 41f are connected to the sources of the reset transistors 41k and 41l, respectively. A common conversion efficiency adjustment signal FDG is applied to the gates of the conversion efficiency adjustment transistors 41e and 41f via the conversion efficiency adjustment line 45d. Based on the conversion efficiency adjustment signal FDG, the conversion efficiency adjustment transistors 41e and 41f adjust the charge conversion efficiency. It should be noted that the conversion efficiency adjustment transistors 41e and 41f may also be excluded. In this case, the sources of the reset transistors 41k and 41l are connected to the charge accumulation units 41m and 41n, respectively.

[0066] The power supply potential VDDHPX is applied to the drains of the reset transistors 41k and 411. A reset signal RST is applied to the gates of the reset transistors 41k and 411 via a common reset control line 45e. Based on the reset signal RST, the reset transistors 41k and 411 initialize (reset) the charge accumulated in the charge accumulation sections 41m and 41n. Note that, instead of providing the charge accumulation sections 41m and 41n with individually connected reset transistors 41k and 411, a single reset transistor commonly connected to the charge accumulation sections 41m and 41n may be provided.

[0067] The gates of the amplifier transistors 41i and 41j are connected to the charge accumulation units 41m and 41n. The sources of the selection transistors 41g and 41h are connected to the drains of the amplifier transistors 41i and 41j. The amplifier transistors 41i and 41j amplify the potentials of the charge accumulation units 41m and 41n.

[0068] The drains of the selection transistors 41g and 41h are respectively connected to the vertical signal line 44. A selection signal SEL is applied to the gates of the selection transistors 41g and 41h via the pixel drive line 43. Based on the selection signal SEL, the selection transistors 41g and 41h select the pixel 41. When the pixel 41 is selected, pixel signals VSLA and VSLB corresponding to the potential amplified by the amplification transistors 41i and 41j are output via the vertical signal line 44.

[0069] During the charge accumulation time of pixel 41 in each frame, the reset transistors 41k and 41l are placed in a non-conducting state in order to apply an L (low) level as a reset signal RST to the gates of the reset transistors 41k and 41l. Furthermore, as transfer signals TGA and TGB, H and L levels are applied to the gates of the transfer transistors 41c and 41d in opposite phases. For example, the phase of the transfer signal TGA is the same as the phase of the light emission pattern of the light emitting section 20, and the phase of the transfer signal TGB is opposite to the phase of the light emission pattern of the light emitting section 20. The conduction state and the non-conducting state of the transfer transistors 41c and 41d are repeated in opposite phases, thereby distributing the charge to the charge accumulation sections 41m and 41n.

[0070] During the reading period, the transfer transistors 41c and 41d are turned off to apply the transfer signals TGA and TGB at the low level to the gates of the transfer transistors 41c and 41d. At this time, the select signal SEL is applied at the high level to the gates of the select transistors 41g and 41h. The select transistors 41g and 41h are turned on to read the charge amount in the charge accumulation units 41m and 41n and output pixel signals corresponding to the charge amount to the pixel. Figure 1 The distance measurement processing unit 50 is shown.

[0071] Return Reference Figure 5 In the case where the control lines 45b and 45c transmitting the signals TGA and TGB are common in the vertical direction (V direction), the driver ON / OFF control circuit 92 controls the TGA / TGB driver 91 so that only the ROI area (in the Figure 5 In the example of FIG. 1 , FIG. 2 , and FIG. 3 , the pixels 41 located in the V direction switch the transmission signals TGA and TGB. Therefore, the power consumption of the entire distance measurement device 1A can be suppressed.

[0072] <Modification of Power Reduction During Exposure Time>

[0073] Figure 7 This is a block diagram illustrating an example of a case where data is output only for an ROI region in the first modification example of the first embodiment of the present technology.

[0074] exist Figure 7In the example of FIG. 1 , the control lines 45b and 45c for transmitting the signals TGA and TGB are common in the horizontal direction (H direction). Even in this first modification, when the control lines 45b and 45c for transmitting the signals TGA and TGB are common in the H direction, the driver ON / OFF control circuit 92 controls the TGA / TGB driver 91 so that only the ROI region (in the Figure 7 In the example of FIG. 1 , FIG. 2 , and FIG. 3 , the pixels 41 located in the H direction switch the transmission signals TGA and TGB. Therefore, the power consumption of the entire distance measurement device 1A can be suppressed.

[0075] <Another Modification of Power Reduction During Exposure Time>

[0076] Figure 8 This is a block diagram illustrating an example of a case where data is output only for an ROI region in the second modification example of the first embodiment of the present technology.

[0077] exist Figure 8 In the example, the V-direction control lines 45b and 45c can be divided into multiple regions in units of multiple pixels in the V direction, thereby enabling ON / OFF switching of the transmission signals TGA and TGB in small regions. Alternatively, the H-direction control lines 45b and 45c can be divided.

[0078] <Operation and Effect of First Embodiment>

[0079] As described above, according to the first embodiment, the pixel modulation section 90A can make the switching frequency for switching the charge accumulation sections 41m and 41n different for each pixel region in the imaging frame. This allows, when a pixel region where high-speed distance measurement is desired is part of the imaging frame, to designate the pixel region where high-speed distance measurement is desired for a plurality of frames, namely, frame 1, frame 2, and frame 3, and to perform switching control of the charge accumulation sections 41m and 41n only for the region where reading is desired at a higher switching frequency than for the other regions, thereby enabling power reduction.

[0080] Furthermore, according to the above-described first embodiment, switching of the transfer signals TGA and TGB respectively supplied to the gates of the transfer transistors 41 c and 41 d is performed only in the ROI region where data is output, thereby allowing power consumption to be suppressed.

[0081] Furthermore, according to the above-described first embodiment, since the ROI region determination section 80 is provided in the distance measurement device 1A, switching control of the charge accumulation sections 41 m and 41 n can be performed for each pixel region of the imaging frame.

[0082] <Second embodiment>

[0083] Next, a second embodiment will be described. The second embodiment is a modification of the first embodiment, and will describe a case where data of the entire imaging frame is read.

[0084] Figure 9 : is a block diagram showing an example of a case where the entire region data is output in the second embodiment of the present technology. Figure 9 In the example shown in FIG. 1 , the pixel modulation section 90B includes a TGA / TGB driver 91 and a light emission timing switch circuit 93. Based on the ROI region information output from the system control section 10, the light emission timing switch circuit 93 controls the TGA / TGB driver 91 so as to perform switching of the charge accumulation sections 41m and 41n in the pixel 41 at high speed (e.g., 100 MHz) for the ROI region. Figure 9 , for example, Frame 1, Frame 2, and Frame 3 are shown), and switching of the charge accumulation portions 41m and 41n in the pixels 41 is performed at a low frequency (eg, 50 MHz) for regions other than the ROI region.

[0085] In the second embodiment, the emission timing adjustment section 30 generates emission timings of multiple frequencies and outputs the emission timings to the pixel modulation section 90B. The pixel modulation section 90B selects whether to use a pulse of the emission timing (frequency) based on the ROI region information output from the system control section 10.

[0086] Next, refer to Figure 10 , the distance measurement method according to the second embodiment will be described by focusing on the outside of the frame and the inside of the frame of the ROI.

[0087] The light emitting section 20 emits irradiation light ( modulated to repeat ON / OFF irradiation at a predetermined irradiation timing (eg, 100 MHz) Figure 10 (1)). In the photodiode 41a in the pixel 41, the reflected light is received, wherein the reception is delayed by a delay time (ΔT) according to the distance to the object OBJ ( Figure 10 (2)

[0088] During the charge accumulation time of the pixel 41 in each frame, the reset transistors 41k and 41l are in a non-conductive state because an L (low) level is applied to the gates of the reset transistors 41k and 41l as the reset signal RST. In addition, as the transmission signals TGA and TGB, an H level and an L level are applied to the gates of the transfer transistors 41c and 41d in reverse phases. For example, the phase of the transmission signal TGA is opposite to the light emission pattern ( Figure 10 (3)) and the phase of the transmission signal TGB is the same as the phase of the light emitting pattern ( Figure 10(4)) are opposite in phase. Each of the transfer transistors 41c and 41d repeats the conductive state and the non-conductive state at a switching frequency of, for example, 100 MHz, thereby distributing charges to the charge accumulation portions 41m and 41n.

[0089] During the reading period, the transfer transistors 41c and 41d are turned into a non-conductive state in order to apply the transfer signals TGA and TGB at an L level to the gates of the transfer transistors 41c and 41d. At this time, an H level is applied to the gates of the selection transistors 41g and 41h as the selection signal SEL. The selection transistors 41g and 41h are turned into a conductive state, and the charge amounts of the charge accumulation units 41m and 41n are read, and the pixel signal S11 corresponding to the charge amounts (in Figure 10 (3) and Figure 10 (4), the dotted area) is output to Figure 1 The distance measurement processing unit 50 is shown.

[0090] During the charge accumulation time in the pixel 41 outside each frame, the reset transistors 41k and 41l are turned into a non-conductive state in order to apply the L level as the reset signal RST to the gates of the reset transistors 41k and 41l. In addition, as the transmission signals TGA and TGB, the H level and the L level are repeated in opposite phases and applied to the gates of the transfer transistors 41c and 41d. For example, the phase of the transmission signal TGA is opposite to the light emission pattern ( Figure 10 (5)) and the phase of the transmission signal TGB is the same as the phase of the light emitting pattern ( Figure 10 (6)) are in opposite phases. Each of the transfer transistors 41c and 41d repeats the conductive state and the non-conductive state at a switching frequency of, for example, 50 MHz, thereby distributing charges to the charge accumulation portions 41m and 41n.

[0091] During the reading period, the transfer transistors 41c and 41d are turned off to apply the transfer signals TGA and TGB at the low level to the gates of the transfer transistors 41c and 41d. At this time, the high level is applied to the gates of the selection transistors 41g and 41h as the selection signal SEL. The selection transistors 41g and 41h are turned on, and the charge amounts of the charge accumulation units 41m and 41n are read, and the pixel signal S12 (in the pixel signal) corresponding to the charge amounts is output. Figure 10 (5) and Figure 10 (6), the dotted area) is output to Figure 1 The distance measurement processing unit 50 is shown.

[0092] <Operation and Effect of Second Embodiment>

[0093] As described above, according to the above-mentioned second embodiment, also in the pixel modulation part 90B, in the case of reading the data of the entire area of ​​the imaging frame, the speed of switching the transmission signals TGA and TGB is made variable for each area, and for the ROI area (frame 1, frame 2 and frame 3) where highly accurate information is desired, the transmission signals TGA and TGB are switched at high speed, and for the area (outside the frame) where the accuracy may be lower, the speed of switching the transmission signals TGA and TGB is reduced, thereby allowing the power of the distance measuring device 1A to be reduced as a whole.

[0094] <Third embodiment>

[0095] Next, a third embodiment will be described. The third embodiment is a modification of the first embodiment, and a specific configuration of a TGA / TGB driver 91 and a driver ON / OFF control circuit 92 will be described.

[0096] Figure 11 : is a block diagram showing one example of the TGA / TGB driver 91 in the third embodiment of the present technology.

[0097] exist Figure 11 In the embodiment, the TGA / TGB driver 91 includes, for example, a switch 911a, which switches the pixel 41 corresponding to the frame 2 (in Figure 11 is pixel A), which switches between a signal at a frequency of 1A (100 MHz) and a signal at a frequency of 2A (50 MHz); a driver 912a, which amplifies the signal output from switch 911a into a transmission signal TGA, and outputs the transmission signal TGA to the transmission transistor 41c; a switch 911b, which switches between a signal at a frequency of 1B (100 MHz) and a signal at a frequency of 2B (50 MHz) for pixel A; and a driver 912b, which amplifies the signal output from switch 911b into a transmission signal TGB, and outputs the transmission signal TGB to the transmission transistor 41d.

[0098] In addition, the TGA / TGB driver 91 includes, for example, for the pixel 41 corresponding to frame 1 (in Figure 11 , which is pixel C), a switch 913a that switches between a signal at a frequency of 1A (100 MHz) and a signal at a frequency of 2A (50 MHz); a driver 914a that amplifies the signal output from the switch 913a into a transmission signal TGA and outputs the transmission signal TGA to the transmission transistor 41c; a switch 913b that switches between a signal at a frequency of 1B (100 MHz) and a signal at a frequency of 2B (50 MHz) for pixel C; and a driver 914b that amplifies the signal output from the switch 913b into a transmission signal TGB and outputs the transmission signal TGB to the transmission transistor 41d.

[0099] In addition, the TGA / TGB driver 91 includes, for example, a switch 915a which switches the pixel 41 corresponding to the frame 3 (in Figure 11 : pixel B in the figure switches between a signal at a frequency of 1A (100 MHz) and a signal at a frequency of 2A (50 MHz); a driver 916a, which amplifies the signal output from switch 915a into a transmission signal TGA and outputs the transmission signal TGA to the transmission transistor 41c; a switch 915b, which switches between a signal at a frequency of 1B (100 MHz) and a signal at a frequency of 2B (50 MHz) for pixel C; and a driver 916b, which amplifies the signal output from switch 915b into a transmission signal TGB and outputs the transmission signal TGB to the transmission transistor 41d.

[0100] Although pixels A to C normally operate at frequency 1A and frequency 1B, when it is desired to measure the distance to only pixel B at high speed, the driver ON / OFF control circuit 92 switches the switch 911a for pixel A to the frequency 2A side, and switches the switch 911b for pixel A to the frequency 2B side. Then, the driver ON / OFF control circuit 92 switches the switch 913a for pixel C to the frequency 2A side, and switches its switch 913b to the frequency 2B side.

[0101] It should be noted that the driver ON / OFF control circuit 92 maintains a state in which the switch 915 a for the pixel B is switched to the frequency 1A side and the switch 915 b for the pixel B is switched to the frequency 1B side.

[0102] Figure 12 : is a block diagram showing an example of the driver ON / OFF control circuit 92. In order to prevent the signals of frequencies 1A, 1B, 2A and 2B from influencing each other, the driver ON / OFF control circuit 92 performs synchronization processing of frequencies 1A, 1B, 2A and 2B.

[0103] The reference clock signal generated from clock oscillator 921 is input to phase-locked loop (PLL) circuits 922 and 923. PLL circuit 922 performs PLL processing using the reference clock signal as a reference, thereby generating a signal of frequency 1A (100 MHz). Inverter 924 generates a signal of frequency 1B that is inverted from the frequency 1A signal.

[0104] The PLL circuit 923 performs PLL processing using the reference clock signal as a reference, thereby generating a signal of a frequency of 2A (50 MHz). The inverter 925 generates a signal of a frequency of 1B that is inverted from the frequency of the 2A signal.

[0105] <Functions and Effects of the Third Embodiment>

[0106] As described above, according to the above-described third embodiment, operations and effects similar to those in the above-described first embodiment can be obtained.

[0107] <Fourth embodiment>

[0108] Next, a fourth embodiment will be described. The fourth embodiment is a modification of the second embodiment, and another specific configuration of the lighting timing switch circuit 93 will be described.

[0109] Figure 13 9 is a block diagram showing an example of the light-emission timing switch circuit 93. A reference clock signal generated by a clock oscillator 931 is input to a PLL circuit 932. The PLL circuit 932 performs PLL processing based on the reference clock signal, thereby generating a signal at frequency 1A (100 MHz). An inverter 933 generates a signal at frequency 1B that is inverted from the frequency 1A signal.

[0110] On the other hand, the frequency divider 934 reduces the frequency of the frequency 1A signal to, for example, 1 / 2 and generates a frequency 2A (50 MHz) signal. The frequency divider 934 has a function as an inverter and generates and outputs an inverted frequency 2B signal from the frequency 2A (50 MHz) signal.

[0111] <Operation and Effect of Fourth Embodiment>

[0112] As described above, according to the fourth embodiment, operations and effects similar to those of the second embodiment can be obtained. Furthermore, according to the fourth embodiment, by simply changing the frequency division ratio of the frequency divider 934, the light emission timing switch circuit 93 can be realized with a simple circuit configuration compared to the case where another PLL circuit is provided. As described above, on the low-frequency side, the frequency divider 934 is used, thereby making it possible to capture images on the low-frequency side.

[0113] <Fifth embodiment>

[0114] Next, a fifth embodiment will be described. The fifth embodiment is a modification of the fourth embodiment, and another specific configuration of the lighting timing switch circuit 93 will be described.

[0115] Figure 14 FIG. 9 is a block diagram showing another example of the above-mentioned light-emission timing switch circuit 93. Figure 14 In the above Figure 13 The same components as those shown in FIG. 1 are denoted by the same reference numerals, and detailed descriptions thereof will be omitted.

[0116] The frequency divider 935 generates a signal of frequency 1A (100 MHz) by dividing the output of the PLL circuit 932. The frequency divider 935 also functions as an inverter and generates and outputs an inverted signal of frequency 1B from the signal of frequency 1A (100 MHz).

[0117] On the other hand, the frequency divider 936 reduces the frequency of the frequency 1A signal to, for example, 1 / 2, thereby generating a frequency 2A (50 MHz) signal. The frequency divider 936 functions as an inverter and generates and outputs an inverted frequency 2B signal from the frequency 2A (50 MHz) signal.

[0118] In the fifth embodiment, when generating a 100 MHz switching pulse from the clock of the PLL circuit 932 of, for example, 1 GHz, the frequency division ratio of the frequency divider 935 is changed to 1:9 to 5:5 to 9:1, thereby allowing the high / low period of the pulse to be changed.

[0119] It should be noted that, regarding the signal of the frequency 2A (50 MHz), the frequency division of the output of the PLL circuit 932 or the pulse subjected to the frequency division by the frequency divider 935 may be commonly performed.

[0120] <Operation and Effect of Fifth Embodiment>

[0121] As described above, according to the fifth embodiment, operations and effects similar to those in the second embodiment can be obtained. In addition, according to the fifth embodiment, by simply changing the frequency division ratio of the frequency divider 935, the high / low period of the pulse can be changed for the signals of the high-speed frequencies 1A and 1B.

[0122] <Sixth embodiment>

[0123] Next, the sixth embodiment will be described. This sixth embodiment discloses a distance measurement device 1B that includes a distance measurement processing unit 53 configured by eliminating the distance calculation circuit 52 from the distance measurement processing unit 50. This device also enables determination of an ROI region using an external host IC that has received the distance measurement data calculated by the distance measurement processing unit 53. The term "external host IC" here indicates that the external host IC is provided external to the distance measurement device 1B, as described in the first embodiment above as the SoC.

[0124] Figure 15: is a block diagram showing an example of the configuration of a distance measurement device 1B in a sixth embodiment of the present technology. As shown therein, the configuration of the distance measurement device 1B in the sixth embodiment differs from the configuration of the distance measurement device 1A in the first embodiment described above in that, based on the distance measurement data received from the distance measurement processing unit 53 via the communication interface unit 60, the host IC 2 performs processing by the distance calculation circuit 52 and determines the ROI area. Note that in Figure 15 , components having the same function and configuration as those already shown in the drawings are denoted by the same reference symbols, and description thereof is appropriately omitted.

[0125] As shown therein, in this embodiment, instead of the one provided in the distance measuring device 1A, Figure 1 The distance calculation circuit 52 shown in FIG. Figure 1 The ROI region determination unit 80 shown in FIG. , the distance calculation circuit 52, and the ROI region determination unit 80 are provided in the host IC 2. Although not shown, the host IC 2 includes a corresponding communication interface unit. As in the first embodiment described above, the distance calculation circuit of the host IC 2 receives distance measurement data from the distance measurement processing unit 53 via the communication interface unit 60 and calculates the distance to the object OBJ using this data. Based on the distance measurement data, the ROI region determination unit of the host IC 2 then determines the ROI region. The ROI region determination unit of the host IC 2 transmits the determination result to the system control unit 10 via the communication interface unit 60.

[0126] As an example, the host IC 2 may include a frame buffer (not shown) that can hold distance measurement data for one imaging frame. The ROI region determination section of the host IC 2 refers to the frame buffer and determines the ROI region for each readout line of a subsequent imaging frame.

[0127] <Operation and Effect of Sixth Embodiment>

[0128] As described above, the sixth embodiment can also exhibit similar operations and effects or advantages to those of the first embodiment. Furthermore, according to the third embodiment, since the distance calculation circuit and ROI region determination processing can be omitted in the distance measurement device 1B, complex processing can be performed. Specifically, during the formation of the current imaging frame, switching control of the charge accumulation units 41m and 41n can be performed based on the ROI region determination result.

[0129] <Other Implementation Methods>

[0130] Although the present technology has been described through the first to sixth embodiments as described above, the description and drawings constituting part of the present disclosure should not be construed as limiting the present technology. By understanding the spirit of the technical content disclosed by the above-mentioned embodiments, it will be apparent to those skilled in the art that various alternative embodiments, examples, and operating techniques may be included in the present technology. In addition, the structures disclosed in the first to sixth embodiments and the modified examples of the first to sixth embodiments can be appropriately combined to the extent that no inconsistency occurs. For example, the configurations disclosed in a plurality of different embodiments may be combined, or the configurations of a plurality of different modified examples of the same embodiment may be combined.

[0131] It should be noted that the present disclosure can have the configurations described below. (1)

[0133] An imaging device, comprising:

[0134] a plurality of pixels arranged in a matrix and receiving reflected light from a target area, each of the plurality of pixels having a light receiving element that outputs an electric signal based on charges accumulated in either one of the first charge accumulation portion and the second charge accumulation portion according to the reflected light; and

[0135] The control section performs switching control of the first and second charge accumulation sections by switching frequencies different from each other for each pixel region composed of a pixel group of at least a part of an imaging frame formed by the plurality of pixels. (2)

[0137] The imaging device according to (1), further comprising:

[0138] an analog / digital conversion unit that converts the electrical signal output for each pixel from an analog signal to a digital signal; and

[0139] The distance calculation unit calculates the distance to the region of interest in the imaging frame from the output of the analog / digital conversion unit. (3)

[0141] The imaging device according to (1), wherein

[0142] The light receiving element includes a first transfer transistor and a second transfer transistor that transfer the charge to the first charge accumulation portion and the second charge accumulation portion, and

[0143] The control section switches transfer signals supplied to gates of the first transfer transistor and the second transfer transistor based on a region of interest of the imaging frame. (4)

[0145] The imaging device according to (3), wherein

[0146] The control section switches the transfer signals supplied to the gates of the first and second transfer transistors in a region outside the region of interest at a speed lower than the speed at which the transfer signals supplied to the gates of the first and second transfer transistors are switched in the region of interest. (5)

[0148] The imaging device according to (2), further comprising:

[0149] A region of interest determining unit determines the region of interest according to the output of the distance calculating unit, wherein

[0150] The control section performs switching control of the first and second charge accumulation sections by switching frequencies different from each other between the region of interest and a region other than the region of interest based on a determination result of the region of interest by the region of interest determination section. (6)

[0152] The imaging device according to (1), wherein

[0153] The control section performs switching control of the first and second charge accumulation sections by switching frequencies different from each other between the region of interest and a region other than the region of interest based on a determination result of a region of interest of the imaging frame, the determination result being provided from an external device. (7)

[0155] An imaging method comprising:

[0156] receiving reflected light from a target area through a plurality of pixels arranged in a matrix, each of the plurality of pixels having a light receiving element, and outputting an electric signal based on charges accumulated in a first charge accumulation portion and a second charge accumulation portion according to the reflected light, the light receiving element including the first charge accumulation portion and the second charge accumulation portion; and

[0157] Switching control of the first and second charge accumulation sections is performed by switching frequencies for each pixel area composed of a pixel group of at least a portion of an imaging frame formed by the plurality of pixels, the switching frequencies being different from each other.

[0158] Reference Signs List

[0159] 1A, 1B distance measuring device

[0160] 2Host IC

[0161] 10System Control Unit

[0162] 20 light-emitting part

[0163] 30 light-emitting timing adjustment unit

[0164] 40 light receiving unit

[0165] 41 pixels

[0166] 41a photodiode

[0167] 41b discharge transistor

[0168] 41c, 41d pass transistors

[0169] 41e, 41f conversion efficiency adjustment transistor

[0170] 41g, 41h select transistor

[0171] 41i, 41j amplifier transistors

[0172] 41k, 41l reset transistors

[0173] 41m, 41n charge accumulation unit

[0174] 43 pixel drive lines

[0175] 44 vertical signal lines

[0176] 45a discharge control line

[0177] 45b, 45c control lines

[0178] 45d conversion efficiency adjustment line

[0179] 45e reset control line

[0180] 50, 53 distance measurement processing unit

[0181] 51AD conversion unit

[0182] 52 distance calculation circuit

[0183] 60 Communication Interface Department

[0184] 70 pixel driver

[0185] 80ROI Area Determination Department

[0186] 90A, 90B pixel modulation unit

[0187] 91TGA / TGB driver

[0188] 92 driver ON / OFF control circuit

[0189] 93 luminous timing switch circuit

[0190] 100V (vertical) control determination unit

[0191] 911a, 911b, 913a, 913b, 915a, 915b switches

[0192] 912a, 912b, 914a, 914b, 916a, 916b drivers

[0193] 921, 931 clock oscillators

[0194] 922, 923, 932 PLL circuits

[0195] 924, 925, 933 inverters

[0196] 934, 935, 936 crossovers.

Claims

1. An imaging device comprising: a plurality of pixels arranged in a matrix and receiving reflected light from a target area, each of the plurality of pixels having a light receiving element that outputs an electric signal based on charges accumulated in either the first charge accumulation portion or the second charge accumulation portion according to the reflected light; as well as a control section that performs switching control of the first and second charge accumulation sections by switching frequencies for each pixel region constituted by a pixel group of at least a portion of an imaging frame formed by the plurality of pixels, the switching frequencies being different from each other, wherein, based on a determination result of a region of interest of the imaging frame, the control section performs switching control of the first charge accumulation section and the second charge accumulation section by switching frequencies different from each other between the region of interest and a region other than the region of interest, the determination result being provided from an external device.

2. The imaging device according to claim 1, further comprising: an analog / digital conversion unit that converts the electrical signal output for each pixel from an analog signal to a digital signal; as well as The distance calculation unit calculates the distance to the region of interest in the imaging frame from the output of the analog / digital conversion unit.

3. The imaging device according to claim 1, wherein The light receiving element includes a first transfer transistor and a second transfer transistor that transfer the charge to the first charge accumulation portion and the second charge accumulation portion, and The control section switches transfer signals supplied to gates of the first transfer transistor and the second transfer transistor based on a region of interest of the imaging frame.

4. The imaging device according to claim 3, wherein The control section switches the transfer signals supplied to the gates of the first and second transfer transistors in a region outside the region of interest at a speed lower than the speed at which the transfer signals supplied to the gates of the first and second transfer transistors are switched in the region of interest.

5. The imaging device according to claim 2, further comprising A region of interest determining unit is configured to determine the region of interest based on the output of the distance calculating unit, wherein The control section further performs switching control of the first and second charge accumulation sections by switching frequencies different from each other between the region of interest and a region other than the region of interest based on a determination result of the region of interest by the region of interest determination section.

6. An imaging method comprising: receiving reflected light from a target area by a plurality of pixels arranged in a matrix, each of the plurality of pixels having a light receiving element, and outputting an electrical signal based on charges accumulated in a first charge accumulation portion and a second charge accumulation portion according to the reflected light, the light receiving element including the first charge accumulation portion and the second charge accumulation portion; as well as performing switching control of the first and second charge accumulation sections by switching frequencies for each pixel region, each pixel region being composed of a pixel group of at least a portion of an imaging frame formed by the plurality of pixels, the switching frequencies being different from each other, wherein, based on a determination result of a region of interest of the imaging frame provided from an external device, switching control of the first and second charge accumulation sections is performed by switching frequencies different from each other between the region of interest and a region other than the region of interest.

Images