Display module, control method thereof, and display device

Abstract

The embodiment of the present application provides a display module and a control method thereof, a display device, wherein the display module includes a display panel, a test control circuit, a test component, and a control component; the peripheral area of ​​the display panel includes a gate drive circuit; the test control circuit is connected to the gate drive circuit; the test control circuit includes a plurality of switch modules, the test component includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence; the control component is connected to the first input pin component and is used to control the test control circuit to be turned off based on a second control signal from the control component in a non-array test situation, so that the gate drive circuit and the test component are disconnected. By adopting the present application, it is possible to avoid the occurrence of a high and low level voltage difference between the test pads in the test component, thereby improving the problem of test pad corrosion and avoiding the occurrence of bright lines on the display panel to a certain extent.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a display module, a control method thereof, and a display device. Background Art

[0002] In existing COP (Chip On Pi) packaged OLED (organic light-emitting diode) display modules, the array test (AT) circuit is often placed below the display control IC (chip). This means the display module's display panel and array test circuit are located on the same plane, with the display control IC and array test circuit stacked, meaning the display control IC covers the array test circuit. The array test circuit also includes an array test pad (AT pad).

[0003] In the prior art, when the AT Pad is in the module state, that is, after bonding to the display control IC, the AT Pad receives the signal output by the display control IC through the display panel, resulting in a high-level and low-level voltage difference between the AT Pads. Furthermore, due to residual etching gas, electrochemical corrosion is prone to occur at the AT Pad, causing the AT Pad film layer at that location to increase and easily peeling. The peeling extends to the display control IC bonding pad (i.e., IC output pin), resulting in the data signal output by the display control IC at the corresponding location not being transmitted to the display panel, thereby causing bright lines to appear at the corresponding location of the display panel. Summary of the Invention

[0004] In response to the shortcomings of existing methods, this application proposes a display module, a control method thereof, and a display device to solve the technical problems existing in the prior art, that is, when in the module state, there is a high and low level voltage difference between the AT Pads, and due to the residual etching gas, electrochemical corrosion is easily caused at the AT Pad, resulting in X-line bright lines at the corresponding position of the display panel.

[0005] In a first aspect, an embodiment of the present application provides a display module, including a display panel, a test control circuit, a test component, and a control component;

[0006] The peripheral area of ​​the display panel includes a gate drive circuit; the test control circuit is connected to the gate drive circuit;

[0007] The test control circuit includes a plurality of switch modules, the test assembly includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence;

[0008] The control component is connected to the test control circuit and is used to control the test control circuit to be turned on based on a first control signal externally provided to the control component in the case of array testing, so that the gate drive circuit and the test component are connected; and is used to control the test control circuit to be turned off based on a second control signal externally provided to the control component in the case of non-array testing, so that the gate drive circuit and the test component are disconnected.

[0009] In a possible implementation, the device further includes a first input pin component;

[0010] The first input pin component is connected to the control component and is used to output a second control signal to the control component in a non-array test situation to control the test control circuit to turn off, so that the gate drive circuit is disconnected from the test component;

[0011] The first input pin assembly includes at least one input pin pad;

[0012] At least one control pad is connected to at least one input pin pad in a one-to-one correspondence;

[0013] The control pad is connected to the control terminal of the switch module.

[0014] In one possible implementation, the switch module includes a P-type transistor; the control component includes a first control pad; the first input pin component includes a first input pin pad, and the first input pin pad receives a first level signal;

[0015] The first control pad is connected to the control electrode of the P-type transistor and the first input pin pad respectively.

[0016] In one possible implementation, the switch module includes an N-type transistor; the control component includes a second control pad; the first input pin component includes a second input pin pad, and the second input pin pad receives a second level signal;

[0017] The second control pad is connected to the control electrode of the N-type transistor and the second input pin pad respectively.

[0018] In a possible implementation, the switch module includes a logic gate circuit; the control component includes a first control pad and a second control pad; the first input pin component includes a first input pin pad and a second input pin pad;

[0019] The first control pad and the second control pad are both connected to the logic gate circuit;

[0020] The first control pad is connected to the first input pin pad, and the second control pad is connected to the second input pin pad.

[0021] In one possible implementation, the logic gate circuit includes a logic AND circuit; the first input pin pad receives a first level signal, and the second input pin pad receives a second level signal; or, the first input pin pad receives a second level signal, and the second input pin pad receives a first level signal; the first level signal is greater than the second level signal.

[0022] In a possible implementation, the device further includes a second input pin assembly; the second input pin assembly includes a plurality of third input pin pads; the third input pin pads receive a third level signal;

[0023] The plurality of test pads are connected to the plurality of third input pin pads in a one-to-one correspondence.

[0024] In a possible implementation, the display area of ​​the display panel includes a plurality of pixel units arranged in an array, and the gate driving circuit is connected to the pixel units;

[0025] The pixel unit includes at least one light emitting device, and the light emitting device includes an OLED display device.

[0026] In a second aspect, an embodiment of the present application provides a display device, comprising the display module of the first aspect; the display module further comprises a display control chip;

[0027] The display control chip's orthographic projection on the display panel covers the test control circuit, the test component, and the control component.

[0028] In a third aspect, an embodiment of the present application provides a method for controlling a display module according to the first aspect, comprising:

[0029] In the case of array testing, based on a first control signal externally provided to the control component, the test control circuit is controlled to be turned on, so that the gate drive circuit and the test component are connected;

[0030] In a non-array test situation, based on a second control signal externally provided to the control component, the test control circuit is controlled to be turned off, so that the gate driving circuit is disconnected from the test component.

[0031] The beneficial technical effects brought about by the technical solutions provided in the embodiments of the present application include:

[0032] The display module provided in the embodiment of the present application adds a test control circuit and a control component, wherein the test control circuit is connected to the gate drive circuit; the test control circuit includes a plurality of switch modules, and the test component includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence; the control component is connected to the test control circuit, and in the array test state, based on a first control signal from the control component, controls the test control circuit to be turned on, thereby achieving conduction between the gate drive circuit and the test component; in the non-array test state, that is, after the display control chip is bonded (in the module state), based on a second control signal from the control component, controls the test control circuit to be turned off, thereby disconnecting the gate drive circuit from the test component, that is, disconnecting the display panel from the test component, and causing the plurality of test pads to be in a floating state in the module state, that is, the plurality of test pads (i.e., AT pads) do not receive GOA drive signal inputs from the display panel in the module state, thereby avoiding a high-low voltage difference between the AT pads, thereby improving the problem of AT pad corrosion and, to a certain extent, avoiding the occurrence of bright lines on the display panel.

[0033] Additional aspects and advantages of the present application will be given in part in the following description, which will become apparent from the following description, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0035] Figure 1 A schematic structural diagram of a display module provided in an embodiment of the present application;

[0036] Figure 2 A schematic structural diagram of another display module provided in an embodiment of the present application;

[0037] Figure 3 A schematic structural diagram of another display module provided in an embodiment of the present application;

[0038] Figure 4 A schematic structural diagram of another display module provided in an embodiment of the present application;

[0039] Figure 5 A schematic structural diagram of another display module provided in an embodiment of the present application;

[0040] Figure 6 A schematic structural diagram of another display module provided in an embodiment of the present application;

[0041] Figure 7 A schematic flow chart of a method for controlling a display module provided in an embodiment of the present application.

[0042] Reference numerals:

[0043] 10-display panel, 11-display area, 12-gate drive circuit;

[0044] 20 -test control circuit, 30 -test component, 40 -control component, 51 -first input pin component, 52 -second input pin component, 53 -third input pin component. DETAILED DESCRIPTION

[0045] The present application is described in detail below. Examples of embodiments of the present application are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar components or components having the same or similar functions. In addition, if the detailed description of the known technology is not necessary for the features of the present application shown, it will be omitted. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0046] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. It should also be understood that terms such as those defined in common dictionaries should be understood to have meanings consistent with their meanings in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0047] It will be understood by those skilled in the art that, unless expressly stated otherwise, the singular forms "a", "an", "said" and "the" used herein may also include the plural forms. It should be further understood that the term "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, "connected" or "coupled" as used herein may include wireless connections or wireless couplings. The term "and / or" used herein includes all or any units and all combinations of one or more associated listed items.

[0048] The inventors of this application have discovered through research that, after bonding the display control IC to the array test pad (AT Pad) of an existing display module, the display control IC outputs a GOA drive signal to the display panel. The AT Pad receives the GOA drive signal from the display control IC through the display panel, resulting in a high- and low-level voltage difference between the AT Pad. This makes the AT Pad susceptible to electrochemical corrosion, causing the AT Pad film layer at that location to increase and become prone to peeling. The peeling extends to the display control IC bonding pad (i.e., IC output pin), causing the data signal output by the display control IC at the corresponding location to be unable to be transmitted to the display panel, thereby causing X-line bright lines to appear at the corresponding location on the display panel.

[0049] Among them, X-line bright lines refer to the phenomenon that pixels controlled by one column of data display a higher grayscale image, while pixels controlled by other data display a lower grayscale image. This phenomenon is called X-line bright lines.

[0050] The present application provides a display module, a control method thereof, and a display device, which aim to solve the technical problem in the prior art that, in the module state, there is a voltage difference between high and low levels between the AT Pads, and due to residual etching gas, electrochemical corrosion is easily caused at the AT Pad, resulting in X-line bright lines at the corresponding position of the display panel.

[0051] The following describes in detail the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems with specific embodiments.

[0052] The embodiment of the present application provides a display module, such as Figure 1-3 As shown, the display module includes a display panel 10 , a test control circuit 20 , a test component 30 and a control component 40 .

[0053] The peripheral area of ​​the display panel 10 includes a gate drive circuit 12; the test control circuit 20 is connected to the gate drive circuit 12; the gate drive circuit 12 includes a plurality of cascaded GOA circuits, such as Figure 1 In GOA 1 to GOA n, GOA 1 represents the first-stage GOA circuit, GOA n represents the n-stage GOA circuit, and n is an integer not less than 1. The gate driving circuit 12 may be located on one side of the peripheral area of ​​the display panel 10 or on both sides of the peripheral area of ​​the display panel 10. This application does not limit this. For example, Figure 1-3In the embodiment, the gate driving circuit 12 is located on both sides of the peripheral area of ​​the display panel 10. The gate driving circuit 12 is connected to the arrayed pixel units in the display area 11 and is used to provide scanning signals to the arrayed pixel units in the display area 11.

[0054] The test control circuit 20 includes several switch modules (such as Figure 1-3 The test assembly 30 includes several test pads (such as Figure 1-3 AT1, AT2, ..., AT6), a number of switch modules and a number of test pads are connected one by one. Figure 1-3 AT1, AT2, ..., AT6 in the figure represent AT pad 1, AT pad 2, and AT pad 6, respectively.

[0055] The control component 40 is connected to the test control circuit 20 and is used to control the test control circuit 20 to be turned on based on a first control signal externally provided to the control component 40 in the case of array testing, so that the gate drive circuit 12 and the test component 30 are connected, and to control the test control circuit 20 to be turned off based on a second control signal externally provided to the control component 40 in the case of non-array testing, so that the gate drive circuit 12 and the test component 30 are disconnected.

[0056] The display module provided in the embodiment of the present application adds a test control circuit and a control component, wherein the test control circuit is connected to the gate drive circuit; the test control circuit includes a plurality of switch modules, and the test component includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence; the control component is connected to the test control circuit, and in the array test state, based on a first control signal from the control component, controls the test control circuit to be turned on, thereby achieving electrical conduction between the gate drive circuit and the test component; in the non-array test state, that is, after the display control chip is bonded (in the module state), based on a second control signal from the control component, controls the test control circuit to be turned off, thereby disconnecting the gate drive circuit from the test component, that is, disconnecting the display panel from the test component, and causing the plurality of test pads to be in a floating state in the module state, that is, the plurality of test pads (i.e., AT pads) do not receive GOA drive signal inputs from the display panel in the module state, thereby avoiding a high-low voltage difference between the AT pads, thereby improving the problem of AT pad corrosion and, to a certain extent, avoiding the occurrence of X-line bright lines on the display panel.

[0057] It should be noted that the display panel 10 provided in the embodiment of the present application is an OLED flexible display panel. For other types of display panels, such as LCD (Liquid Crystal Display), since LCD is a rigid display panel, the technical problem of peeling caused by increased film layer generally does not occur.

[0058] In some embodiments, a first input pin component 51 is further included. The first input pin component 51 is connected to the control component 40 and is used to output a second control signal to the control component 20 in a non-array test situation to control the test control circuit 20 to shut down, so that the gate drive circuit 12 and the test component 30 are disconnected.

[0059] The first control signal and the second control signal can be provided by an external power supply or by the first input pin assembly 51. Providing them through the first input pin assembly 51 eliminates the need for an external power supply, saves costs, and is simple, convenient, and easy to operate. Optionally, the display module also includes a third input pin assembly 53. It should be noted that both the first input pin assembly 51 and the third input pin assembly 53 are input pins of the display control IC (IC input PIN).

[0060] The input pin of the display control IC (IC Input PIN) is bonded to the display control IC and connected to the pad of the FPC (Flexible Printed Circuit) through FOP (FPC On Panel) technology. It is used to receive signals provided by the FPC and transmit the received signals to the display control IC.

[0061] The display module also includes an output pin (IC Output PIN) of the display control IC, which is bonded to the display control IC and connected to the display panel 10 (not shown in the figure) for receiving signals from the display control IC and transmitting the received signals to the display panel 10 so that the display panel 10 displays an image.

[0062] The input pin (IC Input PIN) of the display control IC and the output pin (IC Output PIN) of the display control IC are set on both sides of the test component 30 .

[0063] The display control IC is used to receive the signal from the FPC through the IC Input PIN, perform logic operations, and then output the signal to the display panel 10 through the IC Output PIN, so that the display panel 10 displays an image.

[0064] FOP (FPC on Panel) technology refers to the process of bonding an FPC to a flexible display panel. Bonding, also known as bonding or binding, involves thermally bonding the FPC to the display panel using anisotropic conductive film (ACF) under various conditions (temperature, pressure, and time). Bonding primarily involves two steps: ACF attachment and hot pressing.

[0065] In some embodiments, the control assembly 40 includes at least one control pad (e.g., Figure 1 ATSW), the first input pin component 51 includes at least one input pin pad (such as Figure 1 at least one control pad is connected to at least one input pin pad in a one-to-one correspondence; the control pad is connected to the control end of the switch module.

[0066] Optionally, the switch module may include an N-type transistor or a P-type transistor. In a specific implementation, each transistor may be a thin film transistor (TFT) or a metal oxide semiconductor field effect transistor (MOS), which is not limited here. In a specific implementation, the first electrode of these transistors may be the source electrode of the transistor, and the second electrode may be the drain electrode of the transistor, or the first stage of these transistors may be the drain electrode of the transistor, and the second stage may be the source electrode of the transistor. Depending on the type of transistor and the input signal, their functions are interchangeable and are not specifically distinguished here.

[0067] In a specific embodiment, Figure 1 As shown, the switch module includes a P-type transistor, which is a TFT transistor. The control component 40 includes a first control pad ATSW. The first input pin component 51 includes a first input pin pad VGH, which receives a first level signal, which is a high level signal.

[0068] The first control pad ATSW is connected to the control electrode of the P-type transistor and the first input pin pad VGH respectively. The first electrode of the P-type transistor is connected to the gate drive circuit 12, and the second electrode of the P-type transistor is connected to the test pad.

[0069] Specifically, first, the display panel is array tested. During the array test, since the first input pin pad is not bonded to the display control IC, the first input pin pad does not input a signal. The first control pad ATSW provides a low-level signal (the low-level signal may be less than the display panel VGL signal) through the array test probe. The test pad (such as Figure 1AT1, AT2, ..., AT6) provide a test signal (e.g., a GOA drive signal) through an array test probe to turn on all P-type transistors, thereby conducting between the gate drive circuit 12 and the test component 30, and transmitting the test signal (e.g., a GOA drive signal) to the display panel to implement array testing.

[0070] Next, the display control IC is bonded. After the display control IC is bonded, that is, in the case of non-array testing, since the first control pad ATSW is connected to the first input pin pad VGH of the display control IC, the first control pad ATSW receives a high-level signal from the first input pin pad VGH, turning off all P-type transistors, thereby disconnecting the gate drive circuit 12 from the test component 30. At this time, the AT pads ( Figure 1 AT1, AT2, ..., AT6) are all in a floating state, that is, several test pads (i.e., AT pads) have no GOA drive signal input from the display panel in the module state, avoiding the high and low voltage differences between the AT pads, thereby improving the problem of AT pad corrosion and avoiding the occurrence of X-line bright lines on the display panel to a certain extent.

[0071] In another specific embodiment, Figure 2 As shown, the switch module includes an N-type transistor, which is a TFT transistor. The control component 40 includes a second control pad ATSW. The first input pin component 51 includes a second input pin pad VGL, which receives a second level signal, which is a low level signal.

[0072] The second control pad ATSW is connected to the control electrode of the N-type transistor and the second input pin pad VGL respectively. The first electrode of the N-type transistor is connected to the gate drive circuit 12, and the second electrode of the N-type transistor is connected to the test pad.

[0073] Specifically, first, the display panel is subjected to an array test. During the array test, the second control pad ATSW provides a high level signal through the array test probe, and the test pad (such as Figure 1 AT1, AT2, ..., AT6) provide a test signal (e.g., a GOA drive signal) through an array test probe to turn on all N-type transistors, thereby conducting between the gate drive circuit 12 and the test component 30, and transmitting the test signal (e.g., a GOA drive signal) to the display panel to implement array testing.

[0074] Next, the display control IC is bonded. After the display control IC is bonded, that is, in the case of non-array testing, since the first control pad ATSW is connected to the first input pin pad VGL of the display control IC, the first control pad ATSW receives a low-level signal from the first input pin pad VGL, turning off all N-type transistors, thereby disconnecting the gate drive circuit 12 from the test component 30. At this time, the AT pads ( Figure 2 AT1, AT2, ..., AT6) are all in a floating state, that is, several test pads (i.e., AT pads) have no GOA drive signal input from the display panel in the module state, avoiding the high and low voltage differences between the AT pads, thereby improving the problem of AT pad corrosion and avoiding the occurrence of X-line bright lines on the display panel to a certain extent.

[0075] In another specific embodiment, Figure 3 As shown, the switch module includes a logic gate circuit; the logic gate circuit can be formed by CMOS (Complementary Metal Oxide Semiconductor) transistors. The control component 40 includes a first control pad ATSW1 and a second control pad ATSW2; the first input pin component 51 includes a first input pin pad VGH and a second input pin pad VGL;

[0076] The first control pad ATSW1 and the second control pad ATSW2 are both connected to the logic gate circuit;

[0077] The first control pad ATSW1 is connected to the first input pin pad VGH, and the second control pad ATSW2 is connected to the second input pin pad VGL.

[0078] Alternatively, as Figure 3 As shown, the logic gate circuit includes a logic AND circuit; the first input pin pad receives a first level signal, and the second input pin pad receives a second level signal; or, the first input pin pad receives a second level signal, and the second input pin pad receives a first level signal; the first level signal is greater than the second level signal.

[0079] Specifically, a first end of the logic AND circuit is connected to the gate driving circuit 12 , and a second end of the logic AND circuit is connected to the test pad.

[0080] Specifically, first, the display panel is array tested. During the array test, the first control pad ATSW1 and the second control pad ATSW2 provide high-level signals through the array test probe, and the test pads (such as Figure 1AT1, AT2, ..., AT6) provide a test signal (e.g., a GOA drive signal) through an array test probe to turn on all logic AND circuits, thereby conducting between the gate drive circuit 12 and the test component 30, and transmitting the test signal (e.g., a GOA drive signal) to the display panel to implement array testing.

[0081] Next, the display control IC is bonded. After the display control IC is bonded, that is, in the case of non-array testing, since the first control pad ATSW1 and the second control pad ATSW2 are connected to the first input pin pad VGH and the second input pin pad VGL of the display control IC, the first control pad ATSW1 receives a high-level signal from the first input pin pad VGH, and the second control pad ATSW2 receives a low-level signal from the second input pin pad VGL, so that all logic AND circuits are turned off, and the gate drive circuit 12 is disconnected from the test component 30. At this time, the AT pads ( Figure 3 AT1, AT2, ..., AT6) are all in a floating state, that is, several test pads (i.e., AT pads) have no GOA drive signal input from the display panel in the module state, avoiding the high and low voltage differences between the AT pads, thereby improving the problem of AT pad corrosion and avoiding the occurrence of X-line bright lines on the display panel to a certain extent.

[0082] In the above embodiment, the AT pads are in a floating state after the display control IC is bonded. If a ground signal exists on the display control IC, the AT pads can also be connected to the GND signal in a one-to-one correspondence so that the AT pads are grounded after the display control IC is bonded.

[0083] Alternatively, as Figure 4 、 Figure 5 and Figure 6 As shown, the display module further includes a second input pin assembly 52; the second input pin assembly 52 includes a plurality of third input pin pads GND; the third input pin pads GND receive a third level signal; the third level signal is a low level signal.

[0084] Several test pads (such as Figure 4 AT1, AT2, ..., AT6) are connected to a plurality of third input pin pads GND in a one-to-one correspondence.

[0085] It should be noted that each third input pin pad GND is independent. The second input pin components 52 are all input pins (IC Input PIN) of the display control IC.

[0086] Specifically, the display control IC bonding operation is performed. After the display control IC is bonded, that is, in the case of non-array testing, Figures 4 to 6 AT pad ( Figures 4 to 6 AT1, AT2, ..., AT6) are all connected to the third input pin pad GND. The AT pads all receive the third level signal from the third input pin pad GND, avoiding the high and low level voltage difference between the AT pads, thereby improving the problem of AT pad corrosion and avoiding the occurrence of X-line bright lines on the display panel to a certain extent.

[0087] In some embodiments, as Figures 1 to 6 As shown, the display area 11 of the display panel 10 includes a plurality of pixel units arranged in an array, and the gate driving circuit 12 is connected to the pixel units;

[0088] The pixel unit includes at least one light emitting device, and the light emitting device includes an OLED display device.

[0089] Based on the same inventive concept, an embodiment of the present application provides a display device, comprising a display module as provided in any of the above embodiments; the display module further comprises a display control chip;

[0090] The orthographic projection of the display control chip on the display panel 10 covers the test control circuit 20 , the test component 30 and the control component 40 .

[0091] The display module adopts COP (Chip On Pi) packaging.

[0092] The display device provided in the embodiment of the present application has the same inventive concept and the same beneficial effects as the previous embodiments. The contents not shown in detail in the display device can be referred to the previous embodiments and will not be repeated here.

[0093] Based on the same inventive concept, an embodiment of the present application provides a control method for a display module as provided in any of the above embodiments, such as Figure 7 As shown, the control method includes:

[0094] S1: In the case of array testing, based on a first control signal externally provided to the control component, the test control circuit is controlled to be turned on, so that the gate drive circuit and the test component are connected;

[0095] S2: In a non-array test situation, based on a second control signal externally provided to the control component, the test control circuit is controlled to be turned off, so that the gate drive circuit is disconnected from the test component.

[0096] The control method of the display module provided in the embodiment of the present application has the same inventive concept and the same beneficial effects as the previous embodiments. The contents not shown in detail in the control method of the display module can be referred to the previous embodiments and will not be repeated here.

[0097] By applying the embodiments of the present application, at least the following beneficial effects can be achieved:

[0098] The display module provided in the embodiment of the present application adds a test control circuit and a control component, wherein the test control circuit is connected to the gate drive circuit; the test control circuit includes a plurality of switch modules, and the test component includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence; the control component is connected to the test control circuit, and in the array test state, based on a first control signal from the control component, controls the test control circuit to be turned on, thereby achieving electrical conduction between the gate drive circuit and the test component; in the non-array test state, that is, after the display control chip is bonded (in the module state), based on a second control signal from the control component, controls the test control circuit to be turned off, thereby disconnecting the gate drive circuit from the test component, that is, disconnecting the display panel from the test component, and causing the plurality of test pads to be in a floating state in the module state, that is, the plurality of test pads (i.e., AT pads) do not receive GOA drive signal inputs from the display panel in the module state, thereby avoiding a high-low voltage difference between the AT pads, thereby improving the problem of AT pad corrosion and, to a certain extent, avoiding the occurrence of X-line bright lines on the display panel.

[0099] Those skilled in the art will appreciate that the steps, measures, and schemes in the various operations, methods, and processes discussed in this application may be interchanged, modified, combined, or deleted. Furthermore, other steps, measures, and schemes in the various operations, methods, and processes discussed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted. Furthermore, steps, measures, and schemes in the prior art that are similar to those disclosed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted.

[0100] In the description of this application, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0101] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. Throughout this application, unless otherwise specified, "plurality" means two or more.

[0102] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0103] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0104] It should be understood that although the steps in the flowcharts of the accompanying drawings are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the flowcharts of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0105] The above description is only part of the implementation methods of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A display module, characterized in that: including a display panel, a test control circuit, a test component and a control component; The peripheral area of ​​the display panel includes a gate driving circuit; the test control circuit is connected to the gate driving circuit; The test control circuit includes a plurality of switch modules, the test assembly includes a plurality of test pads, and the plurality of switch modules and the plurality of test pads are connected in a one-to-one correspondence; The control component is connected to the test control circuit and is used to control the test control circuit to be turned on based on a first control signal externally provided to the control component in an array test situation, so that the gate drive circuit and the test component are connected; and is used to control the test control circuit to be turned off based on a second control signal externally provided to the control component in a non-array test situation, so that the gate drive circuit and the test component are disconnected; the display module also includes a first input pin component, the first input pin component is an input pin of the display control IC, and the input pin of the display control IC is bound and connected to the display control IC; The first input pin component is connected to the control component and is used to output a second control signal to the control component in a non-array test situation to control the test control circuit to turn off, so that the gate drive circuit is disconnected from the test component; The control assembly includes at least one control pad, and the first input pin assembly includes at least one input pin pad; At least one control pad is connected to at least one input pin pad in a one-to-one correspondence; The control pad is connected to the control end of the switch module.

2. The display module according to claim 1, wherein: The switch module includes a P-type transistor; the control component includes a first control pad; the first input pin component includes a first input pin pad, and the first input pin pad receives a first level signal; The first control pad is connected to the control electrode of the P-type transistor and the first input pin pad respectively.

3. The display module according to claim 1, wherein: The switch module includes an N-type transistor; the control component includes a second control pad; the first input pin component includes a second input pin pad, and the second input pin pad receives a second level signal; The second control pad is connected to the control electrode of the N-type transistor and the second input pin pad respectively.

4. The display module according to claim 1, wherein: The switch module includes a logic gate circuit; the control component includes a first control pad and a second control pad; the first input pin component includes a first input pin pad and a second input pin pad; The first control pad and the second control pad are both connected to the logic gate circuit; The first control pad is connected to the first input pin pad, and the second control pad is connected to the second input pin pad.

5. The display module according to claim 4, wherein: The logic gate circuit includes a logic AND circuit; The first input pin pad receives a first level signal, and the second input pin pad receives a second level signal; Alternatively, the first input pin pad receives a second level signal, and the second input pin pad receives a first level signal; The first level signal is greater than the second level signal.

6. The display module according to any one of claims 2 to 5, wherein: Also includes a second input pin assembly; the second input pin assembly includes a plurality of third input pin pads; the third input pin pads receive a third level signal; The plurality of test pads are connected to the plurality of third input pin pads in a one-to-one correspondence.

7. The display module according to claim 1, wherein: The display area of ​​the display panel includes a plurality of pixel units arranged in an array, and the gate driving circuit is connected to the pixel units; The pixel unit includes at least one light emitting device, and the light emitting device includes an OLED display device.

8. A display device, characterized in that: Comprising the display module according to any one of claims 1 to 7; the display module further comprising a display control chip; The orthographic projection of the display control chip on the display panel covers the test control circuit, the test component and the control component.

9. A control method for a display module according to any one of claims 1 to 7, characterized in that: include: In the case of array testing, based on a first control signal externally provided to the control component, the test control circuit is controlled to be turned on, so that the gate drive circuit and the test component are electrically connected; In a non-array test situation, based on a second control signal externally provided to the control component, the test control circuit is controlled to be turned off, so that the gate driving circuit is disconnected from the test component.

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