A network switching device, a data flow processing control method and related devices

By introducing X86 processors and NP network processors into network switching devices, combined with the distribution capability of P4 programmable switching chips, the problem of insufficient session table entries of the P4 chip is solved, and high performance, low latency and flexible network switching functions are achieved.

CN115278396BActive Publication Date: 2025-06-06SHENYANG AEROSPACE ELECTRIC POWER EQUIP CO LTD
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Patent Information

Application Number
CN202210907102.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-29
Publication Date
2025-06-06
Estimated Expiration
2042-07-29

AI Technical Summary

Technical Problem

When P4 programmable chips deal with high bandwidth and large network traffic, insufficient session table entries lead to performance bottlenecks and it is difficult to support high-performance network switching functions.

Method used

The X86 processor and NP network processor were introduced, and the data packets were distributed to the corresponding processors for processing through the P4 programmable switching chip, solving the problem of insufficient session table entries, and building and managing session link pools through the NP network processor to improve processing efficiency.

Benefits of technology

It achieves a reduction in hardware costs, low latency and no packet loss, improves the performance and scalability of network switching equipment, and provides flexible management and convenient upgrade solutions.

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Abstract

The present invention discloses a network switching device, a data flow processing control method and related devices. The device includes: an external interface for connecting an external device; a P4 programmable switching chip connected to the external interface, for receiving and sending message data corresponding to the external device, identifying the message type of the message data, processing stateless messages, and sending control messages to an X86 processor, and sending stateful messages to an NP processor; an X86 processor for receiving and processing the control messages sent by the P4 programmable switching chip; and an NP network processor for receiving and processing the stateful messages sent by the P4 programmable switching chip. The network switching device proposed in the present application can solve the problem of insufficient session table entries of the P4 programmable chip, reduce hardware costs, have low latency and no packet loss, have strong expandability, flexible management and control, and are convenient to upgrade.
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Description

Technical Field

[0001] The present invention relates to the field of communications, and more specifically, to a network switching device, a data flow processing control method, and related devices. Background Art

[0002] With the development of cloud-network integration and 5G applications, users have more urgent demands for high bandwidth, low latency, and high speed. Gateway devices (three-layer switches, routers, firewalls, etc.), as traffic convergence points, can feel this pressure more deeply. Current devices have always adopted the CPU+DPDK mode. With the rapid development of the Internet, the disadvantages are becoming increasingly prominent. The performance of small packets of single devices is poor, and there is a bottleneck in the single core of the CPU. With the increase of converged services, the performance has declined significantly.

[0003] In such a complex background environment, the P4+Tofino chip programmable switch was born. As a new generation of gateway products, it has large bandwidth and high performance (single-machine bandwidth reaches several terabytes or even tens of terabytes), and small packet line-speed message forwarding. Compared with X86 servers, the single-core performance has been improved by nearly 100 times, and the overall performance has been improved by several times. In the programming of P4 programmable chips, the limitations of the chip design itself and the small amount of memory, whether SRAM or TCAM capacity, are not comparable to X86 servers. The memory capacity of a single SRAM pipeline is 10+MB, and these capacities are also scattered in different stages, which cannot be dynamically shared and cannot support ultra-large session entries. Summary of the invention

[0004] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0005] In a first aspect, the present invention provides a network switching device, comprising:

[0006] External interface, used to connect external devices;

[0007] P4 programmable switching chip, connected to the above external interface, used to send and receive message data corresponding to the above external device, identify the message type of the above message data, process stateless messages, and send control messages to the X86 processor and send stateful messages to the NP processor;

[0008] X86 processor, used for receiving and processing the above control message sent by P4 programmable switching chip;

[0009] The NP network processor is used to receive and process the above-mentioned stateful message sent by the P4 programmable switching chip.

[0010] Optionally, the capacity of the above external interface is 100G to 800G.

[0011] In a second aspect, the present application proposes a data flow processing control method, which is used in the network switching device proposed in the first aspect, and is characterized by comprising:

[0012] Control the P4 programmable chip to receive data messages sent by external devices connected to the external interface;

[0013] Instruct the P4 programmable chip to identify the message type of the data message;

[0014] The management of the above-mentioned P4 programmable chip sends the above-mentioned data message to the corresponding target processor for data processing based on the above-mentioned message type, wherein the above-mentioned target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the above-mentioned data message includes a control message, a stateless message and a stateful message.

[0015] Optionally, the management of the P4 programmable chip sending the data message to a corresponding target processor for data processing based on the message type includes:

[0016] In the case where the message type is the control message, managing the P4 programmable chip to send the control message to the X86 processor for data processing;

[0017] and / or,

[0018] In the case where the message type is the stateless message, managing the P4 programmable chip to perform data processing on the stateless message;

[0019] and / or,

[0020] In the case where the message type is the stateful message, the P4 programmable chip is managed to send the stateful message to the NP network processor for data processing.

[0021] Optionally, the above method further includes:

[0022] Control the NP network processor to search or build a session link based on the stateful message;

[0023] Instruct the NP network processor to perform data exchange with the external device through the P4 programmable chip according to the session link.

[0024] Optionally, the above method further includes:

[0025] Control the NP network processor to build a session link pool based on the session link;

[0026] The NP network connection processor is controlled to perform timeout management on the session connection pool.

[0027] Optionally, the above method further includes:

[0028] Control the NP network connection processor to obtain the flow information and weight information of each session connection;

[0029] Instruct the NP network connection processor to share the specific session connection whose flow information is less than the preset flow and whose weight information is greater than the preset weight with the X86 processor;

[0030] Manipulate the X86 processor to manage the specific session connection.

[0031] In a third aspect, the present invention further provides a data stream processing control device, comprising:

[0032] A control unit, used to control the P4 programmable chip to receive data messages sent by an external device connected to the external interface;

[0033] An indication unit, used to instruct the P4 programmable chip to identify the message type of the data message;

[0034] A management unit is used to manage the above-mentioned P4 programmable chip to send the above-mentioned data message to the corresponding target processor for data processing based on the above-mentioned message type, wherein the above-mentioned target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the above-mentioned data message includes a control message, a stateless message and a stateful message.

[0035] In a fourth aspect, an electronic device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is configured to implement the steps of the data flow processing control method of any one of the second aspects described above when executing the computer program stored in the memory.

[0036] In a fifth aspect, the present invention further proposes a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the data flow processing control method of any one of the above items in the second aspect is implemented.

[0037] In summary, the network switching device of the embodiment of the present application includes: an external interface for connecting an external device; a P4 programmable switching chip connected to the external interface, for receiving and sending message data corresponding to the external device, identifying the message type of the message data, processing stateless messages, and sending control messages to the X86 processor, and sending stateful messages to the NP processor; the X86 processor is used to receive and process the control messages sent by the P4 programmable switching chip; and the NP network processor is used to receive and process the stateful messages sent by the P4 programmable switching chip. The network switching device proposed in the present application includes an external interface, a P4 programmable switching chip, an X86 processor and an NP network processor, which is connected to an external device through an external interface. The P4 programmable switching chip can identify the type of data message of the external device and send the corresponding message to the corresponding processor for processing, which can solve the problem of insufficient session table entries of the P4 programmable chip, reduce hardware costs, have low latency and no packet loss, have strong expandability, flexible management and control, and convenient upgrades.

[0038] The network switching device of the present invention, other advantages, objectives and features of the present invention will be reflected in part through the following description, and in part will be understood by those skilled in the art through research and practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present specification. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0040] Figure 1 A schematic diagram of a network switching device architecture provided in an embodiment of the present application;

[0041] Figure 2 A schematic diagram of a data flow processing control method provided in an embodiment of the present application;

[0042] Figure 3 A schematic diagram of the structure of a data stream processing control device provided in an embodiment of the present application;

[0043] Figure 4 A schematic diagram of the structure of a data stream processing control electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0044] The network switching device proposed in the present application includes an external interface, a P4 programmable switching chip, an X86 processor and an NP network processor. The device is connected to an external device through an external interface. The P4 programmable switching chip can identify the type of data message of the external device and send the corresponding message to the corresponding processor for processing. The problem of insufficient session table items of the P4 programmable chip can be solved, the hardware cost is reduced, the latency is low and there is no packet loss, the expandability is strong, the management and control are flexible, and the upgrade is convenient.

[0045] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0046] See also Figure 1 , is a flow chart of a data stream processing control method provided in an embodiment of the present application,

[0047] In a first aspect, the present invention provides a data stream processing control method, comprising:

[0048] External interface 101, used for connecting external devices;

[0049] The P4 programmable switching chip 102 is connected to the external interface, and is used to send and receive message data corresponding to the external device, identify the message type of the message data, process stateless messages, and send control messages to the X86 processor and send stateful messages to the NP processor;

[0050] X86 processor 103, used for receiving and processing the control message sent by P4 programmable switching chip;

[0051] The NP network processor 104 is used to receive and process the stateful message sent by the P4 programmable switching chip.

[0052] Exemplarily, this application aims at the insufficient session table entries of P4 programmable chip, solves the drawbacks of large-traffic session storage, and introduces session expansion hardware NP network processor. This device architecture is simple to implement, powerful and low in complexity. The device includes an external interface, a P4 programmable switching chip, an X86 processor and an NP network processor. The P4 programmable switching chip carries message distribution, and external data messages are received via the physical port of the device. The chip forwards control messages such as BGP to the X86 processor according to the service type, and forwards stateful services such as network load balancing LB / NAT to the NP network processor chip to search and create a new session. P4 programmable implements stateless service processing such as QOS and EIP, and high-performance forwarding does not require the assistance of NP network processor chip. P4 programmable designs simple algorithm logic such as LB middle and back-end RS selection, NAT replacement of IP / PORT, etc., combined with NP network processor chip search and new session creation, to achieve consistency in service inflow and outflow processing. The P4 programmable chip defines the NP chip interaction message header format such as session_add and session_lookup, and processes the NP chip return message for subsequent service processing. The NP network processor performs session search and creation functions on the data plane according to the predefined message header, designs an efficient ultra-large session storage architecture, and has functions such as message-triggered session timeout reset and session timeout aging. It also provides complete monitoring and management capabilities on the X86 processor side, with session custom display, session timeout management, table usage statistics, forwarding and packet loss statistics, and chip health status functions. The X86 processor runs the operating system and provides complete configuration distribution and system management functions. The business processing method completed by the above new architecture has obvious advantages: hardware cost reduction, performance improvement, the whole machine can reach 800G or higher throughput, LB / NAT business capabilities are greatly improved, low latency and no packet loss. Network functions support QOS, EIP, LB, NAT and other functions, and have strong subsequent expansion space based on P4 programmability; large-capacity flow table storage, supporting up to 20 million session table item storage; flexible management and control, and convenient upgrade.

[0053] In summary, the network switching device proposed in this application includes an external interface, a P4 programmable switching chip, an X86 processor and an NP network processor. It is connected to an external device through an external interface. The P4 programmable switching chip can identify the type of data message of the external device and send the corresponding message to the corresponding processor for processing. It can solve the problem of insufficient session table entries of the P4 programmable chip, reduce hardware costs, have low latency and no packet loss, have strong expandability, flexible management and control, and convenient upgrades.

[0054] In some examples, the capacity of the external interface is 100G to 800G.

[0055] For example, in order to enable the switching device to perform large-capacity and fast network processing, the capacity of the external interface needs to be increased accordingly. The capacity of the external interface can be increased by 100G to 800G, and the throughput of the entire machine can reach 800G or higher. The LB / NAT service capabilities are greatly improved, with low latency and no packet loss.

[0056] In a second aspect, the present application proposes a data flow processing control method, which is used in the network switching device proposed in the first aspect, and is characterized by comprising:

[0057] S210, controlling the P4 programmable chip to receive a data message sent by an external device connected to the external interface;

[0058] Exemplarily, the entire P4 control process includes packet header parsing, programmable in-pipeline, configurable cache management TM, and programmable out-pipeline processing. The corresponding programming framework includes custom message headers, match-action table entry definitions, and the concatenation of full-pipeline control flows. It can be seen that the core feature of the P4 model is still high-speed switching based on network packet processing. It can realize the processing of Packet communication-related events, flexible matching, flexible editing, and small-capacity high-speed storage search. The programmable model of P4 is relative to the traditional fixed-pipeline switching chip. Its architecture is the PISA (Protocol Independent Switch Arch) full-pipeline programmable architecture. The P4 programmable chip receives data packets sent by external devices connected to the external interface. The P4 programmable capability has strong subsequent expansion space, which is convenient for later business expansion.

[0059] S220, instructing the P4 programmable chip to identify the message type of the data message;

[0060] Exemplarily, the message type of the received data message is quickly identified by the P4 programmable chip. An intelligent algorithm may be installed, or a message header comparison table may be predefined in the P4 programmable chip to identify the message type by looking up the table, wherein the data message type may include a control message, a stateless message, and a stateful message.

[0061] S230, managing the above-mentioned P4 programmable chip to send the above-mentioned data message to the corresponding target processor for data processing based on the above-mentioned message type, wherein the above-mentioned target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the above-mentioned data message includes a control message, a stateless message and a stateful message.

[0062] Exemplarily, after the P4 programmable chip identifies the message type of the data message, different types of messages are assigned to different processors for processing, where the processors include the P4 programmable chip, the X86 processor and the NP network processor. By utilizing the advantages of each processor in message processing, fast processing of message data can be achieved.

[0063] In summary, the data flow processing control method proposed in this application, the P4 programmable switching chip can identify the type of data message of the external device and send the corresponding message to the corresponding processor for processing, which can solve the problem of insufficient session table items of the P4 programmable chip, reduce hardware costs, have low latency and no packet loss, have strong expandability, flexible management and control, and convenient upgrades.

[0064] In some examples, the managing the P4 programmable chip sends the data message to the corresponding target processor for data processing based on the message type, including:

[0065] In the case where the message type is the control message, managing the P4 programmable chip to send the control message to the X86 processor for data processing;

[0066] and / or,

[0067] In the case where the message type is the stateless message, managing the P4 programmable chip to perform data processing on the stateless message;

[0068] and / or,

[0069] In the case where the message type is the stateful message, the P4 programmable chip is managed to send the stateful message to the NP network processor for data processing.

[0070] For example, when the data message is a control message, the control message is handed over to the X86 processor for processing through the P4 programmable chip. Since the control message has a higher level of importance, the X86 processor can process the control message by virtue of its own stability advantage, thereby ensuring the stability of the network switching device.

[0071] For stateless messages, that is, stateless services, the processing of a single request does not depend on other requests. In other words, all the information required to process a request is either included in the request or can be obtained from the outside (such as a database). The chip or server itself does not store any information. The stateless message is handed over to the P4 programmable chip for processing, and the fast processing speed can be used to achieve fast processing of stateless messages. At the same time, since stateless messages have no memory requirements, the defect of low memory of the P4 programmable chip can be overcome.

[0072] For stateful messages, a handshake is used to connect and the stateful messages are handed over to the NP network processor for processing. By establishing a session pool, the connected session is called to reduce the time spent on repeatedly establishing connections. The NP network processor data plane performs session search and creation functions, and designs an efficient ultra-large session storage architecture, which can effectively solve the problem of insufficient session table entries.

[0073] In summary, the data flow processing method provided in the embodiment of the present application can improve the stability of the control message by having the control message processed by the X86 processor, can realize fast processing of the stateless message by having the stateless message processed by the P4 programmable chip, and can effectively solve the problem of insufficient session table entries by having the stateful message processed by the NP processor.

[0074] In some examples, the method further includes:

[0075] Control the NP network processor to search or build a session link based on the stateful message;

[0076] Instruct the NP network processor to perform data exchange with the external device through the P4 programmable chip according to the session link.

[0077] Exemplarily, if there is a current session connection with a stateful message in the NP network processing, the historical session connection is called; if there is no historical session connection, a new session connection is constructed; after the session connection is established, data is interacted with the external device through the P4 programmable chip.

[0078] In some examples, the method further includes:

[0079] Control the NP network processor to build a session link pool based on the session link;

[0080] The NP network connection processor is controlled to perform timeout management on the session connection pool.

[0081] Exemplarily, a session connection pool is constructed by session connections established by an NP network processor. When there is the same network request, it is checked whether there is a matching session connection in the session pool. If so, the session connection is reused. If not, a new session connection is created. At the same time, the NP network connection processor also manages historical session connections in the session pool, clears historical session connections that have not been called for a long time, or deletes historical session connections that have not been called successfully, thereby freeing up memory in the NP network processing.

[0082] NP network processor devices are usually composed of several microcode processors and several hardware coprocessors. Multiple microcode processors are processed in parallel inside the network processor, and the processing flow is controlled by pre-programmed microcode. For some complex standard operations (such as memory operations, routing table lookup algorithms, QoS congestion control algorithms, traffic scheduling algorithms, etc.), hardware coprocessors are used to further improve processing performance, thereby achieving an organic combination of business flexibility and high performance.

[0083] In summary, the data stream processing method provided in the embodiment of the present application builds and manages a session pool through an NP network processor, manages historical session connections, promptly clears timed-out session connections, and releases the memory of the NP network connection processor.

[0084] In some examples, the method further includes:

[0085] Control the NP network connection processor to obtain the flow information and weight information of each session connection;

[0086] Instruct the NP network connection processor to share the specific session connection whose flow information is less than the preset flow and whose weight information is greater than the preset weight with the X86 processor;

[0087] Manipulate the X86 processor to manage the specific session connection.

[0088] Exemplarily, the NP network connection processor analyzes the flow information and weight information of the session connection. The weight information can be determined based on a lookup of a preset weight information table, and the flow information can be obtained based on real-time flow monitoring. Due to the flow limitation of the X86 processor, the present application preferentially uses the NP network connection processor to process stateful message data to meet large flow requirements, and then screens the flow information and weight information corresponding to the session connection, and shares the session connection with a weight greater than a preset weight and a flow information less than a preset weight, that is, a specific session connection with a relatively important weight but a small flow with the X86 processor, and manages the specific session connection using the stability of the X86 processor.

[0089] In summary, the data flow processing method provided in the embodiment of the present application can meet the large flow requirements of stateful message data through the NP network connection processor, and at the same time, the flow information and weight information of the session connection are screened through the NP network connection processor to select specific session connections with large weights but small flow, and the specific session connections are handed over to the X86 processor for management, thereby improving the stability of session connection management.

[0090] See also Figure 3 , an embodiment of the data stream processing control device in the embodiment of the present application may include:

[0091] A control unit 31, used to control the P4 programmable chip to receive data messages sent by an external device connected to the external interface;

[0092] An indication unit 32, used for indicating the P4 programmable chip to identify the message type of the data message;

[0093] The management unit 33 is used to manage the above-mentioned P4 programmable chip to send the above-mentioned data message to the corresponding target processor for data processing based on the above-mentioned message type, wherein the above-mentioned target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the above-mentioned data message includes a control message, a stateless message and a stateful message.

[0094] like Figure 4 As shown, an embodiment of the present application also provides an electronic device 300, including a memory 310, a processor 320, and a computer program 311 stored in the memory 320 and executable on the processor, and when the processor 320 executes the computer program 311, the steps of any of the above-mentioned data flow processing control methods are implemented.

[0095] Since the electronic device introduced in this embodiment is a device used to implement a data stream processing control device in the embodiment of the present application, based on the method introduced in the embodiment of the present application, the technical personnel in this field can understand the specific implementation of the electronic device of this embodiment and its various variations. Therefore, how the electronic device implements the method in the embodiment of the present application is not introduced in detail here. As long as the equipment used by the technical personnel in this field to implement the method in the embodiment of the present application is within the scope of protection of this application.

[0096] In a specific implementation process, when the computer program 311 is executed by a processor, any one of the methods shown in the second aspect can be executed.

[0097] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0098] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0099] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0100] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0101] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0102] The present application also provides a computer program product, which includes computer software instructions. When the computer software instructions are executed on a processing device, the processing device is caused to execute the following Figure 2 The process of data flow processing control in the corresponding embodiment.

[0103] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server, or data center. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or a data center that includes one or more available media integrated. Available media may be magnetic media, (e.g., floppy disk, hard disk, tape), optical media (e.g., DVD), or semiconductor media (e.g., solid state disk (SSD)), etc.

[0104] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0105] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0106] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0107] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0108] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.

[0109] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A data stream processing control method, It is characterized in that include: Control the P4 programmable chip to receive data messages sent by external devices connected to the external interface; Instructing the P4 programmable chip to identify the message type of the data message; Managing the P4 programmable chip to send the data message to the corresponding target processor for data processing based on the message type, wherein the target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the data message includes a control message, a stateless message and a stateful message; The managing the P4 programmable chip sends the data message to the corresponding target processor for data processing based on the message type, including: In the case where the message type is the control message, managing the P4 programmable chip to send the control message to the X86 processor for data processing; and / or, When the message type is the stateless message, managing the P4 programmable chip to perform data processing on the stateless message; and / or, In the case where the message type is the stateful message, managing the P4 programmable chip to send the stateful message to the NP network processor for data processing; The data stream processing control method further includes: Control the NP network processor to search for or build a session connection based on the stateful message; Instructing the NP network processor to perform data interaction with the external device through the P4 programmable chip according to the session connection; The data stream processing control method further includes: Controlling the NP network processor to build a session connection pool based on the session connection; Controlling the NP network processor to perform timeout management on the session connection pool; The data stream processing control method further includes: Controlling the NP network processor to obtain the flow information and weight information of each session connection; Instructing the NP network processor to share the specific session connection whose flow information is less than a preset flow and whose weight information is greater than a preset weight with the X86 processor; The X86 processor is manipulated to manage the specific session connection.

2. A network switching device, configured to execute the data flow processing control method according to claim 1, It is characterized in that include: External interface, used to connect external devices; A P4 programmable switching chip connected to the external interface, used to send and receive message data corresponding to the external device, identify the message type of the message data, process stateless messages, and send control messages to the X86 processor and send stateful messages to the NP processor; X86 processor, used for receiving and processing the control message sent by the P4 programmable switching chip; The NP network processor is used to receive and process the stateful message sent by the P4 programmable switching chip.

3. The network switching device according to claim 2, It is characterized in that The capacity of the external interface is 100G to 800G.

4. A data stream processing control device, It is characterized in that include: A control unit, used to control the P4 programmable chip to receive data messages sent by an external device connected to the external interface; An indication unit, used to instruct the P4 programmable chip to identify the message type of the data message; A management unit, used for managing the P4 programmable chip to send the data message to the corresponding target processor for data processing based on the message type, wherein the target processor includes a P4 programmable chip, an X86 processor and an NP network processor, and the data message includes a control message, a stateless message and a stateful message; The managing the P4 programmable chip sends the data message to the corresponding target processor for data processing based on the message type, including: In the case where the message type is the control message, managing the P4 programmable chip to send the control message to the X86 processor for data processing; and / or, When the message type is the stateless message, managing the P4 programmable chip to perform data processing on the stateless message; and / or, In the case where the message type is the stateful message, managing the P4 programmable chip to send the stateful message to the NP network processor for data processing; The data stream processing control method further includes: Control the NP network processor to search for or build a session connection based on the stateful message; Instructing the NP network processor to perform data interaction with the external device through the P4 programmable chip according to the session connection; The data stream processing control method further includes: Controlling the NP network processor to build a session connection pool based on the session connection; Controlling the NP network processor to perform timeout management on the session connection pool; The data stream processing control method further includes: Controlling the NP network processor to obtain the flow information and weight information of each session connection; Instructing the NP network processor to share the specific session connection whose flow information is less than a preset flow and whose weight information is greater than a preset weight with the X86 processor; The X86 processor is manipulated to manage the specific session connection.

5. An electronic device, include: A memory and a processor, wherein the processor is used to implement the steps of the data stream processing control method as claimed in claim 1 when executing a computer program stored in the memory.

6. A computer-readable storage medium having a computer program stored thereon, Features: When the computer program is executed by a processor, the data flow processing control method according to claim 1 is implemented.

Citation Information

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