A method and device for checking the correctness of server PCIE cable connection

Abstract

The present invention discloses a method and device for checking the correctness of PCIE cable connections on a server, and relates to the technical field of servers. The method is applied to a server, wherein a CPU and a BMC are provided on a mainboard of the server, a CPLD is provided on a backboard, the CPLD uses the same power supply as the BMC, an I2C interface of the BMC is connected to a connector on the mainboard via an I2C signal line, a connector number register is provided for each connector on the backboard within the CPLD, and the connectors on the backboard are connected to the I2C interface of the CPLD via an I2C signal line. The method comprises: after the server is powered on and the connector on the mainboard is connected to the connector on the backboard, the BMC reads the connector number register corresponding to the connector on the backboard connected to the connector on the mainboard; and based on the read value, determines whether the connection between the connector on the mainboard and the connector on the backboard is correct. The embodiment of the present invention can check the correctness of the PCIE cable connection in real time after the server is powered on, and immediately alarm when the cable is connected incorrectly.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a method and device for checking the correctness of PCIE cable connections on a server. Background Art

[0002] Currently, the PCIE signals between the Feiteng server motherboard and backplane are connected through cables, but the motherboard and backplane have the same multiple connectors, and it is impossible to determine whether the motherboard connector 1 is connected to the backplane connector 1, and whether the motherboard connector 2 is connected to the backplane connector 2.

[0003] For example, when the motherboard has n connectors and the backplane has n connectors, the correct connection method is as follows: Figure 1 As shown, the motherboard connector 0 is connected to the backplane connector 0, the motherboard connector 1 is connected to the backplane connector 1, and the motherboard connector n is connected to the backplane connector n. The incorrect connection method is as follows Figure 2 shown. Summary of the Invention

[0004] In view of this, an embodiment of the present invention provides a method and apparatus for checking the correctness of PCIE cable connections on a server, which can check the correctness of PCIE cable connections in real time.

[0005] In a first aspect, an embodiment of the present invention provides a method for checking the correctness of a PCIE cable connection of a server, which is applied to a server, wherein the server includes a mainboard and a backplane, the mainboard and the backplane are connected by at least two pairs of connectors, the connectors include PCIE bus signals and Sideband signals, the Sideband signals include I2C signals, a CPU and a BMC are provided on the mainboard, a CPLD is provided on the backplane, the CPU is connected to the connector on the mainboard via a PCIE signal line, the connector on the backplane is used to connect to a hard disk via a PCIE signal line, the CPLD uses the same power supply as the BMC, the I2C interface of the BMC is connected to the connector on the mainboard via I2C signal lines, the CPLD is provided with a connector number register for each connector on the backplane, and the connectors on the backplane are connected to the I2C interface of the CPLD via I2C signal lines. The method includes:

[0006] After the server is powered on and the connector on the mainboard is connected to the connector on the backplane, the BMC reads a connector number register corresponding to the connector on the backplane connected to the connector on the mainboard;

[0007] According to the read value, it is determined whether the connection between the connector on the mainboard and the connector on the backplane is correct.

[0008] In combination with the first aspect, in an implementation manner of the first aspect, determining whether the connection between the connector on the mainboard and the connector on the backplane is correct based on the read value includes:

[0009] If the read value is consistent with the preset value, the connection is correct;

[0010] And / or, if the read value is inconsistent with the preset value, the connection is wrong and an alarm prompt is given.

[0011] In combination with the first aspect, in another implementation of the first aspect, a slave address of the I2C interface of the connector on the backplane is the same as an offset address of a connector number register corresponding to the connector in the CPLD.

[0012] In combination with the first aspect, in another embodiment of the first aspect, the CPLD is provided with a hard disk slot register for indicating a hard disk slot for each connector on the backplane, and the method further includes:

[0013] After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk slot register to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

[0014] In combination with the first aspect, in another embodiment of the first aspect, the CPLD is provided with a hard disk presence register for each connector on the backplane, for indicating whether the hard disk is in place, and the hard disk presence register is written by the CPLD according to the hard disk connection status. The method further includes:

[0015] After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk presence register to obtain hard disk presence information.

[0016] In combination with the first aspect, in another implementation of the first aspect, the CPLD is provided with a lighting controller register for each connector on the backplane, and the method further includes:

[0017] After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC writes data into the lighting controller register, so that the CPLD controls the hard disk lighting according to the data in the lighting controller register.

[0018] In a second aspect, an embodiment of the present invention provides a server PCIE cable connection correctness check device, which is applied to a server, wherein the server includes a mainboard and a backplane, the mainboard and the backplane are connected by at least two pairs of connectors, the connectors include PCIE bus signals and Sideband signals, the Sideband signals include I2C signals, a CPU and a BMC are provided on the mainboard, a CPLD is provided on the backplane, the CPU is connected to the connector on the mainboard via a PCIE signal line, the connector on the backplane is used to connect to a hard disk via a PCIE signal line, the CPLD uses the same power supply as the BMC, the I2C interface of the BMC is connected to the connector on the mainboard via an I2C signal line, the CPLD has a connector number register for each connector on the backplane, and the connectors on the backplane are connected to the I2C interface of the CPLD via an I2C signal line. The device includes:

[0019] A first reading module is configured to read a connector number register corresponding to a connector on the backplane connected to the connector on the mainboard after the server is powered on and the connector on the mainboard is connected to the connector on the backplane;

[0020] The judgment module is used to judge whether the connection between the connector on the mainboard and the connector on the backplane is correct according to the read value.

[0021] In conjunction with the second aspect, in one implementation of the second aspect, the judgment module includes:

[0022] A first judgment unit is used to determine that the connection is correct if the read value is consistent with the preset value;

[0023] And / or, a second judgment unit is used to determine that the connection is wrong and give an alarm prompt if the read value is inconsistent with the preset value.

[0024] In combination with the second aspect, in another implementation of the second aspect, the slave address of the I2C interface of the connector on the backplane is the same as the offset address of the connector number register corresponding to the connector in the CPLD.

[0025] In combination with the second aspect, in another embodiment of the second aspect, the CPLD is provided with a hard disk slot register for indicating a hard disk slot for each connector on the backplane, and the device further includes:

[0026] The second reading module is used to read the hard disk slot register after the connector on the mainboard and the connector on the backplane are correctly connected to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

[0027] In combination with the second aspect, in another embodiment of the second aspect, the CPLD is provided with a hard disk presence register for each connector on the backplane, for indicating whether the hard disk is in place, and the hard disk presence register is written by the CPLD according to the hard disk connection status. The device further includes:

[0028] The third reading module is used to read the hard disk presence register after the connector on the mainboard and the connector on the backplane are correctly connected to obtain the hard disk presence information.

[0029] In combination with the second aspect, in another embodiment of the second aspect, the CPLD is provided with a lighting controller register for each connector on the backplane, and the device further includes:

[0030] The writing module is used to write data into the lighting controller register after the connector on the mainboard and the connector on the backplane are correctly connected, so that the CPLD controls the hard disk lighting according to the data in the lighting controller register.

[0031] The embodiment of the present invention provides a method and device for checking the correctness of a server PCIE cable connection. First, after the server is powered on and the connector on the mainboard is connected to the connector on the backplane, the BMC reads the connector number register corresponding to the connector on the backplane connected to the connector on the mainboard. Then, based on the read value, it is determined whether the connection between the connector on the mainboard and the connector on the backplane is correct. Since the BMC itself can work even when the server is powered on but not turned on, and the CPLD uses the same power supply as the BMC, the CPLD can also work even when the server is powered on but not turned on. Therefore, the embodiment of the present invention can check the correctness of the PCIE cable connection in real time after the server is powered on, and immediately alarm when the cable is connected incorrectly. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 A schematic diagram of the correct connection of the connector between the mainboard and backplane of a server in the prior art;

[0034] Figure 2 A schematic diagram of a connector misconnection between a mainboard and a backplane of a server in the prior art;

[0035] Figure 3Schematic diagram of the circuit connection structure of the mainboard and backplane of the server in the present invention;

[0036] Figure 4 This is a flow chart of an embodiment of a method for checking the correctness of a server PCIE cable connection according to the present invention;

[0037] Figure 5 This is a structural diagram of an embodiment of a device for checking the correctness of PCIE cable connections on a server according to the present invention. DETAILED DESCRIPTION

[0038] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the following detailed description is illustrative rather than restrictive and should not be used to limit the scope of protection of the present invention.

[0039] On the one hand, an embodiment of the present invention provides a method for checking the correctness of a PCIE cable connection of a server, which is applied to a server, such as Figure 3 As shown, the server includes a mainboard 1 and a backplane 2, which are connected by at least two pairs of connectors. The connectors include PCIE (peripheral component interconnect express) bus signals and sideband signals. The sideband signals include I2C signals (and may also include reset signals, etc.). The mainboard 1 is provided with a CPU (Central Processing Unit) and a BMC (Baseboard Management Controller), and the backplane 2 is provided with a CPLD (Complex Programmable Logic Device). The CPU is connected to the connector on the mainboard 1 via a PCIE signal line, and the connector on the backplane 2 is used to connect to a hard disk (such as an NVME hard disk) via a PCIE signal line.

[0040] The CPLD uses the same power supply as the BMC (not shown). The I2C interface of the BMC is connected to the connector on the mainboard 1 via I2C signal lines. The CPLD is provided with a connector number register for each connector on the backplane 2. The connectors on the backplane 2 are connected to the I2C interface of the CPLD via I2C signal lines.

[0041] like Figure 4 As shown, the method includes:

[0042] Step 101: After the server is powered on and the connector on the mainboard is connected to the connector on the backplane, the BMC reads the connector number register corresponding to the connector on the backplane connected to the connector on the mainboard;

[0043] Step 102: Based on the read value, determine whether the connection between the connector on the mainboard and the connector on the backplane is correct.

[0044] As an optional embodiment, judging whether the connection between the connector on the mainboard and the connector on the backplane is correct based on the read value (step 102) may include:

[0045] If the read value is consistent with the preset value, the connection is correct;

[0046] And / or, if the read value is inconsistent with the preset value, the connection is wrong and an alarm prompt is given.

[0047] In this way, when the backplane connector number register read by the I2C bus of each connector of motherboard 1 is consistent with the expected value, it indicates that the cable is connected correctly; when the backplane connector number register read by the I2C bus of a connector of motherboard 1 is inconsistent with the expected value, it indicates that the cable is connected incorrectly.

[0048] Figure 3 In the illustrated embodiment, the motherboard 1 and backplane 2 are each provided with two connectors (a total of two pairs) as an example, however, the number of connectors can be greater. After the connector on the motherboard 1 and the connector on the backplane 2 are connected via a cable, the BMC of the motherboard 1 is connected to different I2C interfaces of the CPLD of the backplane 2 via different connectors via different I2C interfaces; the CPLD is provided with a connector number register for each connector on the backplane 2, and different values ​​are pre-stored in the connector number register according to the different connector numbers. For example, the connector number register for backplane connector 0 is 0x00, and the connector number register for backplane connector 1 is 0x01. The I2C bus of each connector of the motherboard 1 is independent. After each connector of the motherboard 1 is connected to the backplane 2 via a cable, the connector number register value of the backplane 2 read by the I2C bus of each connector of the motherboard 1 is unique.

[0049] After power-on, the BMC on motherboard 1 accesses the connector number registers on backplane 2. If the value read by I2C0 (corresponding to motherboard connector 0 and backplane connector 0) on motherboard 1's BMC is 0x00, and the value read by I2C1 (corresponding to motherboard connector 1 and backplane connector 1) on motherboard 1's BMC is 0x01, the cable connection is correct. Conversely, if the value read by I2C0 on motherboard 1's BMC is a value other than 0x00, or the value read by I2C1 on motherboard 1's BMC is a value other than 0x01, the cable connection is incorrect, and an alarm prompt can be given in this case, such as an audible / visual alarm.

[0050] The method for checking the correctness of a server PCIE cable connection provided by an embodiment of the present invention first powers on the server and connects the connector on the mainboard to the connector on the backplane. The BMC then reads the connector number register corresponding to the connector on the backplane connected to the connector on the mainboard. Based on the read value, it is determined whether the connection between the connector on the mainboard and the connector on the backplane is correct. Since the BMC itself can operate even when the server is powered on but not turned on, and the CPLD uses the same power supply as the BMC, the CPLD can also operate even when the server is powered on but not turned on. Therefore, the embodiment of the present invention can check the correctness of the PCIE cable connection in real time after the server is powered on, and immediately issue an alarm if the cable is connected incorrectly.

[0051] Preferably, the slave address of the I2C interface of the connector on the backplane 2 is the same as the offset address of the connector number register corresponding to the connector in the CPLD, which makes it easier for the BMC of the mainboard 1 to read the value of the connector number register corresponding to the connector through the I2C signal line.

[0052] In the embodiment of the present invention, the connector can be of various types, specifically a Slim-SAS connector. The server is preferably a Feiteng platform server.

[0053] As another optional embodiment, the CPLD may include a hard disk slot register (not shown) for indicating the hard disk slot for each connector on the backplane 2. In this case, the method further includes:

[0054] Step 103: After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk slot register to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

[0055] In this way, the BMC of motherboard 1 can learn which two hard disk slots on backplane 2 each connector of motherboard 1 corresponds to by reading the hard disk slot register. For example, the Slim-SAS0 connector corresponds to hard disk slots 0 and 1, and the Slim-SAS1 connector corresponds to hard disk slots 2 and 3.

[0056] As another optional embodiment, the CPLD may include a hard disk presence register (not shown) for each connector on the backplane 2 for indicating whether the hard disk is in place. The hard disk presence register is written by the CPLD according to the hard disk connection status. In this case, the method further includes:

[0057] Step 103 ′: After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk presence register to obtain hard disk presence information.

[0058] In this embodiment, the CPLD can determine the hard disk presence information based on its GPIO pin status, and write the hard disk presence register when the hard disk presence information changes. In this way, the BMC of the motherboard 1 can read the hard disk presence register to know whether the hard disk on the hard disk slot corresponding to each connector of the motherboard 1 is in place, thereby realizing the management of the backplane 2.

[0059] As another optional embodiment, the CPLD may be provided with a lighting controller register (not shown) for each connector on the backplane 2. In this case, the method further includes:

[0060] Step 103": After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC writes data into the lighting controller register, so that the CPLD controls the hard disk lighting according to the data in the lighting controller register.

[0061] In this way, the BMC of the mainboard 1 can control the indicator lights (positioning lights, fault lights, etc.) of the corresponding hard disk slots by writing to the lighting controller register, thereby realizing the management of the backplane 2.

[0062] On the other hand, an embodiment of the present invention provides a server PCIE cable connection correctness checking device, which is applied to a server, such as Figure 3 As shown, the server includes a mainboard 1 and a backplane 2, which are connected by at least two pairs of connectors. The connectors include PCIE bus signals and sideband signals, and the sideband signals include I2C signals. The mainboard 1 is provided with a CPU and a BMC, and the backplane 2 is provided with a CPLD. The CPU is connected to the connector on the mainboard 1 via a PCIE signal line, and the connector on the backplane 2 is used to connect to the hard disk via a PCIE signal line.

[0063] The CPLD uses the same power supply as the BMC, the I2C interfaces of the BMC are connected to the connectors on the mainboard 1 via I2C signal lines, the CPLD is provided with a connector number register for each connector on the backplane 2, and the connectors on the backplane 2 are connected to the I2C interfaces of the CPLD via I2C signal lines;

[0064] like Figure 5 As shown, the device (corresponding to BMC) includes:

[0065] A first reading module 11 is configured to read a connector number register corresponding to a connector on the backplane connected to the connector on the mainboard after the server is powered on and the connector on the mainboard is connected to the connector on the backplane;

[0066] The judgment module 12 is used to judge whether the connection between the connector on the mainboard and the connector on the backplane is correct according to the read value.

[0067] The device of this embodiment can be used to perform Figure 4 The technical solution of the method embodiment shown has similar implementation principles and technical effects, which will not be repeated here.

[0068] Preferably, the judgment module 12 includes:

[0069] A first judgment unit is used to determine that the connection is correct if the read value is consistent with the preset value;

[0070] And / or, a second judgment unit is used to determine that the connection is wrong and give an alarm prompt if the read value is inconsistent with the preset value.

[0071] Preferably, the slave address of the I2C interface of the connector on the backplane is the same as the offset address of the connector number register corresponding to the connector in the CPLD.

[0072] Preferably, the CPLD is provided with a hard disk slot register for indicating the hard disk slot for each connector on the backplane, and the device further comprises:

[0073] The second reading module is used to read the hard disk slot register after the connector on the mainboard and the connector on the backplane are correctly connected to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

[0074] Preferably, the CPLD is provided with a hard disk presence register for each connector on the backplane, for indicating whether the hard disk is in place, and the hard disk presence register is written by the CPLD according to the hard disk connection status. The device further comprises:

[0075] The third reading module is used to read the hard disk presence register after the connector on the mainboard and the connector on the backplane are correctly connected to obtain the hard disk presence information.

[0076] Preferably, the CPLD is provided with a light controller register for each connector on the backplane, and the device further comprises:

[0077] The writing module is used to write data into the lighting controller register after the connector on the mainboard and the connector on the backplane are correctly connected, so that the CPLD controls the hard disk lighting according to the data in the lighting controller register.

[0078] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0079] Each embodiment in this specification is described in a related manner. The same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For the relevant parts, refer to the partial description of the method embodiment. For the convenience of description, the above device is described by dividing it into various units / modules according to their functions. Of course, when implementing the present invention, the functions of each unit / module can be implemented in the same or multiple software and / or hardware.

[0080] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A method for checking the correctness of PCIE cable connections on a server, applied to a server, wherein the server includes a mainboard and a backplane, the mainboard and backplane being connected via at least two pairs of connectors, the connectors including PCIE bus signals and Sideband signals, the Sideband signals including I2C signals, the mainboard being provided with a CPU and a BMC, the backplane being provided with a CPLD, the CPU being connected to the connector on the mainboard via a PCIE signal line, and the connector on the backplane being used to connect to a hard disk via a PCIE signal line, characterized in that: The CPLD uses the same power supply as the BMC, the I2C interfaces of the BMC are respectively connected to the connectors on the mainboard via I2C signal lines, the CPLD is provided with a connector number register for each connector on the backplane, and the connectors on the backplane are respectively connected to the I2C interfaces of the CPLD via I2C signal lines. The method includes: After the server is powered on and the connector on the mainboard is connected to the connector on the backplane, the BMC reads a connector number register corresponding to the connector on the backplane connected to the connector on the mainboard; According to the read value, it is determined whether the connection between the connector on the mainboard and the connector on the backplane is correct.

2. The method according to claim 1, characterized in that The determining, based on the read value, whether the connection between the connector on the mainboard and the connector on the backplane is correct includes: If the read value is consistent with the preset value, the connection is correct; And / or, if the read value is inconsistent with the preset value, the connection is wrong and an alarm prompt is given.

3. The method according to claim 1, characterized in that The slave address of the I2C interface of the connector on the backplane is the same as the offset address of the connector number register corresponding to the connector in the CPLD.

4. The method according to claim 1, wherein The CPLD is provided with a hard disk slot register for indicating a hard disk slot for each connector on the backplane. The method further includes: After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk slot register to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

5. The method according to claim 1, characterized in that The CPLD is provided with a hard disk presence register for each connector on the backplane, for indicating whether the hard disk is in place. The hard disk presence register is written by the CPLD according to the hard disk connection status. The method further includes: After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC reads the hard disk presence register to obtain hard disk presence information.

6. The method according to claim 1, characterized in that The CPLD is provided with a light controller register for each connector on the backplane, and the method further comprises: After the connector on the mainboard and the connector on the backplane are correctly connected, the BMC writes data into the lighting controller register, so that the CPLD controls the hard disk lighting according to the data in the lighting controller register.

7. A server PCIE cable connection correctness check device, applied to a server, the server comprising a mainboard and a backplane, the mainboard and backplane being connected via at least two pairs of connectors, the connectors comprising PCIE bus signals and Sideband signals, the Sideband signals comprising I2C signals, the mainboard being provided with a CPU and a BMC, the backplane being provided with a CPLD, the CPU being connected to the connector on the mainboard via a PCIE signal line, the connector on the backplane being used to connect to a hard disk via a PCIE signal line, characterized in that: The CPLD uses the same power supply as the BMC, the I2C interfaces of the BMC are connected to the connectors on the mainboard via I2C signal lines, the CPLD is provided with a connector number register for each connector on the backplane, and the connectors on the backplane are connected to the I2C interfaces of the CPLD via I2C signal lines. The device includes: A first reading module is configured to read a connector number register corresponding to a connector on the backplane connected to the connector on the mainboard after the server is powered on and the connector on the mainboard is connected to the connector on the backplane; The judgment module is used to judge whether the connection between the connector on the mainboard and the connector on the backplane is correct according to the read value.

8. The device according to claim 7, characterized in that The judgment module includes: A first judgment unit is used to determine that the connection is correct if the read value is consistent with the preset value; And / or, a second judgment unit is used to determine that the connection is wrong and give an alarm prompt if the read value is inconsistent with the preset value.

9. The device according to claim 7, characterized in that The slave address of the I2C interface of the connector on the backplane is the same as the offset address of the connector number register corresponding to the connector in the CPLD.

10. The device according to claim 7, characterized in that The CPLD is provided with a hard disk slot register for indicating the hard disk slot for each connector on the backplane. The device further includes: The second reading module is used to read the hard disk slot register after the connector on the mainboard and the connector on the backplane are correctly connected to obtain the corresponding relationship between the connector on the mainboard and the hard disk slot.

Images