Embedded device power on / off circuit and control method thereof

Abstract

The present invention discloses a power-on / off circuit for an embedded device and a control method thereof. The circuit includes a power button module, a power button signal conversion module, a power logic control module, and a power control module. The power button module is connected to the power button signal conversion module and the power logic control module, respectively, and the power logic control module is connected to the power control module. The method includes determining the device status, the power-on signal, and the chip logic signal to determine whether to power on or shut down the device. The present invention has the advantages of preventing accidental power-ups and shutdowns, preventing data loss, and saving power.

Description

Technical Field

[0001] The present invention relates to a power on / off circuit, in particular to a power on / off circuit for embedded equipment and a control method thereof. Background Art

[0002] Due to limited battery capacity, portable devices cannot maintain standby mode for extended periods. Therefore, they must be powered down when not in use and powered back on when needed. Currently, there are two primary methods for controlling the power on and off of portable devices: Method 1: Using logic signals output by the power-on / off chip to directly control the main power supply, turning the device on when the main power is on and off when the main power is off. Method 2: Using the main chip's built-in low-power mode to control the device's power on and off. When the device is operating, the main chip is in normal power mode. When it needs to enter standby mode, the main chip uses logic signals to control the various functional modules within the device to enter low-power mode. The main chip then enters low-power mode itself, leaving only the low-power module area within the main chip operating normally. When the device needs to function normally again, the main chip wakes up from low-power mode and uses logic signals to control the various functional modules to enter normal mode and begin operation.

[0003] However, when using method 1, no signal is given to the device main program when shutting down, and the main program is difficult to save device data in time, which may cause system data loss; when using method 2, the switching between normal mode and low power mode is too complicated, and the main chip and each functional module must have low power consumption function. At the same time, the low power mode does not completely cut off the power, and it still consumes energy during operation. It is okay for short-term standby (such as a few minutes or tens of minutes), but if it is in low power mode for a long time (such as a few hours or a whole day), it will still consume a lot of power, shortening the working time of the device. Summary of the Invention

[0004] The purpose of the present invention is to provide an embedded device power on / off circuit and control method thereof, which has the characteristics of avoiding accidental power on and off, avoiding data loss, and saving power.

[0005] The technical solution of the present invention is as follows: A power on / off circuit for an embedded device includes a power button module, a power button signal conversion module, a power logic control module and a power control module, wherein the power button module is respectively connected to the power button signal conversion module and the power logic control module, and the power logic control module is connected to the power control module; the power button module includes a button conversion transistor Q2 and a button K1, which are used to convert the button signal into a button logic signal by triggering the button and transmit it to the inside of the device; the power button signal conversion module includes a transistor Q5, which is used to convert the button logic signal into a main chip logic signal and transmit it to the main chip; the power logic control module includes a transistor Q3 and a transistor Q4, which is used to drive the power control module to turn on / off the main power according to the button logic signal; the power control module includes a switch control transistor Q1, which is used to control the on / off of the main power.

[0006] In the aforementioned embedded device power on / off circuit, the S pole of the key conversion transistor Q2 is respectively connected to the resistor R4 and the capacitor C5, a resistor R10 is connected between the S pole and the G pole of the key conversion transistor Q2, and the G pole of the key conversion transistor Q2 is respectively connected to the resistor R13 and the resistor R12 via the key K1; the D pole of the key conversion transistor Q2 is connected to the resistor R5, and a resistor R3 is connected between the output end of the resistor R5 and the S pole of the key conversion transistor Q2, and the output end of the resistor R5 is also respectively connected to the power button signal conversion module and the power logic control module.

[0007] In the aforementioned embedded device power on / off circuit, a resistor R14 is connected in series between the base of the transistor Q5 and the power button module, and resistors R15, R16, R17, R18 and capacitor C6 are connected in parallel between the base and emitter of the transistor Q5. The collector of the transistor Q5 is connected to the resistor R11 and the main chip respectively.

[0008] In the aforementioned embedded device power on / off circuit, the collectors of the transistor Q3 and the transistor Q4 are connected to each other and to the power control module, the base of the transistor Q3 is connected to the resistor R6 and the resistor R8 respectively, the other end of the resistor R6 is connected to the power button module, and the other end of the resistor R8 is connected to the emitter of the transistor Q3 and grounded; the base of the transistor Q4 is connected to the resistor R7 and the resistor R9 respectively, the other end of the resistor R7 is connected to the main chip, and the other end of the resistor R9 is connected to the emitter of the transistor Q3 and grounded.

[0009] In the aforementioned embedded device power on / off circuit, the switch control transistor Q1 is connected to the resistor R1 , the resistor R2 , the capacitor C2 , the capacitor C3 , the capacitor C4 and the main power supply.

[0010] A power on / off control method, using the above-mentioned embedded device power on / off circuit, comprises the following steps:

[0011] S1. Trigger button K1 to determine the device status. If the device is powered off, proceed to step S2; if the device is powered on, proceed to step S4.

[0012] S2, power-on process: Turn on the button conversion transistor Q2, transistor Q3 and switch control transistor Q1, the main power is powered on, and the device is turned on. At this time, the power button signal conversion module and transistor Q4 are not working;

[0013] S3. After the device enters the boot process, it delays for a certain period of time to determine whether the power-on signal button K1 is triggered normally. If so, the device works normally, otherwise the device is powered off;

[0014] S4, working state: turn on the key conversion transistor Q2, drive the power key signal conversion module to work, convert the key logic signal into the main chip logic signal, and send it to the main chip for judgment. If it is judged to be a normal key signal, the device works normally. If it is judged to be a shutdown signal, enter step S5;

[0015] S5. Shutdown process: Close all application software in an orderly manner and save related data, turn off transistor Q4, switch control transistor Q1, and finally turn off the main power supply, and shut down the device.

[0016] In the aforementioned power on / off control method, in step S3, the method for judging whether the button K1 is normally triggered is as follows: if the button K1 is continuously triggered during the delay period, then after the delay is over, it is judged that the button K1 is normally triggered, the transistor Q4 is energized, and the switch control transistor Q1 is driven to maintain the power supply of the main power supply, and the device works normally; if the button K1 is released during the delay period, it is considered that the button K1 is falsely triggered, and the device is powered off.

[0017] In the aforementioned power on / off control method, when the device is in working state, the button K1 functions as a common button to output a button signal and operate.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] (1) In the designed power on / off circuit, the power button module is connected to the power button signal conversion module and the power logic control module respectively. Therefore, when the button K1 is triggered, two signals will be sent through the power button signal conversion module and the power logic control module respectively. That is, the main chip logic signal is sent to the main chip through the power button signal conversion module, and the main chip judges it as a working signal or a shutdown signal to perform various processing; and the main power of the main chip is controlled by the power logic control module to turn on and off the power of the device, thereby realizing a simple switch between the two functions.

[0020] (2) The device power-on trigger judgment and the device power-off trigger judgment are added to the power-on control method. When the device needs to be powered on, the time is extended to judge whether the power-on signal is continuous, so as to avoid the power-on button being accidentally touched and the device being powered on; when the device needs to be powered off, the power-off signal is first sent to the main chip. After the main chip obtains the power-off signal, it makes a judgment. After confirming that the device really needs to be powered off, the main chip pushes the device into the power-off process, shuts down various functional software in an orderly manner and saves data. Then the device enters the power-off state. The device has good stability, avoids false triggering of the power-off, avoids data loss and system software damage caused by instantaneous power outage, and is suitable for devices running complex embedded operating systems and large amounts of data calculations;

[0021] (3) After the device enters the shutdown state, the power on / off circuit cuts off the main power supply to avoid power consumption during standby mode and extend the working time of the device;

[0022] (4) The circuit design is simple and is built with various electronic discrete components, which is low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the circuit structure of the present invention;

[0024] Figure 2 It is a schematic diagram of the workflow of the present invention. DETAILED DESCRIPTION

[0025] The present invention will be further described below with reference to the examples, but they are not intended to limit the present invention.

[0026] Example:

[0027] like Figure 1-Figure 2 As shown, a power on / off circuit of an embedded device includes a power button module, a power button signal conversion module, a power logic control module and a power control module. The power button module is respectively connected to the power button signal conversion module and the power logic control module, and the power logic control module is connected to the power control module; the power button module includes a button conversion transistor Q2 and a button K1, which are used to convert the button signal into a button logic signal by triggering the button and transmit it to the inside of the device; the power button signal conversion module includes a transistor Q5, which is used to convert the button logic signal into a main chip logic signal and transmit it to the main chip; the power logic control module includes a transistor Q3 and a transistor Q4, which is used to drive the power control module to turn on / off the main power according to the button logic signal; the power control module includes a switch control transistor Q1, which is used to control the on / off of the main power.

[0028] The S pole of the key conversion transistor Q2 is respectively connected to the resistor R4 and the capacitor C5, a resistor R10 is connected between the S pole and the G pole of the key conversion transistor Q2, and the G pole of the key conversion transistor Q2 is respectively connected to the resistor R13 and the resistor R12 via the key K1; the D pole of the key conversion transistor Q2 is connected to the resistor R5, and a resistor R3 is connected between the output end of the resistor R5 and the S pole of the key conversion transistor Q2, and the output end of the resistor R5 is also respectively connected to the power button signal conversion module and the power logic control module.

[0029] Resistor R14 is connected in series between the base of transistor Q5 and the power button module. Resistors R15, R16, R17, R18, and capacitor C6 are connected in parallel between the base and emitter of transistor Q5. The collector of transistor Q5 is connected to resistor R11 and the main chip, respectively. The PWR_KEY_SIG pin of transistor Q5 generates a main chip logic signal and sends it to the main chip.

[0030] The collectors of transistors Q3 and Q4 are connected to each other and to the power control module. The base of transistor Q3 is connected to resistors R6 and R8, respectively. The other end of resistor R6 is connected to the power button module, and the other end of resistor R8 is connected to the emitter of transistor Q3 and ground. The base of transistor Q4 is connected to resistors R7 and R9, respectively. The other end of resistor R7 is connected to the main chip, and the other end of resistor R9 is connected to the emitter of transistor Q3 and ground. The PWR_KEEP pin on transistor Q4 controls the power supply and power off of the main chip.

[0031] The switch control transistor Q1 is connected to a resistor R1, a resistor R2, a capacitor C2, a capacitor C3, a capacitor C4 and a main power supply. The DC MAIN pin of the switch control transistor Q1 is used to power on the device.

[0032] A power on / off control method, using the above-mentioned embedded device power on / off circuit, comprises the following steps:

[0033] S1. Trigger button K1 to determine the device status. If the device is powered off, proceed to step S2; if the device is powered on, proceed to step S4.

[0034] S2, power-on process: Turn on the button conversion transistor Q2, transistor Q3 and switch control transistor Q1, the main power is powered on, and the device is turned on. At this time, the power button signal conversion module and transistor Q4 are not working;

[0035] S3. After the device enters the boot sequence, it delays for a certain period of time (which can be set to 2s) to determine whether the power-on signal button K1 is normally triggered. If the button K1 is continuously triggered during the delay period, after the delay period, it is determined that the button K1 is normally triggered, and the transistor Q4 is energized, driving the switch control transistor Q1 to maintain the main power supply, and the device operates normally. If the button K1 is released during the delay period, it is considered that the button K1 is falsely triggered, and the device is powered off.

[0036] S4, working state: turn on the key conversion transistor Q2, drive the power key signal conversion module to work, convert the key logic signal into the main chip logic signal, and send it to the main chip for judgment. If it is judged to be a normal key signal, the device works normally. If it is judged to be a shutdown signal, enter step S5;

[0037] S5. Shutdown process: Close all application software in an orderly manner and save related data, turn off transistor Q4, switch control transistor Q1, and finally turn off the main power supply, and shut down the device.

[0038] Key K1 powers the device and performs the power-on function. It also sends a key signal to the main chip, enabling it to analyze and perform corresponding operations, thus performing the message sending function. When the device is powered off, it only triggers the power-on function; when powered on, it only triggers the message sending function. It outputs a key signal as a normal key. The key conversion transistor Q2 converts the key signal into a key logic signal, which is then transmitted to the power key signal conversion module. The power key signal conversion module then converts the key logic signal into a main chip logic signal, which is then transmitted to the main chip for processing and judgment.

[0039] The power on / off control method adds device power on trigger judgment and device power off trigger judgment. When power on is required, the time is extended to determine whether the power on signal is continuous, to avoid accidental power on due to false triggering of the power button. When power off is required, the power off signal is first sent to the main chip. After the main chip receives the power off signal, it makes a judgment. After confirming that power off is indeed required, the main chip pushes the device into the power off process, shuts down various functional software in an orderly manner, saves data, and then enters the power off state. The device has good stability, avoids false triggering of power off, and avoids data loss and system software damage caused by instantaneous power outage. It is suitable for devices running complex embedded operating systems and large amounts of data computing.

[0040] When the device enters shutdown mode, the power-on / off circuit cuts off the main power supply, avoiding power consumption during standby mode and extending the device's working time.

[0041] The circuit design is simple, constructed by various electronic discrete components, and has low cost.

Claims

1. A power on / off circuit for an embedded device, characterized in that: It includes a power button module, a power button signal conversion module, a power logic control module and a power control module. The power button module is connected to the power button signal conversion module and the power logic control module respectively, and the power logic control module is connected to the power control module; the power button module includes a button conversion transistor Q2 and a button K1, which are used to convert the button signal into a button logic signal by triggering the button and transmit it to the inside of the device; the power button signal conversion module includes a transistor Q5, which is used to convert the button logic signal into a main chip logic signal and transmit it to the main chip; the power logic control module includes a transistor Q3 and a transistor Q4, which is used to drive the power control module to turn on / off the main power according to the button logic signal; the power control module includes a switch control transistor Q1, which is used to control the on / off of the main power.

2. The embedded device power on / off circuit according to claim 1, characterized in that: The S pole of the key conversion transistor Q2 is respectively connected to the resistor R4 and the capacitor C5, a resistor R10 is connected between the S pole and the G pole of the key conversion transistor Q2, and the G pole of the key conversion transistor Q2 is respectively connected to the resistor R13 and the resistor R12 via the key K1; the D pole of the key conversion transistor Q2 is connected to the resistor R5, and a resistor R3 is connected between the output end of the resistor R5 and the S pole of the key conversion transistor Q2, and the output end of the resistor R5 is also respectively connected to the power button signal conversion module and the power logic control module.

3. The embedded device power on / off circuit according to claim 1, characterized in that: A resistor R14 is connected in series between the base of the transistor Q5 and the power button module, and resistors R15, R16, R17, R18 and capacitor C6 are connected in parallel between the base and emitter of the transistor Q5. The collector of the transistor Q5 is connected to the resistor R11 and the main chip respectively.

4. The embedded device power on / off circuit according to claim 1, characterized in that: The collectors of the transistor Q3 and the transistor Q4 are connected to each other and to the power control module, the base of the transistor Q3 is connected to the resistor R6 and the resistor R8 respectively, the other end of the resistor R6 is connected to the power button module, and the other end of the resistor R8 is connected to the emitter of the transistor Q3 and grounded; the base of the transistor Q4 is connected to the resistor R7 and the resistor R9 respectively, the other end of the resistor R7 is connected to the main chip, and the other end of the resistor R9 is connected to the emitter of the transistor Q3 and grounded.

5. The embedded device power on / off circuit according to claim 1, characterized in that: The switch control transistor Q1 is connected to a resistor R1, a resistor R2, a capacitor C2, a capacitor C3, a capacitor C4 and a main power supply.

6. A power on / off control method, characterized in that: The embedded device power on / off circuit according to any one of claims 1 to 5 comprises the following steps: S1. Trigger button K1 to determine the device status. If the device is powered off, proceed to step S2; if the device is powered on, proceed to step S4. S2, power-on process: Turn on the button conversion transistor Q2, transistor Q3 and switch control transistor Q1, the main power is powered on, and the device is turned on. At this time, the power button signal conversion module and transistor Q4 are not working; S3. After the device enters the boot sequence, it delays for a certain period of time to determine whether the power-on signal button K1 is triggered normally. If so, the device operates normally; otherwise, the device is powered off and shuts down. S4. Working state: The button conversion transistor Q2 is turned on, driving the power button signal conversion module to operate, converting the button logic signal into the main chip logic signal and transmitting it to the main chip for determination. If it is determined to be a working signal, the device operates normally. If it is determined to be a shutdown signal, the process proceeds to step S5. S5. Shutdown process: Close all application software in an orderly manner and save related data, turn off transistor Q4, switch control transistor Q1, and finally turn off the main power supply, and shut down the device.

7. The power on / off control method according to claim 6, characterized in that: In step S3, the method for judging whether the button K1 is normally triggered is as follows: if the button K1 is in a continuously triggered state during the delay period, then after the delay is over, it is judged that the button K1 is normally triggered, the transistor Q4 is energized, the drive switch controls the transistor Q1 to maintain the power supply of the main power supply, and the device works normally; if the button K1 is released during the delay period, it is considered that the button K1 is falsely triggered, and the device is powered off.

8. The power on / off control method according to claim 6, characterized in that: When the device is in working state, button K1 is used as a normal button to output button signals for processing.

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