Protection device, load driving system, protection method, and storage medium
By generating a temperature-dependent current using capacitors, thermistors, or diodes, short circuits in power semiconductors can be quickly detected, solving the problem of protecting load drive systems at high temperatures in existing technologies and enabling protection of load drive systems within a suitable timeframe.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MITSUBISHI HEAVY IND LTD
- Filing Date
- 2022-05-11
- Publication Date
- 2026-06-09
AI Technical Summary
In the event of a short circuit in a power semiconductor, existing technologies struggle to quickly protect the load drive system from high current flow when the junction temperature is high.
By measuring the output voltage of the capacitor and determining whether it exceeds a threshold, a current related to the temperature of the power semiconductor is generated. The current magnitude is adjusted to adapt to temperature changes. Temperature characteristic current is generated using the temperature characteristics of thermistors or diodes to quickly detect short circuits.
It enables rapid short-circuit detection in power semiconductors at high temperatures, preventing adverse conditions and protecting the load drive system.
Smart Images

Figure CN115347884B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to protection devices, load drive systems, protection methods, and storage media. Background Technology
[0002] In load drive systems that use power semiconductors to drive loads, there is a possibility that a large current exceeding the allowable value may flow in the event of a short circuit in the power semiconductor. Therefore, the load drive system includes a protection device that prevents a large current from flowing through the load drive system upon detecting a short circuit in the power semiconductor.
[0003] In Japanese Patent Application Publication No. 2018-198460, as related technology, a technology concerning a protection device is described, which protects the load drive system at appropriate timing in response to the temperature of the power semiconductor by determining an overcurrent threshold corresponding to the temperature change of the power semiconductor in the load drive system.
[0004] However, the short-circuit withstand capability of power semiconductors decreases as the junction temperature increases. Therefore, in load drive systems, when the junction temperature of the power semiconductor is high, a protection action needs to be performed in a shorter time compared to when the junction temperature is low. To address this, a technology is sought that can provide appropriate timing protection for the load drive system corresponding to the temperature of the power semiconductor (different from Japanese Patent Application Laid-Open No. 2018-198460). Summary of the Invention
[0005] The purpose of this disclosure is to provide a protection device, a load drive system, a protection method, and a storage medium that can solve the above-mentioned problems.
[0006] The protection device disclosed herein includes: a capacitor that outputs a voltage corresponding to the charge stored by a first current; and a protection circuit that determines whether the voltage output by the capacitor exceeds a fixed threshold, and generates a second current of a magnitude corresponding to information relating to the temperature of the power semiconductor driving the load, and changes the magnitude of the first current based on the generated second current.
[0007] The load drive system disclosed herein includes: the aforementioned protection device; and a drive device having a power semiconductor that is the object of protection of the protection device.
[0008] The protection method disclosed herein includes: outputting a voltage corresponding to the charge stored by a first current; determining whether the output voltage exceeds a fixed threshold, and generating a second current of a magnitude corresponding to information relating to the temperature of the power semiconductor driving the load, and changing the magnitude of the first current based on the generated second current.
[0009] The storage medium disclosed herein stores a program that causes a computer to execute: output a voltage corresponding to the charge stored by a first current; determine whether the output voltage exceeds a fixed threshold, and generate a second current of a magnitude corresponding to information relating to the temperature of the power semiconductor driving the load, and change the magnitude of the first current based on the generated second current.
[0010] The protection device, load drive system, protection method, and storage medium according to embodiments of the present disclosure can protect the load drive system at appropriate timings corresponding to the temperature of the power semiconductor. Attached Figure Description
[0011] Figure 1 This is a diagram showing a first example of the structure of a load drive system according to an embodiment of the present disclosure.
[0012] Figure 2 This is a second example of the structure of a load drive system according to an embodiment of the present disclosure.
[0013] Figure 3 This is a diagram illustrating an example of the structure of a protection circuit according to one embodiment of the present disclosure.
[0014] Figure 4 This is a diagram illustrating an example of the structure of a detection device according to one embodiment of the present disclosure.
[0015] Figure 5 This is a diagram illustrating the effect of the current Iout in one embodiment of the present disclosure.
[0016] Figure 6 This is a diagram illustrating an example of the structure of a protection circuit according to other embodiments of this disclosure.
[0017] Figure 7 This is a diagram illustrating an example of the structure of a protective device according to other embodiments of this disclosure.
[0018] Figure 8 It is a schematic block diagram showing the structure of a computer according to at least one embodiment. Detailed Implementation
[0019] <Implementation Method>
[0020] The following describes a load drive system according to one embodiment of the present disclosure.
[0021] (Structure of a load-driven system)
[0022] Figure 1 This is a diagram illustrating a first example of the structure of a load drive system 1 according to an embodiment of the present disclosure. The load drive system 1 is as follows... Figure 1As shown, it includes a drive unit 10 and a protection device 20. Additionally, in Figure 1 The load 30, which becomes the drive object of the drive device 10, is shown in the figure. Figure 2 This is a second example of the structure of a load drive system 1 according to an embodiment of the present disclosure. Figure 2 The load drive system 1 shown is Figure 1 One specific example of the load-driven system 1 shown.
[0023] The drive device 10 is a device that drives the load 30 via power semiconductors. The drive device 10 is, for example, as... Figure 2 As shown, N-channel MOS (Metal Oxide Semiconductor) transistors (hereinafter referred to as NMOS) 101 and 102 are included. NMOS 101 and 102 are power semiconductors. When NMOS 101 is in the ON state, NMOS 102 is in the OFF state, and current flows from NMOS 101 to the load 30. Conversely, when NMOS 101 is in the OFF state, NMOS 102 is in the ON state, and current flows from the load 30 to NMOS 102. A dead time can be set to prevent NMOS 101 and NMOS 102 from being in the ON state simultaneously (i.e., preventing through current flow). A power supply 40 is connected between the source of NMOS 101 and the drain of NMOS 102. The voltage output by power supply 40 is, for example, several hundred volts.
[0024] The protection device 20 is a device that provides timed protection to the load drive system 1 in accordance with the temperature of the power semiconductor included in the drive unit 10. The protection device 20 is as follows: Figure 2 As shown, protection circuits 20a and 20b are provided. Protection circuits 20a and 20b each have terminals A, B, C, and D. Furthermore, power supply 50 is connected between terminal C and terminal A in protection circuits 20a and 20b. The voltage output by power supply 50 is, for example, tens of volts. Specific examples regarding terminals A, B, C, and D will be described later.
[0025] Figure 3 This is a diagram illustrating an example of the structure of protection circuits 20a and 20b according to an embodiment of the present disclosure. Protection circuits 20a and 20b are respectively as shown in the diagram. Figure 3 As shown, it includes operational amplifiers (hereinafter referred to as operational amplifiers) 201 and 202, a thermistor 203 (an example of a voltage generation circuit), resistors 204, 205, 206, 207, 208, 209, 210, and 211, a diode 212, a capacitor 213, and a detection device 214.
[0026] The non-inverting input terminal of operational amplifier 201 is connected to the first terminal of the thermistor 203 and the first terminal of the detection device 214. The inverting input terminal of operational amplifier 201 is connected to the output terminal of operational amplifier 201 and the first terminal of resistor 207.
[0027] The non-inverting input terminal of operational amplifier 202 is connected to the first terminal of resistor 209 and the first terminal of resistor 210. The inverting input terminal of operational amplifier 202 is connected to the second terminal of resistor 207 and the first terminal of resistor 208. The output terminal of operational amplifier 202 is connected to the second terminal of resistor 208 and the first terminal of resistor 211.
[0028] The second terminal of thermistor 203 is connected to the ground terminal. The first terminal of resistor 204 is connected to the power supply terminal. The second terminal of resistor 204 is connected to the first terminal of resistor 205 and the anode of diode 212. The second terminal of resistor 205 is connected to the first terminal of resistor 206, the second terminal of resistor 210, the second terminal of resistor 211, the first terminal of capacitor 213, and the second terminal of detection device 214. The second terminals of resistor 206, resistor 209, capacitor 213, detection device 214, and detection device 214 are connected to the ground terminal. The power supply terminal is a specific example of terminal A of protection circuits 20a and 20b. Furthermore, the cathode of diode 212 is a specific example of terminal B of protection circuits 20a and 20b. Furthermore, the ground terminal is a specific example of terminal C of protection circuits 20a and 20b. Furthermore, the fifth terminal of detection device 214 is a specific example of terminal D of protection circuits 20a and 20b.
[0029] The detection device 214 is a device for detecting short circuits in NMOS 101 and 102 in the drive device 10. Figure 4 This is a diagram illustrating an example of the structure of a detection device 214 according to one embodiment of the present disclosure. The detection device 214 is as follows... Figure 4 As shown, it includes a determination unit 2141, a current generation unit 2142, and a driving unit 2143. Furthermore, the detection device 214 can also be implemented within an IC (Integrated Circuit).
[0030] The determination unit 2141 detects the voltage output by capacitor 213 corresponding to the charge accumulated by the current flowing through capacitor 213 (an example of the first current). The determination unit 2141 determines whether the voltage output by capacitor 213 exceeds a predetermined fixed threshold. Then, if the determination unit 2141 determines that the voltage output by capacitor 213 exceeds this threshold, it determines that the power semiconductor is short-circuited. That is, the determination unit 2141 determines that the power semiconductor is short-circuited if the potential in the second terminal of the detection device 214, based on the ground terminal, exceeds the threshold. If the drive unit 2143 does not output an on command to the power semiconductor, it short-circuits the second terminal of the detection device 214 internally with the ground terminal so that the potential in the second terminal of the detection device 214 does not rise. Specific examples of power semiconductor short circuits will be described later.
[0031] The current generating unit 2142 (an example of a voltage generating circuit) generates a current, which flows through the thermistor 203. As a result, the protection circuits 20a and 20b generate a current (an example of a second current) corresponding to the temperature of the NMOS 101 and 102 (an example of a power semiconductor) included in the driving device 10 that drives the load 30. Then, the protection circuits 20a and 20b adjust the magnitude of the current flowing through the capacitor 213 based on the generated current.
[0032] For example, the current generating unit 2142 causes a constant current I to flow through a thermistor 203 located near a power semiconductor whose temperature varies. As a result, the protection circuits 20a and 20b generate a voltage Vt with temperature characteristics. Then, a current Iout, varying according to this voltage Vt, is generated. This current Iout... Figure 3 As shown, this does not hinder the charging function of capacitor 213. Generally, the resistance of thermistor 203 decreases as it reaches a higher temperature. Therefore, as will be shown in detail later, as the power semiconductor reaches a higher temperature (i.e., as the thermistor 203 reaches a higher temperature), the current Iout decreases. That is, the charging current of capacitor 213 increases as the power semiconductor reaches a higher temperature. As a result, the voltage applied to capacitor 213 rises more quickly when the power semiconductor is at a higher temperature compared to when the power semiconductor is at a lower temperature. Since the threshold value used by determination unit 2141 during determination is a fixed value, determination unit 2141 can determine a short circuit more quickly when the power semiconductor is at a higher temperature compared to when the power semiconductor is at a lower temperature.
[0033] Here, for reference Figure 3The current Iout is derived. Furthermore, the potential of the non-inverting input terminal of operational amplifier 201 is set to Vt. Furthermore, the potential of the non-inverting input terminal of operational amplifier 202 is set to V1. Furthermore, the potential of the output terminal of operational amplifier 202 is set to V2. Furthermore, the potential of the second terminal of detection device 214 is set to V3. Furthermore, the resistance values of resistors 204, 205, 206, 207, 208, 209, 210, and 211 are set to R1, R2, R3, R4, R5, R6, R7, and R8, respectively. Furthermore, the resistance value of thermistor 203 is set to Rt. Furthermore, the current flowing through resistor 207 is set to I1. Furthermore, the current flowing through resistor 209 is set to I2. Furthermore, the current flowing through resistor 211 is set to I3.
[0034] The potential V1 of the non-inverting input terminal of the operational amplifier 202 can be characterized by equation (1).
[0035]
Formula 1
[0036]
[0037] Since the potential of the non-inverting input terminal of operational amplifier 202 is V1, if virtual grounding is considered for operational amplifier 202, the potential of the inverting input terminal of operational amplifier 202 becomes V1. Therefore, equation (2) holds true for the current I1.
[0038]
Formula 2
[0039]
[0040] Since the current flowing through resistor 207 is I1, the potential V2 can be characterized by equation (3).
[0041]
Formula 3
[0042]
[0043] Furthermore, the current I3 can be characterized by equation (4).
[0044]
Formula 4
[0045]
[0046] Furthermore, Equation (5) holds true for the current I2.
[0047]
Formula 5
[0048]
[0049] The sum of currents I2 and I3 is current Iout. Therefore, current Iout can be characterized by equation (6).
[0050]
Formula 6
[0051]
[0052] Here, if we set R4·(R7+R8)=R5·R6, then equation (7) holds true.
[0053]
Formula 7
[0054]
[0055] Here, the voltage Vt in equation (7) is the value obtained by multiplying the constant current I output by the current generating unit 2142 by the resistance value Rt of the thermistor 203, which has temperature characteristics. Therefore, by adjusting the resistance value so that R4·(R7+R8)=R5·R6, and adjusting the ratio of R5 to R4·R8 and the voltage Vt (i.e., the current generated by the current generating unit 2142), the protection circuits 20a and 20b can generate a current Iout that decreases as the power semiconductor becomes hotter.
[0056] Figure 5 This is a diagram illustrating the effect of the current Iout in one embodiment of this disclosure. Next, refer to... Figure 5 To illustrate the effect of the current Iout. In Figure 5 In the diagram, the horizontal axis represents the junction temperature or thermistor temperature. The vertical axis represents time. Figure 5 Line (A) in the diagram represents the short-circuit withstand capability, indicating that failure to perform protective action before this time will result in a malfunction in the power semiconductor. Furthermore, Figure 5 Line (B) in the diagram represents the time required for the power semiconductor to switch. That is, if the protection circuit operates beyond the timing of line (A), a malfunction occurs in the power semiconductor; if the protection circuit operates before the timing of line (B), the switching of the power semiconductor is incomplete, leading to a false short circuit. Therefore, the timing for the protection circuit to operate must be the timing between lines (A) and (B). However, in existing protection circuits that activate under certain conditions without using current Iout, the timing is often set to... Figure 5 The circuit shown operates at low temperatures with a switching time exceeding that required for line (C) to ensure short-circuit withstand capability margin. In this case, at high temperatures, the difference between line (A) and line (B) becomes large, and even if a short-circuit withstand capability margin is provided at high temperatures, it cannot be provided.
[0057] On the other hand, in one embodiment of this disclosure, by using a current Iout having temperature characteristics, it is possible to achieve the following: Figure 5 Like line (D) in the diagram, the timing of the protection circuit operation is adjusted. Therefore, it provides a margin for short-circuit withstand capability at high temperatures.
[0058] The driving unit 2143 drives the power semiconductor (i.e., NMOS) of the driving device 10. For example, the driving unit 2143 outputs a turn-on command to the gate of the NMOS when the NMOS is in the on state. Furthermore, the driving unit 2143 does not output a turn-on command to the gate of the NMOS when the NMOS is in the off state. That is, the driving unit 2143 outputs a turn-on command to the gate of the NMOS only when the NMOS is in the on state.
[0059] (Activation of the protection circuit)
[0060] Next, refer to Figure 2 as well as Figure 3 The operation of the protection circuits 20a and 20b according to one embodiment of the present disclosure will be explained. The protection circuits 20a and 20b according to one embodiment of the present disclosure are circuits that generate a voltage Vt with temperature characteristics by allowing the current I generated by the current generating unit 2142 to flow through the thermistor 203, and circuits that change the charging time by generating a current Iout (a current of a magnitude corresponding to the temperature-related information) that varies with the value of the voltage Vt to correspond to the temperature change of the power semiconductor and thus change the current charging the capacitor 213.
[0061] Furthermore, the voltage output by power supply 40 is, for example, several hundred volts. Additionally, the voltage output by power supply 50 is, for example, tens of volts. That is, the voltage output by power supply 40 is significantly larger than the voltage output by power supply 50.
[0062] First, the operation of protection circuits 20a and 20b when neither of the NMOS 101 nor 102, which are power semiconductors, is short-circuited will be explained. Figure 2 With NMOS 101 and 102 not short-circuited, NMOS 101 and 102 become ON upon receiving an ON command. In this case, the voltage applied between the source and drain of the ON-state NMOS (NMOS 101 or NMOS 102) is sufficiently low (e.g., 1 volt) compared to the voltage output from power supply 50. Therefore, Figure 3The diode 212 shown is forward biased, and current flows through it. In this case, current flows from the power supply 50 through the diode 212 to the NMOS (NMOS101 or NMOS102) which is in the ON state. As a result, when the diode 212 is in the ON state, the voltage between the anode of the diode 212 and the ground terminal (terminal C) is the sum of the source-drain voltage in the linear region of the static characteristic of the NMOS (NMOS101 or NMOS102) and the forward voltage of the diode 212. Furthermore, the static characteristic in this case is the characteristic representing the relationship between the source-drain voltage and the drain current. Therefore, the current flowing through resistors 205, 206 and capacitor 213 is smaller than when the diode 212 is off, and the potential in the second terminal of the detection device 214 remains low. As a result, the determination unit 2141 determines that the voltage output by capacitor 213 does not exceed the threshold, that is, it determines that the power semiconductor is not short-circuited.
[0063] The operation of protection circuit 20a in the event of a short circuit in the power semiconductor will be explained next. (See reference below.) Figure 2 as well as Figure 3 This explains the operation of protection circuit 20a in the event of a short circuit in NMOS102. Figure 2 In the event of a short circuit in the NMOS 102 shown, the potential of the ground terminal of the protection circuit 20a drops to the potential of the ground terminal of the protection circuit 20b. As a result, the voltage output by the power supply 40 is applied between the source and drain of the NMOS 101. Therefore, the diode 212 included in the protection circuit 20a becomes reverse biased and no current flows through it. As a result, current flows through resistors 205 and 206 and capacitor 213. The current flowing at this time, as described above, is a temperature-dependent current through current Iout, and the current increases as the power semiconductor becomes hot. As a result, since the voltage output by capacitor 213 rapidly exceeds the threshold as the temperature becomes hot, the determination unit 2141 can detect the short circuit of the power semiconductor at a suitable timing corresponding to the temperature of the power semiconductor. Then, by controlling the NMOS by the drive unit 2143 (e.g., stopping the output of the turn-on command) corresponding to the timing of the short circuit detected by the determination unit 2141, the protection circuit 20a can actually protect the load drive system 1. In addition, the operation of the protection circuit 20b in the case of a short circuit in NMOS101 is also analyzed in the same way, taking into account the symmetry of the circuit.
[0064] (Function, Effect)
[0065] The above describes a load drive system 1 according to one embodiment of the present disclosure. In the protection device 20 of the load drive system 1, the capacitor 213 outputs a voltage corresponding to the charge stored by the first current. Furthermore, the protection circuits 20a and 20b determine whether the voltage output by the capacitor 213 exceeds a fixed threshold. The protection circuits 20a and 20b generate a second current (Iout) of a magnitude corresponding to information related to the temperature of the power semiconductors (NMOS 101, 102) driving the load 30, and change the magnitude of the first current based on the generated second current.
[0066] In this way, the protection device 20 can protect the load drive system 1 at an appropriate time according to the temperature of the power semiconductors (NMOS 101, 102).
[0067] Furthermore, in one embodiment of this disclosure, the control of the switches of NMOS 101 and 102 (i.e., the control of the voltage applied to the gates of NMOS 101 and 102) is described as being performed by the protection device 20. However, in other embodiments of this disclosure, the control of the switches of NMOS 101 and 102 may be performed by a control device not shown.
[0068] Furthermore, in one embodiment of this disclosure, the load drive system 1 is described by utilizing the temperature characteristics of the thermistor 203 to give the current Iout a temperature characteristic. However, in other embodiments of this disclosure, the temperature characteristics of the current Iout other than those of the thermistor 203 can also be used to give the current Iout a temperature characteristic. For example, the temperature characteristics of a diode located near the power semiconductor can be used to give the current Iout a temperature characteristic. Specifically, such as Figure 6 As shown, by allowing the constant current I generated by the current generation unit 2142 to flow through the diode 215, the voltage Vt is made to have temperature characteristics, resulting in the current Iout also having temperature characteristics. Furthermore, for example, a temperature detection unit utilizing the temperature characteristics of a PN junction is provided near the power semiconductor, and an AD conversion is performed on the voltage corresponding to the detected temperature to generate a digital value of the voltage corresponding to the temperature. This digital value can be used, such as... Figure 7 As shown, the current generating unit 2142 generates a current with temperature characteristics, and the generated current flows through the resistor 216, thereby giving the voltage Vt temperature characteristics, or giving the first current temperature characteristics directly.
[0069] In other embodiments of this disclosure, the protective device 20 may be, for example, as follows: Figure 7As shown, current is supplied to the power semiconductor from the second terminal of the detection device 214 via the diode 212 without a resistor. Furthermore, the current Iout can be used to give the current supplied to the power semiconductor a temperature characteristic. Additionally, the method for giving the current Iout a temperature characteristic even when the protection device 20 supplies current to the power semiconductor from the second terminal of the detection device 214 without a resistor via the diode 212 is not limited to the method of the current generating unit 2142 generating a current with temperature characteristics and having the generated current flow through the resistor 216; any of the methods described above can be used.
[0070] Furthermore, the processing in the embodiments of this disclosure can replace the order of processing within the scope of appropriate processing.
[0071] In the embodiments of this disclosure, the storage unit and other storage devices can be installed anywhere within the scope of appropriate information transmission and reception. Furthermore, multiple storage units and other storage devices can exist within the scope of appropriate information transmission and reception, thus distributing the data for storage.
[0072] Although embodiments of this disclosure have been described, the protection device 20, detection device 214, and other control devices described above may also have a computer system internally. Furthermore, the aforementioned processing procedure is stored in the form of a program on a computer-readable recording medium, and the computer reads and executes the program to perform the aforementioned processing. Specific examples of computers are shown below.
[0073] The program can be pre-stored on storage devices such as HDD (Hard Disk Drive) and flash memory, or it can be stored on removable storage media such as DVD and CD-ROM. It is installed on the storage device by equipping the storage media with the drive device.
[0074] Figure 8 It is a schematic block diagram showing the structure of a computer according to at least one embodiment.
[0075] Computer 5 Figure 8 As shown, it has a CPU6, main memory7, memory8, and interface9.
[0076] For example, the aforementioned protection device 20, detection device 214, and other control devices are respectively installed in the computer 5. Furthermore, the operations of each of the aforementioned processing units are stored in memory 8 as programs. The CPU 6 reads the program from memory 8 and expands it in main memory 7, executing the aforementioned processing according to the program. In addition, the CPU 6 secures the corresponding storage areas in main memory 7 according to the program for each of the aforementioned storage units.
[0077] Examples of storage devices 8 include HDDs, SSDs (Solid State Drives), disks, optical disks, CD-ROMs (Compact Disc Read Only Memory), DVD-ROMs (Digital Versatile Disc Read Only Memory), and semiconductor memory. Storage device 8 can be an internal medium directly connected to the bus of computer 5, or an external medium connected to computer 5 via interface 9 or a communication line. Furthermore, when the program is published to computer 5 via a communication line, the computer 5 receiving the publication can expand the program in main memory 7 and execute the aforementioned processing. In at least one embodiment, storage device 8 is a non-temporary tangible storage medium.
[0078] Furthermore, the aforementioned program can achieve a portion of the functions described above. Moreover, the aforementioned program can be a file that achieves the aforementioned functions through combination with programs already recorded in the computer system, i.e., a so-called differential file (differential program).
[0079] In other embodiments, the protection device 20, detection device 214, and other control devices may, based on or replacing the above-described structure, incorporate custom LSIs (Large Scale Integrated Circuits), ASICs (Application Specific Integrated Circuits), GPUs (Graphics Processing Units), and similar processing devices such as PLDs (Programmable Logic Devices). Examples of PLDs include PALs (Programmable Array Logic), GALs (Generic Array Logic), CPLDs (Complex Programmable Logic Devices), and FPGAs (Field Programmable Gate Arrays). In this case, some or all of the functions that can be implemented by a processor can be implemented through the integrated circuit.
[0080] While several embodiments of this disclosure have been described, these embodiments are merely examples and do not limit the scope of the disclosure. Various additions, omissions, substitutions, and modifications can be made to these embodiments without departing from the spirit of the disclosure.
[0081] <Postscript>
[0082] The protection device 20, the protection method of the load drive system 1, and the storage medium described in the various embodiments of this disclosure can be understood, for example, as follows.
[0083] (1) The protection device (20) involved in the first method includes: a capacitor (213) that outputs a voltage corresponding to the charge stored by the first current; and a protection circuit (20a, 20b) that determines whether the voltage output by the capacitor (213) exceeds a fixed threshold and generates a second current (Iout) of a magnitude corresponding to information related to the temperature of the power semiconductor (101, 102) driving the load (30), and changes the magnitude of the first current based on the generated second current (Iout).
[0084] With this protection device (20), short circuits in the power semiconductors (101, 102) can be detected at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, with the protection device (20), the load drive system (1) can be protected at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0085] (2) The protection device (20) involved in the second method is based on the protection device (20) in (1). Alternatively, the protection circuit (20a, 20b) can output a turn-on command when the power semiconductor (101, 102) is in the turn-on state, and stop the output of the turn-on command when it is determined that the voltage output by the capacitor (213) exceeds the threshold.
[0086] With this protection device (20), short circuits in the power semiconductors (101, 102) can be detected at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, with the protection device (20), the load drive system (1) can be protected at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0087] (3) The protection device (20) involved in the third method may, based on the protection device (20) of (1) or (2) above, include the following: the protection circuit (20a, 20b) includes: a current generating circuit for generating the second current, the current generating circuit including: a voltage generating circuit (203, 215, 216, 2142) for generating a voltage whose value varies with the temperature of the power semiconductor (101, 102); a first operational amplifier (201); a second operational amplifier (202); a first resistor (207); a second resistor (208); and a third resistor (209), a fourth resistor (210) and a fifth resistor (211), the non-inverting input terminal of the first operational amplifier (201) being connected to the voltage generating circuit (203, 215, 216, 2142), and the inverting input terminal of the first operational amplifier (201) being connected to the voltage generating circuit (203, 215, 216, 2142). The phase input terminal is connected to the output terminal of the first operational amplifier (201) and the first terminal of the first resistor (207). The non-inverting input terminal of the second operational amplifier (202) is connected to the first terminal of the third resistor (209) and the first terminal of the fourth resistor (210). The inverting input terminal of the second operational amplifier (202) is connected to the second terminal of the first resistor (207) and the first terminal of the second resistor (208). The output terminal of the second operational amplifier (202) is connected to the second terminal of the second resistor (208) and the first terminal of the fifth resistor (211). The second terminal of the fourth resistor (210) is connected to the second terminal of the fifth resistor (211) and the capacitor (213). The second terminal of the third resistor (209) is connected to the ground terminal.
[0088] With this protection device (20), short circuits in the power semiconductors (101, 102) can be detected at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, with the protection device (20), the load drive system (1) can be protected at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0089] (4) The protection device (20) involved in the fourth method may also be based on the protection device (20) in (3), wherein the voltage generation circuit (203, 2142) includes: a thermistor (203) disposed near the power semiconductor (101, 102); and a constant current source (2142) that applies the voltage generated by the thermistor (203) to the non-inverting input terminal of the first operational amplifier (201) when the current generated by the constant current source (2142) flows through the thermistor (203).
[0090] The protection device (20) generates a second current corresponding to the temperature characteristics of the thermistor (203), enabling the detection of short circuits in the power semiconductors (101, 102) at a timing corresponding to their temperatures. As a result, the protection device (20) can protect the load drive system (1) at appropriate timings corresponding to the temperatures of the power semiconductors (101, 102).
[0091] (5) The protection device (20) involved in the fifth method may also be based on the protection device (20) in (3), wherein the voltage generation circuit (215, 2142) includes: a diode (215) disposed near the power semiconductor (101, 102); and a constant current source (2142) that applies the voltage generated by the diode (215) to the non-inverting input terminal of the first operational amplifier (201) when the current generated by the constant current source (2142) flows through the diode (215).
[0092] The protection device (20) generates a second current corresponding to the temperature characteristics of the PN junction of the diode (215), and can detect short circuits in the power semiconductors (101, 102) at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, the protection device (20) can protect the load drive system (1) at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0093] (6) The protection device (20) involved in the sixth method may also be based on the protection device (20) in (3), wherein the voltage generation circuit (216, 2142) includes: a current source (2142) that generates a current corresponding to the temperature change of the power semiconductor (101, 102); and a sixth resistor (216) that applies the voltage generated by the sixth resistor (216) to the non-inverting input terminal of the first operational amplifier (201) when the current generated by the current source (2142) flows through the sixth resistor (216).
[0094] With this protection device (20), a second current can be generated by flowing a temperature-corresponding current through the resistor (216), and a short circuit in the power semiconductors (101, 102) can be detected at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, with the protection device (20), the load drive system (1) can be protected at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0095] (7) The load drive system (1) involved in the seventh method includes: (1) to (6) protection devices (20); and a drive device (10) including power semiconductors (101, 102) that are the objects of protection of the protection devices (20).
[0096] By means of this load drive system (1), short circuits in the power semiconductors (101, 102) can be detected at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, by means of the load drive system (1), the load drive system (1) can be protected at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0097] (8) The protection method involved in the eighth method includes: outputting a voltage corresponding to the charge stored by the first current; determining whether the output voltage exceeds a fixed threshold, and generating a second current (Iout) of a magnitude corresponding to information related to the temperature of the power semiconductors (101, 102) driving the load (30), and changing the magnitude of the first current based on the generated second current (Iout).
[0098] This protection method enables the detection of short circuits in the power semiconductors (101, 102) at a timing corresponding to the temperature of the power semiconductors (101, 102). As a result, the protection method can protect the load drive system (1) at an appropriate timing corresponding to the temperature of the power semiconductors (101, 102).
[0099] (9) The storage medium storage program involved in the ninth method causes the computer to execute: output a voltage corresponding to the charge stored through the first current; determine whether the output voltage exceeds a fixed threshold, and generate a second current (Iout) of a magnitude corresponding to information related to the temperature of the power semiconductors (101, 102) driving the load (30), and change the magnitude of the first current based on the generated second current (Iout).
[0100] This storage medium enables the detection of short circuits in the power semiconductors (101, 102) at timings corresponding to the temperatures of the power semiconductors (101, 102). As a result, the storage medium allows for the appropriate timing protection of the load drive system (1) in accordance with the temperatures of the power semiconductors (101, 102).
Claims
1. A protection device for protecting power semiconductors driving a load from the effects of a short circuit. The protective device is characterized by having: A capacitor whose output voltage corresponds to the charge stored through a first current, which varies depending on the presence or absence of a short circuit in the power semiconductor; and A protection circuit determines whether the voltage output by the capacitor exceeds a fixed threshold and generates a second current of a magnitude corresponding to information related to the temperature of the power semiconductor. Based on the generated second current, the magnitude of the first current is adjusted. The protection circuit includes: a current generating circuit for generating the second current. The current generating circuit includes: A voltage generation circuit that generates a voltage whose value varies with the temperature of the power semiconductor; a first operational amplifier; a second operational amplifier; a first resistor; a second resistor; a third resistor; a fourth resistor; and a fifth resistor. The non-inverting input terminal of the first operational amplifier is connected to the voltage generation circuit. The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier and the first terminal of the first resistor. The non-inverting input terminal of the second operational amplifier is connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The inverting input terminal of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor. The output terminal of the second operational amplifier is connected to the second terminal of the second resistor and the first terminal of the fifth resistor. The second terminal of the fourth resistor is connected to the second terminal of the fifth resistor and the capacitor. The second terminal of the third resistor is connected to the ground terminal.
2. The protection device according to claim 1, characterized in that, The protection circuit outputs a turn-on command when the power semiconductor is in the on state, and stops outputting the turn-on command when it determines that the voltage output by the capacitor exceeds the threshold.
3. The protection device according to claim 1, characterized in that, The voltage generation circuit includes: a thermistor disposed near the power semiconductor; and a constant current source, which applies the voltage generated by the thermistor to the non-inverting input terminal of the first operational amplifier when the current generated by the constant current source flows through the thermistor.
4. The protection device according to claim 1, characterized in that, The voltage generation circuit includes: a diode disposed near the power semiconductor; and a constant current source, which applies the voltage generated by the diode to the non-inverting input terminal of the first operational amplifier when the current generated by the constant current source flows through the diode.
5. The protection device according to claim 1, characterized in that, The voltage generation circuit includes: a current source that generates a current corresponding to a temperature change of the power semiconductor; and a sixth resistor that, when the current generated by the current source flows through the sixth resistor, applies the voltage generated by the sixth resistor to the non-inverting input terminal of the first operational amplifier.
6. A load-driven system, characterized in that, have: The protective device as described in claim 1 or 2; and A drive device that includes a power semiconductor that is the object of protection of the protection device.
7. A protection method, which is a protection method performed by a protection device, the protection device having a capacitor and a protection circuit and used to protect a power semiconductor driving a load from the effects of a short circuit. The protection method is characterized by having: The capacitor outputs a voltage corresponding to the charge stored through a first current, which varies depending on the presence or absence of a short circuit in the power semiconductor; and The protection circuit determines whether the voltage output by the capacitor exceeds a fixed threshold, and generates a second current of a magnitude corresponding to information related to the temperature of the power semiconductor. Based on the generated second current, the magnitude of the first current is adjusted. The protection circuit includes: a current generating circuit for generating the second current. The current generating circuit includes: A voltage generation circuit that generates a voltage whose value varies with the temperature of the power semiconductor; a first operational amplifier; a second operational amplifier; a first resistor; a second resistor; a third resistor; a fourth resistor; and a fifth resistor. The non-inverting input terminal of the first operational amplifier is connected to the voltage generation circuit. The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier and the first terminal of the first resistor. The non-inverting input terminal of the second operational amplifier is connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The inverting input terminal of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor. The output terminal of the second operational amplifier is connected to the second terminal of the second resistor and the first terminal of the fifth resistor. The second terminal of the fourth resistor is connected to the second terminal of the fifth resistor and the capacitor. The second terminal of the third resistor is connected to the ground terminal.
8. A storage medium, characterized in that, A stored program that causes a computer of the protection device to perform processing, wherein the protection device includes capacitors and protection circuitry for protecting the power semiconductors driving the load from short circuits, the processing being: The capacitor outputs a voltage corresponding to the charge stored through a first current, which varies depending on the presence or absence of a short circuit in the power semiconductor. The protection circuit determines whether the voltage output by the capacitor exceeds a fixed threshold, and generates a second current of a magnitude corresponding to information related to the temperature of the power semiconductor. Based on the generated second current, the magnitude of the first current is adjusted. The protection circuit includes: a current generating circuit for generating the second current. The current generating circuit includes: A voltage generation circuit that generates a voltage whose value varies with the temperature of the power semiconductor; a first operational amplifier; a second operational amplifier; a first resistor; a second resistor; a third resistor; a fourth resistor; and a fifth resistor. The non-inverting input terminal of the first operational amplifier is connected to the voltage generation circuit. The inverting input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier and the first terminal of the first resistor. The non-inverting input terminal of the second operational amplifier is connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The inverting input terminal of the second operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor. The output terminal of the second operational amplifier is connected to the second terminal of the second resistor and the first terminal of the fifth resistor. The second terminal of the fourth resistor is connected to the second terminal of the fifth resistor and the capacitor. The second terminal of the third resistor is connected to the ground terminal.