Display device, detection circuit and detection method thereof

Abstract

The present invention discloses a display device, a detection circuit and a detection method thereof. The display device includes a plurality of pixel units arranged in an array and a driving module. The driving module is used to sequentially output control signals to the pixel units through signal lines in rows or columns. The detection circuit includes a logic output module connected to the plurality of signal lines on the display panel, used to read the control signal of each signal line and output a detection signal; and a judgment module used to receive the detection signal, compare the logic level of the detection signal with a preset logic level, and judge the working state of the driving module based on the comparison result, so that the abnormal module can be quickly and accurately judged when the display panel image is abnormal.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a detection circuit and a detection method thereof. Background Art

[0002] In the display field, a display device generally requires the collaboration of multiple modules to display an image. Existing display devices are generally divided into LCD display devices and OLED display devices according to the different light-emitting bodies.

[0003] LCD display devices require at least a source driver module and a gate array module to input corresponding control signals to the pixel circuits in order to display images; OLED display devices require at least a source driver module, a gate array module, and a light-emitting module to input corresponding control signals to the pixel circuits in order to display images. Figure 1 As shown, the gate driving module 20 is connected to the control end of the thin film transistor T of the pixel unit 30 through the gate line, and the source driving module 10 is connected to the first conduction end of the thin film transistor T through the source line. When the display device displays an image, the gate driving module 20 sequentially outputs a gate control signal to the pixel unit 30 through the gate line to select the pixel unit 30 by row. When the thin film transistor T is an NMOS tube, the gate control signal output by the gate driving module 20 is a high level. When the thin film transistor T is a PMOS tube, the gate control signal output by the gate driving module 20 is a low level.

[0004] Existing technology integrates modules such as the gate driver module, source driver module, and light-emitting module onto the same driver chip IC. When a display device displays an abnormal image, it is necessary to identify which module is causing the problem. Existing micro display devices do not have a way to detect the control signals transmitted by all gate lines and light-emitting lines (EM lines), and verification can only be performed through spot checks. For example, with a 4K resolution, there are 4,000 gate lines and 4,000 light-emitting lines. Currently, only the control signals transmitted by the front, middle, and back gate lines can be checked. When an image display anomaly occurs, it is impossible to effectively identify which module is causing the problem. Therefore, a new technical solution is needed to address this issue. Summary of the Invention

[0005] In view of the above problems, an object of the present invention is to provide a display device and a detection circuit and a detection method thereof, so as to quickly and accurately identify an abnormal module when the display panel image is abnormal.

[0006] According to one aspect of the present invention, a detection circuit for a display device is provided. The display device includes a plurality of pixel units arranged in an array and a driving module. The driving module is configured to sequentially output control signals to the pixel units in rows or columns via signal lines. The detection circuit includes: a logic output module connected to the plurality of signal lines on the display panel, configured to read the control signal of each signal line and output a detection signal; and a judgment module configured to receive the detection signal, compare the logic level of the detection signal with a preset logic level, and judge the operating state of the driving module based on the comparison result.

[0007] Optionally, the judgment module is configured to determine that the driving module is operating normally when the logic level of the detection signal is completely identical to the preset logic level.

[0008] Optionally, the judgment module is configured to determine the abnormal signal line according to the relationship between the time when the logic level of the detection signal is different from the preset logic level and a multiple of the preset time when the logic level of the detection signal is different from the preset logic level.

[0009] Optionally, the preset time is the time it takes for the driving module to output the control signal to each of the signal lines.

[0010] Optionally, the logic output module includes: a plurality of cascaded OR gate circuits, each OR gate circuit includes a plurality of input terminals, the plurality of input terminals of the first one of the plurality of OR gate circuits are respectively connected to corresponding signal lines, one of the plurality of input terminals of the other OR gate circuits except the first one of the plurality of OR gate circuits is connected to the output terminal of the previous OR gate circuit, and the remaining input terminals are connected to corresponding signal lines, and the output terminal of the last one of the plurality of OR gate circuits is used to output the detection signal.

[0011] Optionally, the driving module is a gate driving module, and the gate driving module is used to sequentially output gate control signals to control terminals of switch transistors of the pixel units through gate lines in rows.

[0012] Optionally, the driving module is a light emitting module, and the light emitting module is used to sequentially output light emitting control signals to control terminals of light emitting transistors of the pixel units through light emitting lines in rows.

[0013] According to another aspect of the present invention, a detection method for a display device is provided. The display device includes a plurality of pixel units arranged in an array and a driving module, the driving module being configured to sequentially output control signals to the pixel units via signal lines in rows or columns. The method includes: reading the control signal from each signal line and outputting a detection signal; comparing the logic level of the detection signal with a preset logic level, and determining the operating state of the driving module based on the comparison result.

[0014] Optionally, comparing the logic level of the detection signal with a preset logic level and judging the working state of the driving module based on the comparison result includes: when the logic level of the detection signal is exactly the same as the preset logic level, judging that the driving module is working normally; when the logic level of the detection signal is different from the preset logic level, determining the abnormal signal line based on the relationship between the time when the logic level of the detection signal is different from the preset logic level and a multiple of the preset time.

[0015] Optionally, the preset time is the time it takes for the driving module to output the control signal to each of the signal lines.

[0016] According to another aspect of the present invention, a display device is provided, comprising the detection circuit of the display device described above, and configured to execute the detection method of the display device described above.

[0017] The display device, detection circuit, and detection method provided by the present invention have a logic output module connected to each signal line for transmitting a sequential control signal. Each signal line outputs a high / low level signal for a fixed time. The logic output module reads the control signal transmitted by the signal line and outputs a detection signal. The judgment module compares the logic level of the detection signal with a preset logic level and determines the signal line where the abnormality occurs based on the comparison result. This can quickly and accurately determine the module where the abnormality occurs when the display panel is tested or the screen is abnormal. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0019] Figure 1 shows a schematic structural diagram of a display panel according to the prior art;

[0020] Figure 2 A schematic structural diagram of a detection circuit of a display device according to an embodiment of the present invention is shown;

[0021] Figures 3a-3d FIG. 4 shows a timing diagram of gate control signals in different states according to an embodiment of the present invention.

[0022] Figure 4 A flow chart of a detection method for a display device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0023] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical components or modules are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0024] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected to" another element or an element or circuit is said to be "connected" between two nodes, it can be directly coupled or connected to the other element or there can be intermediate elements. The connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0025] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will appreciate that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in their functionality.

[0026] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0027] When an abnormality occurs on the display panel screen of a display device, it is necessary to detect each module to determine the cause of the abnormality of the display panel screen. Due to the limitations of existing technology, the micro display device has no way to detect the gate control signal transmitted by each gate line of the gate driving module and the light control signal transmitted by each light-emitting line of the light-emitting module. In order to solve the above problem, an embodiment of the present invention provides a detection circuit of a display device, which is used to detect the driving module that sequentially outputs control signals to the pixel unit through signal lines in rows or columns.

[0028] Figure 2 The following is a schematic diagram of the structure of the detection circuit of the display device according to the embodiment of the present invention. The detection circuit of the display device provided by the embodiment of the present invention is described below by taking the driver module to be detected as a driver module that sequentially outputs control signals to pixel units through signal lines in rows as an example.

[0029] like Figure 2 As shown, the display device includes a display panel, which includes a column driver module 100, a row driver module 200 and a plurality of pixel units 300 arranged in an array, wherein the column driver module 100 and the row driver module 200 are integrated on the same driver chip.

[0030] Each pixel unit 300 includes a switching transistor T1, a liquid crystal capacitor Clc and a storage capacitor Cs. The control end of the switching transistor T1 is connected to the driver chip, the first conductive end is connected to the driver chip, the second conductive end is connected to the node A where the first end of the liquid crystal capacitor Clc and the first end of the storage capacitor Cs are connected, and the second ends of the liquid crystal capacitor Clc and the storage capacitor Cs are grounded.

[0031] The column driver module 100 is, for example, a source driver module, which is connected to the first conduction terminal of the switch transistor T1 via a source line. Each column of pixel units 300 corresponds to a source line. The column driver module 100 is used to output a corresponding data voltage to the first conduction terminal of each switch transistor T1 via the corresponding source line when the display panel displays an image.

[0032] The row driver module 200 is, for example, a gate driver module, connected to the control terminal of the switching transistor T1 via a gate line. Each row of pixel units 300 corresponds to a gate line. The number of gate lines is related to the resolution of the display panel. For example, a display panel with a 720P resolution has 720 gate lines, and a display panel with a 2K resolution has 2000 gate lines. The row driver module 200 is used to sequentially input gate control signals to the control terminal of the switching transistor T1 via the gate lines to select the pixel units 300 by row. There are n gate lines (n is a positive integer), namely G1-Gn, where G1 is the first gate line and Gn is the last signal line.

[0033] The detection circuit includes a logic output module 400 , which is connected to a plurality of gate lines on the display panel and is used to read a gate control signal on each gate line and output a detection signal.

[0034] The logic output module 400, for example, includes a plurality of cascaded OR gate circuits, and the connection manner of the plurality of OR gate circuits and the gate lines G1-Gn is, for example, that the gate line G1 is connected to the first input terminal of the first OR gate circuit, the gate line G2 is connected to the second input terminal of the first OR gate circuit, the gate line G3 is connected to the third input terminal of the first OR gate circuit, the output terminal of the first OR gate circuit is connected to the first input terminal of the second OR gate circuit, the gate line G4 is connected to the second input terminal of the second OR gate circuit, the gate line G5 is connected to the third input terminal of the second OR gate circuit, and so on. The first input terminal of the last OR gate circuit is connected to the output terminal of the second-to-last OR gate circuit, the gate line Gn-1 is connected to the second input terminal of the last OR gate circuit, the gate line Gn is connected to the third input terminal of the last OR gate circuit, and the output terminal of the last OR gate circuit outputs a detection signal G-TM for detecting whether the gate control signal transmitted by each gate line is normal, so as to determine the gate line where the abnormality occurs.

[0035] It should be noted that this application does not impose any specific restrictions on the number of input terminals of the OR gate circuit within the logic output module 400, nor does it impose any specific restrictions on the input terminals of the OR gate connected to the output terminal of the previous OR gate circuit. These can be adjusted according to actual circumstances. Of course, the logic output module 400 can also be equipped with OR gate circuits with different input terminals according to actual circumstances. For example, the logic output module 400 may partially use a three-input OR gate circuit and partially use a two-input OR gate circuit.

[0036] The detection circuit also includes a determination module 500, which is configured to receive a detection signal G-TM and compare the logic level of the detection signal G-TM with a preset logic level. Based on the comparison result, the determination module 500 determines the operating status of the row driver module 200. When the logic level of the detection signal G-TM is exactly the same as the preset logic level, the row driver module 200 is determined to be normal. When the logic level of the detection signal G-TM is different from the preset logic level, the determination module 500 determines that the abnormal signal line is based on the relationship between the time the logic level of the detection signal G-TM is different from the preset logic level and a multiple of the preset time. The preset time is the time it takes for the row driver module 200 to output a gate control signal to each gate line. The preset logic level is the logic level of the gate control signal.

[0037] Depending on the difference in MOS transistors used in the switching transistor T1, the logic level of the gate control signal output by the row driver module 200 is different. When the switching transistor T1 is an NMOS transistor, the switching transistor T1 is turned on in a high-level state. When the row driver module 200 drives the chip to display the picture, it sequentially outputs a high-level gate control signal to select the pixel unit 300 by row. At this time, the preset logic level is a high level. The timing diagram of multiple gate lines G1-Gn is shown in FIG. Figure 3a As shown, the time each gate line is at a high level is fixed, for example, a preset time t, so under normal conditions, the detection signal G-TM will remain at a high level until the row driver module 200 stops outputting the gate control signal. When the display panel screen is abnormal and it is necessary to detect whether the gate control signal transmitted by each gate line is normal, it is only necessary to determine the time when the logic level of the detection signal G-TM is abnormal by the judgment module 500 to determine the gate line where the abnormality occurs. For example, starting from the starting preset time 1t, when the 3t is detected, the logic level of the detection signal G-TM is abnormal, suddenly changing from a high level to a low level, which means that the gate line G3 is abnormal. At this time, the timing diagram of the gate control signals of multiple gate lines is as follows: Figure 3b shown.

[0038] When the switch transistor T1 is a PMOS tube, the switch transistor T1 is turned on in a low level state. The row driver module 200 sequentially outputs a low level gate control signal to select the pixel unit 300 by row when driving the chip to display the picture. At this time, the preset logic level is a low level. The timing diagram of the multiple gate lines G1-Gn is as follows: Figure 3c As shown, the time that each gate line is at a low level is fixed, for example, a preset time t, so under normal conditions, the detection signal G-TM will always be at a high level until the row driver module 200 stops outputting the gate control signal. When the display panel screen is abnormal and it is necessary to detect whether the gate control signal transmitted by each gate line is normal, it is only necessary to determine the time when the logic level of the detection signal G-TM is abnormal by the judgment module 500 to determine the gate line where the abnormality occurs. For example, starting from the starting preset time 1t, when the 3t is detected, the logic level of the detection signal G-TM is abnormal, and suddenly changes from a low level to a high level, which means that the gate line G3 is abnormal. At this time, the timing diagram of the gate control signals transmitted by multiple gate lines is as follows: Figure 3d shown.

[0039] Furthermore, in an OLED display device, the row driver module 200 may also be a light-emitting module located within a driver chip. The light-emitting module is configured to sequentially output light-emitting control signals via light-emitting lines to illuminate the organic light-emitting diodes (OLEDs) row by row. Each row of pixel units 300 corresponds to a light-emitting line, and the number of light-emitting lines corresponds one-to-one with the number of gate lines. The OR gate circuit in the logic output module 400 is connected to each light-emitting line according to the method described above. When the display panel image is abnormal, the logic level of the detection signal G-TM output by the last OR gate circuit is compared with a preset logic level to identify the light-emitting line with the abnormality. The specific principles are the same as above. The preset logic level is consistent with the logic level of the light-emitting control signal sequentially output by the light-emitting module.

[0040] Furthermore, the logic gates inside the logic output module 400 do not necessarily need to be OR gate circuits, as long as the gate control signals transmitted by the gate lines G1 -Gn can be read and the gate control signals can be output from the logic output module 400 in an OR relationship.

[0041] According to the detection circuit of the display device provided by an embodiment of the present invention, the logic output module 400 is connected to each signal line used to transmit a sequential control signal. The time for each signal line to output a high / low level signal is a fixed value. The logic output module 400 reads the control signal transmitted by the signal line and outputs a detection signal G-TM. The judgment module 500 compares the logic level of the detection signal G-TM with a preset logic level and determines the signal line where the abnormality occurs based on the comparison result. This can quickly and accurately determine the module where the abnormality occurs when the display panel screen is abnormal.

[0042] Furthermore, an embodiment of the present invention provides a detection method for a display device, wherein the display device includes a plurality of pixel units 300 arranged in an array and a driving module, wherein the driving module is configured to sequentially output control signals to the pixel units 300 via signal lines in rows or columns, and specifically includes the following steps:

[0043] S1: reads the control signal on each signal line and outputs the detection signal G-TM;

[0044] S2: Compare the logic level of the detection signal G-TM with a preset logic level, and determine the working state of the driving module according to the comparison result.

[0045] In step S2 , the preset logic level is the logic level of the control signal.

[0046] S3: When the logic level of the detection signal is exactly the same as the preset logic level, it is determined that the drive module is normal;

[0047] S4: When the logic level of the detection signal is different from the preset logic level, determining the signal line where the abnormality occurs based on the relationship between the time when the logic level of the detection signal is different from the preset logic level and a multiple of the preset time;

[0048] In step S4 , the preset time is the time for the driving module to output the control signal to each signal line.

[0049] An embodiment of the present invention further provides a display device, comprising the detection circuit of the display device described above, configured to execute the detection circuit of the display device described above.

[0050] The embodiments of the present invention are as described above, but these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and modify and use it based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention and their equivalents.

Claims

1. A detection circuit for a display device, the display device comprising a plurality of pixel units arranged in an array and a driving module, the driving module being configured to sequentially output control signals to the pixel units in rows or columns via signal lines, the detection circuit comprising: a logic output module connected to the plurality of signal lines on the display panel, configured to read a control signal from each signal line and output a detection signal; a judgment module, configured to receive the detection signal, compare the logic level of the detection signal with a preset logic level, and judge the working state of the driving module according to the comparison result; The logic output module includes: A plurality of cascaded OR gate circuits, each OR gate circuit comprising a plurality of input terminals, wherein the plurality of input terminals of a first one of the plurality of OR gate circuits are respectively connected to corresponding signal lines, One of the multiple input terminals of the OR gate circuits except the first one is connected to the output terminal of the previous OR gate circuit, and the remaining input terminals are connected to corresponding signal lines. The output terminal of the last one of the multiple OR gate circuits is used to output the detection signal. Among them, the judgment module is configured to determine the abnormal signal line according to the relationship between the time when the logic level of the detection signal is different from the preset logic level and the multiple of the preset time when the logic level of the detection signal is different from the preset logic level.

2. The detection circuit according to claim 1, wherein: The judgment module is configured to determine that the driving module is operating normally when the logic level of the detection signal is completely identical to the preset logic level.

3. The detection circuit according to claim 1, wherein: The preset time is the time for the driving module to output the control signal to each of the signal lines.

4. The detection circuit according to claim 1, wherein: The driving module is a gate driving module, and the gate driving module is used to sequentially output gate control signals to the control terminals of the switch transistors of the pixel units through gate lines in rows.

5. The detection circuit according to claim 1, wherein: The driving module is a light emitting module, and the light emitting module is used to sequentially output light emitting control signals to the control terminals of the light emitting transistors of the pixel units through light emitting lines in rows.

6. A method for detecting a display device, the display device comprising a plurality of pixel units arranged in an array and a driving module, the driving module being configured to sequentially output control signals to the pixel units via signal lines in rows or columns, comprising: reading a control signal of each of the signal lines, and performing an OR operation on a plurality of the control signals to obtain a detection signal; Comparing the logic level of the detection signal with a preset logic level, and judging the working state of the driving module according to the comparison result, The step of comparing the logic level of the detection signal with a preset logic level and determining the working state of the driving module according to the comparison result includes: When the logic level of the detection signal is different from the preset logic level, the abnormal signal line is determined according to the relationship between the time during which the logic level of the detection signal is different from the preset logic level and a multiple of the preset time.

7. The detection method according to claim 6, wherein The step of comparing the logic level of the detection signal with a preset logic level and determining the working state of the driving module according to the comparison result further includes: When the logic level of the detection signal is completely identical to the preset logic level, it is determined that the driving module is operating normally.

8. The detection method according to claim 7, wherein The preset time is the time for the driving module to output the control signal to each of the signal lines.

9. A display device comprising the detection circuit of the display device according to any one of claims 1 to 5, configured to execute the detection method of the display device according to any one of claims 6 to 8.

Images