Display substrate and display device

Abstract

A display substrate includes a substrate, a plurality of light emitting elements, and a plurality of pixel circuits. The plurality of light emitting elements includes a plurality of groups of light emitting elements. At least one group of light emitting elements of the plurality of groups of light emitting elements includes a plurality of first area light emitting elements located at a first display area and a plurality of second area light emitting elements located at a second display area. The plurality of pixel circuits includes a plurality of groups of pixel circuits. At least one group of pixel circuits of the plurality of groups of pixel circuits includes a plurality of first type pixel circuits and a plurality of second type pixel circuits. The plurality of first area light emitting elements includes at least a plurality of first light emitting elements emitting a first color light and a plurality of second light emitting elements emitting a second color light. The plurality of first type pixel circuits includes at least a plurality of first pixel circuits and a plurality of second pixel circuits. The plurality of first pixel circuits to which the plurality of first light emitting elements of the at least one group of light emitting elements are electrically connected and the plurality of second pixel circuits to which the plurality of second light emitting elements are electrically connected are located in different groups of pixel circuits.

Description

TECHNICAL FIELD

[0001] The present document relates to, but is not limited to, the technical field of display, in particular to a display substrate and a display device. BACKGROUND

[0002] Organic light emitting diode (OLED) and quantum dot light emitting diode (QLED) are active light emitting display devices, which have the advantages of self-emission, wide viewing angle, high contrast, low power consumption, extremely high response speed, lightness, flexibility, low cost, etc. Under-screen camera technology is a new technology proposed to improve the screen ratio of a display device. SUMMARY

[0003] The following is an overview of subject matter of the detailed description herein. This overview is not intended to limit the scope of the claims.

[0004] Embodiments of the present disclosure provide a display substrate and a display device.

[0005] In one aspect, the present disclosure provides a display substrate, comprising: a substrate, a plurality of light emitting elements, and a plurality of pixel circuits. The substrate comprises a first display area and a second display area located at least one side of the first display area. The plurality of light emitting elements are located in the first display area and the second display area, the plurality of light emitting elements comprises a plurality of groups of light emitting elements, each group of light emitting elements is arranged along a first direction, the plurality of groups of light emitting elements are arranged along a second direction, at least one group of light emitting elements in the plurality of groups of light emitting elements comprises a plurality of first area light emitting elements and a plurality of second area light emitting elements, the plurality of first area light emitting elements are located in the first display area, and the plurality of second area light emitting elements are located in the second display area. The plurality of pixel circuits are located in the second display area, the plurality of pixel circuits comprises a plurality of groups of pixel circuits, each group of pixel circuits is arranged along the first direction, the plurality of groups of pixel circuits are arranged along the second direction, at least one group of pixel circuits in the plurality of groups of pixel circuits comprises a plurality of first type pixel circuits and a plurality of second type pixel circuits, and the plurality of first type pixel circuits are distributed between the plurality of second type pixel circuits. At least one first type pixel circuit in the plurality of first type pixel circuits is electrically connected to at least one first area light emitting element in the plurality of first area light emitting elements, and at least one second type pixel circuit in the plurality of second type pixel circuits is electrically connected to at least one second area light emitting element in the plurality of second area light emitting elements. The plurality of first area light emitting elements at least comprises a plurality of first light emitting elements emitting first color light and a plurality of second light emitting elements emitting second color light; the plurality of first type pixel circuits at least comprises a plurality of first pixel circuits and a plurality of second pixel circuits; the plurality of first light emitting elements are electrically connected to the plurality of first pixel circuits through a plurality of first conductive lines, and the plurality of second light emitting elements are electrically connected to the plurality of second pixel circuits through a plurality of second conductive lines. The plurality of first pixel circuits electrically connected to the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements in the at least one group of light emitting elements are located in different groups of pixel circuits; the first direction intersects the second direction.

[0006] In some example embodiments, the group of pixel circuits in which the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements in the at least one group of light emitting elements are located and the group of pixel circuits in which the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements are located are adjacent in the second direction.

[0007] In some example embodiments, the plurality of first area light emitting elements further comprise: a plurality of third light emitting elements emitting light of a third color; and the plurality of first type pixel circuits further comprise: a plurality of third pixel circuits, the plurality of third light emitting elements and the plurality of third pixel circuits being electrically connected by a plurality of third conductive lines. The plurality of third pixel circuits electrically connected by the plurality of third light emitting elements in the at least one group of light emitting elements are in the same group of pixel circuits as the plurality of first pixel circuits electrically connected by the plurality of first light emitting elements; or, the plurality of third pixel circuits electrically connected by the plurality of third light emitting elements in the at least one group of light emitting elements are in the same group of pixel circuits as the plurality of second pixel circuits electrically connected by the plurality of second light emitting elements.

[0008] In some example embodiments, the first conductive lines, the second conductive lines and the third conductive lines are in the same layer structure.

[0009] In some example embodiments, the plurality of third pixel circuits electrically connected by the plurality of third light emitting elements in the at least one group of light emitting elements are closer to the first display area than both the plurality of first pixel circuits electrically connected by the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected by the plurality of second light emitting elements.

[0010] In some example embodiments, the at least one third pixel circuit is electrically connected to n1 third light emitting elements and configured to drive the n1 third light emitting elements to emit light, and the at least one third pixel circuit is electrically connected to n2 third light emitting elements and configured to drive the n2 third light emitting elements to emit light, wherein n1 and n2 are integers greater than or equal to 2, and n1 is different from n2.

[0011] In some example embodiments, the n1 third light emitting elements are first light emitting units, and the n2 third light emitting elements are second light emitting units, the first light emitting units and the second light emitting units are arranged at intervals along the first direction, or are periodically arranged in the order of the first light emitting unit, the second light emitting unit, the second light emitting unit and the first light emitting unit.

[0012] In some example embodiments, the display substrate further comprises: a plurality of third connection lines in the first display area, the n1 or n2 third light emitting elements being electrically connected by a third connection line.

[0013] In some example embodiments, the plurality of third conductive lines electrically connected to the plurality of third pixel circuits and the plurality of first conductive lines electrically connected to the plurality of first pixel circuits are located on opposite sides of the group of pixel circuits in the second direction; or, the plurality of third conductive lines electrically connected to the plurality of third pixel circuits and the plurality of second conductive lines electrically connected to the plurality of second pixel circuits are located on opposite sides of the group of pixel circuits in the second direction.

[0014] In some example embodiments, the first color light is red light, the second color light is blue light, and the third color light is green light.

[0015] In some example embodiments, at least one first pixel circuit of the plurality of first pixel circuits is electrically connected to m1 first light emitting elements and configured to drive the m1 first light emitting elements to emit light; at least one second pixel circuit of the plurality of second pixel circuits is electrically connected to m2 second light emitting elements and configured to drive the m2 second light emitting elements to emit light, m1 and m2 are integers greater than or equal to 2.

[0016] In another aspect, the embodiments of the present disclosure provide a display substrate, comprising the display substrate as described above.

[0017] Other aspects can become apparent from a review of the drawings and detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings are included to provide a further understanding of the technical solutions of the present disclosure, and constitute a part of the specification, and are used to explain the technical solutions of the present disclosure together with the embodiments of the present disclosure, but do not constitute a limitation on the technical solutions of the present disclosure. The shape and size of one or more components in the drawings do not reflect the true proportion, and the purpose is only to schematically illustrate the present disclosure.

[0019] Figure 1 A schematic view of a display substrate of at least one embodiment of the present disclosure;

[0020] Figure 2 A partial schematic view of a display substrate of at least one embodiment of the present disclosure;

[0021] Figure 3 A partial plan view of a display substrate of at least one embodiment of the present disclosure;

[0022] Figure 4 A schematic view of a display substrate of at least one embodiment of the present disclosure;

[0023] Figure 5 A partial schematic view of a second display area of at least one embodiment of the present disclosure;

[0024] Figure 6 Partial wiring diagram of a second display area of at least one embodiment of the present disclosure;

[0025] Figures 7A to 7C Partial diagram of Figure 5

[0026] Figure 8 Partial diagram of a first display area of at least one embodiment of the present disclosure;

[0027] Figure 9 Partial wiring diagram of a first display area of at least one embodiment of the present disclosure;

[0028] Figure 10 Partial wiring diagram of a first display area of at least one embodiment of the present disclosure;

[0029] Figure 11 Partial cross-sectional diagram of a display substrate of at least one embodiment of the present disclosure;

[0030] Figure 12 Another partial plan view diagram of a display substrate of at least one embodiment of the present disclosure;

[0031] Figure 13 Another partial plan view diagram of a display substrate of at least one embodiment of the present disclosure;

[0032] Figure 14 Diagram of a display device of at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] Embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. Embodiments can be implemented in various forms. It is readily apparent to those skilled in the art that the embodiments and the features thereof can be variously changed without departing from the scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the following embodiments. Embodiments of the present disclosure and features thereof can be arbitrarily combined to form embodiments of the present disclosure. The embodiments of the present disclosure can be implemented in other specific forms without departing from the spirit or essential characteristics thereof. Accordingly, the embodiments of the present disclosure should not be construed as being limited to the following embodiments.

[0034] In the drawings, the size, the layer thickness, or the region of one or more constituent elements can sometimes be exaggerated for clarity. Therefore, one embodiment of the present disclosure should not be interpreted only by the illustrated shapes and the sizes. The shapes and the sizes of one or more constituent elements in the drawings and the description are schematic and the embodiment of the present disclosure is not limited to shapes and values shown in the drawings and the description. The embodiment of the present disclosure can be implemented in other shapes and values without departing from the scope of the present disclosure.

[0035] ​In the present specification, ordinal numbers such as "first", "second", and "third" are used to avoid confusion among components, and are not intended to constitute a limitation in terms of numbers.

[0036] In the present specification, words of "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like that indicate the orientation or positional relationship of components are used to describe the positional relationship of components with reference to the drawings, and are merely intended to facilitate the description of the present specification and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus cannot be understood as limiting the present disclosure. The positional relationship of components is appropriately changed according to the direction of the components described. Therefore, it is not limited to the words described in the specification, and can be appropriately changed according to the situation.

[0037] In the present specification, unless explicitly defined and limited otherwise, the terms "mount", "connected", and "linked" are to be interpreted broadly. For example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or connection; it can be direct connection, or indirect connection through an intermediate, or communication inside two elements. The above terms in the present disclosure can be understood according to the situation by those skilled in the art.

[0038] In the present specification, "electrically connected" includes the case where components are connected together through an element having some electrical effect. The element having some electrical effect is not particularly limited as long as it can transmit electrical signals between the connected components. Examples of the element having some electrical effect include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, other elements having various functions, and the like.

[0039] In the present specification, a transistor refers to an element including at least three terminals of a gate, a drain, and a source. The transistor has a channel region between the drain (drain electrode terminal, drain region, or drain electrode) and the source (source electrode terminal, source region, or source electrode), and current can flow through the drain, the channel region, and the source. In the present specification, the channel region refers to a region where current mainly flows.

[0040] In the present specification, the first electrode can be a drain, and the second electrode can be a source, or the first electrode can be a source, and the second electrode can be a drain. In the case of using a transistor with opposite polarity or in the case of changing the direction of current in the circuit operation, the functions of "source" and "drain" are sometimes interchanged. Therefore, in the present specification, "source" and "drain" can be interchanged.

[0041] In the present specification, "parallel" refers to a state in which two straight lines form an angle of -10° or more and 10° or less, and thus also includes a state in which the angle is -5° or more and 5° or less. In addition, "perpendicular" refers to a state in which two straight lines form an angle of 80° or more and 100° or less, and thus also includes a state in which the angle is 85° or more and 95° or less.

[0042] In the present specification, a triangle, a rectangle, a trapezoid, a pentagon, or a hexagon, etc. is not strictly so, and can be an approximate triangle, rectangle, trapezoid, pentagon, or hexagon, etc. There can be some small deformation due to a tolerance, there can be a lead angle, an arc edge, and a deformation, etc.

[0043] The "light transmittance" in the present disclosure refers to the ability of light to pass through a medium, and is the percentage of the light flux that passes through a transparent or translucent body to the incident light flux.

[0044] The "about" and "approximately" in the present disclosure refer to not strictly limited boundaries, and allow for a range of process and measurement errors. In the present disclosure, "approximately the same" refers to a case in which the numerical values differ by 10% or less.

[0045] The display substrate provided by the present disclosure includes a substrate, a plurality of light emitting elements, and a plurality of pixel circuits. The substrate includes a first display area and a second display area located at least one side of the first display area. The plurality of light emitting elements are located in the first display area and the second display area. The plurality of light emitting elements includes a plurality of groups of light emitting elements, each group of light emitting elements is arranged along a first direction, and the plurality of groups of light emitting elements are arranged along a second direction. At least one group of light emitting elements in the plurality of groups of light emitting elements includes a plurality of first area light emitting elements and a plurality of second area light emitting elements, the plurality of first area light emitting elements are located in the first display area, and the plurality of second area light emitting elements are located in the second display area. The plurality of pixel circuits are located in the second display area, the plurality of pixel circuits includes a plurality of groups of pixel circuits, each group of pixel circuits is arranged along the first direction, and the plurality of groups of pixel circuits are arranged along the second direction. At least one group of pixel circuits in the plurality of groups of pixel circuits includes a plurality of first type pixel circuits and a plurality of second type pixel circuits, the plurality of first type pixel circuits are distributed between the plurality of second type pixel circuits. At least one first type pixel circuit in the plurality of first type pixel circuits is electrically connected to at least one first area light emitting element in the plurality of first area light emitting elements, and at least one second type pixel circuit in the plurality of second type pixel circuits is electrically connected to at least one second area light emitting element in the plurality of second area light emitting elements. The plurality of first area light emitting elements includes at least a plurality of first light emitting elements emitting first color light and a plurality of second light emitting elements emitting second color light. The plurality of first type pixel circuits includes at least a plurality of first pixel circuits and a plurality of second pixel circuits. The plurality of first light emitting elements are electrically connected to the plurality of first pixel circuits through a plurality of first conductive lines. The plurality of second light emitting elements are electrically connected to the plurality of second pixel circuits through a plurality of second conductive lines. The plurality of first pixel circuits electrically connected to the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements in at least one group of light emitting elements are located in different groups of pixel circuits. The first direction intersects the second direction, for example, the first direction can be perpendicular to the second direction.

[0046] In some examples, a group of light emitting elements can be a row of light emitting elements, and a group of pixel circuits can be a row of pixel circuits. For example, the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements in a row of light emitting elements are located in different rows of pixel circuits.

[0047] The display substrate provided by the present disclosure can shorten the length of the first conductive lines and the second conductive lines, thereby reducing the load difference of the conductive lines, weakening the brightness difference between the first display area and the second display area, and improving the display effect of the display substrate.

[0048] In some example embodiments, the pixel circuit group in which the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements in the at least one group of light emitting elements can be adjacent to the pixel circuit group in which the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements in the at least one group of light emitting elements in the second direction. For example, one row of the first region light emitting elements can correspond to two rows of the first type pixel circuits. In this way, the length of the conductive lines connecting the first region light emitting elements and the first type pixel circuits can be shortened.

[0049] In some example embodiments, the plurality of first region light emitting elements can further include a plurality of third light emitting elements emitting a third color light. The plurality of first type pixel circuits can further include a plurality of third pixel circuits, the plurality of third light emitting elements and the plurality of third pixel circuits being electrically connected by a plurality of third conductive lines. The plurality of third pixel circuits electrically connected to the plurality of third light emitting elements in the at least one group of light emitting elements can be located in the same group of pixel circuits as the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements; or, the plurality of third pixel circuits electrically connected to the plurality of third light emitting elements in the at least one group of light emitting elements can be located in the same group of pixel circuits as the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements. The pixel circuit arrangement of the present example can be beneficial to shorten the length of the conductive lines connecting the first region light emitting elements and the first type pixel circuits. However, the present embodiments are not limited thereto. For example, the plurality of third pixel circuits electrically connected to the plurality of third light emitting elements in the at least one group of light emitting elements can be located in different groups of pixel circuits as the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements. For example, one row of the first region light emitting elements can correspond to three rows of the first type pixel circuits.

[0050] In some example embodiments, the first conductive lines, the second conductive lines and the third conductive lines can be of the same layer structure. For example, the first conductive lines, the second conductive lines and the third conductive lines can be made of a transparent conductive material (such as indium tin oxide (ITO)).

[0051] In some example embodiments, the plurality of third pixel circuits electrically connected to the plurality of third light emitting elements in the at least one group of light emitting elements can be closer to the first display area than the plurality of first pixel circuits electrically connected to the plurality of first light emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light emitting elements. For example, the first color light can be red light, the second color light can be blue light, and the third color light can be green light. The present example can reduce or eliminate display defects caused by large differences in the length of the conductive lines by arranging the first type pixel circuits in an order in which the green light emitting elements are given priority (i.e., the first type pixel circuits connected to the green light emitting elements are arranged closer to the first display area).

[0052] The scheme of the present embodiments will be illustrated below by way of examples.

[0053] Figure 1 A schematic view of a display substrate for at least one embodiment of the present disclosure. In some examples, as shown, the display substrate can include a display area AA and a peripheral area BB surrounding the display area AA. The display area AA of the display substrate can include a first display region A1 and a second display region A2. The second display region A2 can at least partially surround the first display region A1. In the present example, the second display region A2 can surround the first display region A1 on four sides. Figure 1

[0054] In some examples, as shown, the first display region A1 can be a light-transmissive display region, which can also be referred to as a full display with camera (FDC) region; and the second display region A2 can be a normal display region. For example, the orthographic projection of a photosensitive sensor (such as a camera or other hardware) on the display substrate can be located within the first display region A1 of the display substrate. In some examples, as shown, the first display region A1 can be circular, and the size of the orthographic projection of the photosensitive sensor on the display substrate can be less than or equal to the size of the first display region A1. However, the present embodiments are not limited thereto. In other examples, the first display region A1 can be rectangular, and the size of the orthographic projection of the photosensitive sensor on the display substrate can be less than or equal to the size of the inscribed circle of the first display region A1. Figure 1 Figure 1

[0055] In some examples, as shown, the first display region A1 can be located at the top center of the display area AA. The second display region A2 can surround the first display region A1 on four sides. However, the present embodiments are not limited thereto. For example, the first display region A1 can be located at the upper left corner or the upper right corner or other locations of the display area AA. For example, the second display region A2 can surround the first display region A1 on at least one side. Figure 1

[0056] In some examples, as shown, the display area AA can be rectangular, such as a circular-rectangular. The first display region A1 can be circular or elliptical. However, the present embodiments are not limited thereto. For example, the first display region A1 can be rectangular, semicircular, pentagonal, or other shapes. Figure 1

[0057] ​​​​​In some examples, the display region AA can be provided with a plurality of sub-pixels. At least one sub-pixel can include a pixel circuit and a light emitting element. The pixel circuit can be configured to drive the connected light emitting element. For example, the pixel circuit is configured to provide a driving current to drive the light emitting element to emit light. The pixel circuit can include a plurality of transistors and at least one capacitor, for example, the pixel circuit can be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. Wherein, T in the above circuit structure refers to a thin film transistor, C refers to a capacitor, the number before T represents the number of thin film transistors in the circuit, and the number before C represents the number of capacitors in the circuit.

[0058] In some examples, the plurality of transistors in the pixel circuit can be P-type transistors, or can be N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the yield of the product. In other examples, the plurality of transistors in the pixel circuit can include P-type transistors and N-type transistors.

[0059] In some examples, the plurality of transistors in the pixel circuit can use low-temperature polysilicon thin film transistors, or can use oxide thin film transistors, or can use low-temperature polysilicon thin film transistors and oxide thin film transistors. The active layer of the low-temperature polysilicon thin film transistor uses low-temperature polysilicon (LTPS, Low Temperature Poly-Silicon), and the active layer of the oxide thin film transistor uses oxide semiconductor (Oxide). The low-temperature polysilicon thin film transistor has the advantages of high mobility and fast charging, and the oxide thin film transistor has the advantage of low leakage current. Integrating the low-temperature polysilicon thin film transistor and the oxide thin film transistor on one display substrate, i.e. LTPS+Oxide (abbreviated as LTPO) display substrate, can take advantage of both, can realize low-frequency driving, can reduce power consumption, and can improve display quality.

[0060] In some examples, the light emitting element can be any one of a light emitting diode (LED), an organic light emitting diode (OLED), a quantum dot light emitting diode (QLED), a micro LED (including: mini-LED or micro-LED), etc. For example, the light emitting element can be an OLED, which can emit red light, green light, blue light, or white light, etc. under the driving of the corresponding pixel circuit. The color of the light emitted by the light emitting element can be determined as needed. In some examples, the light emitting element can include an anode, a cathode, and an organic light emitting layer between the anode and the cathode. The anode of the light emitting element can be electrically connected to the corresponding pixel circuit. However, the present embodiments are not limited thereto.

[0061] In some examples, one pixel unit of the display area AA can include three sub-pixels, which can be red sub-pixels, green sub-pixels, and blue sub-pixels, respectively. However, the present embodiments are not limited thereto. In some examples, one pixel unit can include four sub-pixels, which can be red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels, respectively.

[0062] In some examples, the shape of the light emitting element can be rectangular, rhombic, pentagonal, or hexagonal. When one pixel unit includes three sub-pixels, the light emitting elements of the three sub-pixels can be arranged in a horizontal parallel, vertical parallel, or triangular manner. When one pixel unit includes four sub-pixels, the light emitting elements of the four sub-pixels can be arranged in a horizontal parallel, vertical parallel, or square manner. However, the present embodiments are not limited thereto.

[0063] Figure 2 A partial schematic view of a display substrate of at least one embodiment of the present disclosure is shown. In some examples, as shown in FIG. 1A, the second display area A2 of the display substrate can include a transition area A2a and a non-transition area A2b. The transition area A2a can be located on at least one side (for example, one side; for example, both left and right sides; for example, all four sides, including the upper and lower sides and the left and right sides) outside the first display area A1. Figure 2

[0064] In some examples, as shown in FIG. 1A, the transition area A2a of the display substrate can include a first transition area A2a1 and a second transition area A2a2. The first transition area A2a1 can be located on at least one side (for example, one side; for example, both left and right sides; for example, all four sides, including the upper and lower sides and the left and right sides) outside the first display area A1. The second transition area A2a2 can be located on at least one side (for example, one side; for example, both left and right sides; for example, all four sides, including the upper and lower sides and the left and right sides) outside the first display area A1. Figure 2 ​As shown, the first display area A1 may include a plurality of first-area light-emitting elements 10 arranged in an array. The transition area A2a of the second display area A2 may include a plurality of first-type pixel circuits 41 and a plurality of second-type pixel circuits 42 arranged in an array, and may also include a plurality of second-area light-emitting elements (not shown). At least one first-type pixel circuit 41 in the transition area A2a may be electrically connected to at least one first-area light-emitting element 10 via a connecting line L, and is configured to drive the at least one first-area light-emitting element 10 to emit light. For example, one first-type pixel circuit 41 may be configured to drive two, three, or four first-area light-emitting elements 10 emitting the same color light to emit light. The orthographic projection of the first-area light-emitting element 10 onto the substrate and the orthographic projection of the electrically connected first-type pixel circuit 41 onto the substrate may not overlap. At least one second-type pixel circuit 42 in the transition area A2a may be electrically connected to at least one second-area light-emitting element, and is configured to drive the at least one second-area light-emitting element to emit light. For example, one second-type pixel circuit 42 may be configured to drive one second-area light-emitting element to emit light. The orthographic projection of the second type pixel circuit 42 onto the substrate and the orthographic projection of the electrically connected second region light-emitting element onto the substrate can at least partially overlap. In this example, by placing the first type pixel circuit 41 that drives the first region light-emitting element in the transition region A2a, the occlusion of light by the pixel circuit can be reduced, thereby increasing the light transmittance of the first display area A1.

[0065] In some examples, such as Figure 2 As shown, the non-transition region A2b may include an array of multiple second-type pixel circuits 42 and multiple invalid pixel circuits 43, and may also include multiple second-region light-emitting elements. The transition region A2a may also include multiple invalid pixel circuits 43. By setting invalid pixel circuits 43, the uniformity of components in multiple film layers during the etching process can be improved. For example, the invalid pixel circuit 43 may have a structure that is substantially the same as the first-type pixel circuit 41 and the second-type pixel circuit 42 in the same row or column, except that it is not electrically connected to any light-emitting element.

[0066] In some examples, since the second display area A2 is provided with not only a second type of pixel circuit 42 electrically connected to the second area light-emitting element, but also a first type of pixel circuit 41 electrically connected to the first area light-emitting element 10, the number of pixel circuits in the second display area A2 can be greater than the number of light-emitting elements in the second area. In some examples, such as Figure 2 As shown, the area for setting the new pixel circuit (including the first type pixel circuit and the invalid pixel circuit) can be obtained by reducing the size of the second type pixel circuit in the first direction D1. For example, the size of the pixel circuit in the first direction D1 can be smaller than the size of the second region light-emitting element in the first direction D1. In this example, as...Figure 2 As shown, the original a columns of pixel circuits can be compressed along the first direction D1, so that a new column of pixel circuits is added, and the space occupied by the a columns of pixel circuits before compression and the a+1 columns of pixel circuits after compression can be the same. Wherein, a can be an integer greater than 1. In some examples, a can be equal to 4. However, the present embodiment is not limited thereto. For example, a can be equal to 2 or 3.

[0067] In other examples, the original b rows of pixel circuits can be compressed along the second direction D2, so that a new row of pixel circuits is added, and the space occupied by the b rows of pixel circuits before compression and the b+1 rows of pixel circuits after compression is the same. Wherein, b can be an integer greater than 1. Alternatively, the region for adding new pixel circuits can be obtained by reducing the size of the second type of pixel circuit in the first direction D1 and the second direction D2.

[0068] In the embodiments of the present disclosure, a group of pixel circuits can include a plurality of pixel circuits arranged in sequence along a first direction. In the present example, the group of pixel circuits is a row of pixel circuits, and each row of pixel circuits can be adjacent to the same gate line (e.g., a scan line). A group of light emitting elements can include a plurality of first region light emitting elements and a plurality of second region light emitting elements arranged along the first direction.

[0069] Figure 3 A partial plan view of a display substrate of at least one embodiment of the present disclosure is shown. In some examples, as shown, Figure 3 The first display area A1 of the display substrate can include a plurality of first region light emitting elements. The plurality of first region light emitting elements can include a plurality of first light emitting elements 11 emitting first color light, a plurality of second light emitting elements 12 emitting second color light, and a plurality of third light emitting elements 13 emitting third color light. In some examples, the first color light can be red light, the second color light can be blue light, and the third color light can be green light. However, the present embodiment is not limited thereto.

[0070] In some examples, as shown, Figure 3 The first light emitting element 11 can include an anode 110, an organic light emitting layer, and a cathode. The second light emitting element 12 can include an anode 120, an organic light emitting layer, and a cathode. The third light emitting element 13 can include an anode 130, an organic light emitting layer, and a cathode. The cathodes of the first light emitting element 11, the second light emitting element 12, and the third light emitting element 13 can be a one-piece structure.

[0071] In some examples, as shown, Figure 3As shown, one pixel unit of the first display area A1 can include four first area light emitting elements (for example, including one first light emitting element 11, one second light emitting element 12, and two third light emitting elements 13). The first light emitting element 11, the second light emitting element 12, and the two third light emitting elements 13 can be arranged in a diamond manner to form an RGBG pixel arrangement. For example, the first light emitting element 11 and the second light emitting element 12 can be arranged in the same row in the first direction D1 and arranged in the same column in the second direction D2; the third light emitting elements 13 can be arranged in the same row in the first direction D1 and arranged in the same column in the second direction D2. The row where the first light emitting element 11 and the second light emitting element 12 are arranged is spaced apart from the row where the third light emitting element 13 is arranged, and the column where the first light emitting element 11 and the second light emitting element 12 are arranged is spaced apart from the column where the third light emitting element 13 is arranged. The first direction D1 and the second direction D2 can intersect, for example, the first direction D1 can be perpendicular to the second direction D2.

[0072] In some examples, as shown in FIG. 1, the display substrate can include a first display area A1 and a second display area A2. The first display area A1 can include a plurality of first area light emitting elements, and the second display area A2 can include a plurality of second area light emitting elements. Figure 3 As shown, the second display area A2 of the display substrate can include a plurality of second area light emitting elements, which can include a plurality of fourth light emitting elements 21 emitting first color light, a plurality of fifth light emitting elements 22 emitting second color light, and a plurality of sixth light emitting elements 23 emitting third color light. The arrangement manner of the fourth light emitting elements 21, the fifth light emitting elements 22, and the sixth light emitting elements 23 can be the same as the arrangement manner of the first light emitting elements 11, the second light emitting elements 12, and the third light emitting elements 13 of the first display area A1, and thus will not be described here.

[0073] In some examples, as shown in FIG. 1, the display substrate can include a first display area A1 and a second display area A2. The first display area A1 can include a plurality of first area light emitting elements, and the second display area A2 can include a plurality of second area light emitting elements. Figure 3 As shown, the area of the light emitting region of the first area light emitting element can be smaller than the area of the light emitting region of the second area light emitting element emitting the same color light. For example, the area of the light emitting region of the first light emitting element 11 can be smaller than the area of the light emitting region of the fourth light emitting element 21. The area of the light emitting region of the second light emitting element 12 can be smaller than the area of the light emitting region of the fifth light emitting element 22. The area of the light emitting region of the third light emitting element 13 can be smaller than the area of the light emitting region of the sixth light emitting element 23. For example, the second area light emitting element can be quadrilateral or pentagonal, and the first area light emitting element can be circular or elliptical. The present example can improve the light transmittance of the first display area and improve the diffraction condition by reducing the area of the light emitting region of the first area light emitting element.

[0074] In the present example, the light emitting region of the light emitting element refers to the stacked region of the anode, the organic light emitting layer, and the cathode of the light emitting element, that is, the connection region of the anode and the organic light emitting layer and the cathode exposed by the pixel opening of the pixel definition layer.

[0075] In some examples, such as Figure 3 As shown, the first display area A1 can also be provided with multiple first connecting lines 31, multiple second connecting lines 32, and multiple third connecting lines 33. In this example, m1 can be 2. A first connecting line 31 can be configured to be electrically connected to the anode 110 of two first light-emitting elements 11. The two first light-emitting elements 11 electrically connected by the first connecting line 31 can be located in different rows, and the two first light-emitting elements 11 are separated by a third light-emitting element 13 on the third direction D3. The third direction D3 intersects both the first direction D1 and the second direction D2.

[0076] In some examples, such as Figure 3 As shown, m2 can be 2. A second connecting line 32 can be configured to be electrically connected to the anode 120 of two second light-emitting elements 12. The two second light-emitting elements 12 electrically connected by the second connecting line 32 can be located in different rows, and the two second light-emitting elements 12 are spaced apart by a third light-emitting element 13 in the fourth direction D2. The orthographic projection of the second connecting line 32 onto the substrate can be V-shaped. A first light-emitting element 11 can be located within the V-shape formed by the second connecting line 32. The fourth direction D4 intersects both the first direction D1 and the second direction D2. For example, the fourth direction D4 can be perpendicular to the third direction D3. The two first light-emitting elements 11 electrically connected by the first connecting line 31 and the two second light-emitting elements 12 electrically connected by the second connecting line 32 can be arranged in a 2×2 array, and the two first light-emitting elements 11 can be diagonally arranged, and the two second light-emitting elements 12 can be diagonally arranged.

[0077] In some examples, such as Figure 3As shown, n1 can be 2 and n2 can be 4; or n1 can be 4 and n2 can be 2. One third connection line 33 can be electrically connected with the anodes 110 of two or four first light emitting elements 11. The plurality of third connection lines 33 can include a plurality of first type third connection lines 33a and a plurality of second type third connection lines 33b. The first type third connection line 33a can be configured to electrically connect four adjacent third light emitting elements 13, and the second type third connection line 33b can be configured to electrically connect two adjacent third light emitting elements 13. The first type third connection line 33a can electrically connect four third light emitting elements 13 arranged in a 2x2 array, and the first type third connection line 33a can have a U-shaped footprint on the substrate. The U-shaped footprint formed by the first type third connection line 33a can partially surround one first light emitting element 11 or one second light emitting element 12. The second type third connection line 33b can electrically connect two adjacent third light emitting elements 13 arranged along the second direction D2, and the second type third connection line 33b can have an I-shaped footprint on the substrate. The four third light emitting elements 13 electrically connected by the first type third connection line 33a can form a first light emitting unit, and the two third light emitting elements 13 electrically connected by the second type third connection line 33b can form a second light emitting unit. In the first direction D1, the first light emitting unit, the second light emitting unit, the second light emitting unit, and the first light emitting unit can be periodically arranged in this order.

[0078] In some examples, as shown in FIG. 1A, the first connection lines 11, the second connection lines 12, and the third connection lines 13 can be in the same layer. The first connection lines 11, the second connection lines 12, and the third connection lines 13 can have no overlap in the footprint on the substrate. Figure 3

[0079] Figure 4 A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figure 4 A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figure 5 A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figure 6 A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figure 5 A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figures 7A to 7C A schematic diagram of the wiring connection of the display substrate of at least one embodiment of the present disclosure. Figure 5 ​A partial schematic diagram. Figure 8 This is a partial schematic diagram of the first display area according to at least one embodiment of the present disclosure. Figure 9 and Figure 10 This is a partial wiring diagram of the first display area according to at least one embodiment of the present disclosure. Figure 8 The diagram illustrates two rows of first area light-emitting elements (e.g., row j and row j+1) located in the first display area A1, as well as multiple first connecting lines 31, second connecting lines 32, third connecting lines 33, first conductive lines 34, second conductive lines 35 and third conductive lines 36. Figure 9 for Figure 8 A schematic diagram of multiple first connecting lines 31, second connecting lines 32, and third connecting lines 33 in the diagram. Figure 10 for Figure 8 A schematic diagram of multiple first conductive lines 34, second conductive lines 35 and third conductive lines 36.

[0080] In some examples, such as Figures 4 to 10 As shown, the plurality of first-type pixel circuits may include: a plurality of first pixel circuits 411, a plurality of second pixel circuits 412, and a plurality of third pixel circuits 413. At least one first pixel circuit 411 may be electrically connected to the anodes 110 of two first light-emitting elements 11 via a first conductive line 34 and a first connecting line 31. At least one second pixel circuit 412 may be electrically connected to the anodes 120 of two second light-emitting elements 12 via a second conductive line 35 and a second connecting line 32. At least one third pixel circuit 413 may be electrically connected to the anodes 130 of four third light-emitting elements 13 via a third conductive line 36 and a third connecting line 33a. At least one third pixel circuit 413 may be electrically connected to the anodes 130 of two third light-emitting elements 13 via a third conductive line 36 and a third connecting line 33b.

[0081] In some examples, such as Figures 4 to 10As shown, the first pixel circuit 411 to which the first light emitting element 11 in the first region light emitting element of the jth row is electrically connected can be located in the ith row of pixel circuits and is electrically connected to the anode 110 of the first light emitting element 11 of the (j+1)th row through the first connection line 31. The second light emitting element 12 in the first region light emitting element of the jth row can be electrically connected to the second light emitting element 12 of the (j+1)th row through the second connection line 32 and is electrically connected to the second pixel circuit 412 of the (i+1)th row of pixel circuits through the second conductive line 35. The third light emitting element 13 in the first region light emitting element of the jth row can be electrically connected to the third light emitting element 13 of the (j+1)th row through the third connection line 33 and is electrically connected to the third pixel circuit 413 of the (i+1)th row of pixel circuits through the third conductive line 36. In the present example, the first pixel circuit 411 to which the first light emitting element 11 of the jth row is electrically connected and the second pixel circuit 412 to which the second light emitting element 12 of the jth row is electrically connected are located in different rows, for example, can be adjacent rows, and the second pixel circuit 412 to which the second light emitting element 12 of the jth row is electrically connected and the third pixel circuit 413 to which the third light emitting element 13 of the jth row is electrically connected are located in the same row.

[0082] In the present example, the first type pixel circuits to which the light emitting elements emitting different color light in the first region light emitting elements of the same row are electrically connected can be located in different rows, thereby facilitating shortening the length of the conductive lines (for example, the first conductive line to the third conductive line) connecting the first region light emitting elements and the first type pixel circuits, thereby facilitating reducing the load difference of different conductive lines, weakening the brightness difference between the first display area and the second display area, and further improving the display effect of the display substrate. In other examples, the pixel circuits to which the first light emitting element, the second light emitting element and the third light emitting element in the first region light emitting elements of the same row are electrically connected can be located in different rows, for example, one row of first region light emitting elements can correspond to three rows of first type pixel circuits. Alternatively, the first pixel circuit to which the first light emitting element in the first region light emitting elements of the same row is electrically connected and the first pixel circuit to which the third light emitting element is electrically connected can be located in the same row, and the second pixel circuit to which the second light emitting element is electrically connected and the first pixel circuit to which the first light emitting element is electrically connected are located in different rows.

[0083] In some examples, as shown in FIG. 1, the first type pixel circuit to which the first light emitting element 11 in the first region light emitting element of the jth row is electrically connected can be located in the ith row of pixel circuits and is electrically connected to the anode 110 of the first light emitting element 11 of the (j+1)th row through the first connection line 31. The second light emitting element 12 in the first region light emitting element of the jth row can be electrically connected to the second light emitting element 12 of the (j+1)th row through the second connection line 32 and is electrically connected to the second pixel circuit 412 of the (i+1)th row of pixel circuits through the second conductive line 35. The third light emitting element 13 in the first region light emitting element of the jth row can be electrically connected to the third light emitting element 13 of the (j+1)th row through the third connection line 33 and is electrically connected to the third pixel circuit 413 of the (i+1)th row of pixel circuits through the third conductive line 36. In the present example, the first pixel circuit 411 to which the first light emitting element 11 of the jth row is electrically connected and the second pixel circuit 412 to which the second light emitting element 12 of the jth row is electrically connected are located in different rows, for example, can be adjacent rows, and the second pixel circuit 412 to which the second light emitting element 12 of the jth row is electrically connected and the third pixel circuit 413 to which the third light emitting element 13 of the jth row is electrically connected are located in the same row. Figures 4 to 10 As shown, in any row of first region light emitting elements, the third pixel circuit 413 to which the third light emitting element 13 is electrically connected is closer to the first display area than the first pixel circuit 411 to which the first light emitting element 11 is electrically connected and the second pixel circuit 412 to which the second light emitting element 12 is electrically connected. In other words, in any row of first region light emitting elements, the third light emitting element 13 is preferentially electrically connected to the first type pixel circuit close to the first display area in the present example. In this way, the length difference of the third conductive line electrically connected to the third light emitting element can be reduced, and display defects can be alleviated or avoided.

[0084] In some examples, such as Figures 4 to 10 As shown, multiple first conductive lines 34 electrically connected to the multiple first light-emitting elements 11 in the j-th row can be located on opposite sides of the pixel circuit in the i-th row in the second direction D2. Multiple second conductive lines 35 electrically connected to the multiple second light-emitting elements 12 in the j-th row can be located on the side of the pixel circuit in the (i+1)-th row in the second direction D2 away from the pixel circuit in the i-th row. Multiple third conductive lines 36 electrically connected to the multiple third light-emitting elements 13 in the j-th row can be located on the side of the pixel circuit in the (i+1)-th row in the second direction D2 closer to the pixel circuit in the i-th row. However, this embodiment is not limited to this. For example, multiple first conductive lines 34 electrically connected to the multiple first light-emitting elements 11 in the j-th row can be located on the side of the pixel circuit in the i-th row in the second direction D2 away from the pixel circuit in the (i+1)-th row. The arrangement of the first, second, and third conductive lines in this example is advantageous for wiring layout and saves wiring layout space.

[0085] In some examples, such as Figures 4 to 10 As shown, the multiple first pixel circuits 411 electrically connected to the multiple first light-emitting elements in the j-th row can be arranged continuously in the pixel circuits of the i-th row. For example, only second-type pixel circuits can be arranged between adjacent first pixel circuits 411, without other first-type pixel circuits. The multiple second pixel circuits 412 electrically connected to the multiple first light-emitting elements in the j-th row can be arranged continuously in the pixel circuits of the (i+1)-th row. For example, only second-type pixel circuits can be arranged between adjacent second pixel circuits 412, without other first-type pixel circuits. The multiple third pixel circuits 413 electrically connected to the multiple third light-emitting elements in the j-th row can be arranged continuously in the (i+1)-th row. For example, only second-type pixel circuits can be arranged between adjacent third pixel circuits 413, without other first-type pixel circuits.

[0086] In some examples, such as Figures 4 to 10 As shown, at least one first pixel circuit 411 electrically connected to the first light-emitting element 11 in the j-th row can be located in the same column as at least one second pixel circuit 412 electrically connected to the second light-emitting element 12 in the j-th row. Figure 5 As shown, the multiple first pixel circuits 411 in the i-th row and the multiple second pixel circuits 412 in the (i+1)-th row can correspond one-to-one, and the corresponding first pixel circuits 411 and second pixel circuits 412 can be located in the same column. The third pixel circuit 413 can be located in the same column as the invalid pixel circuit 43.

[0087] Figure 11 This is a partial cross-sectional schematic diagram of a display substrate according to at least one embodiment of the present disclosure. In some examples, such as Figure 11As shown, in the direction perpendicular to the display substrate, the second display area A2 may include: a substrate 100, a circuit structure layer 200, a second transparent conductive layer 302, a first transparent conductive layer 301, a light-emitting structure layer 400, and an encapsulation structure layer 500 sequentially disposed on the substrate 100. The first display area A1 may include: a substrate 100, a composite insulating layer, a second transparent conductive layer 302, a light-emitting structure layer 400, and an encapsulation structure layer 500 sequentially disposed on the substrate 100. The circuit structure layer 200 of the second display area A2 may include: a semiconductor layer 201, a first insulating layer 211, a first gate metal layer 202, a second insulating layer 212, a second gate metal layer 203, a third insulating layer 213, a first source / drain metal layer 204, a fourth insulating layer 214, a fifth insulating layer 215, and a second source / drain metal layer 205 sequentially disposed on the substrate 100. A sixth insulating layer 216 is disposed between the circuit structure layer 200 and the second transparent conductive layer 302. A seventh insulating layer 217 may be disposed between the second transparent conductive layer 302 and the first transparent conductive layer 301. The composite insulating layer of the first display area A1 may include: a first insulating layer 211, a second insulating layer 212, a third insulating layer 213, a fourth insulating layer 214, a fifth insulating layer 215 and a sixth insulating layer 216 stacked in sequence.

[0088] In some examples, the first insulating layer 211 to the fourth insulating layer 214 can all be inorganic insulating layers, and the fifth insulating layer 215 to the seventh insulating layer 217 can be organic insulating layers. The fifth insulating layer 215 to the seventh insulating layer 217 can also be called a planarization layer. However, this embodiment is not limited to this. In other examples, only the fifth insulating layer may be provided between the first source / drain metal layer 204 and the second source / drain metal layer 205.

[0089] In some examples, such as Figure 11 As shown, the light-emitting structure layer 400 may include: an anode layer 401, a pixel definition layer 402, an organic light-emitting layer, and a cathode layer 403 sequentially disposed on the substrate 100. The anode layer 401 can be electrically connected to the pixel circuit of the circuit structure layer 200, the organic light-emitting layer can be connected to the anode layer 401, and the cathode layer 403 can be connected to the organic light-emitting layer. Under the drive of the anode layer 401 and the cathode layer 403, the organic light-emitting layer can emit light of the corresponding color. The encapsulation structure layer 500 may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked together. The first and third encapsulation layers may be made of inorganic materials, and the second encapsulation layer may be made of organic materials. The second encapsulation layer may be disposed between the first and third encapsulation layers to form an inorganic / organic / inorganic material stacked structure, which can ensure that external moisture cannot enter the light-emitting structure layer. In some possible implementations, the display substrate may also include other film layers, such as a touch structure layer, a color filter layer, etc., which are not limited herein.

[0090] The structure and preparation process of the display substrate are exemplarily described below. The "patterning process" in the embodiments of the present disclosure includes coating photoresist, mask exposure, development, etching, stripping photoresist and the like for metal material, inorganic material or transparent conductive material, and includes coating organic material, mask exposure and development and the like for organic material. The deposition can adopt any one or more of sputtering, evaporation and chemical vapor deposition, the coating can adopt any one or more of spraying, spin coating and inkjet printing, and the etching can adopt any one or more of dry etching and wet etching, which are not limited by the present disclosure. The "thin film" refers to a thin film of a certain material on a substrate made by deposition, coating or other processes. If the "thin film" does not need to be patterned during the entire manufacturing process, the "thin film" can also be referred to as a "layer". If the "thin film" needs to be patterned during the entire manufacturing process, it is referred to as a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern". The "A and B are in the same layer structure" or "A and B are arranged in the same layer" in the embodiments of the present disclosure means that A and B are formed at the same time by the same patterning process, or the distance between the surface close to the substrate side of A and B and the substrate is substantially the same, or the surface close to the substrate side of A and B directly contacts the same film layer. The "thickness" of the film layer is the size of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of the present disclosure, "the orthographic projection of B is within the orthographic projection of A" or "the orthographic projection of A contains the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps the boundary of the orthographic projection of B.

[0091] In some exemplary embodiments, the preparation process of the display substrate can include the following operations.

[0092] (1) providing a substrate. In some examples, the substrate 100 can be a rigid substrate or a flexible substrate. For example, the rigid substrate can be, but is not limited to, one or more of glass, quartz; the flexible substrate can be, but is not limited to, one or more of polyethylene terephthalate, terephthalate, polyether ether ketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, textile fibers. In some examples, the flexible substrate can include a first flexible material layer, a first inorganic material layer, a second flexible material layer and a second inorganic material layer stacked together, the materials of the first and second flexible material layers can be polyimide (PI), polyethylene terephthalate (PET) or surface treated polymer soft film and the like, and the materials of the first and second inorganic material layers can be silicon nitride (SiNx) or silicon oxide (SiOx) and the like, for improving the water and oxygen resistance of the substrate.

[0093] (2) Forming a semiconductor layer. In some examples, a semiconductor thin film is deposited on the substrate 100, the semiconductor thin film is patterned by a patterning process, and a semiconductor layer 201 is formed in the second display area A2. In some examples, the material of the semiconductor layer 201 can be amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, or polythiophene.

[0094] In some examples, the semiconductor layer 201 of the second display area A2 can include an active layer of a plurality of transistors of a plurality of pixel circuits (for example, an active layer of the first transistor T1). The active layer of the transistor can include a first region, a second region, and a channel region between the first region and the second region. In some examples, the first region and the second region of the active layer can be interpreted as a source electrode or a drain electrode of the transistor. The part of the active layer between the transistors can be interpreted as a wiring doped with impurities, which can be used to electrically connect the transistors. The channel region can not be doped with impurities and has a semiconductor property. The first region and the second region on both sides of the channel region can be doped with impurities and thus have electrical conductivity. The impurities can vary depending on the type of the transistor. However, the present embodiment is not limited thereto.

[0095] (3) Forming a first gate metal layer. In some examples, on the substrate 100 on which the foregoing structure is formed, a first insulating thin film and a first conductive thin film are sequentially deposited, the first conductive thin film is patterned by a patterning process, a first insulating layer 211 covering the semiconductor layer 201 is formed, and a first gate metal layer 202 is disposed on the first insulating layer 211 in the second display area A2. In some examples, the first gate metal layer 202 can include a gate electrode of a transistor of a plurality of pixel circuits and one of the plates of a storage capacitor (for example, including a gate electrode of the first transistor T1 and a first plate of the first capacitor C1).

[0096] (4) Forming a second gate metal layer. In some examples, on the substrate 100 on which the foregoing structure is formed, a second insulating thin film and a second conductive thin film are sequentially deposited, the second conductive thin film is patterned by a patterning process, a second insulating layer 212 is formed, and a second gate metal layer 203 is disposed on the second insulating layer 212 in the second display area A2. In some examples, the second gate metal layer 203 can include the other plate of the storage capacitor of the plurality of pixel circuits (for example, including a second plate of the first capacitor C1).

[0097] (5) Forming a first source-drain metal layer. In some examples, a third insulating thin film is deposited on the substrate 100 formed with the aforementioned patterns, and the third insulating thin film is patterned by a patterning process to form a third insulating layer 213. The third insulating layer 213 of the second display area A2 can be provided with a plurality of through holes, for example, the plurality of through holes can respectively expose the surfaces of the semiconductor layer 201, the first gate metal layer 202 and the second gate metal layer 203. Subsequently, a third conductive thin film is deposited, and the third conductive thin film is patterned by a patterning process to form the first source-drain metal layer 204 on the third insulating layer 213 of the second display area A2. In some examples, the first source-drain metal layer 204 can include the first electrode and the second electrode of the transistors of the plurality of pixel circuits (for example, including the first electrode and the second electrode of the first transistor T1).

[0098] (6) Forming a second source-drain metal layer. In some examples, a fourth insulating thin film is deposited on the substrate 100 formed with the aforementioned patterns to form a fourth insulating layer 214; subsequently, a fifth insulating thin film is coated and patterned by a patterning process to form a fifth insulating layer 215. In some examples, the fourth insulating layer 214 can be etched after the fifth insulating layer 215 is provided with through holes or grooves to form through holes or grooves provided in the fourth insulating layer 214 to expose the surface of the first source-drain metal layer 204. Subsequently, a fourth conductive thin film is deposited, and the fourth conductive thin film is patterned by a patterning process to form the second source-drain metal layer 205 on the fifth insulating layer 215 of the second display area A2. In some examples, the second source-drain metal layer 205 can include a plurality of first anode connection electrodes. The first anode connection electrodes can be configured to be electrically connected to the first pixel circuit or the second pixel circuit.

[0099] (7) Forming a second transparent conductive layer. In some examples, a sixth insulating thin film is coated on the substrate 100 formed with the aforementioned patterns, and the sixth insulating thin film is patterned by a patterning process to form a sixth insulating layer 216. Subsequently, a second transparent conductive thin film is deposited, and the second transparent conductive thin film is patterned by a patterning process to form the second transparent conductive layer 302. In some examples, the second transparent conductive layer 302 can include a plurality of second anode connection electrodes in the second display area A2, and a plurality of first conductive lines 34, a plurality of second conductive lines and a plurality of third conductive lines. The second anode connection electrodes can be electrically connected to the first anode connection electrodes electrically connected to the second type of pixel circuit. The first conductive lines 31, the second conductive lines and the third conductive lines can be electrically connected to the first anode connection electrodes electrically connected to the first type of pixel circuit. The first conductive lines 31, the second conductive lines and the third conductive lines can extend from the second display area A2 to the first display area A1.

[0100] (8) Forming a first transparent conductive layer. In some examples, a seventh insulating film is coated on the substrate 100 formed with the aforementioned pattern, and the seventh insulating film is patterned by a patterning process to form a seventh insulating layer 217. Subsequently, a first transparent conductive film is deposited, and the first transparent conductive film is patterned by a patterning process to form a first transparent conductive layer 301 in the first display area Al. In some examples, the first transparent conductive layer 301 can include a plurality of first connection lines 31, a plurality of second connection lines, and a plurality of third connection lines.

[0101] (9) Forming an anode layer, a pixel definition layer, an organic light-emitting layer, a cathode layer, and an encapsulation structure layer in sequence. In some examples, an anode film is deposited on the substrate 100 formed with the aforementioned pattern, and the anode film is patterned by a patterning process to form an anode layer 401. For example, the anode layer 401 can include the anode 210 of the fourth light-emitting element in the second display area A2 and the anode 110 of the first light-emitting element in the first display area Al. There can be no insulating layer between the anode layer 210 of the first display area Al and the first transparent conductive layer 301. The first connection line 31 of the first transparent conductive layer 301 can be in direct contact with the anode 110 of the first light-emitting element. The first connection line 31 to which the anode 110 of one first light-emitting element is electrically connected can be electrically connected to the first conductive line 34 through a via hole formed in the seventh insulating layer 217 to achieve electrical connection to the first pixel circuit of the second display area A2. The anode 210 of the fourth light-emitting element can be electrically connected to the second anode connection electrode through a via hole formed in the seventh insulating layer 217 to achieve electrical connection to the second type of pixel circuit. However, the present embodiment is not limited thereto. In other examples, the anode of the first light-emitting element can be electrically connected to the first conductive line 34 through a via hole formed in the seventh insulating layer 217.

[0102] Subsequently, a pixel definition film is coated on the substrate 100 formed with the aforementioned pattern, and a pixel definition layer 402 is formed by a mask, exposure, and development process. The pixel definition layer 402 can be formed with a plurality of pixel openings exposing the anode layer. Subsequently, an organic light-emitting layer is formed in the aforementioned pixel openings. For example, the organic light-emitting layer 211 of the fourth light-emitting element in the second display area A2 is connected to the anode 210, and the organic light-emitting layer 111 of the first light-emitting element in the first display area Al is connected to the anode 110. Subsequently, a cathode film is deposited, and the cathode film is patterned by a patterning process to form a cathode layer 403 electrically connected to the organic light-emitting layer and the second power supply line, respectively. In some examples, an encapsulation structure layer 500 is formed on the cathode layer 403, and the encapsulation structure layer 500 can include a stacked structure of inorganic material / organic material / inorganic material.

[0103] In some example embodiments, the first gate metal layer 202, the second gate metal layer 203, the first source-drain metal layer 204 and the second source-drain metal conductive layer 205 can adopt a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy material of the above-mentioned metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), which can be a single-layer structure, or a multi-layer composite structure, such as Mo / Cu / Mo, etc. The first insulating layer 211, the second insulating layer 212, the third insulating layer 213 and the fourth insulating layer 214 can adopt any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), which can be a single layer, a multi-layer or a composite layer. The first insulating layer 211 and the second insulating layer 212 can be referred to as gate insulating (GI) layers, the third insulating layer 213 can be referred to as an interlayer insulating (ILD) layer, and the fourth insulating layer 214 can be referred to as a passivation layer. The fifth insulating layer 215, the sixth insulating layer 216 and the seventh insulating layer 217 can adopt an organic material such as polyimide, acrylic or polyethylene terephthalate. The pixel definition layer 402 can adopt an organic material such as polyimide, acrylic or polyethylene terephthalate. The anode layer 401 can adopt a reflective material such as metal, and the cathode layer 403 can adopt a transparent conductive material. However, the present embodiment is not limited thereto.

[0104] The structure of the display substrate and the preparation process thereof of the present embodiment are merely exemplary. In some example embodiments, the corresponding structure can be changed, and the patterning process can be increased or reduced according to actual needs. For example, the display substrate can not include the second source-drain metal layer. However, the present embodiment is not limited thereto.

[0105] In the preparation process of the display substrate of the present embodiment, by providing the first transparent conductive layer, the second transparent conductive layer and the seventh insulating layer, the electrical connection of the first type of pixel circuit and the first area light emitting element can be achieved. Compared with the preparation scheme using three transparent conductive layers and three insulating layers, the present example can simplify the preparation process, is easy to implement, has high production efficiency, low production cost and high yield.

[0106] In the display substrate provided by the present embodiment, the first type of pixel circuit electrically connected to the light emitting elements emitting different color lights in a row of first area light emitting elements can be located in at least two rows, which can be beneficial to shorten the length of the conductive wire connecting the first area light emitting element and the first type of pixel circuit, thereby weakening the brightness difference between the first display area and the second display area, and improving the display effect of the display substrate.

[0107] Figure 12 Another partial plan view of the display substrate of at least one embodiment of the present disclosure is shown. In some examples, as shown in FIG. 6, the display substrate can further include a second type of pixel circuit 301, which can be electrically connected to the second area light emitting element 302 in the second display area 300. The second type of pixel circuit 301 can be electrically connected to the second area light emitting element 302 in the second display area 300 through a conductive line 303. Figure 12As shown, the first display area A1 of the display substrate can include a plurality of first area light emitting elements. The plurality of first area light emitting elements can include a plurality of first light emitting elements 11 emitting first color light, a plurality of second light emitting elements 12 emitting second color light, and a plurality of third light emitting elements 13 emitting third color light. Four third light emitting elements 13 electrically connected by the first type third connection line 33a can be a first light emitting unit, and two third light emitting elements 13 electrically connected by the second type third connection line 33b can be a second light emitting unit. In the first direction D1, the first light emitting unit and the second light emitting unit are arranged at intervals. The remaining structure of the display substrate of the present embodiment can refer to the description of the foregoing embodiments, and will not be described here.

[0108] Figure 13 Another partial plan view of a display substrate of at least one embodiment of the present disclosure. In some examples, as shown in FIG. 13, the display substrate 100 can include a plurality of first area light emitting elements 11, a plurality of second area light emitting elements 12, and a plurality of third area light emitting elements 13. The plurality of first area light emitting elements 11 can include a plurality of first light emitting elements 11 emitting first color light. The plurality of second area light emitting elements 12 can include a plurality of second light emitting elements 12 emitting second color light. The plurality of third area light emitting elements 13 can include a plurality of third light emitting elements 13 emitting third color light. The first type third connection line 33a can electrically connect four third light emitting elements 13, and the second type third connection line 33b can electrically connect two third light emitting elements 13. In the first direction D1, the first light emitting unit and the second light emitting unit are arranged at intervals. The remaining structure of the display substrate of the present embodiment can refer to the description of the foregoing embodiments, and will not be described here. Figure 13As shown, the plurality of first area light emitting elements of the first display area A1 can include a plurality of first light emitting elements 11 emitting first color light, a plurality of second light emitting elements 12 emitting second color light, and a plurality of third light emitting elements 13 emitting third color light. Each third connection line 33 can electrically connect three third light emitting elements 13. The three third light emitting elements 13 electrically connected by each third connection line 33 can be arranged in two rows. The plurality of third connection lines 33 can include a plurality of third-type third connection lines 33c and a plurality of fourth-type third connection lines 33d. The three third light emitting elements 13 electrically connected by the third-type third connection line 33c and the three third light emitting elements 13 electrically connected by the fourth-type third connection line 33d can be arranged in a 2x3 array. The third-type third connection line 33c can be configured to electrically connect three adjacent third light emitting elements 13, two of which are in the same row and two of which are in the same column. The third-type third connection line 33c can include two straight line segments, one of which electrically connects two third light emitting elements 13 in the same column and the other of which electrically connects two third light emitting elements 13 in the same row. For example, the third-type third connection line 33c can have an L-shaped projection on the substrate. The fourth-type third connection line 33d can be configured to electrically connect three adjacent third light emitting elements 13, two of which are in the same row and two of which are in the same column. The fourth-type third connection line 33d can include one straight line segment and one arcuate segment, the straight line segment electrically connecting two third light emitting elements 13 in the same column and the arcuate segment electrically connecting two third light emitting elements 13 not in the same row and column. For example, the fourth-type third connection line 33d can have a V-shaped projection on the substrate. For example, a first area light emitting element partially surrounded by adjacent third-type third connection lines 33c and fourth-type third connection lines 33d can emit different color light. For example, a third-type third connection line 33c partially surrounds a first light emitting element 11, and an adjacent fourth-type third connection line 33d partially surrounds a second light emitting element 12. In the present disclosure, adjacent third-type third connection lines and fourth-type third connection lines refer to a first light emitting element electrically connected by a third-type third connection line and a first light emitting element electrically connected by a fourth-type third connection line being in the same column. The remaining structures of the display substrate of the present embodiment can be referred to the descriptions of the foregoing embodiments, which will not be described here.

[0109] The present example combines driving a plurality of first area light emitting elements by a first-type pixel circuit and a first-type pixel circuit electrically connected to light emitting elements emitting different color light in a row of first area light emitting elements being in at least two rows, which is advantageous for shortening the length of conductive lines, reducing the brightness difference between the first display area and the second display area, ensuring display quality, reducing the number of connection lines, and thus reducing product cost.

[0110] The display device according to the embodiments of the present disclosure can also be a display substrate as described above.

[0111] Figure 14 FIG. 1 is a schematic diagram of a display device according to an embodiment of the present disclosure. As shown in FIG. 1, the embodiment provides a display device including a display substrate 91 and a photosensitive sensor 92 located on the light-out side of the display structure layer of the display substrate 91. The photosensitive sensor 92 has an intersection with the first display area A1 in the orthographic projection on the display substrate 91. Figure 14

[0112] In some examples, the display substrate 91 can be a flexible OLED display substrate, a QLED display substrate, a Micro-LED display substrate, or a Mini-LED display substrate. The display device can be an OLED display, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, or any product or component having a display function, and the embodiments of the present disclosure are not limited thereto.

[0113] The drawings in the present disclosure only involve the structures related to the present disclosure, and other structures can be referred to the general design. In the case of no conflict, the features in the embodiments of the present disclosure can be combined with each other to obtain new embodiments. It should be understood by those skilled in the art that the technical solutions of the present disclosure can be modified or replaced equivalently without departing from the spirit and scope of the technical solutions of the present disclosure, and all should be covered in the scope of the claims of the present disclosure.​

Claims

1. A display substrate, characterized in that, include: The substrate includes a first display area and a second display area located at least one side of the first display area; Multiple light-emitting elements are located in the first display area and the second display area. The multiple light-emitting elements include multiple groups of light-emitting elements. Each group of light-emitting elements is arranged along a first direction. The multiple groups of light-emitting elements are arranged along a second direction. At least one group of light-emitting elements in the multiple groups of light-emitting elements includes multiple first area light-emitting elements and multiple second area light-emitting elements. The multiple first area light-emitting elements are located in the first display area, and the multiple second area light-emitting elements are located in the second display area. Multiple pixel circuits are located in the second display area. The multiple pixel circuits include multiple groups of pixel circuits. Each group of pixel circuits is arranged along the first direction. The multiple groups of pixel circuits are arranged along the second direction. At least one group of pixel circuits includes multiple first-type pixel circuits and multiple second-type pixel circuits. The multiple first-type pixel circuits are spaced apart between the multiple second-type pixel circuits. Wherein, at least one of the plurality of first-type pixel circuits is electrically connected to at least one of the plurality of first-region light-emitting elements, and at least one of the plurality of second-type pixel circuits is electrically connected to at least one of the plurality of second-region light-emitting elements. The plurality of first-region light-emitting elements include at least: a plurality of first light-emitting elements emitting first-color light and a plurality of second light-emitting elements emitting second-color light; the plurality of first-type pixel circuits include at least: a plurality of first pixel circuits and a plurality of second pixel circuits; the plurality of first light-emitting elements and the plurality of first pixel circuits are electrically connected through a plurality of first conductive lines, and the plurality of second light-emitting elements and the plurality of second pixel circuits are electrically connected through a plurality of second conductive lines; The plurality of first pixel circuits electrically connected to the plurality of first light-emitting elements in the at least one group of light-emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light-emitting elements are located in different groups of pixel circuits; the first direction and the second direction intersect. The plurality of first-region light-emitting elements further include: a plurality of third light-emitting elements emitting third-color light; the plurality of first-type pixel circuits further include: a plurality of third-pixel circuits, wherein the plurality of third light-emitting elements and the plurality of third-pixel circuits are electrically connected through a plurality of third conductive lines; The plurality of third pixel circuits electrically connected to the plurality of third light-emitting elements in the at least one group of light-emitting elements are located in the same group of pixel circuits as the plurality of first pixel circuits electrically connected to the plurality of first light-emitting elements; or, the plurality of third pixel circuits electrically connected to the plurality of third light-emitting elements in the at least one group of light-emitting elements are located in the same group of pixel circuits as the plurality of second pixel circuits electrically connected to the plurality of second light-emitting elements. At least one of the third pixel circuits is electrically connected to n1 of the third light-emitting elements and is configured to drive the n1 of the third light-emitting elements to emit light. At least one of the third pixel circuits is electrically connected to n2 of the third light-emitting elements and is configured to drive the n2 of the third light-emitting elements to emit light. Both n1 and n2 are integers greater than or equal to 2, and n1 is different from n2.

2. The display substrate according to claim 1, characterized in that, The pixel circuit group containing the plurality of first pixel circuits electrically connected to the plurality of first light-emitting elements in the at least one group of light-emitting elements is adjacent to the pixel circuit group containing the plurality of second pixel circuits electrically connected to the plurality of second light-emitting elements in the second direction.

3. The display substrate according to claim 1, characterized in that, The first conductive line, the second conductive line, and the third conductive line are in the same layer.

4. The display substrate according to claim 1, characterized in that, The plurality of third pixel circuits electrically connected to the plurality of third light-emitting elements in the at least one group of light-emitting elements are all closer to the first display area than the plurality of first pixel circuits electrically connected to the plurality of first light-emitting elements and the plurality of second pixel circuits electrically connected to the plurality of second light-emitting elements.

5. The display substrate according to claim 1, characterized in that, n1 of the third light-emitting elements are first light-emitting units, and n2 of the third light-emitting elements are second light-emitting units. The first light-emitting units and the second light-emitting units are arranged at intervals along the first direction, or arranged periodically in the order of the first light-emitting unit, the second light-emitting unit, the second light-emitting unit, and the first light-emitting unit.

6. The display substrate according to claim 1, characterized in that, The display substrate further includes: multiple third connection lines located in the first display area, and n1 or n2 third light-emitting elements are electrically connected through a third connection line.

7. The display substrate according to claim 1, characterized in that, Multiple third conductive lines electrically connected to multiple third pixel circuits in the same group of pixel circuits and multiple first conductive lines electrically connected to multiple first pixel circuits are located on opposite sides of the group of pixel circuits in the second direction; or, multiple third conductive lines electrically connected to multiple third pixel circuits in the same group of pixel circuits and multiple second conductive lines electrically connected to multiple second pixel circuits are located on opposite sides of the group of pixel circuits in the second direction.

8. The display substrate according to any one of claims 1 to 7, characterized in that, The first color light is red light, the second color light is blue light, and the third color light is green light.

9. The display substrate according to claim 1, characterized in that, At least one of the plurality of first pixel circuits is electrically connected to m1 first light-emitting elements and is configured to drive m1 first light-emitting elements to emit light; At least one of the plurality of second pixel circuits is electrically connected to m2 second light-emitting elements and is configured to drive m2 second light-emitting elements to emit light, where m1 and m2 are both integers greater than or equal to 2.

10. A display device, characterized in that, Includes the display substrate as described in any one of claims 1 to 9.

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