Signal path automatic extraction method, system, device and storage medium

Abstract

The present invention provides a method, system, device, and storage medium for automatically extracting signal paths, specifically comprising selecting a number of target nodes in an integrated circuit simulation process, performing simulation operations on the target nodes to obtain corresponding truth tables, and finally extracting corresponding signal paths based on the analysis results by analyzing the truth tables. The technical solution provided by this application can automatically extract corresponding signal paths for any standard cell, without requiring any pre-acquisition steps or user pre-settings for the functions of the standard cell, and has a wide range of applications. In the process of extracting the signal paths corresponding to the standard cells, the signal paths are directly obtained by analyzing the truth tables without requiring any user input, resulting in autonomous and convenient operations and widespread applicability.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular discloses a method, system, device and storage medium for automatically extracting a signal path. Background Art

[0002] Standard cells must be characterized to be understood and used by the various tools in the CAD flow. For example, after designing a cell's schematic and layout, while CAD tools can understand the cell's transistor netlist and layout, they cannot understand it in a way that allows the behavioral description to be synthesized into the cell. Other cell characteristics, such as input load, speed, and power consumption, are also not understood by the tools. Synthesis tools need to know the cell's logical function, the load presented by the cell's inputs to the signals connected to it, the cell's speed under different input slopes and output loads, the power consumption of the cell, and the cell's area in order to effectively synthesize a behavioral description into a set of standard cells. Cell characterization is the process of simulating standard cells with an analog simulator to extract this information that can be understood by other tools. Signal path extraction is the foundation of cell characterization: the accuracy and completeness of the signal path extraction determines the accuracy of the characterization.

[0003] In the prior art, when extracting or generating signal paths, the function of a standard cell must first be identified, or generated based on user customization. If the function definition of a standard cell cannot be identified, the corresponding signal path cannot be obtained. Typically, when identifying a standard cell, the identification operation is performed by matching a known set of functions, such as a D-latch or D-flip-flop. Summary of the Invention

[0004] The present invention provides a signal path automatic extraction method, system, device and computer-readable storage medium.

[0005] In a first aspect of the present application, a method for automatically extracting a signal path is provided, which may specifically include the following steps:

[0006] Selecting several target nodes in the integrated circuit simulation process;

[0007] Perform simulation operations on the target node to obtain the corresponding truth table;

[0008] Analyze the truth table to extract the signal path based on the analysis results;

[0009] The signal path is used to obtain the cell representation corresponding to the standard cell during the integrated circuit simulation process.

[0010] In a possible implementation of the first aspect, selecting a plurality of target nodes in an integrated circuit simulation process includes the following steps:

[0011] Selecting a target node according to user instructions; and / or

[0012] During the integrated circuit simulation process, integrated circuit nodes to be stimulated and / or observed are automatically extracted as target nodes.

[0013] In a possible implementation of the first aspect, automatically extracting integrated circuit nodes to be stimulated and / or observed as target nodes includes the following steps:

[0014] In integrated circuits, the input and output pins of semiconductor devices are distinguished based on their conduction characteristics and connection relationships to obtain the distribution of input and output pins;

[0015] According to the distribution of input pins and output pins and the channel connectivity relationship of the integrated circuit, decomposition is performed to obtain several channel connectivity blocks;

[0016] The connection relationship between the channel connection blocks is analyzed to obtain the internal state storage node and use it as the target node.

[0017] In a possible implementation of the first aspect, the truth table covers all Boolean combinations of all input pins and / or output pins and corresponding internal state storage nodes;

[0018] The Boolean combination corresponding to each internal state storage node corresponds to a row in the truth table.

[0019] In a possible implementation of the first aspect, performing a simulation operation on the target node to obtain a corresponding truth table includes:

[0020] Simulate the operation through a circuit simulator; or

[0021] The simulation operation is performed through a switch-level simulator.

[0022] In a possible implementation of the first aspect, analyzing the truth table to extract the signal path according to the analysis result includes the following steps:

[0023] Traverse the truth table to make associated row combinations based on changes in input states;

[0024] It is determined whether the state change of the associated row combination complies with the preset electrical characteristics and the preset logical features, and a signal path is extracted from the associated row combination that complies with the preset electrical characteristics and the preset logical features.

[0025] A second aspect of the present application provides a signal path automatic extraction system, which is applied to the signal path automatic extraction method of the first aspect;

[0026] The automatic signal path extraction system includes:

[0027] A selection unit, used for selecting a number of target nodes in the integrated circuit simulation process;

[0028] A simulation unit, configured to perform simulation operations on a target node to obtain a corresponding truth table;

[0029] an analyzing unit, configured to analyze the truth table to extract a signal path according to an analysis result;

[0030] The signal path is used to obtain the cell representation corresponding to the standard cell during the integrated circuit simulation process.

[0031] In a possible implementation of the second aspect, the automatic signal path extraction system further includes:

[0032] The identification unit is used to identify the unit representation corresponding to the standard unit according to matching at least one set of known function groups.

[0033] A third aspect of the present application provides a signal path automatic extraction device, comprising:

[0034] memory for storing computer programs;

[0035] A processor is used to implement the signal path automatic extraction method provided by the first aspect when executing a computer program.

[0036] The fourth aspect of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the signal path automatic extraction method provided in the first aspect is implemented.

[0037] Compared with the prior art, this application has the following beneficial effects:

[0038] The technical solution proposed in this application enables the acquisition of internal state storage nodes in an integrated circuit as target nodes for simulation based on the direction identification of the input and / or output pins of standard cells in a channel interconnect block, and the corresponding signal paths are then extracted from a truth table of the target nodes. The technical solution provided in this application enables the automatic extraction of corresponding signal paths for any standard cell, eliminating the need for any pre-acquisition steps or user pre-settings for the functions of the standard cell, and thus has a wide range of applications. During the extraction of the signal paths corresponding to the standard cells, the paths are directly acquired through analysis of the truth table, without requiring any user input, resulting in autonomous and convenient operation and widespread applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:

[0040] Figure 1 According to an embodiment of the present application, a flow chart of a method for automatically extracting a signal path is shown;

[0041] Figure 2 According to an embodiment of the present application, a schematic diagram of a process for automatically extracting integrated circuit nodes to be stimulated and / or observed as target nodes is shown;

[0042] Figure 3 According to an embodiment of the present application, a schematic diagram of a process for analyzing a truth table to extract a signal path based on the analysis result is shown;

[0043] Figure 4 According to an embodiment of the present application, a structural schematic diagram of a signal path automatic extraction system is shown;

[0044] Figure 5 According to an embodiment of the present application, a schematic structural diagram of a signal path automatic extraction device is shown;

[0045] Figure 6 According to an embodiment of the present application, a structural schematic diagram of a computer-readable storage medium is shown. DETAILED DESCRIPTION

[0046] The present invention will be described in detail below with reference to specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those skilled in the art, several changes and improvements can be made without departing from the scope of the present invention. These all fall within the scope of protection of the present invention.

[0047] As used herein, the term "including" and its variations represent open inclusion, i.e., "including but not limited to." Unless otherwise stated, the term "or" means "and / or." The term "based on" means "based at least in part on." The terms "an example embodiment" and "an embodiment" mean "at least one example embodiment." The term "another embodiment" means "at least one additional embodiment." The terms "first," "second," etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0048] Based on the relevant descriptions in the aforementioned prior art, it can be known that in the process of extracting or generating signal paths, the function of the standard cell must first be identified, or generated based on user customization; and in the case where the function is unknown or not pre-set by the user, it is impossible to obtain the required signal path. In response to the above problems, the present application provides a method, system, device and storage medium for automatic extraction of signal paths, wherein a number of target nodes are selected during the simulation process of an integrated circuit, simulation operations are performed on the target nodes to obtain the corresponding truth table, and finally the truth table is analyzed to extract the corresponding signal path according to the analysis results. There is no need to obtain the function of the standard cell in advance or require the user to customize it. The signal path extraction can be achieved for any standard cell, has a wide range of applications, saves related labor costs, and has promotional value. The technical solution provided by the present application will be explained and illustrated in conjunction with the embodiments below.

[0049] In some embodiments of the present application, Figure 1 FIG. 1 shows a flow chart of a method for automatically extracting a signal path. Figure 1 As shown, the automatic signal path extraction method may specifically include:

[0050] Step 101: Select several target nodes in the integrated circuit simulation process. The specific process of selecting the target nodes will be described and explained in detail later.

[0051] Step 102: Perform simulation operations on the target node to obtain a corresponding truth table.

[0052] Step 103: Analyze the truth table to extract the signal path based on the analysis results. The signal path is used to obtain the cell representation corresponding to the standard cell during the integrated circuit simulation process. The specific analysis process of the truth table will be described later.

[0053] Through the above steps 101 to 103, the signal path for any standard cell can be obtained, thereby facilitating the acquisition of the cell characterization of the standard cell without manual intervention and having wide applicability. The specific implementation process of the above steps 101 to 103 will be described below.

[0054] In some embodiments of the present application, further, during the target node selection process, the selection behavior can be based on user-defined conditions, or can be automatic selection of integrated circuit nodes to be stimulated and / or observed during the integrated circuit simulation process, which is not limited herein. It is understood that during the automatic signal path extraction process, the user is allowed to customize the selection of some target nodes in the integrated circuit, while the remaining target nodes are autonomously selected by the system through the execution of the automatic selection method, thereby ensuring the efficiency and accuracy of the automatic signal path extraction and saving the corresponding manual intervention costs.

[0055] Further, Figure 2 A schematic diagram of a process for automatically extracting integrated circuit nodes to be stimulated and / or observed as target nodes is shown. Specifically, Figure 2 As shown, the following steps may be included:

[0056] Step 201: In an integrated circuit, distinguish input pins and output pins of a semiconductor device according to the conduction characteristics and connection relationship of the semiconductor device to obtain the distribution of the input pins and the output pins.

[0057] Step 202: Decompose the integrated circuit to obtain a plurality of channel connection blocks according to the distribution of the input pins and the output pins and the channel connection relationship of the integrated circuit.

[0058] Step 203: Analyze the connection relationship between the channel communication blocks to obtain the internal state storage node and use it as the target node.

[0059] It is understood that during the execution of steps 201 to 203 above, the integrated circuit can be distinguished between input pins and output pins based on the conduction characteristics and connection relationship of the semiconductor device, and the internal state storage node can be found. For example, the conduction characteristics can include the conduction relationship between the gate-controlled source and the drain. Generally speaking, the input pin is connected to the signal source, and the output pin is connected to the source or drain. Then, starting from the output pin, it can be decomposed into channel connection blocks (CCBs) according to the channel connection relationship. The internal state storage node and the voltage of each pin and node are obtained by analyzing the connection relationship of the channel connection blocks. The above-mentioned channel connection block (CCB) refers to the channel connection part from the source to the drain of the unit. For example, a single-level unit (such as an inverter, a NAND gate, and a NOR gate unit) only contains one channel connection block, that is, the entire unit is connected through only one channel connection area, while a multi-level unit (such as an AND gate and an OR gate unit) contains multiple channel connection blocks. The distribution of internal state storage nodes and the corresponding voltage conditions can be intuitively obtained through the connection relationship of the channel interconnection blocks.

[0060] In some embodiments of the present application, during the process of performing a simulation operation on a target node, the simulation operation may include performing a simulation operation using a simulated circuit simulator (SPICE) or a switch-level simulator, without limitation herein. Those skilled in the art may select an appropriate simulation operation mode based on actual application circumstances.

[0061] In some embodiments of the present application, Figure 3 A schematic diagram of a process of analyzing a truth table to extract a signal path according to the analysis result is shown. Figure 3 As shown, the following steps may be included:

[0062] Step 301: traverse the truth table to perform associated row combinations according to changes in input states.

[0063] Step 302: Determine whether the state change of the associated row combination complies with the preset electrical characteristics and the preset logical features, and extract the signal path from the associated row combination that complies with the preset electrical characteristics and the preset logical features.

[0064] It is understood that based on the automatic target node extraction solution provided in the aforementioned embodiment, the truth table covers all Boolean combinations of all input pins and / or output pins and corresponding internal state storage nodes. If there are N internal state storage nodes, there are corresponding 2N-power Boolean combinations, and each Boolean combination corresponding to an internal state storage node corresponds to a row in the truth table. By traversing the truth table, it is possible to determine which rows have associated changes when the input state of the integrated circuit changes. These associated row combinations can then be learned and extracted through the truth table.

[0065] Furthermore, after obtaining the associated row combination, it is necessary to observe whether the state changes of the associated rows conform to the corresponding electrical and logical characteristics of the integrated circuit. The relevant electrical and logical characteristics can be obtained by simulating the integrated circuit, which is not limited here. Those skilled in the art can select an appropriate verification procedure based on actual application conditions. If the obtained associated row combination conforms to the relevant electrical and logical characteristics, the corresponding signal path can be obtained based on the node distribution corresponding to the associated row combination.

[0066] In some embodiments of the present application, Figure 4 A signal path automatic extraction system is provided, which is applied to the signal path automatic extraction method provided in the above embodiment. Figure 4 As shown, the automatic signal path extraction system may include:

[0067] The selection unit 001 is used to select several target nodes in the integrated circuit simulation process.

[0068] The simulation unit 002 is used to perform simulation operations on the target node to obtain a corresponding truth table.

[0069] The analysis unit 003 is used to analyze the truth table to extract the signal path according to the analysis result. The signal path is used to obtain the cell representation corresponding to the standard cell during the integrated circuit simulation process.

[0070] It can be understood that the functions implemented by the selection unit 001 to the analysis unit 003 in the above functional modules correspond one-to-one to the actions performed by steps 101 to 103 in the above embodiments, and are not described in detail here.

[0071] Furthermore, in the solution provided in the above embodiment, the automatic signal path extraction system may further include an identification unit configured to identify the cell representation corresponding to the standard cell based on matching with at least one group of known function groups.

[0072] It is understood that the aforementioned prior art has already proposed that a known set of functional groups (e.g., D-type latches, D-type flip-flops, etc.) can be matched to perform standard cell identification operations. The automatic signal path extraction system provided in the above embodiment is also compatible with the functional module for identifying the functions of the above standard cells.

[0073] In some embodiments of the present application, a signal path automatic extraction device is further provided, which may include:

[0074] memory for storing computer programs;

[0075] A processor is used to implement the steps of the signal path automatic extraction method described in the technical solution of this application when executing a computer program.

[0076] It is understood that various aspects of the technical solution of the present application can be implemented as a system, method, or program product. Therefore, various aspects of the technical solution of the present application can be specifically implemented in the following forms, namely, a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation that combines hardware and software aspects, which can be collectively referred to as "circuit", "module" or "platform" herein.

[0077] Figure 5 According to some embodiments of the present application, a schematic diagram of the structure of a signal path automatic extraction device is shown. Figure 5 The electronic device 600 implemented according to the implementation in this embodiment is described in detail. Figure 5The electronic device 600 shown is merely an example and should not limit the functions and scope of use of any embodiment of the technical solution of the present application.

[0078] like Figure 5 As shown, electronic device 600 is implemented as a general-purpose computing device. The components of electronic device 600 may include, but are not limited to, at least one processing unit 610, at least one storage unit 620, a bus 630 connecting various platform components (including storage unit 620 and processing unit 610), and a display unit 640.

[0079] The storage unit stores program codes, which can be executed by the processing unit 610, so that the processing unit 610 performs the specific implementation steps of the signal path automatic extraction method in this embodiment. For example, the processing unit 610 can execute the following steps: Figures 1 to 3 Follow the steps shown in .

[0080] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access unit (RAM) 6201 and / or a cache storage unit 6202 , and may further include a read-only storage unit (ROM) 6203 .

[0081] The storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0082] Bus 630 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0083] The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), and may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or any device that enables the electronic device to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed through an input / output (I / O) interface 650. Furthermore, the electronic device 600 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 through the bus 630. It should be understood that although Figure 5Not shown, other hardware and / or software modules may be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms.

[0084] In some embodiments of the present application, a computer-readable storage medium is further provided, on which a computer program is stored. When the computer program is executed by a processor, the relevant steps of the signal path automatic extraction method provided in the above embodiments can be implemented.

[0085] Although this embodiment does not list other specific implementation methods in detail, in some possible implementation methods, the various aspects described in the technical solution of this application can also be implemented in the form of a program product, which includes program code. When the program product is run on a terminal device, the program code is used to enable the terminal device to execute the steps described in the image stitching method area of ​​the technical solution of this application according to the implementation methods in various embodiments of the technical solution of this application.

[0086] Figure 6 According to some embodiments of the present application, a schematic diagram of the structure of a computer-readable storage medium is shown. Figure 6 , which describes a program product 800 for implementing the above method according to an embodiment of the technical solution of the present application. The program product 800 may be a portable compact disc read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. Of course, the program product produced according to this embodiment is not limited thereto. In the technical solution of the present application, the readable storage medium may be any tangible medium that contains or stores a program, and the program may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0087] The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0088] Computer-readable storage media may include a data signal propagated in baseband or as a carrier wave region, wherein readable program code is carried. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination thereof.

[0089] The program code for performing the operations of the technical solutions of the present application can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as C or similar programming languages. The program code can be executed entirely on the user computing device, locally on the user device, as a separate software package, locally on the user computing device and locally on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network or a wide area network, or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0090] In summary, the technical solution provided by the present application can automatically extract the corresponding signal path for any standard cell. No pre-acquisition steps or user pre-settings are required for the functions of the standard cell, and the application range is wide. In the process of extracting the signal path corresponding to the standard cell, the truth table is directly analyzed to obtain the signal path without any user input. The operation is autonomous and convenient, and has promotional value.

[0091] The above description is only a description of the preferred embodiment of the technical solution of this application, and does not limit the scope of the technical solution of this application. Any changes and modifications made by ordinary technicians in the field of the technical solution of this application based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for automatically extracting a signal path, characterized in that: The automatic extraction method comprises the following steps: Selecting several target nodes in the integrated circuit simulation process; Performing a simulation operation on the target node to obtain a corresponding truth table; Analyzing the truth table to extract the signal path based on the analysis result; comprising the following steps: traversing the truth table to associate row combinations according to changes in input states; determining whether the state changes of the associated row combinations meet preset electrical characteristics and preset logical features, and extracting the signal path from the associated row combinations that meet the preset electrical characteristics and the preset logical features; The signal path is used to obtain a cell representation corresponding to a standard cell during the integrated circuit simulation process.

2. The method for automatically extracting a signal path according to claim 1, wherein: The step of selecting a plurality of target nodes in the integrated circuit simulation process comprises the following steps: Selecting the target node according to user instructions; and / or During the integrated circuit simulation process, integrated circuit nodes to be stimulated and / or observed are automatically extracted as the target nodes.

3. The automatic signal path extraction method according to claim 2, wherein: The automatically extracting the integrated circuit node to be stimulated and / or observed as the target node comprises the following steps: In the integrated circuit, distinguishing input pins and output pins of the semiconductor device according to the conduction characteristics and connection relationship of the semiconductor device to obtain the distribution of the input pins and the output pins; Decomposing the integrated circuit to obtain a plurality of channel connection blocks according to the distribution of the input pins and the output pins and the channel connection relationship of the integrated circuit; The connection relationship between the channel connection blocks is analyzed to obtain an internal state storage node and use it as the target node.

4. The automatic signal path extraction method according to claim 3, wherein: The truth table covers all Boolean combinations of all the input pins and / or the output pins and the corresponding internal state storage nodes; The Boolean combination corresponding to each of the internal state storage nodes corresponds to a row of the truth table.

5. The method for automatically extracting a signal path according to claim 1, wherein: The performing a simulation operation on the target node to obtain a corresponding truth table includes: Perform the simulation operation by using a simulation circuit simulator; or The simulation operation is performed by a switch-level simulator.

6. A signal path automatic extraction system, characterized in that: Applicable to the automatic signal path extraction method according to any one of claims 1 to 5; The signal path automatic extraction system comprises: A selection unit, used for selecting a number of target nodes in the integrated circuit simulation process; A simulation unit, configured to perform a simulation operation on the target node to obtain a corresponding truth table; An analysis unit, configured to analyze the truth table to extract the signal path based on the analysis result, comprising the following steps: traversing the truth table to associate row combinations based on changes in input states; determining whether state changes in the associated row combinations conform to preset electrical characteristics and preset logical features, and extracting the signal path from the associated row combinations that conform to the preset electrical characteristics and the preset logical features; The signal path is used to obtain a cell representation corresponding to a standard cell during the integrated circuit simulation process.

7. The automatic signal path extraction system according to claim 6, wherein: The signal path automatic extraction system further includes: The identification unit is configured to identify the unit representation corresponding to the standard unit based on matching at least one group of known function groups.

8. A signal path automatic extraction device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the signal path automatic extraction method according to any one of claims 1 to 5 when executing the computer program.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for automatically extracting a signal path according to any one of claims 1 to 5 is implemented.

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