An array substrate and its fabrication method, and a display device.

By setting staggered first and second passivation layer vias in the TFT-LCD display panel, the problem of organic materials being unable to flow into the vias is solved, achieving full filling of organic materials and improving product quality.

CN115458533BActive Publication Date: 2025-10-31BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202211137065.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-19
Publication Date
2025-10-31
Estimated Expiration
2042-09-19

AI Technical Summary

Technical Problem

During the fabrication of TFT-LCD display panels, organic materials at the via locations of the two passivation layers cannot flow into the vias, resulting in uneven diagonal lines on the product.

Method used

A substrate, a first passivation layer, and a second passivation layer are provided. The first passivation layer includes a first via, and the second passivation layer includes a second via with overlapping and non-overlapping portions, so that organic material can more easily flow into the first via along the non-overlapping portions.

Benefits of technology

This reduces the possibility of organic materials not being able to completely fill the vias, ensuring the quality of the display panel and avoiding unevenness in the diagonal lines.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application provides an array substrate, its fabrication method, and a display device, belonging to the field of display technology. The substrate includes: a substrate; a first passivation layer disposed on one side of the substrate, the first passivation layer including a first via; and a second passivation layer disposed on the side of the first passivation layer facing away from the substrate, the second passivation layer including a second via, the second via including an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion. The orthographic projection of the overlapping portion onto the substrate is within the orthographic projection range of the first via onto the substrate; the orthographic projection of the non-overlapping portion onto the substrate does not overlap with the orthographic projection of the first via onto the substrate, so that the second via and the first via are staggered. The array substrate, its fabrication method, and the display device provided by this application can reduce the occurrence of situations where organic materials cannot flow into the vias.
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Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to an array substrate, a method for fabricating the same, and a display device. Background Technology

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) is one of the most common types of liquid crystal displays. It uses thin film transistor technology to improve image quality and is used in televisions, flat panel displays, and projectors.

[0003] Currently, the manufacturing process of TFT-LCD display panels typically includes two passivation layers. These two passivation layers act as capacitors for thin-film transistors in the display panel, and vias are provided on both passivation layers to enable the connection of related electrodes of the thin-film transistors.

[0004] The manufacturing process of display panels includes a step of coating an organic layer. However, during the coating process, organic materials may not be able to flow into the vias between the two passivation layers, resulting in uneven diagonal lines in the final product. Summary of the Invention

[0005] This application provides an array substrate and its fabrication method, as well as a display device, which aims to reduce the occurrence of situations where organic materials cannot flow into the vias.

[0006] The first aspect of this application provides an array substrate, comprising:

[0007] Substrate;

[0008] A first passivation layer is disposed on one side of the substrate, and the first passivation layer includes a first via.

[0009] A second passivation layer is disposed on the side of the first passivation layer away from the substrate. The second passivation layer includes a second via, which includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion.

[0010] Wherein, the orthographic projection of the overlapping portion on the substrate is located within the orthographic projection range of the first via on the substrate;

[0011] The orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate, so that the second via and the first via are staggered.

[0012] Optionally, the orthographic projection of the first via on the substrate includes four connected first boundary lines;

[0013] The orthographic projection of the non-overlapping portion onto the substrate includes at least one second boundary line, which is parallel to the corresponding first boundary line and is located away from the overlapping portion.

[0014] Optionally, the orthographic projection of the non-overlapping portion onto the substrate includes a plurality of second boundary lines, all of which are away from the overlapping portion, and each second boundary line is parallel to the corresponding first boundary line;

[0015] The distance between each second boundary line and the first boundary line parallel to that second boundary line may be equal or unequal.

[0016] Optionally, the second via includes a non-overlapping portion located on one side of the first via.

[0017] Optionally, the second via includes two non-overlapping portions located on opposite sides of the overlapping portion, and the two non-overlapping portions are located on opposite sides of the first via.

[0018] Optionally, the second via includes three non-overlapping portions, which are located on three sides of the first via.

[0019] Optionally, the second via includes four non-overlapping portions, which are located on the four sides of the first via and are interconnected.

[0020] Optionally, the second via includes four non-overlapping portions, which are located on the four sides of the first via and are independent of each other.

[0021] Optionally, the materials of the first passivation layer and the second passivation layer include organic materials or inorganic materials.

[0022] Optionally, a stepped structure is formed between the first via, the non-overlapping portion, and the second passivation layer.

[0023] Optionally, the stepped structure can be a closed structure or a non-closed structure surrounding the first through hole.

[0024] Optionally, the projected area of ​​the first via on the substrate is smaller than the projected area of ​​the second via on the substrate.

[0025] A second aspect of this application provides a display device including an array substrate as provided in the first aspect of this application.

[0026] A third aspect of this application provides a method for fabricating an array substrate, the method comprising:

[0027] Provide substrate;

[0028] A first passivation layer is formed on one side of the substrate, the first passivation layer including a first via;

[0029] A second passivation layer is formed on the side of the first passivation layer away from the substrate. The second passivation layer includes a second via, which includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion.

[0030] Wherein, the orthographic projection of the overlapping portion on the substrate is located within the orthographic projection range of the first via on the substrate;

[0031] The orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate, so that the second via and the first via are staggered.

[0032] Beneficial effects:

[0033] This application provides an array substrate and its fabrication method, as well as a display device. By setting a substrate, a first passivation layer, and a second passivation layer, the first passivation layer includes a first via, and the second passivation layer includes a second via. The second via includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion, such that the orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate. This allows the second via and the first via to be staggered, thus making the first and second vias of the first passivation layer have irregular shapes. This allows organic material to flow more easily into the first via along the non-overlapping portion of the second via, thereby reducing the possibility of organic material not completely filling the first and second vias and ensuring the quality of the final product. Attached Figure Description

[0034] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of a planar structure of an array substrate according to an embodiment of this application;

[0036] Figure 2 yes Figure 1 Schematic diagram of the structure at section C-C';

[0037] Figure 3 This is a schematic diagram of a planar structure of an array substrate including a non-overlapping portion according to an embodiment of this application;

[0038] Figure 4 yes Figure 3 Schematic diagram of the structure at section D-D';

[0039] Figure 5 This is a schematic diagram of a planar structure of an array substrate comprising two non-overlapping portions, according to an embodiment of this application.

[0040] Figure 6 This is a schematic diagram of a planar structure of an array substrate comprising three non-overlapping portions, according to an embodiment of this application.

[0041] Figure 7 This is a schematic diagram of a planar structure of an array substrate comprising four non-overlapping portions according to an embodiment of this application;

[0042] Figure 8 This is a flowchart of the steps of a method for fabricating an array substrate according to an embodiment of this application.

[0043] Explanation of reference numerals in the attached figures: 10, substrate; 11, source electrode; 12, common electrode; 20, first passivation layer; A, first via; L1, first boundary line; 30, second passivation layer; B, second via; B1, overlapping portion; B2, non-overlapping portion; L2, second boundary line. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0045] In related technologies, the array substrate includes a first passivation layer and a second passivation layer, and both the first passivation layer and the second passivation layer have vias formed on them. The vias on the second passivation layer are formed inside the vias of the first passivation layer. The vias of the first passivation layer and the second passivation layer have relatively regular shapes. As a result, when coating an organic layer, it is easy for the organic layer to be unable to flow into the vias, resulting in moisture inside the vias and ultimately causing uneven diagonal lines in the product.

[0046] In view of this, embodiments of this application provide an array substrate and its fabrication method, as well as a display device. By setting a substrate, a first passivation layer, and a second passivation layer, the first passivation layer includes a first via, and the second passivation layer includes a second via. The second via includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion, such that the orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate. This allows the second via and the first via to be staggered, thus enabling the first and second vias of the first passivation layer to have irregular shapes. This allows organic material to flow more easily into the first via along the non-overlapping portion of the second via, thereby reducing the possibility of organic material failing to completely fill the first and second vias and ensuring the quality of the final product.

[0047] Reference Figure 1 and Figure 2 As shown, an array substrate disclosed in an embodiment of this application is included, comprising a substrate 10, a first passivation layer 20, and a second passivation layer 30.

[0048] Specifically, the substrate 10 may include a rigid substrate 10 or a flexible substrate 10. For example, when the product has a certain rigidity requirement, the substrate 10 may be made of a rigid material, such as glass, polycarbonate (PC), polymethyl methacrylate (PMMA), etc.; when the product has the requirement of being foldable, flexible, or rollable, the substrate 10 may be made of a flexible material, such as polyethylene terephthalate (PET), colorless polyimide (CPI), etc.

[0049] Furthermore, the array substrate may also include a thin-film transistor's gate, source 11, drain, common electrode 12, and pixel electrode, which are sequentially stacked on the substrate 10, with the gate disposed close to the substrate 10. The source 11 and drain (not shown in the figure) are generally disposed on the same layer.

[0050] Reference Figure 1 and Figure 2 As shown, a first passivation layer 20 is disposed on one side of the substrate 10, and the first passivation layer 20 is disposed on the side of the source electrode 11 and the drain electrode facing away from the substrate 10, that is, the source electrode 11 and the drain electrode are located between the first passivation layer 20 and the substrate 10. The first passivation layer 20 may include inorganic materials, such as SiO2, SiNx, etc., or it may include organic materials, such as resin. The first passivation layer 20 includes a first via A, through which the electrode layer can be connected to the electrode layer.

[0051] Reference Figure 1 and Figure 2As shown, the second passivation layer 30 is disposed on the side of the first passivation layer 20 facing away from the substrate 10, and the second passivation layer 30 is located on the side of the common electrode 12 facing away from the first passivation layer 20. That is, the common electrode 12 is disposed between the first passivation layer 20 and the second passivation layer 30, and the common electrode 12 covers the first via A. Simultaneously, the pixel electrode is disposed on the side of the second passivation layer 30 facing away from the first passivation layer 20. The second passivation layer 30 may include inorganic materials, such as SiO2, SiNx, etc., or it may include organic materials, such as resin. The second passivation layer 30 includes a second via B, through which the pixel electrode can be connected to the common electrode 12.

[0052] Furthermore, referring to Figure 1 and Figure 2 As shown, the second via B includes an overlapping portion B1 and a non-overlapping portion B2 located on at least one side of the overlapping portion B1. The orthographic projection of the overlapping portion B1 on the substrate 10 is within the orthographic projection range of the first via A on the substrate 10, and the orthographic projection of the non-overlapping portion B2 on the substrate 10 does not overlap with the orthographic projection of the first via A on the substrate 10, so that the second via B and the first via A are staggered.

[0053] Specifically, since the pixel electrode needs to be connected to the electrode layer, the second via B needs to include a portion intersecting with the first via A, i.e., an overlapping portion B1, so that the pixel electrode can be connected to the common electrode 12 through the second via B. Meanwhile, in this embodiment, the first via A and the second via B are staggered; therefore, the second via B also includes a non-overlapping portion B2 that does not overlap with the first via A. The non-overlapping portion B2 results in an irregular shape between the first via A and the second via B. During the coating of the organic material, the organic material flows on the second passivation layer 30. Due to the irregular shape between the first via A and the second via B, an entry point for the flow of the organic material is provided, allowing the organic material to flow better into the second via B and the first via A. This reduces the possibility of the organic material not completely filling the first via A and the second via B, thereby reducing the occurrence of uneven diagonal lines in the product.

[0054] Furthermore, a stepped structure is formed between the first via A, the non-overlapping portion B2, and the second passivation layer 30.

[0055] Specifically, refer to Figure 2 As shown, the first via A is a recessed area, and the non-overlapping portion B2 is located on both sides of the first via A. The portion of the second passivation layer 30 excluding the second via B is connected to the non-overlapping portion B2, thus forming a complete stepped structure. By utilizing this stepped structure, the organic material can have stronger fluidity, thereby making it easier for the organic material to completely fill the first via A and the second via B.

[0056] Furthermore, referring to Figure 1 As shown, the orthographic projection of the first via A on the substrate 10 includes four connected first boundary lines L1, and the orthographic projection of the non-overlapping portion B2 on the substrate 10 includes at least one second boundary line L2. The at least one second boundary line L2 is parallel to the opposite first boundary line L1, and the second boundary line L2 is away from the overlapping portion B1.

[0057] Specifically, in this embodiment, the orthographic projection of the first via A onto the substrate 10 is rectangular. Therefore, the orthographic projection of the first via A onto the substrate 10 includes four connected first boundary lines L1. It is understood that when forming the second via B, the non-overlapping portion B2 must be located on at least one side of the first via A. Therefore, the orthographic projection of the non-overlapping portion B2 onto the substrate 10 includes at least one second boundary line L2. This second boundary line L2 is parallel to the corresponding first boundary line L1. The corresponding first boundary line L1 is the boundary line on the side where the non-overlapping portion B2 is located, and the second boundary line L2 is the boundary line away from the overlapping portion B1.

[0058] In one alternative implementation, refer to Figure 3 and Figure 4 As shown in the figure, an embodiment of this application provides an array substrate in which a second via B includes a non-overlapping portion B2 located on one side of a first via A.

[0059] Specifically, in this embodiment, when the orthographic projection of the first via A onto the substrate 10 is rectangular, the non-overlapping portion B2 can be located on either side of the first via A. Meanwhile, referring to... Figure 4 As shown, when the projected area of ​​the first via A on the substrate 10 is greater than the projected area of ​​the second via B on the substrate 10, the second passivation layer 30 will fill part of the first via A.

[0060] In this embodiment, the non-overlapping portion B2 includes only a second boundary line L2, and the distance between the second boundary line L2 and the corresponding first boundary line L1 can be set according to actual needs.

[0061] In one alternative implementation, refer to Figure 5 As shown, this application embodiment provides an array substrate in which the second via B includes two non-overlapping portions B2, and the two non-overlapping portions B2 are located on opposite sides of the first via A.

[0062] Specifically, in this embodiment, the two non-overlapping portions B2 are arranged opposite each other. The arrangement of the two non-overlapping portions B2 further increases the complexity of the shape of the first through hole A and the second through hole B, thereby further increasing the flowability of the organic material in the first through hole A and the second through hole B.

[0063] Furthermore, when there are two non-overlapping portions B2, there are also two second boundary lines L2, each parallel to its corresponding first boundary line L1. The distances between the two second boundary lines L2 and their corresponding first boundary lines L1 can be equal or unequal. For example, the distances between the two second boundary lines L2 and their corresponding first boundary lines L1 can both be 1 nm; alternatively, one second boundary line L2 can be 1 nm away from its corresponding first boundary line L1, while the other can be 2 nm away. Those skilled in the art can set these distances according to actual needs, and this embodiment will not elaborate further here. This can further increase the irregularity of the first via A and the second via B, which has a positive effect on the flow of organic materials.

[0064] In addition, the two non-overlapping portions B2 can also be located on opposite sides of the first via A. In this case, the two non-overlapping portions B2 can be interconnected or independent of each other. Interconnected means that the orthographic projections of the two non-overlapping portions B2 on the substrate 10 are connected to each other; independent means that the orthographic projections of the two non-overlapping portions B2 on the substrate 10 are separated.

[0065] In one alternative implementation, refer to Figure 6 As shown in the figure, this application provides an array substrate in which the second via B includes three non-overlapping portions B2, which are located on the three sides of the first via A.

[0066] Specifically, in this embodiment, the three non-overlapping portions B2 can be interconnected or independent of each other. The arrangement of the three non-overlapping portions B2 further increases the complexity of the shape of the first through hole A and the second through hole B, thereby further increasing the flowability of the organic material in the first through hole A and the second through hole B.

[0067] Furthermore, when there are three non-overlapping portions B2, there are also three second boundary lines L2, each parallel to its corresponding first boundary line L1. The distances between the three second boundary lines L2 and their corresponding first boundary lines L1 can be equal or unequal. For example, the distances between the three second boundary lines L2 and their corresponding first boundary lines L1 can all be 1 nm; or the distance between the first second boundary line L2 and its corresponding first boundary line L1 can be 1 nm, the distance between the second second boundary line L2 and its corresponding first boundary line L1 can be 2 nm, and the distance between the third second boundary line L2 and its corresponding first boundary line L1 can be 3 nm; or the distance between two of the second boundary lines L2 and their corresponding first boundary lines L1 can be 1 nm, and the distance between the other second boundary line L2 and its corresponding first boundary line L1 can be 2 nm. Those skilled in the art can set these distances according to actual needs, and the embodiments of this application will not elaborate further here.

[0068] In one alternative implementation, refer to Figure 1 As shown, this application embodiment provides an array substrate in which the second via B includes four non-overlapping portions B2, which are located on the four sides of the first via A and are interconnected.

[0069] Specifically, in this embodiment, since the orthographic projection of the first via A onto the substrate 10 is rectangular, and the four non-overlapping portions B2 are interconnected, the orthographic projection area of ​​the first via A onto the substrate 10 is smaller than the orthographic projection area of ​​the second via B onto the substrate 10. Furthermore, in this embodiment, the stepped structure is a closed structure surrounding the first via A.

[0070] The arrangement of four non-overlapping portions B2 further increases the complexity of the shape of the first via A and the second via B, thereby further increasing the flowability of the organic material within the first via A and the second via B.

[0071] Furthermore, when there are four non-overlapping portions B2, there are also four second boundary lines L2, each of which is parallel to its corresponding first boundary line L1. The distances between the four second boundary lines L2 and their corresponding first boundary lines L1 may be equal or unequal.

[0072] For example, the distances between the four second boundary lines L2 and their corresponding first boundary lines L1 can all be 1 nm; alternatively, the distance between the first second boundary line L2 and its corresponding first boundary line L1 can be 1 nm, the distance between the second second boundary line L2 and its corresponding first boundary line L1 can be 2 nm, the distance between the third second boundary line L2 and its corresponding first boundary line L1 can be 3 nm, and the distance between the fourth second boundary line L2 and its corresponding first boundary line L1 can be 4 nm; alternatively, the distance between two of the second boundary lines L2 and their corresponding first boundary lines L1 can be 1 nm, and the distance between the other two second boundary lines L2 and their corresponding first boundary lines L1 can be 1 nm. The distance L1 is 2nm; alternatively, the distance from two of the second boundary lines L2 to the corresponding first boundary line L1 is 1nm, and in addition to these two second boundary lines L2, the distance from the first second boundary line L2 to the corresponding first boundary line L1 is 2nm, and the distance from the second second boundary line L2 to the corresponding first boundary line L1 is 4nm; alternatively, the distance from three of the second boundary lines L2 to the corresponding first boundary line L1 is 1nm, and the distance from the other second boundary line L2 to the corresponding first boundary line L1 is 2nm; those skilled in the art can set these distances according to actual needs, and the embodiments of this application will not be elaborated further here.

[0073] In one alternative implementation, refer to Figure 7 As shown, this application embodiment provides an array substrate in which the second via B includes four non-overlapping portions B2, which are located on the four sides of the first via A, and the four non-overlapping portions B2 are independent of each other.

[0074] Specifically, in this embodiment, since the four non-overlapping portions B2 are independent of each other, i.e., unconnected, the stepped structure is a non-closed structure surrounding the first through-hole A. The arrangement of the four independent non-overlapping portions B2 further increases the complexity of the shape of the first through-hole A and the second through-hole B, thereby further increasing the flowability of the organic material within the first through-hole A and the second through-hole B.

[0075] Based on the same inventive concept, embodiments of this application disclose a display device, including any of the array substrates described above in the embodiments of this application.

[0076] Specifically, the display device may also include a cover plate disposed on the array substrate, and a driving circuit connected to the array substrate, etc.

[0077] For example, the display device may include a monitor, tablet computer, mobile device such as a mobile phone, wearable device such as a watch, VR device, etc. Those skilled in the art can make the appropriate selection according to the specific purpose of the display device, which will not be elaborated here.

[0078] Figure 8A flowchart illustrating the steps of a method for fabricating an array substrate is shown. (Refer to...) Figure 8 As shown in the figure, this application discloses a method for fabricating an array substrate, the method comprising:

[0079] Step 101: Provide substrate 10.

[0080] Specifically, the substrate 10 may include a rigid substrate 10 or a flexible substrate 10. The steps of fabricating the substrate 10 may also include fabricating the gate, the gate insulating layer, the source 11, and the drain.

[0081] Step 102: A first passivation layer 20 is formed on one side of the substrate 10. The first passivation layer 20 includes a first via A.

[0082] Specifically, the first passivation layer 20 can be an inorganic material, such as SiO2, SiNx, etc., or it can be an organic material, such as resin. The size of the first via A is set according to actual needs. The step of fabricating the first passivation layer 20 may also include fabricating a common electrode 12, which is formed on the side of the first passivation layer 20 facing away from the substrate 10, and the common electrode 12 is connected to the source electrode 11 and the drain electrode through the first via A.

[0083] Step 103: A second passivation layer 30 is formed on the side of the first passivation layer 20 away from the substrate 10. The second passivation layer 30 includes a second via B. The second via B includes an overlapping portion B1 and a non-overlapping portion B2 located on at least one side of the overlapping portion B1.

[0084] Wherein, the orthographic projection of the overlapping portion B1 on the substrate 10 is located within the orthographic projection range of the first via A on the substrate 10;

[0085] The orthographic projection of the non-overlapping portion B2 on the substrate 10 does not overlap with the orthographic projection of the first via A on the substrate 10, so that the second via B and the first via A are staggered.

[0086] Specifically, the second passivation layer 30 can be an inorganic material, such as SiO2, SiNx, etc., or it can be an organic material, such as resin. Simultaneously, a stepped structure is formed between the first via A, the non-overlapping portion B2, and the second passivation layer 30. The stepped structure can be a closed structure or a non-closed structure surrounding the first via A. The step of fabricating the second passivation layer 30 may further include fabricating a pixel electrode, wherein the pixel electrode is formed on the side of the second passivation layer 30 facing away from the substrate 10, and the pixel electrode is connected to the common electrode 12 through the second via B.

[0087] The array substrate prepared by the above steps includes an overlapping portion B1 and a non-overlapping portion B2, and the orthographic projection of the non-overlapping portion B2 on the substrate 10 does not overlap with the orthographic projection of the first via A on the substrate 10. This allows the second via B and the first via A to be staggered, so that the first via A and the second via B of the first passivation layer 20 can be irregularly shaped. This makes it easier for organic material to flow into the first via A along the non-overlapping portion B2 of the second via B, thereby reducing the possibility of organic material not being able to completely fill the first via A and the second via B, and ensuring the quality of the final product.

[0088] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0089] It should also be noted that, in this document, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations, nor should they be construed as indicating or implying relative importance. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements, but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. In the absence of further restrictions, an element defined by the phrase "includes a..." does not preclude the presence of other identical elements in the process, method, article, or terminal device that includes the element.

[0090] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand this application, and the content of this specification should not be construed as a limitation of this application. Furthermore, for those skilled in the art, there will be different forms of changes in the specific implementation methods and application scope based on this application. It is neither necessary nor possible to exhaustively list all implementation methods here, and obvious changes or modifications derived therefrom are still within the protection scope of this application.

Claims

1. An array substrate, characterized in that, include: Substrate; A first passivation layer is disposed on one side of the substrate, and the first passivation layer includes a first via. A second passivation layer is disposed on the side of the first passivation layer away from the substrate. The second passivation layer includes a second via, which includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion. The second via includes a non-overlapping portion located on one side of the first via. The projected area of ​​the first via on the substrate is smaller than the projected area of ​​the second via on the substrate. Wherein, the orthographic projection of the overlapping portion on the substrate is located within the orthographic projection range of the first via on the substrate; The orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate, so that the second via and the first via are staggered.

2. The array substrate according to claim 1, characterized in that: The orthographic projection of the first via on the substrate includes four connected first boundary lines; The orthographic projection of the non-overlapping portion onto the substrate includes at least one second boundary line, which is parallel to the corresponding first boundary line and is located away from the overlapping portion.

3. The array substrate according to claim 2, characterized in that: The orthographic projection of the non-overlapping portion onto the substrate includes a plurality of second boundary lines, all of which are far from the overlapping portion, and each second boundary line is parallel to the corresponding first boundary line. The distance between each second boundary line and the first boundary line parallel to that second boundary line may be equal or unequal.

4. The array substrate according to claim 1, characterized in that: The second via includes two non-overlapping portions, and the two non-overlapping portions are located on opposite sides of the first via.

5. The array substrate according to claim 1, characterized in that: The second via includes three non-overlapping portions, which are located on three sides of the first via.

6. The array substrate according to claim 1, characterized in that: The second via includes four non-overlapping portions, which are located on the four sides of the first via and are interconnected.

7. The array substrate according to claim 1, characterized in that: The second via includes four non-overlapping portions, which are located on the four sides of the first via and are independent of each other.

8. The array substrate according to any one of claims 1-7, characterized in that: The materials of the first passivation layer and the second passivation layer include organic materials or inorganic materials.

9. The array substrate according to claim 1, characterized in that: A stepped structure is formed between the first via, the non-overlapping portion, and the second passivation layer.

10. The array substrate according to claim 9, characterized in that: The stepped structure is either a closed structure or a non-closed structure surrounding the first through hole.

11. A display device, characterized in that: Includes the array substrate as described in any one of claims 1-10.

12. A method for fabricating an array substrate, characterized in that, The preparation method includes: Provide substrate; A first passivation layer is formed on one side of the substrate, the first passivation layer including a first via; A second passivation layer is formed on the side of the first passivation layer away from the substrate. The second passivation layer includes a second via. The second via includes an overlapping portion and a non-overlapping portion located on at least one side of the overlapping portion. The second via includes a non-overlapping portion located on one side of the first via. The projected area of ​​the first via on the substrate is smaller than the projected area of ​​the second via on the substrate. Wherein, the orthographic projection of the overlapping portion on the substrate is located within the orthographic projection range of the first via on the substrate; The orthographic projection of the non-overlapping portion on the substrate does not overlap with the orthographic projection of the first via on the substrate, so that the second via and the first via are staggered.

Citation Information

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