Multiplexer and method of designing the same, communication device

Abstract

This invention discloses a multiplexer, its design method, and a communication device. The multiplexer includes: a first filter located between the antenna end and the input / output end of the filter channel; at least one filter module, each filter module having a common node, comprising: N filters connected in parallel, N = 2 or 3, wherein the first end of each filter is connected to the input / output end of the corresponding filter channel via a matching circuit; N series matching inductors, each corresponding to one of the N filters, the series matching inductors being connected between the second end of the corresponding filter and the common node; a parallel ground inductor, the first end of which is connected to the common node, and the second end grounded; and a connecting inductor, the first end of which is connected to the common node, and the second end connected to the antenna end of the multiplexer, or the second end connected to the common node of a filter module adjacent to and closer to the antenna end of this filter module.

Description

Technical Field

[0001] This invention relates to the field of filter technology, and particularly to a multiplexer and its design method, as well as a communication device. Background Technology

[0002] Currently, the multiplexers commonly used in indoor distributed systems are primarily dielectric multiplexers. While dielectric multiplexers have strong power handling capabilities, they are relatively large and have poor consistency. Forcibly reducing the size of dielectric multiplexers can easily lead to a deterioration in isolation. Furthermore, although there are various matching methods for multiplexers, they cannot simultaneously match multiple filters with widely separated frequencies to a satisfactory state. Summary of the Invention

[0003] In view of this, the present invention proposes a multiplexer and its design method and communication equipment that can facilitate miniaturization and have good isolation between different frequency bands of the multiplexer.

[0004] The first aspect of this invention provides a multiplexer, comprising: a first filter, wherein a first end of the first filter is directly connected to an antenna end, and a second end is connected to the input / output end of the filter channel; at least one filter module, each filter module having a common node, the filter module comprising: N filters connected in parallel, where N equals 2 or 3, wherein the first end of each filter is connected to the input / output end of the corresponding filter channel via a matching circuit; N series matching inductors, each of the N series matching inductors corresponding to one of the N filters, the series matching inductors being connected between the second end of the corresponding filter and the common node; a parallel ground inductor, the first end of the parallel ground inductor being connected to the common node, and the second end being grounded; and a connecting inductor, the first end of the connecting inductor being connected to the common node, and the second end being connected to the antenna end of the multiplexer, or the second end being connected to the common node in a filter module adjacent to and closer to the antenna end of this filter module.

[0005] Optionally, the total number of filters in the multiplexer is M, and the layout of the multiplexer satisfies the following conditions: the layout corresponding to the multiplexer contains M blocks, each of the M blocks includes a filter, and all the parallel-to-ground inductors and the connecting inductors are disposed outside the carrier board; or, the layout corresponding to the multiplexer contains M+1 blocks, wherein each of the M blocks includes a filter, and the remaining block includes at least one of the parallel-to-ground inductors or the connecting inductors.

[0006] Optionally, the post-stage ground inductors in each of the filters are distributed along the edge of the layout outline of the filter module.

[0007] Optionally, the series matching inductor is located in a nearby position within the block containing the parallel ground inductor or the connecting inductor.

[0008] Optionally, the series matching inductor is a bonding wire between the filter and the carrier plate, or a connection consisting of the bonding wire and the winding on the carrier plate.

[0009] Optionally, the filter is packaged in the following ways: the filter is connected to the carrier plate via metal bonding wires; or, the filter is connected to the carrier plate via ball attachment.

[0010] A second aspect of the present invention provides a design method for a multiplexer, comprising: dividing the multiplexer into a first filter and at least one filter module, each filter module comprising N parallel filters, where N equals 2 or 3; directly connecting a first end of the first filter to an antenna end, and connecting a second end to the input / output terminal of the filter channel; and performing the following operations in each filter module: setting a common node within the filter module; connecting the first end of each filter to the input / output terminal of the corresponding filter channel via a matching circuit; setting N series matching inductors, each of the N series matching inductors corresponding to one of the N filters, the series matching inductors being connected between the second end of the corresponding filter and the common node; setting a parallel ground inductor, the first end of the parallel ground inductor being connected to the common node, and the second end being grounded; and setting a connecting inductor, the first end of the connecting inductor being connected to the common node, and the second end being connected to the antenna end of the multiplexer, or the second end being connected to the common node in a filter module adjacent to and closer to the antenna end of the filter module.

[0011] Optionally, the total number of filters in the multiplexer is M. The method further includes performing a layout operation on each filter module. The layout operation includes: dividing the layout corresponding to the multiplexer into M blocks, setting one filter in each of the M blocks, and setting all the parallel-to-ground inductors and the connecting inductors outside the carrier board; or, dividing the layout corresponding to the multiplexer into M+1 blocks, setting one filter in each of the M blocks, and setting at least one parallel-to-ground inductor or the connecting inductor in the remaining 1 block.

[0012] Optionally, the layout operation further includes: distributing the post-stage ground inductors in each of the filters at the edges of the layout frame of the filter module.

[0013] Optionally, the layout operation further includes: placing the series matching inductor in a proximity position to the block where the parallel ground inductor or the connecting inductor is located.

[0014] Optionally, the series matching inductor is implemented by bonding wires to the carrier board, or by bonding wires to the carrier board and winding wires on the carrier board.

[0015] Optionally, the method further includes: encapsulating the filter by connecting the filter to the carrier plate via metal bonding wires; or connecting the filter to the carrier plate via ball attachment.

[0016] A third aspect of the present invention provides a communication device, characterized in that it includes any of the multiplexers disclosed in the present invention.

[0017] The technical solution of this invention provides a new inductor matching method for multiplexers, which can simultaneously match multiple filters with widely different frequencies to a better state. Simultaneously, by rationally arranging the matching module and each filter channel, the coupling between the matching module and the grounding inductors of each filter stage is reduced, thereby improving the isolation between different frequency bands of the multiplexer and facilitating device miniaturization. Attached Figure Description

[0018] For illustrative and not limiting purposes, the invention will now be described with reference to preferred embodiments thereof, particularly the accompanying drawings, in which:

[0019] Figure 1 This is a schematic diagram of the topology of a multiplexer based on existing technology;

[0020] Figure 2 This is a schematic diagram of the topology of the multiplexer according to an embodiment of the present invention;

[0021] Figures 3A to 3D The Smith chart of CH1 and CH2 under the combined action of multiplexers L1, L2 and L3 in an embodiment of the present invention;

[0022] Figures 4A to 4F This is a Smith chart comparing the multiplexer of the present invention with that of a prior art multiplexer;

[0023] Figures 5A to 5C This is a comparison chart of the CH1 channel performance of the multiplexer according to the present invention and the multiplexer of the prior art;

[0024] Figures 6A to 6C This is a comparison chart of the CH2 channel performance of the multiplexer according to the present invention and the existing multiplexer.

[0025] Figures 7A to 7C This is a comparison chart of the CH3 channel performance of the multiplexer according to the present invention and the existing multiplexer.

[0026] Figures 8A to 8C This is a schematic diagram of undesirable coupling in a multiplexer according to an embodiment of the present invention;

[0027] Figures 9A to 9C This is a schematic diagram illustrating the layout principles of a multiplexer according to an embodiment of the present invention.

[0028] Figures 10A to 10B This is a schematic diagram of the carrier plate layout of the multiplexer according to an embodiment of the present invention;

[0029] Figures 11A to 11F A comparison diagram of the isolation curve of the multiplexer after eliminating unfavorable coupling in the embodiments of the present invention and the isolation curve of the multiplexer in the prior art;

[0030] Figure 12 This is a schematic diagram of the topology of a multiplexer according to another embodiment of the present invention. Detailed Implementation

[0031] In this embodiment of the invention, passive components in the filter are eliminated in an equivalent manner, or mutual inductance and parasitic capacitance generated by coupling are eliminated, as will be explained in detail below.

[0032] A multiplexer according to an embodiment of the present invention includes: a first filter and at least one filter module. The first end of the first filter is directly connected to an antenna end, and the second end is connected to the input / output terminal of the filter channel. Each filter module has a common node. The filter module includes: N filters connected in parallel, where N equals 2 or 3, wherein the first end of each filter is connected to the input / output terminal of the corresponding filter channel via a matching circuit; N series matching inductors, each corresponding to one of the N filters, connected between the second end of the corresponding filter and the common node; a parallel ground inductor, the first end of which is connected to the common node, and the second end grounded; and a connecting inductor, the first end of which is connected to the common node, and the second end connected to the antenna end of the multiplexer, or the second end connected to the common node of a filter module adjacent to and closer to the antenna end.

[0033] According to the multiplexer of the present invention, the total number of filters in the multiplexer is M, and the layout of the multiplexer satisfies the following conditions: (1) the layout corresponding to the multiplexer contains M blocks, each of the M blocks includes one filter, and all parallel-to-ground inductors and connecting inductors are disposed outside the carrier board; or, (2) the layout corresponding to the multiplexer contains M+1 blocks, each of the M blocks includes one filter, and each block includes at least one parallel-to-ground inductor or connecting inductor. It should be noted that the way to divide the entire layout area into multiple blocks can be flexible and diverse, wherein the area of ​​each block is basically equal.

[0034] The circuit topology of the multiplexer in prior art 1 is as follows: Figure 1As shown, the system mainly includes filter channels 100 and a matching module 200. The matching module 200 includes a parallel inductor to ground 130 and a series inductor 132. Filter channels 100 include multiple filter channels such as filters 104, 106, and 108, as well as matching circuits such as 114, 116, and 118. These matching circuits can be composed of inductors, capacitors, and resistors, and can be connected in series or parallel. 120 is the antenna terminal, and 124, 126, and 128 are the input or output interfaces of each filter channel. The frequencies of the three filters 104, 106, and 108 are set to 1168MHz to 1292MHz, 1513MHz to 1617MHz, and 2506MHz to 2534MHz, respectively. Therefore, the frequencies of filters 104 and 108 are far apart, making it difficult to achieve a good match using existing technology.

[0035] The multiplexer of the present invention, such as Figure 2 As shown, the CH1 filter has a frequency of 1168MHz to 1292MHz, the CH2 filter has a frequency of 1513MHz to 1617MHz, and the CH3 filter has a frequency of 2506MHz to 2534MHz. Each filter contains at least two inductors to ground, where G11, G21, and G31 are the pre-stage inductors to ground, and G12, G22, and G32 are the post-stage inductors to ground. 15, 25, and 35 are matching networks, which can consist of inductors, capacitors, and resistors, and can be connected in series or parallel. 1, 2, and 3 are the input or output terminals of the corresponding filter channels for each filter. Figure 2 As can be seen, the multiplexer includes a CH3 filter channel directly connected to the antenna and a filter module containing two parallel filters (CH1 and CH2). This filter module has a common node n1. It contains two series matching inductors, L1 and L2, connected in series with CH1 and CH2 respectively. L3 is a parallel inductor to ground, connected between n1 and ground. These three inductors, L1, L2, and L3, match CH1 and CH2 to the same position.

[0036] refer to Figures 3A to 3D ,in Figure 3A It refers to the convergence of the antenna end of CH1. Figure 3B It refers to the convergence of the input or output terminals of CH1. Figure 3C It refers to the convergence of the antenna end of CH2. Figure 3D This refers to the convergence of the input or output terminals of CH2. From... Figures 3A to 3D As can be seen, the function of the three inductors L1, L2, and L3 is to simultaneously pull the S-parameters at the antenna end to the capacitive region of the Smith chart, and at the center of the Smith chart at the other end.

[0037] Figures 4A to 4FThis is a Smith chart comparing the multiplexer of the present invention with a prior art multiplexer. Specifically, Figure 4A and Figure 4B This demonstrates the convergence of CH1. Figure 4C and Figure 4D This demonstrates the convergence of CH2. Figure 4E and Figure 4F This demonstrates the convergence of CH3. In these six figures, the thick line represents the Smith chart of the multiplexer in the embodiment of the present invention under the action of the entire matching module 300, and the thin line represents the Smith chart of the prior art comparative example. Those skilled in the art know that the closer the circle is to the center of the Smith chart and the smaller the circle, the better the convergence. A comparison of the thick and thin lines shows that the multiplexer in the embodiment of the present invention has better convergence.

[0038] Figures 5A to 5C This is a comparison chart of the CH1 passband performance of the multiplexer according to the present invention and a prior art multiplexer. Specifically, Figure 5A This indicates a comparison of the S11 parameters for channel CH1. Figure 5B This indicates a comparison of the S22 parameters in the CH1 passband. Figure 5C The comparison shows the S21 parameters of channel CH1. In these three figures, the thick line represents the multiplexer of the present invention, and the thin line represents the multiplexer of the prior art. Figure 5A The return loss at the antenna end is basically the same for both in the 1270MHz-1292MHz passband range, but in the 1168MHz-1270MHz passband range, the return loss of the present invention is about 4dB better than that of the prior art. Figure 5B The return loss at the other end of CH1 is about 1 dB better than existing inventions. Figure 5C This is the insertion loss diagram for CH1. The insertion loss of the present invention is about 0.2 dB better than that of the prior art on average, especially about 0.5 dB better at the left insertion loss edge.

[0039] Figures 6A to 6C This is a comparison chart of the CH2 channel performance of the multiplexer according to the present invention and a prior art multiplexer. Specifically, Figure 6A This indicates a comparison of the S11 parameters of the CH2 channel. Figure 6B This indicates a comparison of the S22 parameters of the CH2 channel. Figure 6C The comparison shows the S21 parameters of the CH2 channel. In these three figures, the thick line represents the multiplexer of the present invention, and the thin line represents the multiplexer of the prior art. Figure 6A For the return loss at the antenna end, the return loss of the present invention is about 7dB better than that of the prior art across the entire passband. Figure 6B The return loss at the other end of CH2 is about 3dB better than the prior art. Figure 6CThis is the insertion loss diagram for CH2. The insertion loss of this invention is slightly worse than that of the prior art at the low-frequency range, but it still meets the insertion loss requirements. The insertion loss at the mid-to-high frequency range is basically the same.

[0040] Figures 7A to 7C This is a comparison chart of the CH3 channel performance of the multiplexer according to the present invention and a prior art multiplexer. Specifically, Figure 7A This represents a comparison of the S11 parameters of the CH3 channel. Figure 7B This indicates a comparison of the S22 parameters of the CH3 channel. Figure 7C The comparison shows the S21 parameters of the CH3 channel. In these three figures, the thick line represents the multiplexer of the present invention, and the thin line represents the multiplexer of the prior art. Figure 7A For the return loss at the antenna end, the return loss of the present invention is about 6dB better than that of the prior art across the entire passband. Figure 7B The return loss at the other end of CH3 is about 10 dB better than existing inventions. Figure 7C This is the insertion loss diagram for CH3. The insertion loss of this invention is approximately 0.5 dB better across the entire frequency band, and the bandwidth can be widened by approximately 30 MHz without deterioration of other performance indicators. It also significantly improves the insertion loss on both sides, with an improvement of approximately 1 dB. Those skilled in the art know that better insertion loss translates to greater power handling capability; this invention demonstrates a significantly stronger power handling capability than existing technologies.

[0041] Because the multiplexer is relatively small, many internal couplings occur, among which the most detrimental couplings affecting isolation include... Figures 8A to 8C As shown, the coupling between inductors L3 and L4 in the matching module and the subsequent grounding inductors G12, G22, and G32 of each filter is relatively sensitive. Specifically, the coupling between L3 and G12 is M11, and the coupling between L4 and G12 is M12; the coupling between L3 and G22 is M21, and the coupling between L4 and G22 is M22; the coupling between L3 and G32 is M31, and the coupling between L4 and G32 is M32.

[0042] Figures 9A to 9C This is a schematic diagram illustrating the layout principles of a multiplexer according to an embodiment of the present invention. A reasonable layout can minimize unfavorable coupling.

[0043] First, arrange the layout of each filter channel in the matching module. For example... Figure 9A As shown, the multiplexer includes a total of three filters, which can divide the layout area (i.e., the outer envelope rectangle of the carrier board) into four blocks in a 2×2 distribution. The L3 and L4 of the matching module are set in one of the blocks (e.g., the upper left block), and the remaining filters are set in the other three blocks.

[0044] Secondly, the inductors to ground in each filter stage are distributed along the outer edge of the filter module layout. For example... Figure 9C As shown, the carrier board is divided into nine equal parts, and the grounding inductors of each filter are distributed in the corner blocks other than the corner blocks where L3 and L4 are located, and close to the edge of the carrier board.

[0045] Then, the series matching inductor is positioned in a proximity to the layout block containing the parallel-to-ground inductor and the connecting inductor. For example... Figure 9C As shown, the carrier board is divided into nine equal parts. Taking the corners where L3 and L4 are located as references, L1 and L2 are set in the four adjacent area blocks, as follows. Figure 9C The area shown in the black box is as follows.

[0046] It should be noted that, Figures 9A to 9C This is for illustrative purposes only and is not intended to be limiting.

[0047] Figures 10A to 10B This is a schematic diagram of the carrier plate layout of the multiplexer according to an embodiment of the present invention.

[0048] Figure 10A This is a top view of the top metal layer of the carrier board, where CH1 is placed in the lower right corner, CH2 in the lower left corner, and CH3 in the upper right corner. Each filter is bonded to the carrier board via bonding wires. This bonding technology is more advantageous in terms of power handling capacity of the multiplexer than conventional flip-chip technology. G12 is located in the lower right corner, G22 in the lower left corner, and G32 in the upper right corner. These three downstream sensitive inductors are located at the three corners of the carrier board. L1 and L2 in the matching module can be implemented solely with bonding wires, or partially with bonding wires and partially with wires wound within the carrier board. This embodiment only shows the first scenario. L3 and L4 are located in the upper left corner, maximizing the spatial distance between them. When the multiplexer size is very small, it is possible to integrate both L3 and L4 outside the carrier board; when the multiplexer size can be slightly larger, it is possible to integrate one of L3 and L4 inside the carrier board and the other outside the carrier board; when the multiplexer size can be even larger, it is possible to integrate both L3 and L4 inside the carrier board. Figure 10A Only the second distribution scenario is shown.

[0049] Figure 10B In this example, TOP indicates the top metal layer, and Layer 2 indicates the second metal layer. This embodiment only shows L4 composed of L41 and L42; L3 is as follows... Figure 10A As shown, it is integrated outside the multiplexer. L4 is further isolated from the ground inductors G12, G22, and G32 of each subsequent stage through metal ground 3, reducing the unfavorable coupling between them and thus improving the isolation between each channel.

[0050] Figures 11A to 11F The isolation curve of the multiplexer in the embodiment of the present invention after eliminating unfavorable coupling is compared with the isolation curve of the multiplexer in the prior art. The specific description is as follows.

[0051] Figure 11A The thick line represents the isolation curve after eliminating M11 coupling in this invention, while the thin line is a comparison curve of existing technologies. After eliminating M11 coupling, the isolation at the CH2 frequency band is improved by approximately 5 dB.

[0052] Figure 11B The thick line represents the isolation curve after eliminating M12 coupling in this invention, while the thin line is a comparison curve of the prior art. After eliminating M12 coupling, the isolation at the CH2 frequency band is improved by about 3dB, and the isolation at the CH3 frequency band is improved by about 8dB.

[0053] Figure 11C The thick line represents the isolation curve after eliminating M21 coupling in this invention, while the thin line is a comparison curve of existing technologies. After eliminating M21 coupling, the isolation at the CH1 frequency band is improved by approximately 6 dB.

[0054] Figure 11D The thick line represents the isolation curve after eliminating M22 coupling in this invention, while the thin line is a comparison curve of existing technologies. After eliminating M22 coupling, the isolation at the CH1 frequency band is improved by approximately 3-10 dB.

[0055] Figure 11E The thick line represents the isolation curve after eliminating M31 coupling in this invention, while the thin line is a comparison curve of the prior art. After eliminating M31 coupling, the isolation at the CH1 frequency band is improved by about 2dB, and the isolation at the CH2 frequency band is improved by about 2dB.

[0056] Figure 11F The thick line represents the isolation curve after eliminating M32 coupling in this invention, while the thin line is a comparison curve of existing technologies. After eliminating M32 coupling, the isolation at the CH1 and CH2 frequency bands deteriorates slightly, by about 1 dB, which is very limited.

[0057] Figure 12 This is a schematic diagram of the topology of a multiplexer according to another embodiment of the present invention. The multiplexer includes at least one filter module. Each filter module has a common node. Each filter module includes N filters connected in parallel, where N is equal to 2 or 3. Figure 12In the diagram, dashed polygonal boxes 100 represent filter modules with N=2, and dashed polygonal boxes 200 represent filter modules with N=3. The first terminal of each filter is connected to the input / output terminal of its corresponding filter channel via a matching circuit. Each filter module also includes N series matching inductors, each corresponding to one of the N filters, connected between the second terminal of the corresponding filter and a common node. Each filter module also includes a parallel-to-ground inductor, with its first terminal connected to the common node and its second terminal grounded. Each filter module also includes a connection inductor, with its first terminal connected to the common node and its second terminal connected to the antenna terminal of the multiplexer, or its second terminal connected to the common node of a filter module adjacent to this filter module and closer to the antenna terminal.

[0058] In the layout design of the multiplexer in this embodiment of the invention, each filter module corresponds to a layout area, and since the number of filters inside a module does not exceed three, it can be referred to... Figures 9A to 9C By designing and properly arranging components, unfavorable couplings can be eliminated as much as possible, thereby improving device performance.

[0059] The multiplexer in this invention can also add or remove filter branches as needed, and the matching module can be placed in different positions as needed. It has the advantage of flexible design.

[0060] The design method of the multiplexer according to embodiments of the present invention may include: dividing the multiplexer into a first filter and at least one filter module, each filter module including N parallel filters, where N equals 2 or 3; directly connecting the first end of the first filter to the antenna end, and the second end to the input / output end of the filter channel; in each filter module, performing the following operations: setting a common node inside the filter module; connecting the first end of each filter to the input / output end of the corresponding filter channel via a matching circuit; setting N series matching inductors, each of the N series matching inductors corresponding to one of the N filters, with the series matching inductors connected between the second end of the corresponding filter and the common node; setting a parallel ground inductor, with the first end of the parallel ground inductor connected to the common node and the second end grounded; setting a connecting inductor, with the first end of the connecting inductor connected to the common node and the second end connected to the antenna end of the multiplexer, or the second end connected to the common node in a filter module adjacent to and closer to the antenna end of this filter module.

[0061] The design method of the multiplexer in this embodiment of the invention further includes performing a layout operation on each filter module. The total number of filters in the multiplexer is M. The layout operation includes: dividing the layout corresponding to the multiplexer into M blocks, setting one filter in each of the M blocks, and setting all parallel-to-ground inductors and connecting inductors outside the carrier board; or, dividing the layout corresponding to the multiplexer into M+1 blocks, setting one filter in each of the M blocks, and setting at least one parallel-to-ground inductor or connecting inductor in the remaining block.

[0062] In the multiplexer design method of the present invention, the post-stage ground inductors of each filter can be distributed at the edge of the layout frame of the filter module.

[0063] In the design method of the multiplexer in the embodiments of the present invention, the series matching inductor can be set in the vicinity of the block where the parallel ground inductor or the connecting inductor is located.

[0064] In the design method of the multiplexer in the embodiments of the present invention, the series matching inductor can be connected to the carrier board by bonding wire, or it can be connected to the carrier board by bonding wire and winding wire on the carrier board.

[0065] The design method of the multiplexer in the embodiments of the present invention may further include: encapsulating the filter by connecting the filter to the carrier plate via metal bonding wires; or connecting the filter to the carrier plate via ball-mounting.

[0066] The communication device according to embodiments of the present invention includes any of the multiplexers disclosed in the present invention.

[0067] The technical solution of this invention provides a new inductor matching method for multiplexers, which can simultaneously match multiple filters with widely different frequencies to a better state. Simultaneously, by rationally arranging the matching module and each filter channel, the coupling between the matching module and the grounding inductors of each filter stage is reduced, thereby improving the isolation between different frequency bands of the multiplexer and facilitating device miniaturization.

[0068] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can occur depending on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A multiplexer, characterized by include: The first filter has a first end that is directly connected to the antenna end and a second end that is connected to the input / output end of the filter channel. At least one filter module, each filter module having a common node, the filter module comprising: N filters connected in parallel, where N equals 2 or 3, wherein the first end of each filter is connected to the input / output end of the corresponding filter channel via a matching circuit; N series matching inductors, each corresponding to one of the N filters, are connected between the second terminal of the corresponding filter and the common node. A parallel-to-ground inductor, wherein the first end of the parallel-to-ground inductor is connected to the common node and the second end is grounded; A connecting inductor, wherein a first end of the connecting inductor is connected to the common node and a second end is connected to the antenna end of the multiplexer, or the second end is connected to the common node in a filter module that is adjacent to and closer to the antenna end of this filter module; The multiplexer has a total of M filters, and its layout satisfies the following conditions: The layout corresponding to the multiplexer comprises M blocks, each of which includes a filter. All the parallel-to-ground inductors and the connection inductors are disposed outside the carrier board; or... The layout corresponding to the multiplexer includes M+1 blocks, wherein each of the M blocks includes a filter, and the remaining block includes at least one of the parallel-to-ground inductors or the connection inductors.

2. The multiplexer according to claim 1, characterized in that, The post-stage ground inductors in each of the filters are distributed along the corresponding layout outline edges of all filter modules.

3. The multiplexer according to claim 1, characterized in that, When the layout corresponding to the multiplexer contains M+1 blocks, the series matching inductor is located in the nearest neighbor of the block where the parallel ground inductor or the connecting inductor is located.

4. The multiplexer according to claim 1, characterized in that, The series matching inductor is either the bonding wire between the filter and the carrier plate, or a connection consisting of the bonding wire and the winding on the carrier plate.

5. The multiplexer according to claim 1, characterized in that, The filter is packaged in the following ways: the filter is connected to the carrier plate via metal bonding wires; or, the filter is connected to the carrier plate via ball-mounted components.

6. A design method for a multiplexer, characterized in that, include: The multiplexer is divided into a first filter and at least one filter module, each filter module comprising N parallel filters, where N is equal to 2 or 3; Connect the first end of the first filter directly to the antenna end, and connect the second end to the input / output end of the filter channel; In each of the filter modules, the following operations are performed: A common node is set up inside the filter module; The first terminal of each filter is connected to the input / output terminal of the corresponding filter channel via a matching circuit; N series matching inductors are set up, and the N series matching inductors correspond one-to-one with the N filters. The series matching inductors are connected between the second terminal of the corresponding filter and the common node. A parallel ground inductor is configured, with its first end connected to the common node and its second end grounded. A connecting inductor is provided, with its first end connected to the common node and its second end connected to the antenna end of the multiplexer, or the second end connected to the common node in a filter module that is adjacent to and closer to the antenna end of this filter module; The multiplexer has a total of M filters. The method also includes a layout operation for each filter module, the layout operation including: The layout corresponding to the multiplexer is divided into M blocks, and a filter is set in each of the M blocks. All the parallel ground inductors and the connecting inductors are placed outside the carrier board; or, The layout corresponding to the multiplexer is divided into M+1 blocks, with a filter set in each of the M blocks, and at least one parallel-to-ground inductor or a connecting inductor set in the remaining block.

7. The design method of the multiplexer according to claim 6, characterized in that, The layout operation also includes: The post-stage ground inductors in each of the filters are distributed at the corresponding layout outline edges of all filter modules.

8. The design method of the multiplexer according to claim 6, characterized in that, The layout operation also includes: When the layout corresponding to the multiplexer contains M+1 blocks, the series matching inductor is placed in the nearest position to the block where the parallel ground inductor or the connecting inductor is located.

9. The design method of the multiplexer according to claim 6, characterized in that, The series matching inductor is implemented by connecting it to the carrier board via wire bonding, or by connecting it to the carrier board via wire bonding and winding it on the carrier board.

10. The design method of the multiplexer according to claim 6, characterized in that, Also includes: The filter can be packaged by connecting it to a carrier plate via metal bonding wires; or by connecting it to a carrier plate via ball attachment.

11. A communication device, characterized in that, The multiplexer includes any one of claims 1 to 5.

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