Utilizing consistently attached interfaces in a network stack framework

By sharing a consistent network buffer in the computing system, bypassing drivers and the operating system, the problems of cache coherency and network latency in multiprocessor systems are solved, improving computing efficiency and performance.

CN115485671BActive Publication Date: 2026-01-13INTERNATIONAL BUSINESS MACHINE CORPORATION
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Patent Information

Application Number
CN202180032670.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-05-06
Filing Date
2021-04-30
Publication Date
2026-01-13
Estimated Expiration
2041-04-30

AI Technical Summary

Technical Problem

In multiprocessor or multicore systems, when a processor updates a memory location, outdated data may exist in the caches of other processors. Cache coherence protocols are needed to maintain system data consistency. At the same time, network access latency is high, affecting computational efficiency.

Method used

An enhanced network architecture is provided that bypasses drivers and the operating system by using application buffers, circular buffers, and queuing pooling operations to achieve direct memory access and cache consistency, thereby reducing network access latency.

Benefits of technology

It improves the data transmission efficiency of computing systems, reduces network access latency, simplifies programming models and application programming interfaces, and enhances the overall performance of computing systems.

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Abstract

Embodiments for implementing an enhanced network stack framework in a computing environment. Multiple network buffers consistently attached between one or more applications and a network interface can be shared while bypassing one or more drivers and operating systems using application buffers, circular buffers, and queuing and pooling operations.
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Description

TECHNICAL FIELD

[0001] The present invention relates generally to computing systems, and more specifically to various embodiments of utilizing coherently attached interfaces in a network stack framework in a computing environment. BACKGROUND

[0002] In today's society, consumers, merchants, educators, and the like use various computing network systems, which are increasing in frequency in various settings. Computer systems can be found in the workplace, at home, or at school. Computer systems can include data storage systems or disk storage systems to process and store data. In recent years, both software and hardware technologies have experienced phenomenal advances. With new technologies, more and more functionality is added, and greater ease of use is provided for these computing systems. SUMMARY

[0003] Various embodiments are provided for utilizing coherently attached interfaces in a network stack framework in a computing environment. Multiple network buffers coherently attached between one or more applications and a network interface can be shared, while using application buffers, circular buffers, and queuing and pooling operations to bypass one or more drivers and an operating system.

[0004] From a first aspect, the present invention provides a method for utilizing an enhanced network stack framework in a computing environment by a processor, comprising: sharing multiple network buffers coherently attached between one or more applications and a network interface, while using application buffers, circular buffers, and queuing and pooling operations to bypass one or more drivers and an operating system.

[0005] Preferably, the present invention provides a method, further comprising controlling the multiple network buffers through a shared library.

[0006] Preferably, the present invention provides a method, further comprising sharing one or more address spaces of the multiple network buffers between the one or more applications using the network interface, wherein the multiple network buffers are for input / output (I / O) control.

[0007] Preferably, the present invention provides a method, further comprising exchanging memory pointers with a coherently attached device using the circular buffers.

[0008] Preferably, the present invention provides a method, further comprising performing queuing and pooling operations for the multiple network buffers for network buffer sending, receiving, and manipulation.

[0009] Preferably, the present invention provides a method in which the queuing and pooling operations further include moving, allocating, or reallocating one of a plurality of network buffers from one or more queues and one or more pools.

[0010] Preferably, the present invention provides a method that further includes using multiple network buffers to establish shared memory regions and private memory regions.

[0011] In another aspect, the present invention provides a system for utilizing an enhanced network stack framework, comprising: one or more computers having executable instructions that, when executed, cause the system to: share a plurality of network buffers consistently attached between one or more applications and network interfaces, while bypassing one or more drivers and operating systems by using application buffers, circular buffers, and queuing and pooling operations.

[0012] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to control multiple network buffers through a shared library.

[0013] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to use a network interface to share one or more address spaces of a plurality of network buffers among one or more applications, wherein the plurality of network buffers are used for input / output (I / O) control.

[0014] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to exchange memory pointers with a uniformly attached device using a circular buffer.

[0015] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to perform queuing and pooling operations for multiple network buffers for sending, receiving, and manipulating the network buffers.

[0016] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to move, allocate, or reallocate one of a plurality of network buffers from one or more queues and one or more pools for performing queuing and pooling operations.

[0017] Preferably, the present invention provides a system in which executable instructions, when executed, cause the system to use multiple network buffers to establish shared memory regions and private memory regions.

[0018] In another aspect, the present invention provides a computer program product for use by a processor utilizing an enhanced network stack framework, the computer program product including a non-transient computer-readable storage medium having a portion of computer-readable program code stored therein, the portion of computer-readable program code including: an executable portion that shares a plurality of network buffers consistently attached between one or more applications and network interfaces, while using application buffers, circular buffers, and queuing and pooling operations to bypass one or more drivers and operating systems.

[0019] Preferably, the present invention provides a computer program product, which further includes an executable portion that controls multiple network buffers through a shared library.

[0020] Preferably, the present invention provides a computer program product, further comprising an executable portion that uses a network interface to share one or more address spaces of a plurality of network buffers among one or more applications, wherein the plurality of network buffers are used for input / output (I / O) control.

[0021] Preferably, the present invention provides a computer program product, further comprising an executable portion that: exchanges memory pointers with a uniformly attached device using a circular buffer; and performs queuing and pooling operations for sending, receiving, and manipulating a plurality of network buffers.

[0022] Preferably, the present invention provides a computer program product, further comprising an executable portion that moves, allocates, or reallocates one of a plurality of network buffers from one or more queues and one or more pools to perform queuing and pooling operations.

[0023] Preferably, the present invention provides a computer program product, which further includes an executable portion that uses multiple network buffers to establish a shared memory region and a private memory region. Attached Figure Description

[0024] To facilitate understanding of the advantages of the invention, a more specific description of the invention, which has been briefly described above, will be presented with reference to specific embodiments shown in the accompanying drawings. It should be understood that these drawings depict only exemplary embodiments of the invention and should not be considered as limiting its scope. The invention will be described and explained with additional features and details using the drawings, wherein:

[0025] Figure 1 This is a block diagram depicting an exemplary cloud computing node according to an embodiment of the present invention;

[0026] Figure 2 This is an additional block diagram illustrating an exemplary cloud computing environment according to an embodiment of the present invention;

[0027] Figure 3This is an additional block diagram illustrating the abstract model layer according to an embodiment of the present invention;

[0028] Figure 4 It is a block diagram depicting the operation mode of a consistent attachment interface utilized in a network stack framework within a computing environment in which various aspects of the present invention can be implemented;

[0029] Figures 5A-5B This is a diagram illustrating the use of a consistent attachment interface in a network stack framework within a computing environment, according to various aspects of the present invention.

[0030] Figures 6A-6B This is a schematic diagram illustrating the use of a circular buffer with a consistent attachment interface in a network stack framework in a computing environment according to aspects of the present invention.

[0031] Figure 7 This is a block diagram describing the operational modes of a network stack framework within a computing environment in which various aspects of the present invention can be implemented, utilizing a consistent attachment interface; and

[0032] Figure 8 This is a flowchart describing another exemplary method of utilizing a consistent attachment interface within a network stack framework in a computing environment in which various aspects of the present invention can be implemented. Detailed Implementation

[0033] As a preliminary issue, cache coherence, also known as memory coherence, is a problem affecting the design of computer systems where two or more processors or cores share a common area of ​​memory. In a single-processor system, only one processing element performs all the work; therefore, only one processing element can read from or write to a given memory location. As a result, when a value changes, all subsequent read operations on the corresponding memory location will see the updated value, even if it is cached.

[0034] Conversely, in a multiprocessor (or multicore) system, there are two or more processing elements working simultaneously, so they may access the same memory location concurrently. Assuming no processor changes the data at that location, the processors can share the data indefinitely and cache it as they wish. However, once a processor updates that location, other processors can work on stale copies that may reside in their local caches. Therefore, a scheme is needed to notify all processing elements of changes to shared values; this scheme is called a "cache coherence protocol," and if such a protocol is used, the system is said to have "cache coherence." The exact nature and meaning of cache coherence are determined by the coherence model implemented by the coherence protocol.

[0035] Cache coherence protocols typically define a set of cache states stored in association with a copy of a cache block, and the events that trigger transitions between cache states and the cache states to which transitions occur. Therefore, to maintain data consistency across a system, cache coherence protocols, such as directory-based protocols, snoop-based protocols, combinations thereof, or other variations, are used to ensure at least a minimum level of consistency between the various processor core "views" of the contents of system memory.

[0036] Furthermore, modern computing systems, with their various system buses, internal system connections, and interconnects between various applications and local or adjacent systems, employ a variety of protocols for transferring data and sharing memory between various components. For example, computing systems aim to provide enhanced performance using cache coherence to enable consistent interconnects between general-purpose processors and accelerators for heterogeneous computing. This attempts to avoid bandwidth limitations or latency inherent in some connections, such as the PCI Express (PCIe) bus (where PCIe is a multi-channel, point-to-point interconnect that can expand from one channel to multiple channels). That is, computing systems attempt to provide increased computational efficiency while maintaining cache coherence while providing data access across the memory space of various types of processors. For example, the Open Coherent Accelerator Processor Interface (CAPI) is an interface between processors and accelerators to increase bandwidth and provide lower latency. As another example, the Cache Coherent Interconnect for Accelerators (“CCIX”), built on PCI Express (PCIe), can be used to provide a chip-to-chip interconnect for accelerating and directing high-speed hardware for certain applications.

[0037] However, even within these modern computing systems, transmitting, communicating, and / or receiving data between various applications and local or adjacent systems still experiences network latency along the network path. For example, in the context of tightly integrated high-performance computing (“HPC”) systems with few switching layers, delivering data to a target application involves network path latency (once within the destination device), which can be several nanoseconds (“nsec”) higher than transmitting data between servers (e.g., at least on the scale of several co-located racks, especially if traversing the network stack is required). Therefore, there is a need for a cache-coherent interconnect system to maintain cache coherence, increase bandwidth, and reduce / eliminate network access latency paths in HPC / heterogeneous computing systems, where network access latency can begin from the time the data signal arrives at the network interface and end at the shared memory with the data (e.g., at the time the actual data copy of the data goes to the destination memory / memory cell), so that the receiving application can use the data.

[0038] Therefore, as described herein, various embodiments provide enhanced network architectures that leverage the processor's cache-coherent attachment to enable direct control over load and store operations on system memory from off-chip peripherals that are agnostic to the local system bus architecture. This decouples memory transactions from specific bus architectures, and the same unmodified coherent attachment logic (for accelerators, network interfaces, etc.) can interface with different SoC architectures. In one aspect, various embodiments improve network access latency paths and provide the ability to share memory between one or more applications and one or more network interfaces while bypassing one or more drivers and operating systems.

[0039] The mechanism of the illustrated embodiment of the enhanced network architecture enables off-chip accelerators to be integrated with the system-on-chip (“SoC”) and to be directly mastered and cached consistently loaded and stored into system memory using the same memory access data path with comparable latency and bandwidth (e.g., a hardware data path similar to that of on-chip entities such as processors and coprocessors).

[0040] In addition, this invention provides direct access to in-memory data, interrupt generation, and the ability to compete for spinlocks atomically with the CPU, all provided by a uniformly attached port. This means that if the application and the uniformly attached device are consistent in data format, no operating system device driver support or DMA programmable hardware is required for scatter-aggregate data transfer. By enabling and providing driverless integration, the programming model and application programming interface (“API”) are further simplified, providing increased computational efficiency, where the programming model and API appear as thread-mutexclusive, i.e., network I / O is integrated as a special form of hardware thread.

[0041] Therefore, the present invention provides a network framework for sharing memory buffers (e.g., “network buffers”) among various applications and network interfaces. In one aspect, memory buffers can be used interchangeably with network buffers. Network buffers can be allocated by the operating system (“OS”) on behalf of one or more applications and provided under the control of libraries (e.g., shared libraries). In another aspect, a shared address space established on the shared memory mechanism among all participating applications can be provided and used for input / output (“I / O”) control (i.e., pointer swapping and spinlock processing). Each application can then have shared access protected by the accelerator’s memory management unit (“MMU”) on a common address space containing the application’s network buffer.

[0042] In this way, the present invention enables applications to seamlessly exchange memory data over a network by simply processing pointers and spinlocks, achieving unprecedented latency through the use of consistent attachment port technology (e.g., current RDMA round-trip latency is 1.2 microseconds "usec" for a switching layer, while for data transfer within a "black box," consistent attachment interfaces can reduce this latency to 600-700 nanoseconds (nsec), and enable network media to utilize ultra-high bursts (i.e., single hardware-level bursts for the entire application-level message size are now possible). The illustrated embodiment of the network stack framework system is a framework agnostic to any network media access protocol ("MAC") or link layer control protocol ("LLC"), and therefore can potentially be integrated with any packet or circuit network technology.

[0043] It should be understood beforehand that although this disclosure includes a detailed description of cloud computing, the implementation of the teachings set forth herein is not limited to a cloud computing environment. Rather, embodiments of the invention can be implemented in conjunction with any other type of computing environment now known or developed hereafter.

[0044] Cloud computing is a service delivery model for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing power, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0045] The features are as follows:

[0046] On-demand self-service: Cloud consumers can unilaterally and automatically provide computing power, such as server time and network storage, as needed, without requiring manual interaction with the service provider.

[0047] Wide Area Network (WAN) Access: Capabilities are available on the network and accessed through standard mechanisms that facilitate use through heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs).

[0048] Resource pooling: A provider's computing resources are pooled to serve multiple consumers using a multi-tenant model, where different physical and virtual resources are dynamically allocated and reallocated based on demand. Location independence has significance because consumers typically do not control or know the exact location of the resources provided, but can specify the location at a higher level of abstraction (e.g., country, state, or data center).

[0049] Rapid Flexibility: In some cases, the ability to scale outwards and inwards quickly and flexibly can be provided. For consumers, the available capacity often appears unlimited and can be purchased in any quantity at any time.

[0050] Measurement services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at a level of abstraction appropriate to the service type (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency for both service providers and consumers.

[0051] The service model is as follows:

[0052] Software as a Service (SaaS): This provides consumers with the ability to use the provider's applications running on cloud infrastructure. Applications can be accessed from various client devices through thin client interfaces such as web browsers (e.g., web-based email). Consumers do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or even individual application capabilities, with the possible exception of limited user-specific application configuration settings.

[0053] Platform as a Service (PaaS): This provides consumers with the ability to deploy applications created by the consumer or acquired using programming languages ​​and tools supported by the provider onto cloud infrastructure. Consumers do not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, or storage, but they have control over the deployed applications and the configuration of any application hosting environment.

[0054] Infrastructure as a Service (IaaS): The capabilities offered to consumers are processing, storage, networking, and other basic computing resources that enable consumers to deploy and run arbitrary software, which may include operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but rather have control over the operating system, storage, deployed applications, and potentially limited control over selected networking components (e.g., host firewalls).

[0055] The deployment model is as follows:

[0056] Private cloud: Cloud infrastructure operated solely by an organization. It can be managed by the organization or a third party and can exist inside or outside a building.

[0057] Community cloud: Cloud infrastructure shared by several organizations and supporting a specific community with shared concerns (e.g., tasks, security requirements, policies, and compliance considerations). It can be managed by an organization or a third party and can exist on-site or off-site.

[0058] Public cloud: Cloud infrastructure available to the general public or large industrial groups and owned by organizations that sell cloud services.

[0059] Hybrid cloud: A cloud infrastructure is a combination of two or more clouds (private, community, or public) that remain a single entity but are bound together by standardized or proprietary technologies that enable data and applications to be ported together (e.g., cloud bursting for load balancing between clouds).

[0060] Cloud computing environments are service-oriented, focusing on statelessness, loose coupling, modularity, and semantic interoperability. At the heart of cloud computing is the infrastructure of a network of interconnected nodes.

[0061] Now for reference Figure 1 The diagram illustrates an example of a cloud computing node. Cloud computing node 10 is merely one example of a suitable cloud computing node and is not intended to impose any limitation on the scope or functionality of the embodiments of the invention described herein. In any case, cloud computing node 10 can be implemented and / or perform any of the functions set forth above.

[0062] Within cloud computing node 10, there exists a computer system / server 12 that can operate alongside many other general-purpose or special-purpose computing system environments or configurations. Examples of well-known computing systems, environments, and / or configurations suitable for computer system / server 12 include, but are not limited to, personal computer systems, server computer systems, thin clients, fat clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the aforementioned systems or devices.

[0063] Computer system / server 12 can be described in the general context of computer system executable instructions, such as program modules executed by the computer system. Typically, program modules may include routines, programs, objects, components, logic, data structures, etc., that perform some routine tasks or implement specific abstract data types. Computer system / server 12 can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked via a communication network. In a distributed cloud computing environment, program modules can reside in local and remote computer system storage media, including memory storage devices.

[0064] like Figure 1 As shown, the computer system / server 12 in cloud computing node 10 is illustrated in the form of a general-purpose computing device. The components of the computer system / server 12 may include, but are not limited to, one or more processors or processing units 16, system memory 28, and a bus 18 that couples various system components, including system memory 28, to the processor 16.

[0065] Bus 18 represents one or more of several types of bus architectures, including memory buses or memory controllers, peripheral buses, accelerated graphics ports, and processor or local buses using any of the various bus architectures. By way of example and not limitation, these architectures include Industry Standard Architecture (ISA) buses, Micro Channel Architecture (MCA) buses, Enhanced ISA (EISA) buses, Video Electronics Standards Association (VESA) local buses, and Peripheral Component Interconnect (PCI) buses.

[0066] Computer system / server 12 typically includes various computer system readable media. Such media can be any available media that can be accessed by computer system / server 12, and it includes volatile and non-volatile media, removable and non-removable media.

[0067] System memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. Computer system / server 12 may also include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be provided for reading from and writing to non-removable, non-volatile magnetic media (not shown, and generally referred to as "hard disk drives"). Although not shown, disk drives for reading from and writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks such as CD-ROMs, DVD-ROMs, or other optical media may be provided. In this case, each may be connected to bus 18 via one or more data media interfaces. As will be further described and illustrated below, system memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of embodiments of the present invention.

[0068] A program / utility 40 having a set (at least one) of program modules 42, along with an operating system, one or more applications, other program modules, and program data, may be stored in system memory 28 as an example, not as a limitation. Each of the operating system, one or more applications, other program modules, and program data, or some combination thereof, may include an implementation of a networking environment. Program modules 42 typically perform the functions and / or methods of the embodiments of the invention described herein.

[0069] The computer system / server 12 can also communicate with one or more external devices 14, such as a keyboard, indicating device, display 24, etc.; one or more devices that enable a user to interact with the computer system / server 12; and / or any device that enables the computer system / server 12 to communicate with one or more other computing devices (e.g., network interface card, modem, etc.). This communication can occur via input / output (I / O) interface 22; however, the computer system / server 12 can communicate with one or more networks via network adapter 20, such as a local area network (LAN), a general wide area network (WAN), and / or a public network (e.g., the Internet). As shown, network adapter 20 communicates with other components of the computer system / server 12 via bus 18. It should be understood that, although not shown, other hardware and / or software components may be used in conjunction with the computer system / server 12, examples including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archive storage systems.

[0070] In the context of this invention, and as those skilled in the art will understand, Figure 1 The various components depicted can be located within a moving vehicle. For example, some processing and data storage capabilities associated with the mechanisms of the illustrated embodiments can occur locally via local processing components, while the same components are connected via a network to remotely located distributed computing data processing and storage components to achieve the various objectives of the invention. Furthermore, as those skilled in the art will understand, this description is intended to convey only a subset of the entire interconnected network of distributed computing components that centrally implement the various aspects of the invention.

[0071] Now for reference Figure 2 The diagram illustrates an illustrative cloud computing environment 50. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 10, and local computing devices used by cloud consumers, such as personal digital assistants (PDAs) or cellular phones 54A, desktop computers 54B, laptop computers 54C, and / or automotive computer systems 54N, can communicate with the cloud computing nodes 10. The nodes 10 can communicate with each other. They can be physically or virtually grouped (not shown) in one or more networks, such as private, community, public, or hybrid clouds as described above, or combinations thereof. This allows the cloud computing environment 50 to provide infrastructure, platform, and / or software as a service, for which cloud consumers do not need to maintain resources on their local computing devices. It should be understood that... Figure 2 The types of computing devices 54A-N shown are for illustrative purposes only, and computing node 10 and cloud computing environment 50 can communicate with any type of computerized device via any type of network and / or network-addressable connection (e.g., using a web browser).

[0072] Now for reference Figure 3 This demonstrates the 50 (cloud computing environment) Figure 2 This provides a set of functional abstractions. It should be understood beforehand that... Figure 3 The components, layers, and functions shown are for illustrative purposes only, and embodiments of the invention are not limited thereto. As described, the following layers and corresponding functions are provided:

[0073] Device layer 55 includes physical and / or virtual devices embedded with and / or independent electronics, sensors, actuators, and other objects to perform various tasks in the cloud computing environment 50. Each device in device layer 55 integrates networking capabilities with other functional abstraction layers, enabling information obtained from the device to be provided to that device, and / or information from other abstraction layers to be provided to the device. In one embodiment, the various devices, including device layer 55, may be incorporated into a network of entities collectively referred to as the “Internet of Things” (IoT). As those skilled in the art will understand, such a network of entities allows data to communicate, be collected, and disseminated to achieve various purposes.

[0074] As shown in the figure, device layer 55 includes sensor 52, actuator 53, a "learning" thermostat 56 with integrated processing, sensors, and networking electronics, camera 57, controllable household socket / outlet 58, and controllable electrical switch 59, as shown. Other possible devices may include, but are not limited to, various additional sensor devices, networking devices, electronic devices (such as remote control devices), additional actuator devices, so-called "smart" appliances (such as refrigerators or washing machines / dryers), and a wide variety of other possible interconnected objects.

[0075] The hardware and software layer 60 includes hardware and software components. Examples of hardware components include: a host 61; a server 62 based on a RISC (Reduced Instruction Set Computer) architecture; a server 63; a blade server 64; a storage device 65; and a network and network components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0076] The virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities can be provided: virtual server 71; virtual storage 72; virtual network 73, including virtual private network; virtual application and operating system 74; and virtual client 75.

[0077] In one example, management layer 80 can provide the following functions: Resource Provisioning 81 provides dynamic procurement of computing resources and other resources used to perform tasks in the cloud computing environment. Metering and Pricing 82 provides cost tracking when resources are used in the cloud computing environment and bills or invoices for the consumption of these resources. In one example, these resources may include application software licenses. Security provides authentication for cloud consumers and tasks and protection for data and other resources. User Portal 83 provides access to the cloud computing environment for consumers and system administrators. Service Level Management 84 provides cloud resource allocation and management to meet required service levels. Service Level Agreement (SLA) Planning and Fulfillment 85 provides pre-planning and procurement of cloud resources based on anticipated future demand for cloud resources according to the SLA.

[0078] Workload layer 90 provides examples of functionalities that can be utilized in a cloud computing environment. Examples of workloads and functionalities that can be provided from this layer include: mapping and navigation 91; software development and lifecycle management 92; virtual classroom education delivery 93; data analytics processing 94; transaction processing 95; and in the context of the embodiments illustrated in this invention, various workloads and functionalities 96 are used to utilize interfaces that are consistently attached within the network stack framework. Additionally, workloads and functionalities 96 used to utilize interfaces that are consistently attached within the network stack framework can include operations such as data analytics. Those skilled in the art will understand that workloads and functionalities 96 used to utilize interfaces that are consistently attached within the network stack framework can also work in conjunction with other parts of various abstraction layers (such as those in hardware and software layer 60, virtualization layer 70, management layer 80) and other workload layers 90 (such as data analytics processing 94) to achieve the various objectives of the embodiments illustrated in this invention.

[0079] Now go to Figure 4 A block diagram illustrating exemplary functional components of various mechanisms according to the illustrated embodiments is shown. Figure 4 A system 400 is shown for using an interface that leverages consistent attachment within a network stack framework. It can be seen that many functional blocks can also be considered as functional "modules" or "components," with a descriptive meaning similar to that described earlier. Figures 1-3 As described above, module / component blocks can also be incorporated into various hardware and software components of the system for intelligent causal knowledge extraction according to the present invention. Many functional blocks can execute as background processes on various components in distributed computing components, on user devices, or elsewhere.

[0080] like Figure 4 As shown, a network stack shared service 410 is illustrated, which combines a processing unit (“processor”) 420 and a memory 430 (which may also be...). Figure 1The processing unit 420 (“processor”) 16 and memory 28 perform various computational, data processing, and other functions according to various aspects of the invention. The processing unit 420 can communicate with the memory 430. The network stack sharing service 410 can be provided by… Figure 1 The computer system / server 12 is provided.

[0081] As those skilled in the art will understand, the various functional units in the network stack sharing service 410 are described for illustrative purposes, as functional units may be located elsewhere within the network stack sharing service 410 or within and / or between distributed computing components.

[0082] The network stack sharing service 410 may include a sharing component 440, an application buffer component 450, a circular buffer component 460, and a queuing and pooling component 470. Therefore, the network stack sharing service 410 enables the network interface to be consistently attached to system memory, completely bypassing the driver and OS.

[0083] In one embodiment, by way of example only, shared component 440 (and / or associated with application buffer component, circular buffer component 460, queuing and pooling component 470, or a combination thereof) may share multiple network buffers consistently attached between one or more applications and network interfaces, while using application buffers, circular buffers, and queuing and pooling operations to bypass one or more drivers and operating systems.

[0084] Shared component 440 may include shared libraries (see also...) Figures 5A-5B The shared library (504) and / or associated with it, which controls multiple network buffers through the shared library.

[0085] Shared component 440 can use a network interface to share one or more address spaces of multiple network buffers among one or more applications, wherein the multiple network buffers are used for input / output (I / O) control.

[0086] Application buffer component 450 can securely share one or more application virtual address spaces of multiple network buffers with a uniformly attached network interface (see uniformly attached network interface 512 in Figure 5). Circular buffer component 460 can exchange memory pointers with one or more uniformly attached devices.

[0087] The queuing and pooling component 470 can perform queuing and pooling operations on multiple network buffers used for network buffer transmission, reception, and manipulation. The queuing and pooling component 470 can move, allocate, or reallocate one of multiple network buffers from one or more queues and one or more pools to perform queuing and pooling operations. That is, the queuing and pooling component 470 can provide network buffer transmission, reception, manipulation, and sharing of buffers belonging to different application virtual address spaces with network interfaces in a consistency domain.

[0088] Shared component 440 can use multiple network buffers to establish shared memory regions and private memory regions.

[0089] Now go to Figures 5A-5B The diagram illustrates network stack frameworks 500 and 515 for utilizing a consistent attachment interface. As will be seen, many functional blocks can also be considered as "modules" or "components" of functionality, having similarities to those previously described in... Figures 1-4 The same descriptive meaning as described in [the text]. Furthermore, Figures 1-4 One or more operations and steps may also be included Figures 5A-5B In one or more operations or actions. For the sake of brevity, repeated descriptions of similar elements, components, modules, services, applications, and / or functions used in other embodiments described herein have been omitted.

[0090] As depicted, network stack framework 500 includes one or more applications (e.g., App 1 or "Application 502A" and App N or "Application N") and / or associated with them. Furthermore, one or more applications 502A-502N can communicate with shared library 504. Network stack framework 500 may also include one or more network buffers, such as, for example, network buffers 510A-510C. In one aspect, network buffers 510A-510C can be shared and / or restricted to "private". For example, network buffer 510A can be a shared network buffer, while network buffers 510B and 510C can be private network buffers. Network buffers 510A-510C can communicate / associate with a consistently attached network interface 512. Therefore, network buffers 510A-510C can be consistently attached between one or more applications (e.g., applications 502A-502N) and network interfaces (e.g., consistently attached network interface 512), while using application buffers, circular buffers (see also...). Figures 6A-6B ) and queuing and pooling operations (see also) Figures 6A-6B This can be used to bypass one or more drivers and operating systems.

[0091] In one aspect, by way of example only, for N example applications, such as, for example, applications 502A-502N, the arrangement of the address space of network buffers 510A-510C is depicted. Shared library 504 can establish public regions (e.g., “APP_SFIARED” for sharing access to applications in network buffer 510A) and private regions (e.g., “APP_PRIVATE” for providing private access to applications in network buffers 510B-510C) on shared memory. Furthermore, as described herein, various constructions including the network buffer stack will also involve the address space used, and by utilizing hardware-level support, such as, for example, PCI PASID (“Peripheral Component Interface (“PCI”) process address space identifier (“PASID”), etc.), one or more uniformly attached network interfaces 512 can be associated with different application address spaces simultaneously.

[0092] In one aspect, as part of establishing a connection with one or more remote counterparts, an application (e.g., applications 502A-502N, which could be user applications) can maintain multiple associated network buffers for communication, residing in contention zones (e.g., "APP_PRIVATE" for providing private access to applications within network buffers 510B-510C). Within the context of each application, a network buffer (e.g., one of network buffers 510A-510C) can belong to only one of six constructs at any given point in time, which can be maintained individually for each application by the shared library 504. Furthermore, as described herein, each queue and pool can use... Figures 6A-6B The 620A-620N circular buffers are used to perform and complete various functions for each of the queues and pools.

[0093] In the first configuration or "first pool", the global software ("s / w") free pool (e.g., the default state) can be a common pool for all connections on all applications, and all network buffers belong here during initialization until an action is taken. Pointers to all these network buffers are maintained by shared library 504 in the "APP_SHARED" area of ​​network buffer 510A, categorized by active application, and contain only network buffer pointers.

[0094] In the second configuration, or "second pool," the global hardware ("H / w") free pool can be actively comprised of multiple free network buffers pushed to it, and free network buffers can be moved from the global software ("S / w") free pool. Each application can contribute buffers to this pool (e.g., the global software ("S / w") free pool), and the global software ("S / w") free pool should always be replenished when network buffers are consumed for data reception. If the global software ("S / w") free pool becomes empty for a given application, it will stop accepting network buffers destined for that application from remote nodes. The pointer to the global software ("S / w") free pool resides in the "APP_SHARED" area of ​​network buffer 510A and contains only network buffer pointers.

[0095] In the third construct or “third pool”, one or more process pools may include network buffers that are actively modified by the local processor, graphics processing unit (“GPU”), cache, etc., and are “per application pool” and maintained for garbage collection purposes. If the network buffer is not returned, it is garbage collected by shared library 504 when the owner application exits. One or more process pools may reside in the “APP_SHARED” area of ​​network buffer 510A and contain only network buffer pointers.

[0096] In the third construct or “third queue”, the receive queue(s) may include a network buffer updated with content sent from a remote host with which it has established communication, wherein a receive queue (e.g., simply hosting a buffer pointer) is created in the “APP_SHARED” area of ​​each remotely connected network buffer 510A. The receive queue(s) may be a first-in-first-out (“FIFO”) queue.

[0097] In the fourth construct or "fourth queue," the global send queue may include network buffers marked for sending, and the global send queue is shared across all connections across all applications, allowing hardware to access all network buffers and perform the transfer (e.g., the global send queue only hosts pointers to the network buffers). The global send queue is a FIFO queue that contains pointers and is located in the "APP_SHARED" area of ​​the network buffer 510A.

[0098] In the fifth construct or “fifth queue”, one or more send queues may include a network buffer for which a return to the owner application can be made upon completion of the send operation. One or more send queues may be FIFO queues whose pointers reside in the “APP_SHARED” area (which is the protected network buffer space) within the network buffer 510A.

[0099] In addition, such as Figure 5B As shown, all queues and pools can be maintained in, for example, the “APP_SHARED” area in network buffer 510A, and can contain virtual address pointers to various application buffers (e.g., APP 1 buffer and APPN buffer) residing in the “APP_PRIVATE” area in each application address space (network buffers 510B-510C).

[0100] Application buffers (e.g., APP 1 buffer and APPN buffer) can be transferred / moved (as described above) between various pools and queues in response to one or more application programming interface (“API”) calls and / or hardware events. That is, an application can move network buffers from the global S / w free pool to its processing pool. Each network buffer belonging to an application's processing pool can be moved by the owner application to the global send queue. An application can reuse one or more network buffers from its send queue by transferring / moving one or more network buffers back to the processing pool. The send queue can have a fixed size for each application, so if the send queue ignores the application, it can begin returning buffers to the global software free pool if the send queue is full. Each network buffer in the receive queue can be moved to the processing pool when read by shared library 504. For each network buffer returned to the receive queue, shared library 504 moves the network buffer from the global S / w free pool to the global H / w free pool, so the hardware can continue receiving data from the remote host.

[0101] In addition, for network addressing and logical connections (i.e., communication established between a local application running on the local host and a remote application running on a remote host), a shared library 504 (which may be a software library) maintains a connection stack with all active connections from the local to the remote application. Connection tuples (i.e., tuples storing all routing and identifier information required to establish bidirectional communication between a local application running on the local host and a remote application running on the remote host) may have a fixed size and be accessible by a unique identifier that also acts as an offset on the dedicated stack in which they are stored. Each connection tuple may be characterized by 1) a destination connection identifier (“ID”) and a network identifier (which may be acquired during connection establishment and is dedicated to the underlying network architecture / technology), 2) a local identifier for accessing various queues, 3) authentication certificates for the various queues that the connection tuple can access, and / or 4) internal port information that allows network buffers to be passed to the application.

[0102] Figures 6A-6B Figures 600 and 615 illustrate the use of circular buffers to leverage a consistent attachment interface within the network stack framework of a computing environment. As will be seen, in conjunction with previously... Figures 1-5A - Figure 5B In the same descriptive sense as described in [the text], many functional blocks can also be considered as "modules" or "components" of a function. Furthermore, Figures 1-5A - Figure 5B One or more of the operations and steps may also be included Figures 6A-6B In one or more operations or actions. For the sake of brevity, repeated descriptions of similar elements, components, modules, services, applications, and / or functions used in other embodiments described herein have been omitted.

[0103] As shown in the figure, the circular buffer 620 (for example, Figure 6A Circular buffer 620 and Figure 6B The cyclic buffers 620-620N are described as being able to reside in system memory. In one aspect, given the ability of hardware components to atomically compete for spinlocks, hardware-software co-design can be used to communicate with the cyclic buffers of the cyclic buffer 620.

[0104] In one aspect, the circular buffer 620 can operate in a manner similar to or mirroring processor behavior (e.g., how the CPU contends), but the full hardware thread can be implemented by the network interface (e.g., network interface hardware 630) and can be required to "push / pull" data from system memory to / from the network interface (e.g., network interface hardware 630). A CPU thread may also be needed for delivery to the application and is generated by library 610. For example, specific atomic commands (e.g., atomic built-in commands for a specific processor architecture that can atomically assert and deassert bits in registers) can be used to implement shared access to the circular buffer 620. Each circular buffer instance is characterized by a single register indicating which fields of the circular buffer have valid entries. More specifically, each bit position indicates that the corresponding specific circular buffer entry has valid data if the bit position value is equal to logic one, and if the bit position value is equal to zero, it does not contain data. Utilizing atomic operations on the aforementioned registers, indicating which entries in the circular buffer 620 are valid, a consistently attached network interface can safely share the buffer and exchange data with the corresponding CPU (on which the software library runs).

[0105] like Figure 6B As depicted more clearly in the diagram, the circular buffers 620A-620N represent an end-to-end connection between a shared library 610 (e.g., a software library or "software side") and network interface hardware 630 (e.g., a hardware buffer, network buffer scheduler, or "hardware side"). The circular buffers 620A-620N can be unidirectional hardware-software shared circular buffers (e.g., software library 610 and network interface hardware 630 share a circular buffer) and are used for interaction (e.g., for pointer exchange).

[0106] Circular buffers 620A-620N can be unidirectional and different instances need to be used for different pool / queue types, such as global software (“s / w”) idle pool 602A, global hardware (“H / w”) idle pool 602B, (one or more) processing pools (i.e., buffer pools currently manipulated by application code running on the local host), (one or more) receive queues 608A-606B (e.g., receive queues per connection), global send queues (i.e., a single host-wide queue shared among all applications on the host, containing all buffers that need to be sent by the consistently attached network interface but have not yet been sent) 604A and 604B, and / or (one or more) global send queues 606A-606B (i.e., one send queue per connection, containing buffers that have been sent to the remote host by the consistently attached network interface so that applications can reuse them).

[0107] In one aspect, on the software side, a scheduler thread 640 may be used, and on the hardware side, a priority / arbitrator scheduler 640 (e.g., a hardware buffer scheduler) may be used, which may be used by circular buffers 620A to 620N for pushing and / or pulling data between system memories toward / from the network interface. Thus, each of the circular buffers 620A to 620N can be used for both software and hardware functions.

[0108] Therefore, by way of example only, each of the ring buffers 620A-620N can pull out a spinlock from the hardware side (e.g., network interface hardware 630), and the hardware thread can exclude itself from each other from the software threads to obtain data.

[0109] In one aspect, the circular buffers 620A to 620N can be used only for immediate transfers, thus enabling both the software (e.g., application) side and the hardware (network / memory) side to have first-in-first-out (FIFO) operation to support asynchronous operations. Therefore, the circular buffers 620A-620N can retrieve pointers to the address space and utilize various queues and pools to remove, move, and / or transfer network buffers from within the application and network.

[0110] In operation, as an example, each application has a state, and this state can be the state of queues and pools indicating the position of the network buffer in queues and pools (e.g., global software (“s / w”) idle pool 602A, global hardware (“H / w”) idle pool 602B, (one or more) processing pools (these are virtual pools because they refer to buffers that do not belong to any other pool and are therefore being manipulated by the application), (one or more) receive queues 608A-606B, global send queues 604A and 604B, and / or (one or more) global send queues 606A-606). Using scheduler thread 640, each state of the queues and pools is mirrored by simply swapping pointers from the software side (S / W) to the hardware side (H / W). Mirroring the states of the queues and pools makes it possible to know any changes and any updates. The hardware side now has the same view as the software library 610 and performs actions that can be offloaded to the hardware. In this way, both the software (S / W) and hardware (H / W) sides understand which network buffers can be issued, sent / received, and / or released by exchanging pointers from the software side to the hardware side and using pointers to queues and pools. Thus, for example, the hardware can make decisions, perform operations, and retrieve dates from the application, and push the results back to the application with transparency.

[0111] Figure 7 This is a block diagram depicting an exemplary end-to-end driverless connectivity system 700 for utilizing a consistent attachment interface within a network stack framework in a computing environment. As will be seen, in conjunction with previously... Figures 1-6A -Figure 6B In the same descriptive sense as described in the text, many functional blocks can also be "modules" or "components" that are jointly encrypted with functions. Figures 1-6A - Figure 6B One or more operations and steps may also be included Figure 7 For the sake of brevity, repeated descriptions of similar elements, components, modules, services, applications, and / or functions used in other embodiments described herein have been omitted in one or more operations or actions.

[0112] As shown in the figure, a system 700 for utilizing a consistent attachment interface within a network stack framework may include one or more system interconnects 710A and 710B. System interconnects 710A (with consistency domain 1) and 710B (with consistency domain 2) connect one or more application buffers 710C to network buffer hardware (e.g., hardware-side), which can be achieved via network interface hardware 730, which is also connected to the network switching layer. Furthermore, a local network interface 712 can also be used to connect each network buffer hardware to the network switching layer (e.g., a local network interface). In short, network interface hardware 730 enables applications 702A-N (e.g., App1, ..., AppN, and software-side), library 704, and buffers 710C to be boots up end-to-end connectivity via network interface hardware 730. Therefore, system 700 can achieve coherent connectivity of network interface hardware 730 via system interconnects 710A-710B, completely bypassing drivers and the OS. Application buffers are directly copied to the network interface hardware output buffers without any intervention from the operating system.

[0113] Figure 8 This is a flowchart depicting an exemplary method 800 for utilizing a consistent attachment interface within a network stack framework in a computing environment, wherein various aspects of the illustrated embodiments can be implemented. Function 800 can be implemented as a method of instruction execution on a machine, wherein the instructions are included on at least one computer-readable storage medium or a non-transitory machine-readable storage medium. Function 800 may begin at block 802.

[0114] One or more network buffers are consistently attached between one or more applications and network interfaces, as shown in box 804. As shown in box 806, network buffers consistently attached between one or more applications and network interfaces can be shared, while application buffers, circular buffers, and queuing and pooling operations for network communications can be used to bypass one or more drivers and operating systems. Function 800 may end in box 808.

[0115] In one respect, combination Figure 8As part of at least one box and / or a block thereof, the operation of method 800 may include one or more of each of the following. The operation of method 800 may control multiple network buffers through a shared library.

[0116] Method 800 allows the use of a network interface to share one or more address spaces of multiple network buffers among one or more applications. Multiple network buffers can be used for input / output (I / O) control. Circular buffers can exchange memory pointers with consistently attached devices.

[0117] Method 800 can perform queuing and pooling operations on multiple network buffers used for sending, receiving, and manipulating network buffers. Method 800 can move, allocate, or reallocate one of multiple network buffers from one or more queues and one or more pools to perform queuing and pooling operations. Method 800 can use multiple network buffers to establish shared memory regions and private memory regions.

[0118] This invention can be a system, method, and / or computer program product. A computer program product may include one or more computer-readable storage media having computer-readable program instructions thereon for causing a processor to perform aspects of the invention.

[0119] Computer-readable storage media can be tangible devices capable of retaining and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital versatile disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punched cards or raised structures in recesses on which instructions are recorded, and any suitable combination of the foregoing. As used herein, computer-readable storage media should not be construed as being a transient signal, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0120] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a suitable computing / processing device, or via a network, such as the Internet, a local area network (LAN), a wide area network (WAN), and / or a wireless network, to an external computer or external storage device. The network may include copper cables, optical fibers, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the respective computing / processing device.

[0121] Computer-readable program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of this invention, electronic circuits, including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may execute computer-readable program instructions to personalize the electronic circuits by utilizing state information from the computer-readable program instructions.

[0122] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0123] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can instruct a computer, programmable data processing apparatus, and / or other device to operate in a particular manner, such that the computer-readable storage medium in which the instructions are stored includes an article of writing comprising instructions for implementing aspects of the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0124] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus or other device, perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0125] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or instruction portion, comprising one or more executable instructions for implementing one or more specified logical functions. In some alternative embodiments, the functions mentioned in the blocks may occur in a different order than those mentioned in the figures. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified function or action or executes a combination of special-purpose hardware and computer instructions.

Claims

1. A method for a processor to utilize an enhanced network stack framework in a computing environment, comprising: In the enhanced network stack framework, multiple network buffers are shared and consistently attached between one or more applications and the network interface, bypassing one or more drivers and the operating system. This sharing is performed by a network stack sharing service, which includes application buffers, circular buffers, queuing, and pooling operations to bypass the one or more drivers and the operating system. The network stack sharing service includes a shared library that provides shared and private regions to the one or more applications. The one or more applications use Remote Direct Memory Access (RDMA) network communication to exchange memory data through the network interface. This RDMA network communication reduces RDMA round-trip latency only by handling pointers and spinlocks.

2. The method of claim 1, further comprising controlling the plurality of network buffers through the shared library.

3. The method of claim 1, further comprising using the network interface to share one or more address spaces of the plurality of network buffers among the one or more applications, wherein the plurality of network buffers are used for input / output (I / O) control.

4. The method of claim 1, further comprising using the circular buffer to exchange memory pointers with a uniformly attached device.

5. The method of claim 1, further comprising performing queuing and pooling operations on the plurality of network buffers for sending, receiving, and manipulating the network buffers.

6. The method according to claim 1, wherein, The queuing and pooling operations also include moving, allocating, or reassigning one of the plurality of network buffers from one or more queues and one or more pools.

7. The method of claim 1, further comprising using the plurality of network buffers to establish the shared region and the private region.

8. A system for utilizing an enhanced network stack framework, comprising: One or more computers having executable instructions that, when executed, cause the system to: In the enhanced network stack framework, multiple network buffers are shared and consistently attached between one or more applications and the network interface, bypassing one or more drivers and the operating system. This sharing is performed by a network stack sharing service, which includes application buffers, circular buffers, queuing, and pooling operations to bypass the one or more drivers and the operating system. The network stack sharing service includes a shared library that provides shared and private regions to the one or more applications. The one or more applications use Remote Direct Memory Access (RDMA) network communication to exchange memory data through the network interface. This RDMA network communication reduces RDMA round-trip latency only by handling pointers and spinlocks.

9. The system according to claim 8, wherein, When executed, the executable instructions enable the system to control the plurality of network buffers through the shared library.

10. The system according to claim 8, wherein, When executed, the executable instructions cause the system to use the network interface to share one or more address spaces of the plurality of network buffers among the one or more applications, wherein the plurality of network buffers are used for input / output (I / O) control.

11. The system according to claim 8, wherein, When executed, the executable instructions cause the system to use the circular buffer to exchange memory pointers with a uniformly attached device.

12. The system according to claim 8, wherein, When executed, the executable instructions cause the system to perform queuing and pooling operations on the plurality of network buffers for network buffer transmission, reception, and manipulation.

13. The system according to claim 8, wherein, When executed, the executable instructions cause the system to move, allocate, or reallocate one of the plurality of network buffers from one or more queues and one or more pools for the purpose of performing the queuing and pooling operations.

14. The system according to claim 8, wherein, When executed, the executable instructions cause the system to use the plurality of network buffers to establish the shared region and the private region.

15. A computer program product for use by a processor utilizing an enhanced network stack framework, the computer program product comprising a non-transient computer-readable storage medium therein storing a portion of computer-readable program code, the computer-readable program code portion comprising: The executable portion shares multiple network buffers consistently attached between one or more applications and the network interface within the enhanced network stack framework, while bypassing one or more drivers and the operating system. This sharing is performed by a network stack sharing service, which includes application buffers, circular buffers, queuing, and pooling operations to bypass the one or more drivers and the operating system. The network stack sharing service includes a shared library that provides shared and private regions to the one or more applications. The one or more applications use Remote Direct Memory Access (RDMA) network communication to exchange memory data through the network interface, and this RDMA network communication reduces RDMA round-trip latency only by handling pointers and spinlocks.

16. The computer program product of claim 15, further comprising an executable portion that controls the plurality of network buffers through the shared library.

17. The computer program product of claim 15, further comprising an executable portion that uses the network interface to share one or more address spaces of the plurality of network buffers among the one or more applications, wherein the plurality of network buffers are used for input / output (I / O) control.

18. The computer program product of claim 15, further comprising an executable portion, said executable portion: Use the circular buffer to exchange memory pointers with the uniformly attached device; and Perform queuing and pooling operations on the plurality of network buffers for sending, receiving, and manipulating the network buffers.

19. The computer program product of claim 15, further comprising an executable portion that moves, allocates, or reallocates one of the plurality of network buffers from one or more queues and one or more pools for performing the queuing and pooling operations.

20. The computer program product of claim 15, further comprising an executable portion that uses the plurality of network buffers to establish the shared region and the private region.

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