A new energy power station station level fault ride-through simulation test system

Abstract

This invention relates to a fault ride-through simulation test system for new energy power plants, belonging to the field of new energy access and control technology. The system includes a data processing terminal, a test host, and test slaves. The test host communicates with the data processing terminal via a network interface; the test host is connected to the test slaves; the test host sends the command to send a curve or recall curve from the data processing terminal to the test slaves; the test slaves synchronously acquire voltage and current input signals and output fault voltage signals; the data processing terminal receives waveform data files from the test slaves and the test host, performs fault ride-through simulation test analysis, and displays and stores the received data files, as well as the test and display analysis results. This system can ensure that all test slaves can synchronously trigger fault simulation signals under different new energy power plant environments, thereby verifying the station-level fault response characteristics of new energy power plants under different operating conditions, and is easy to promote and apply.

Description

Technical Field

[0001] This invention belongs to the field of new energy access and control technology, specifically relating to a new energy power plant-level fault ride-through simulation test system. Background Technology

[0002] In recent years, my country's new energy industry has developed rapidly, with large-scale wind farms and photovoltaic power plants becoming the mainstream. As the installed capacity of new energy sources increases daily, the safety and stability of the power grid have declined to some extent. Therefore, the reactive power support capability of new energy power plants for the power grid has become increasingly important, especially in situations where grid voltage faults occur, requiring new energy power plants to provide necessary reactive power support.

[0003] Currently, performance testing for low voltage ride-through (LVRT) and high voltage ride-through (HVRT) of renewable energy power plants is limited to individual test objects. Taking wind farms as an example: current LVRT and HVRT tests are conducted on a single wind turbine or a single static var generator (SVG). After passing the test, other similar wind turbines and SVGs are then upgraded accordingly. Since no actual station-level LVRT and HVRT performance evaluation has been conducted, it cannot be concluded that the renewable energy power plant possesses the required station-level high and low voltage ride-through performance.

[0004] Theoretically, performance evaluation of station-level LVRT and HVRT can be performed on either the primary or secondary side. Performing evaluation on the primary side can realistically simulate voltage dips and rises during grid faults, and the resulting changes in voltage phase angle and power quality are consistent with real grid fault characteristics. However, the test equipment is bulky (requiring large reactive power capacity), difficult to transport, costly to test, and involves complex wiring with a high risk factor. Therefore, overcoming the shortcomings of existing technologies is a pressing issue in the field of renewable energy access and control technology. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing technologies and provide a station-level fault ride-through simulation test system for new energy power plants. This system can perform station-level fault ride-through performance tests on new energy power plants, facilitating the verification and analysis of station-level fault response characteristics under different operating conditions.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A fault ride-through simulation test system for new energy power plants includes a data processing terminal, a test host, and a test slave.

[0008] The test host communicates with the data processing terminal via a network interface;

[0009] The test host and the test slave are connected;

[0010] The test host is used to send the command to be sent or the command to be recalled from the data processing terminal to the test slave.

[0011] The test host is used to record waveforms and record the current sampling data of all channels, and save the waveform data as a Dat format file;

[0012] The test slave device is used to synchronously acquire voltage and current input signals and to output fault voltage signals;

[0013] The test slave receives the curve command sent by the test host, obtains the fault signal synchronization trigger time, and after confirming that the fault signal can be output normally, when the synchronization trigger signal time arrives, it outputs the corresponding fault voltage signal to perform station-level fault ride-through simulation test.

[0014] The data processing terminal is used to receive waveform data files from the test slave and test master, and to perform power plant-level fault ride-through simulation test analysis; it is also used to display and store the received data files, and to test and display the analysis results.

[0015] Furthermore, preferably, the test host communicates with the test slave using a 4G, 5G network, fiber optic cable, or LTE230 private network.

[0016] Furthermore, preferably, the test slave device is a fault signal generator.

[0017] Furthermore, preferably, the test host includes a positioning module, an ARM controller, a conditioning circuit, a high-speed synchronous data acquisition card, a host, and a communication module;

[0018] The test host communicates with the test slave through its communication module;

[0019] The positioning module is connected to the ARM controller;

[0020] The high-speed synchronous data acquisition card is connected to the ARM controller and the conditioning circuit, respectively.

[0021] The host is connected to the communication module, the high-speed synchronous data acquisition card, and the ARM controller, respectively.

[0022] The positioning module is used to send messages and PPS data to the ARM controller;

[0023] Conditioning circuits are used to condition voltage and current signals;

[0024] The high-speed synchronous data acquisition card is used to acquire voltage signals, current signals, and pulse signals from the ARM controller after being conditioned by the conditioning circuit.

[0025] The host sends a trigger start command to the ARM controller to determine the test start time. At the same time, the host starts recording waveforms. At this time, it is in the pre-recording waveform state and records voltage, current and pulse signals. The pulse signal is invalid and the data of the pre-recording waveform time is maintained. When the agreed trigger time is reached, the trigger signal becomes an effective signal and the host is in the waveform recording state until the test is completed.

[0026] The host computer is also used for human-computer interaction.

[0027] Furthermore, preferably, the recording time is set in the data processing terminal before the trigger pulse. T 0 and pre-recorded wave time t 0. Import data; imported data does not meet the recording time requirement. T 0 indicates invalid data; data needs to be re-imported. If the value is greater than the recording time... T 0. Based on the trigger signal, after pulse triggering is completed, the recording time in each file is recalculated. T and pre-recorded wave time t Determine whether the condition is met. t > t 0, and ( T - t )>( T 0- t If the condition is not met, the data is invalid and needs to be re-imported; if the condition is met, the data is merged into the recording data file of the test host, and it is determined whether the data import is complete. If it is complete, data analysis and display are performed; otherwise, the data import continues.

[0028] In this invention, the master file is the recording data file of the test host, and the recording file of the test slave is the slave file.

[0029] Furthermore, preferably, the test slave includes a conditioning circuit, a high-speed synchronous ADC card, and an embedded X86 platform;

[0030] The conditioning circuit is used to condition the FSG voltage and current signals;

[0031] The high-speed synchronous ADC card is used to acquire the FSG voltage signal, current signal and FSG fault trigger signal after being conditioned by the conditioning circuit.

[0032] The embedded x86 platform is used to send FSG fault trigger signals, output fault voltage signals, communicate with the test host, and also for data storage and human-machine interaction.

[0033] Furthermore, preferably, before conducting the station-level fault ride-through simulation test, the test slave and test host are respectively connected to the voltage and current loops of the object under test to confirm that the data processing terminal, the test host, and each test slave communicate normally with each other; then, the data processing terminal sends instructions or voltage curves to the test host; the test host forwards the received instructions or voltage curves to each test slave; each test slave synchronously triggers the fault voltage signal; each test object performs a corresponding fault response; the corresponding fault response data is collected and the station-level fault response characteristics of the power station are analyzed.

[0034] This invention takes a holistic approach, simultaneously triggering simulated fault voltage signals on all tested equipment in a new energy power plant to verify the station-level fault ride-through response characteristics under different operating conditions. Because the low-voltage side testing equipment is small, lightweight, easy to transport, convenient to wire, and suitable for distributed installation, the testing risks and costs are within a controllable range. Furthermore, since the station-level LVRT and HVRT performance tests are based on the premise that each individual tested object passes the test, this invention focuses on the research and development on the low-voltage side.

[0035] In this invention, the high-speed synchronous data acquisition card in the test host uses a high-precision sensor to transform the externally input voltage and current signals. The sampling rate is 12.8KHz and supports free switching of multiple acquisition frequencies. It performs high-speed synchronous sampling on all channels and uses a 16-bit A / D converter, which has the advantages of high conversion accuracy, fast conversion speed, and synchronous sampling.

[0036] In this invention, the test host has an independent waveform recording function. The test host records the current sampling data of all channels, which is convenient for analyzing disturbances or analyzing historical voltage and current change trends. The waveform recording data is saved as a Dat format file for convenient data transmission and analysis.

[0037] In this invention, the test slave device supports multi-channel parallel synchronous acquisition of voltage and current input signals, with a sampling frequency of 12.8KHz and supports free switching of multiple acquisition frequencies; it supports multi-channel voltage output, the output voltage amplitude can be customized according to actual needs and the phase tracks the actual voltage phase of the power grid, and has a continuous timed output function with a continuous output time of not less than 5 minutes; it has a preset curve selection function and can synchronously output fault voltage signals according to the received instructions.

[0038] The voltage output range of the test slave device is 0~1000V.

[0039] The voltage output error of the test slave device is less than or equal to 0.1%.

[0040] The phase output range of the test slave is 0° to 360°.

[0041] The phase output error of the test slave device is less than or equal to 0.1°.

[0042] The data processing terminal of this invention has functions such as data import, reception, display, analysis, and storage. The data processing terminal can import waveform data files from the test slave and test master units, and can synchronize each group of data based on the synchronization fault signals in each waveform data set, integrating them into a complete waveform data set for convenient comprehensive analysis of the power plant-level fault response characteristics.

[0043] If the actual conditions of the power plant prevent the test host and test slave from effectively using the four communication methods of 4G, 5G network, fiber optic or LTE230 private network, or if the communication latency is high or the communication is unstable, different test slave time-triggered methods can be used to achieve the purpose of synchronous testing.

[0044] Compared with the prior art, the beneficial effects of this invention are as follows:

[0045] Currently, fault ride-through performance assessments for new energy power plants only target individual tested devices (wind turbines, photovoltaic inverters, or static var generators). Other equipment is assessed by upgrading or modeling the tested individual devices to evaluate the overall fault response performance of the power plant. However, no actual station-level fault ride-through simulation test is conducted. Therefore, it cannot effectively prove that all wind turbines, inverters, or static var generators possess the required fault ride-through capabilities. This invention proposes a station-level fault ride-through simulation test system for new energy power plants, taking a holistic approach. This system ensures that all test slave devices can synchronously trigger fault simulation signals under different new energy plant environments, thereby verifying the station-level fault response characteristics of the power plant under different operating conditions. This system is easily applicable and can be widely promoted. Attached Figure Description

[0046] Figure 1 This is a system block diagram of the present invention;

[0047] Figure 2 This is a flowchart illustrating the specific working steps of the present invention;

[0048] Figure 3 To test the host structure schematic;

[0049] Figure 4 To test the slave device's structural schematic diagram;

[0050] Figure 5 A flowchart for integrating waveform recording data. Detailed Implementation

[0051] The present invention will now be described in further detail with reference to the embodiments.

[0052] Those skilled in the art will understand that the following embodiments are for illustrative purposes only and should not be construed as limiting the scope of the invention. Where specific techniques or conditions are not specified in the embodiments, they are performed in accordance with the techniques or conditions described in the literature in the field or according to the product instructions. Materials or equipment whose manufacturers are not specified are all conventional products that can be obtained by purchase.

[0053] like Figure 1 As shown, a fault ride-through simulation test system for a new energy power plant includes a data processing terminal, a test host, and a test slave [i.e., a fault signal generator (FSG)].

[0054] The test host communicates with the data processing terminal via a network interface;

[0055] The test host and the test slave are connected;

[0056] The test host is used to send the command to be sent or the command to be recalled from the data processing terminal to the test slave.

[0057] The test host is used to record waveforms and record the current sampling data of all channels, and save the waveform data as a Dat format file;

[0058] The test slave device is used to synchronously acquire voltage and current input signals and to output fault voltage signals;

[0059] The test slave receives the curve command sent by the test host, obtains the fault signal synchronization trigger time, and after confirming that the fault signal can be output normally, when the synchronization trigger signal time arrives, it outputs the corresponding fault voltage signal to perform station-level fault ride-through simulation test.

[0060] The data processing terminal is used to receive waveform data files from the test slave and test master, and to perform power plant-level fault ride-through simulation test analysis; it is also used to display and store the received data files, and to test and display the analysis results.

[0061] Specifically, the test host communicates with the test slave using 4G, 5G networks, fiber optics, or an LTE230 private network.

[0062] Specifically, the test slave device is a fault signal generator.

[0063] Specifically, such as Figure 3 As shown, the test host includes a positioning module, an ARM controller, a conditioning circuit, a high-speed synchronous data acquisition card, a host, and a communication module;

[0064] The test host communicates with the test slave through its communication module;

[0065] The positioning module is connected to the ARM controller;

[0066] The high-speed synchronous data acquisition card is connected to the ARM controller and the conditioning circuit, respectively.

[0067] The host is connected to the communication module, the high-speed synchronous data acquisition card, and the ARM controller, respectively.

[0068] The positioning module is used to send messages and PPS data to the ARM controller;

[0069] Conditioning circuits are used to condition voltage and current signals;

[0070] The high-speed synchronous data acquisition card is used to acquire voltage signals, current signals, and pulse signals from the ARM controller after being conditioned by the conditioning circuit.

[0071] The host sends a trigger start command to the ARM controller to determine the test start time. At the same time, the host starts recording waveforms. At this time, it is in the pre-recording waveform state and records voltage, current and pulse signals. The pulse signal is invalid and the data of the pre-recording waveform time is maintained. When the agreed trigger time is reached, the trigger signal becomes an effective signal and the host is in the waveform recording state until the test is completed.

[0072] The host computer is also used for human-computer interaction.

[0073] Specifically, such as Figure 5 As shown, the recording time is set in the data processing terminal before the trigger pulse. T 0 and pre-recorded wave time t 0. Import data; imported data does not meet the recording time requirement. T 0 indicates invalid data; data needs to be re-imported. If the value is greater than the recording time... T 0. Based on the trigger signal, after pulse triggering is completed, the recording time in each file is recalculated. T and pre-recorded wave time t Determine whether the condition is met. t > t 0, and ( T - t )>( T 0- t If the condition is not met, the data is invalid and needs to be re-imported; if the condition is met, the data is merged into the recording data file of the test host, and it is determined whether the data import is complete. If it is complete, data analysis and display are performed; otherwise, the data import continues.

[0074] Specifically, such as Figure 4 As shown, the test slave includes a conditioning circuit, a high-speed synchronous ADC card, and an embedded X86 platform;

[0075] The conditioning circuit is used to condition the FSG voltage and current signals;

[0076] The high-speed synchronous ADC card is used to acquire the FSG voltage signal, current signal and FSG fault trigger signal after being conditioned by the conditioning circuit.

[0077] The embedded x86 platform is used to send FSG fault trigger signals, output fault voltage signals, communicate with the test host, and also for data storage and human-machine interaction.

[0078] The test slave receives the curve command issued by the test host, obtains the fault signal synchronization trigger time, and after confirming that the fault signal can be output normally, when the synchronization trigger signal arrives, the trigger signal is a valid signal and outputs the corresponding fault voltage signal to perform station-level fault ride-through simulation test; the fault trigger signal, voltage signal and current signal are synchronously entered into the high-speed synchronous ADC card to complete data acquisition and conversion, and at the same time enter the embedded x86 platform to complete data storage and display.

[0079] Specifically, before conducting station-level fault ride-through simulation tests, the test slave and test master are connected to the voltage and current loops of the tested object, respectively, to confirm normal communication between the data processing terminal, the test master, and each test slave. Then, the data processing terminal sends commands or voltage curves to the test master; the test master forwards the received commands or voltage curves to each test slave; each test slave synchronously triggers a fault voltage signal; each tested object responds accordingly to the fault; the corresponding fault response data is collected and the station-level fault response characteristics of the power station are analyzed, such as... Figure 2 As shown.

[0080] The specific work steps are as follows:

[0081] Let's take a wind farm as an example to illustrate, such as... Figure 1 As shown, the wind farm has k Taiwan SVG, n Each collection line has [number] circuits. m Typhoon generator set.

[0082] (1) m × n The test slave units were connected to the wind farm respectively. m × n In the 690V voltage circuit of the typhoon generator, the test slave unit measures the current value of the wind turbine's current circuit through a current clamp. k The test slave devices were connected respectively k The secondary voltage acquisition terminal (100V) of the grid connection point of the SVG is used, and the current value of the SVG current loop is measured by current clamp.

[0083] (2) Connect the secondary current and voltage measurement circuits of the main transformer high voltage side of the main transformer measurement and control cabinet in the relay protection room of the new energy power station to the test host for data monitoring and recording;

[0084] (3) Confirm the communication method between the test slave and the test host, and verify that the communication between the data processing terminal, the host and each test slave is normal, and that the voltage and current data are displayed correctly.

[0085] (4) Set test parameters or import historical voltage curves through the data processing terminal; parameters include: voltage rise or fall amplitude and duration, and whether it is a single-phase, two-phase or three-phase fault, generate instructions and send them to the test host.

[0086] (5) The host computer forwards the instructions or voltage curves to each slave computer.

[0087] (6) Each test slave is triggered synchronously at the time of the test master command, and sends the fault voltage signal to each test object through the voltage loop;

[0088] (7) Each tested object implements various fault responses based on the measured fault voltage signal;

[0089] (8) The test personnel analyzed the station-level fault response characteristics of the power station based on the test results.

[0090] Based on the high voltage ride-through requirements of the wind farm, the grid connection point voltage was increased to 1.1U using a test slave unit. N 1.15U N 1.2U N 1.25U N 1.3U N For different test objects, the U setting can be configured through the test slave device. N For example: the wind turbine side is the converter side, and the slave unit U is tested. N =690V, then the voltage outputs are: 759V, 793.5V, 828V, 862.5V, 897V; the SVG side is the secondary side, and the slave device U is tested. N If the voltage is 100V, the output voltages are 110V, 115V, 120V, 125V, and 130V, with durations of 10s, 10s, 1s, 0.5s, and 0.5s, respectively. Data analysis shows that the duration and value of the primary inductive reactive current of the tested equipment meet the predetermined requirements, thus the high-voltage ride-through capability of the wind farm is satisfactory.

[0091] Based on the low voltage ride-through requirements of the wind farm, the secondary voltage at the grid connection point was reduced to 0.9U by testing the slave unit. N 0.7U N 0.5U N 0.2UN The wind turbine-side voltage outputs are 621V, 483V, 345V, and 138V; the SVG-side voltage outputs are 90V, 70V, 50V, and 20V; and the durations are 2s, 1.705s, 1.214s, and 0.625s, respectively. Data analysis shows that the duration and value of the primary capacitive reactive current of the tested equipment meet the predetermined requirements, therefore the low-voltage ride-through capability of the wind farm is satisfactory.

[0092] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A fault ride-through simulation test system for new energy power plants, characterized in that, Includes data processing terminals, test hosts, and test slaves; The test host communicates with the data processing terminal via a network interface; The test host and the test slave are connected; The test host is used to send the command to be sent or the command to be recalled from the data processing terminal to the test slave. The test host is used to record waveforms and record the current sampling data of all channels, and save the waveform data as a Dat format file; The test slave device is used to synchronously acquire voltage and current input signals and to output fault voltage signals; The test slave receives the curve command sent by the test host, obtains the fault signal synchronization trigger time, and after confirming that the fault signal can be output normally, when the synchronization trigger signal time arrives, it outputs the corresponding fault voltage signal to perform station-level fault ride-through simulation test. The data processing terminal is used to receive waveform data files from the test slave and test master, perform power plant-level fault ride-through simulation test analysis; it is also used to display and store the received data files, and test and display the analysis results; The test host includes a positioning module, an ARM controller, a conditioning circuit, a high-speed synchronous data acquisition card, a host computer, and a communication module; The test host communicates with the test slave through its communication module; The positioning module is connected to the ARM controller; The high-speed synchronous data acquisition card is connected to the ARM controller and the conditioning circuit, respectively. The host is connected to the communication module, the high-speed synchronous data acquisition card, and the ARM controller, respectively. The positioning module is used to send messages and PPS data to the ARM controller; Conditioning circuits are used to condition voltage and current signals; The high-speed synchronous data acquisition card is used to acquire voltage signals, current signals, and pulse signals from the ARM controller after being conditioned by the conditioning circuit. The host sends a trigger start command to the ARM controller to determine the test start time. At the same time, the host starts recording waveforms. At this time, it is in the pre-recording waveform state and records voltage, current and pulse signals. The pulse signal is invalid and the data of the pre-recording waveform time is maintained. When the agreed trigger time is reached, the trigger signal becomes an effective signal and the host is in the waveform recording state until the test is completed. The host computer is also used for human-computer interaction; Before triggering the pulse, set the waveform recording time in the data processing terminal. T 0 and pre-recorded wave time t 0. Import data; imported data does not meet the recording time requirement. T 0 indicates invalid data; data needs to be re-imported. If the data meets the requirement and is greater than the recording time... T 0. Based on the trigger signal, after pulse triggering is completed, the recording time in each file is recalculated. T and pre-recorded wave time t Determine whether the condition is met. t > t 0, and ( T - t )>( T 0- t If the conditions are not met, the data is invalid and needs to be re-imported; if the conditions are met, the data is merged into the recording data file of the test host, and it is determined whether the data import is complete. If it is complete, data analysis and display are performed; otherwise, the data import continues. The test slave device includes a conditioning circuit, a high-speed synchronous ADC card, and an embedded x86 platform; The conditioning circuit is used to condition the FSG voltage and current signals; The high-speed synchronous ADC card is used to acquire the FSG voltage signal, current signal and FSG fault trigger signal after being conditioned by the conditioning circuit. The embedded x86 platform is used to send FSG fault trigger signals, output fault voltage signals, communicate with the test host, and also for data storage and human-machine interaction.

2. The new energy power plant station-level fault ride-through simulation test system according to claim 1, characterized in that, The test host communicates with the test slave via 4G, 5G network, fiber optic, or LTE230 private network.

3. The new energy power plant station-level fault ride-through simulation test system according to claim 1, characterized in that, The test slave device is a fault signal generator.

4. The new energy power plant station-level fault ride-through simulation test system according to claim 1, characterized in that, Before conducting station-level fault ride-through simulation tests, the test slave and test host are connected to the voltage and current loops of the object under test, respectively, to confirm that the data processing terminal, test host, and each test slave communicate normally with each other; then, the data processing terminal sends instructions or voltage curves to the test host; the test host forwards the received instructions or voltage curves to each test slave. Each test slave device synchronously triggers a fault voltage signal; Each test object performs a corresponding fault response; the corresponding fault response data is collected and the station-level fault response characteristics of the power station are analyzed.

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