The controller is compatible with various NAND flash memory implementation methods, devices, and computer equipment.

Abstract

This application relates to a method, apparatus, computer device, and storage medium for a controller to adapt to multiple NAND flash chips. The method includes: configuring timing parameters and characteristics of various NAND flash chips, generating a corresponding configuration file after configuration; burning the configuration file into a programmable module of an SSD controller; after the chip is powered on, the SSD controller reads the burned configuration file from the programmable module; and loading and configuring the NAND flash controller according to the configuration file to adapt it to the NAND flash and enable it to function normally. This invention uses a programmable module to configure the NAND flash control module of the SSD controller. After compiling the NAND flash control configuration, it is burned into the SSD controller through the programmable module, enabling flexible adaptation to different timing parameters and feature characteristics of different NAND flash chips.

Description

Technical Field

[0001] This invention relates to the field of solid-state drive technology, and in particular to a method, apparatus, computer device, and storage medium for implementing a controller that adapts to various NAND flash memory chips. Background Technology

[0002] SSD (Solid State Drive) is a new type of storage medium that uses NAND flash memory for data storage. It has been widely used in PCs, laptops, servers and other fields and is gradually replacing HDD (Hard Disk Drive) as the mainstream storage product. Compared with traditional HDD, it has obvious advantages such as higher read and write speeds, lower power consumption and better shock resistance.

[0003] NAND Flash, as the primary storage component of a solid-state drive (SSD), is used to store both system firmware and user data. The firmware stored on the NAND Flash is loaded and executed by the BootROM within the SSD controller chip's internal ROM space. User-stored data is maintained by the firmware. However, different NAND Flash chips may have different timing parameters and features. Furthermore, Flash memory updates rapidly while SSD product cycles are long. During the SSD controller's development phase, it may not be able to adapt to the timing parameters and characteristics of unreleased NAND Flash chips. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, apparatus, computer device, and storage medium for a controller to adapt to various NAND flash memory chips, addressing the aforementioned technical problems.

[0005] A method for implementing a controller that adapts to multiple NAND flash memory chips, the method comprising:

[0006] Configure the timing parameters and characteristics of various NAND Flash chips, and generate the corresponding configuration file after the configuration is completed;

[0007] The configuration file is burned into the programmable module of the SSD controller;

[0008] After the chip is powered on, the SSD controller reads the burned configuration file from the programmable module;

[0009] The NAND Flash controller is loaded and configured according to the configuration file to adapt it to the NAND Flash and enable it to function properly.

[0010] In one embodiment, the step of configuring timing parameters and characteristics of various NAND Flash particles further includes:

[0011] On the PC, programmable tools are used to adapt the timing parameters and characteristic parameters of different NAND Flash chips.

[0012] In one embodiment, after the step of loading and configuring the NAND Flash controller according to the configuration file to adapt it to the NAND Flash and enable it to function properly, the method further includes:

[0013] BootRom loads and runs the bootloader from the NAND Flash.

[0014] In one embodiment, after the step of the BootRom running the bootloader from the NAND Flash and running the bootloader, the method further includes:

[0015] The bootloader loads the firmware from the NAND Flash and runs the firmware.

[0016] An implementation apparatus for a controller adapting to multiple NAND flash memory chips, the implementation apparatus for a controller adapting to multiple NAND flash memory chips comprising:

[0017] The generation module is used to configure the timing parameters and characteristics of various NAND Flash chips, and generate the corresponding configuration file after the configuration is completed.

[0018] A programming module, used to program the configuration file into the programmable module of the SSD controller;

[0019] A reading module is used for the SSD controller to read the burned configuration file from the programmable module after the chip is powered on;

[0020] A configuration loading module is used to load and configure the NAND Flash controller according to the configuration file so that it is compatible with the NAND Flash and can work normally.

[0021] In one embodiment, the generation module is further configured to:

[0022] On the PC, programmable tools are used to adapt the timing parameters and characteristic parameters of different NAND Flash chips.

[0023] In one embodiment, the device further includes:

[0024] The first loading module is used by BootRom to load the Bootloader from NAND Flash and run the Bootloader.

[0025] In one embodiment, the device further includes:

[0026] The second loading module is used by the bootloader to load the firmware from the NAND Flash and run the firmware.

[0027] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any of the methods described above.

[0028] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above methods.

[0029] The aforementioned controller, implementation method, apparatus, computer equipment, and storage media adapt to various NAND flash chips. Addressing the issues of the chip-based boot ROM's inability to adapt to various NAND flash chips and the NAND flash control's inability to adapt to newly added NAND flash features, a programmable module is used to configure the NAND flash control module of the SSD controller. After the NAND flash control configuration is compiled, it is burned into the SSD controller via the programmable module. The SSD controller then loads and configures the parameters from the programmable module, enabling flexible adaptation to different timing parameters and feature characteristics of different NAND flash chips. Attached Figure Description

[0030] Figure 1 This is a schematic diagram illustrating the process of loading system firmware onto a solid-state drive (SSD) in traditional technology.

[0031] Figure 2 This is a flowchart illustrating the configuration process for NAND Flash characteristics in traditional technologies.

[0032] Figure 3 This is a flowchart illustrating a method for implementing a controller that adapts to multiple NAND flash chips in one embodiment.

[0033] Figure 4 This is a flowchart illustrating the process of generating a configuration file in one embodiment;

[0034] Figure 5 This is a schematic diagram of the process of loading and configuring a NAND Flash controller from a programmable module in one embodiment;

[0035] Figure 6 This is a structural block diagram of a device for implementing a controller that adapts to multiple NAND flash chips in one embodiment;

[0036] Figure 7 This is a structural block diagram of an implementation device for a controller that adapts to various NAND flash chips, as shown in another embodiment.

[0037] Figure 8 This is a structural block diagram of an implementation device for a controller to adapt to multiple NAND flash chips in another embodiment;

[0038] Figure 9 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0040] Currently, existing methods for loading system firmware onto solid-state drives (SSDs) include... Figure 1 As shown. When the chip powers on, the SSD controller chip first runs the internally embedded BootROM code. The BootROM configures the timing parameters of the NAND Flash Control, then loads and runs the Bootloader from the NAND Flash. The Bootloader, in turn, loads and runs the FW firmware from the NAND Flash. The above is the overall process of loading system firmware into the SSD. The configuration process for NAND Flash Feature support is as follows: Figure 2 As shown.

[0041] However, as can be seen from the above process, the Flash Timing parameters fixed in the BootROM can only be adapted to one type of NAND Flash chip, and when new features are added to the NAND Flash, the SSD controller cannot adapt. Therefore, the newly added features cannot be used, which will have a significant impact on SSD products.

[0042] Based on this, the present invention proposes a method for a controller to adapt to multiple NAND flash chips, aiming to enable the controller to support multiple NAND flash chips.

[0043] In one embodiment, such as Figure 3As shown, a method for implementing a controller that adapts to various NAND flash memory chips is provided. This method includes:

[0044] Step 302: Configure the timing parameters and characteristics of various NAND Flash chips, and generate the corresponding configuration file after the configuration is completed;

[0045] Step 304: Burn the configuration file into the programmable module of the SSD controller;

[0046] Step 306: After the chip is powered on, the SSD controller reads the burned configuration file from the programmable module;

[0047] Step 308: Load and configure the NAND Flash controller according to the configuration file to make it compatible with the NAND Flash and enable it to work properly.

[0048] In this embodiment, a method for adapting a controller to various NAND flash chips is provided. In this method, a programmable module is added to the SSD controller to configure the SSD controller to adapt to different timing parameters and feature characteristics of different NAND flash chips.

[0049] Specifically, in one embodiment, the step of configuring timing parameters and characteristics of various NAND Flash particles further includes: adapting the timing parameters and characteristic parameters of different NAND Flash particles to each other on a PC using a programmable tool.

[0050] For reference Figure 4 As shown in this embodiment, to address the issues of the chip-based BootROM being incompatible with various NAND Flash chips and the NAND Flash Control being incompatible with newly added NAND Flash features, the NAND Flash Control module of the SSD controller can be configured using a programmable module. After compiling the NAND Flash Control configuration on the computer, it is burned into the SSD controller via the programmable module, and the controller loads and configures the parameters from the programmable module.

[0051] Next, after the SSD is powered on, the SSD controller loads and configures the NAND Flash Control from the programmable module, without requiring software to configure the NAND Flash Control.

[0052] For specific details, please refer to Figure 5As shown, for different NAND Flash chips, their timing parameters and NAND Flash features can be generated into a configuration file via a PC and burned into the programmable module of the SSD controller. After power-on, the SSD controller reads and configures the NAND Flash controller to adapt to the NAND Flash in a suitable state and enable normal operation. This solution effectively solves the problem of SSD controllers adapting to multiple NAND Flash chips.

[0053] In the above embodiments, to address the issues of the chip-based BootROM being incompatible with various NAND Flash chips and the NAND Flash Control being incompatible with newly added NAND Flash features, a programmable module is used to configure the NAND Flash Control module of the SSD controller. After the NAND Flash Control configuration is compiled, it is burned into the SSD controller via the programmable module. The SSD controller then loads and configures the parameters from the programmable module, enabling flexible adaptation to different timing parameters and feature characteristics of different NAND Flash chips.

[0054] In one embodiment, after the step of loading and configuring the NAND Flash controller according to the configuration file to adapt it to the NAND Flash and enable it to function properly, the method further includes:

[0055] BootRom loads and runs the bootloader from the NAND Flash.

[0056] In one embodiment, after the steps of BootRom running the bootloader from NAND Flash and running the bootloader, the method further includes:

[0057] The bootloader loads the firmware from the NAND Flash and runs the firmware.

[0058] For reference Figure 4 and 5 As shown, in one embodiment, a complete implementation of the controller adapting to various NAND flash chips is provided, and the specific process is as follows:

[0059] 1. First, generate a configuration file using a PC to set the timing parameters and features of the NAND Flash chip.

[0060] 2. Burn the configuration file into the programmable module of the SSD controller.

[0061] 3. When the chip is powered on, the SSD controller loads and configures the NAND Flash Control from the programmable module.

[0062] 4. BootRom runs and loads the Bootloader from the NAND Flash and runs the Bootloader.

[0063] 5. The bootloader loads the firmware from the NAND Flash and runs the firmware.

[0064] In this embodiment, a programmable module is added to the SSD controller to configure it, which can effectively adapt to different timing parameters and feature characteristics of different NAND Flash, thus improving adaptability.

[0065] It should be understood that, although Figure 1-5 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1-5 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0066] In one embodiment, such as Figure 6 As shown, a controller adaptation device 600 for various NAND flash memory chips is provided, the device comprising:

[0067] The generation module 601 is used to configure the timing parameters and characteristics of various NAND Flash particles, and generate the corresponding configuration file after the configuration is completed.

[0068] The programming module 602 is used to program the configuration file into the programmable module of the SSD controller.

[0069] The reading module 603 is used for the SSD controller to read the burned configuration file from the programmable module after the chip is powered on;

[0070] The configuration loading module 604 is used to load and configure the NAND Flash controller according to the configuration file so that it is compatible with the NAND Flash and can work normally.

[0071] In one embodiment, the generation module 601 is further configured to:

[0072] On the PC, programmable tools are used to adapt the timing parameters and characteristic parameters of different NAND Flash chips.

[0073] In one embodiment, such as Figure 7 As shown, a device 600 for implementing a controller that adapts to various NAND flash memory chips is provided. This device further includes:

[0074] The first loading module 605 is used for BootRom to load the Bootloader from NAND Flash and run the Bootloader.

[0075] In one embodiment, such as Figure 8 As shown, a device 600 for implementing a controller that adapts to various NAND flash memory chips is provided. This device further includes:

[0076] The second loading module 606 is used by the bootloader to load the firmware from the NAND Flash and run the firmware.

[0077] For specific limitations on the implementation device for controller adaptation to multiple NAND flash chips, please refer to the limitations on the implementation method of controller adaptation to multiple NAND flash chips mentioned above, which will not be repeated here.

[0078] In one embodiment, a computer device is provided, the internal structure of which can be shown as follows: Figure 9 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for a controller to adapt to various NAND flash memory chips.

[0079] Those skilled in the art will understand that Figure 9 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0080] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps in the various method embodiments described above.

[0081] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the various method embodiments described above.

[0082] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0083] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0084] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for implementing a controller to adapt to multiple NAND particles, the method comprising: configuring multiple different NAND Flash particle Timing parameters and characteristics, and generating a corresponding configuration file after the configuration is completed; burning the configuration file into a programmable module of an SSD controller; after the chip is powered on, the SSD controller reads the burned configuration file from the programmable module; loading and configuring the NAND Flash controller according to the configuration file to adapt to the NAND Flash and enable normal operation; the step of configuring multiple different NAND Flash particle Timing parameters and characteristics further comprises: respectively adapting the Timing parameters of different NAND Flash particles and the characteristic parameters of NAND Flash particles on a PC through a programmable tool; after the step of loading and configuring the NAND Flash controller according to the configuration file to adapt to the NAND Flash and enable normal operation, BootRom runs to load Bootloader from the NAND Flash and run Bootloader; after the step of BootRom running to load Bootloader from the NAND Flash and run Bootloader, Bootloader loads FW firmware from the NAND Flash and runs the FW firmware.

2. An apparatus for implementing a controller to adapt to a plurality of NAND dies, comprising: The implementation device of the controller adapting to multiple NAND particles comprises: a generation module for configuring multiple different NAND Flash particle Timing parameters and characteristics, and generating a corresponding configuration file after the configuration is completed; a burning module for burning the configuration file into a programmable module of an SSD controller; a reading module for reading the burned configuration file from the programmable module by the SSD controller after the chip is powered on; a loading and configuring module for loading and configuring the NAND Flash controller according to the configuration file to adapt to the NAND Flash and enable normal operation; the generation module is further configured to adapt the Timing parameters of different NAND Flash particles and the characteristic parameters of NAND Flash particles on a PC through a programmable tool; the device further comprises a first loading module for BootRom running to load Bootloader from the NAND Flash and run Bootloader; the device further comprises a second loading module for Bootloader loading FW firmware from the NAND Flash and running the FW firmware.

3. A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor executes the computer program to implement the steps of the method of claim 1.

4. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the method of claim 1.

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