Dual parallel slit waveguide mode spot transformer and preparation method thereof
By designing a dual parallel slit waveguide mode converter, the problems of high coupling loss and large size in existing mode converters are solved, achieving efficient optoelectronic integration and low-loss optical coupling.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
- Filing Date
- 2022-10-25
- Publication Date
- 2026-07-03
AI Technical Summary
Existing mode converters suffer from high coupling loss, low coupling efficiency, and large device size, making them difficult to package.
Design a dual parallel slit waveguide mode converter, including a substrate, a buried oxide layer, and a chip layer. The waveguide structure consists of a periodic grating, a transition region, and an active modulation region, which are connected by a gradient waveguide. A field-effect transistor structure is filled to change the carrier concentration. Materials include silicon-based, silicon nitride, lithium niobate, indium phosphide, etc., to achieve efficient mode coupling and optical field mode conversion.
It improves device performance, enhances optoelectronic integration efficiency, reduces device size, reduces optical loss, and improves coupling efficiency and process tolerance.
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Figure CN115524790B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the fields of integrated optoelectronics, optical coupling, optical communication, and optical modulation technologies, and in particular to a dual parallel slit waveguide mode converter and its fabrication method. Background Technology
[0002] With the booming development of mobile internet, cloud computing, and big data, and the emergence of new applications such as 5G communication, the demand for high-speed data transmission is becoming increasingly strong. In backbone networks and next-generation data centers, electronic chips are encountering speed bottlenecks, while optoelectronic chips, due to their low power consumption and high bandwidth characteristics, have become a key area of development. As modern communication systems evolve, higher demands are being placed on fiber optic communication systems. Large-scale optoelectronic integration technology has emerged as one of the best solutions, offering significant advantages in performance, cost, and integration, making it a research hotspot in the field of optical interconnects. Mode-spot conversion structures, as crucial devices for reducing optical loss, have become an important research topic.
[0003] Currently used mode converters are divided into two types: end-coupled structures and vertically coupled structures. The size of the optical waveguides is typically at the sub-micron level, hundreds of times smaller than the mode size of ordinary single-mode fiber. However, the coupling between the modes of these nanowaveguides and the fiber modes results in severe mode mismatch, increasing the coupling loss from the fiber to the device. Furthermore, traditional end-coupled structures mostly use inverted conical waveguide structures for thermal insulation, which increases the mode size of the propagating beam, while vertical grating coupling diffracts light onto the on-chip waveguide through a subwavelength grating, making it difficult to package. Summary of the Invention
[0004] To address the problems in existing technologies, this disclosure proposes a dual parallel slit waveguide mode converter and its fabrication method, which at least partially solves the technical problems of high coupling loss, low coupling efficiency, and large device size leading to packaging difficulties in existing mode converters.
[0005] This disclosure provides a dual parallel slit waveguide mode converter, comprising: a substrate, a buried oxide layer formed on the substrate; and a chip layer formed on the buried oxide layer; wherein a waveguide structure is etched on the chip layer from one end to the other, the waveguide structure comprising a periodic grating, a transition region, and an active modulation region connected in sequence, and a dual parallel slit structure is formed in the active modulation region; the periodic grating is used to convert light into vertically coupled emission, and the transition region and the active modulation region are used to convert the optical field mode in the waveguide structure into a dual slit waveguide mode.
[0006] According to an embodiment of this disclosure, the transition region consists of three graded waveguides, with the two ends of the three graded waveguides respectively connected to a periodic grating and an active modulation region.
[0007] According to embodiments of this disclosure, the width of the gradient waveguide varies linearly.
[0008] According to embodiments of this disclosure, a field-effect transistor structure is filled in the double parallel slit structure, and the field-effect transistor structure serves as an electrode for applying voltage to change the concentration of charge carriers.
[0009] According to embodiments of this disclosure, the field-effect transistor structure is composed of a metal oxide, a high modulation coefficient material, and a p-type doped silicon waveguide.
[0010] According to embodiments of this disclosure, a carrier accumulation layer is also formed in the double parallel slit structure.
[0011] According to embodiments of this disclosure, the material properties of the dual parallel slit waveguide mode pattern transformation include silicon-based, silicon nitride, lithium niobate, indium phosphide, and gallium nitride.
[0012] According to embodiments of this disclosure, the periodic grating is a long-period grating.
[0013] According to embodiments of this disclosure, the substrate is a silicon-on-insulator substrate.
[0014] This disclosure also provides a method for fabricating a dual parallel slit waveguide mode converter, comprising: sequentially fabricating a buried oxide layer and a chip layer on a substrate; etching the chip layer to form a waveguide structure, wherein, from one end of the chip layer to the other end, the waveguide structure includes a periodic grating, a transition region, and an active modulation region connected in sequence, wherein a dual parallel slit structure is formed in the active modulation region; the periodic grating is used to convert light into vertically coupled emission, and the transition region and the active modulation region are used to convert the optical field mode in the waveguide structure into a dual slit waveguide mode.
[0015] The dual parallel slit waveguide mode converter and its fabrication method provided in the embodiments of this disclosure have at least the following beneficial effects:
[0016] Designing the waveguide structure as an active modulation region consisting of a periodic grating, a transition region, and a double parallel slit structure enables efficient mode coupling. Furthermore, by designing the waveguide structure, device performance can be improved while increasing the efficiency of optoelectronic integration, and the device size can be greatly reduced. Attached Figure Description
[0017] Figure 1 The schematic diagram illustrates the structure of the dual parallel slit waveguide mode converter provided in the embodiments of this disclosure.
[0018] Figure 2 The flowchart illustrating the fabrication method of the dual parallel slit waveguide mode converter provided in the embodiments of this disclosure is shown in the illustration.
[0019] Figure label:
[0020] 1-Substrate, 2-Buried oxide layer, 3-Chip layer, 4-Periodic grating, 5-Transition region, 6-Active modulation layer, 7-Double parallel slit structure. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.
[0022] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.
[0023] In this disclosure, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.
[0024] In the description of this disclosure, it should be understood that the terms "longitudinal", "length", "circumferential", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the subsystem or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.
[0025] Throughout the accompanying drawings, identical elements are represented by the same or similar reference numerals. Conventional structures or constructions have been omitted where they may cause confusion in understanding this disclosure. Furthermore, the shapes, dimensions, and positional relationships of the components in the drawings do not reflect actual size, scale, or actual positional relationships. Additionally, any reference numerals placed between parentheses in the claims should not be construed as limiting the claims.
[0026] Similarly, to simplify this disclosure and aid in understanding one or more of the various aspects of the disclosure, in the above description of exemplary embodiments of the present disclosure, various features of the present disclosure are sometimes grouped together in a single embodiment, figure, or description thereof. The use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present disclosure. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0027] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this disclosure, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0028] Figure 1 The schematic diagram illustrates the structure of the dual parallel slit waveguide mode converter provided in the embodiments of this disclosure.
[0029] like Figure 1 As shown, a dual parallel slit waveguide mode converter may include, for example, a substrate 1, a buried oxide (BOX) layer 2, a chip layer 3, a periodic grating 4, a transition region 5, an active modulation region 6, and a dual parallel slit structure 7. The buried oxide layer 2 and the chip layer 3 are sequentially stacked on the substrate 1. The periodic grating 4, the transition region 5, and the active modulation region 6 are formed by etching the chip layer 3. The dual parallel slit structure 7 is formed in the active modulation region 6.
[0030] In this embodiment of the disclosure, the substrate 1 can be a standard silicon-on-insulator (SOI) substrate. The SOI substrate consists of a top silicon layer and a bottom buried oxide layer. The thickness of the top silicon layer and the thickness of the bottom buried oxide layer can be set according to the actual application requirements. This disclosure does not impose any restrictions. For example, the thickness of the top silicon layer of the substrate is 220 nm and the thickness of the buried oxide layer is 2 μm.
[0031] In this embodiment, the periodic grating 4 can be a long-period grating, and the grating period is related to the incident light wavelength. Light is coupled into the silicon-based chip through the periodic grating 4. Since the end face shape of the waveguide structure is a periodic grating type, it can convert the light into vertically coupled outgoing light, thereby reducing the coupling loss when the light is incident, reducing the alignment tolerance, and improving the coupling efficiency.
[0032] In this embodiment, the transition region 5 may consist of three graded waveguides, with the two ends of each waveguide connected to the periodic grating 4 and the active modulation region 6, respectively. The width of the graded waveguide changes linearly; it should be understood that the direction of this width refers to a direction parallel to the surface of the chip layer 3. By using a transition region to connect the periodic grating 4 and the active modulation region 6, the discontinuity of the waveguide structure can be minimized, effectively converting the optical field mode in the waveguide structure into a double-slit mode and reducing losses in optical transmission.
[0033] In this embodiment, the dual parallel slit structure 7 may also be filled with a field-effect transistor (MOS) structure, which serves as an electrode for applying voltage to change the carrier concentration. The MOS structure may be composed of a metal oxide, a high modulation coefficient material, and a p-type doped silicon waveguide. Furthermore, two additional carrier accumulation layers may be formed in the dual parallel slit structure, which, combined with the optical confinement of the slit waveguide, enhances the interaction between light and material, thereby significantly improving modulation efficiency and reducing device size.
[0034] In the embodiments of this disclosure, the material properties of the dual parallel slit waveguide mode pattern transformation include silicon-based, silicon nitride, lithium niobate, indium phosphide, gallium nitride, etc.
[0035] Based on the same inventive concept, this disclosure also provides a method for fabricating a dual parallel slit waveguide mode spot converter.
[0036] Figure 2 The flowchart illustrating the fabrication method of the dual parallel slit waveguide mode converter provided in the embodiments of this disclosure is shown in the illustration.
[0037] like Figure 2 As shown, the preparation method may include, for example, operations S201 to S203.
[0038] In operation S201, a buried oxide layer is prepared on the substrate.
[0039] In operation S202, a chip layer is fabricated on the buried oxide layer.
[0040] In operation S203, the chip layer is etched to form a waveguide structure from one end of the chip layer to the other. The waveguide structure includes a periodic grating, a transition region and an active modulation region connected in sequence. A double parallel slit structure is formed in the active modulation region.
[0041] Among them, the periodic grating is used to convert light into vertically coupled emission, and the transition region and active modulation region are used to convert the optical field mode in the waveguide structure into the double-slit waveguide mode.
[0042] It should be noted that the implementation details of the method embodiment correspond to the implementation details of the device embodiment, and the resulting technical effects are the same, so they will not be repeated here.
[0043] In summary, the dual parallel slit waveguide mode converter provided in this disclosure, based on the dual slit waveguide structure, can effectively improve modulation efficiency, enhance the interaction between light and materials while increasing optical confinement, improve modulation efficiency and reduce device size. At the same time, the mode variation method using periodic grating coupling can increase process tolerance, expand the mode size, and improve coupling efficiency, thereby realizing a highly efficient optical coupling structure of the dual slit waveguide structure, which helps to realize low-loss coupling of large-scale photonic integrated chips.
[0044] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A dual parallel slit waveguide mode converter, characterized in that, include: Substrate, A buried oxide layer is formed on the substrate; A chip layer is formed on the buried oxide layer; The chip layer is etched with a waveguide structure, which includes a periodic grating, a transition region and an active modulation region connected in sequence from one end of the chip layer to the other. A double parallel slit structure is formed in the active modulation region. The periodic grating is used to convert light into vertically coupled emission, and the transition region and active modulation region are used to convert the optical field mode in the waveguide structure into a double-slit waveguide mode. The transition region consists of three graded waveguides, with the two ends of the three graded waveguides connected to the periodic grating and the active modulation region, respectively.
2. The dual parallel slit waveguide mode converter according to claim 1, characterized in that, The width of the gradient waveguide changes linearly.
3. The dual parallel slit waveguide mode converter according to claim 1, characterized in that, The dual parallel slit structure is filled with a field-effect transistor structure, which serves as an electrode for applying voltage to change the concentration of charge carriers.
4. The dual parallel slit waveguide mode converter according to claim 3, characterized in that, The field-effect transistor structure is composed of metal oxide, high modulation coefficient material, and p-type doped silicon waveguide.
5. The dual parallel slit waveguide mode converter according to claim 3, characterized in that, A carrier accumulation layer is also formed in the double parallel slit structure.
6. The dual parallel slit waveguide mode converter according to claim 1, characterized in that, The material properties of the dual parallel slit waveguide mode transformation include silicon-based, silicon nitride, lithium niobate, indium phosphide, and gallium nitride.
7. The dual parallel slit waveguide mode converter according to claim 1, characterized in that, The periodic grating is a long-period grating.
8. The dual parallel slit waveguide mode converter according to claim 1, characterized in that, The substrate is a silicon-on-insulator substrate.
9. A method for fabricating a dual parallel slit waveguide mode converter, characterized in that, include: A buried oxide layer and a chip layer are sequentially fabricated on a substrate; The chip layer is etched to form a waveguide structure, wherein, from one end of the chip layer to the other end, the waveguide structure includes a periodic grating, a transition region, and an active modulation region connected in sequence, and a double parallel slit structure is formed in the active modulation region; the periodic grating is used to convert light into vertically coupled emission, and the transition region and the active modulation region are used to convert the optical field mode in the waveguide structure into a double slit waveguide mode; The transition region consists of three graded waveguides, with the two ends of the three graded waveguides connected to the periodic grating and the active modulation region, respectively.