330 results about "Photonic Chip" patented technology

An optoelectronic integrated circuit for coupling light to or from an optical waveguide formed in an optical device layer in a near-normal angle to that layer. In an embodiment, the integrated circuit comprises a semiconductor body including a metal-dielectric stack, an optical device layer, a buried oxide layer and a semiconductor substrate arranged in series between first and second opposite sides of the semiconductor body. At least one optical waveguide is formed in the optical device layer for guiding light in a defined plane in that device layer. Diffractive coupling elements are disposed in the optical device layer to couple light from the waveguide toward the second surface of the semiconductor body at a near-normal angle to the defined plane in the optical device layer. In an embodiment, an optical fiber is positioned against the semiconductor body for receiving the light from the coupling elements.

A method and an apparatus for butt-coupling an input beam incoming from a photonic device of a second optical element to a primary photonic chip at an input interface of the primary photonic chip is disclosed. The primary photonic chip comprises a coupling apparatus. The light from the input beam is butt-coupled to the coupling apparatus. The coupling apparatus comprises a plurality of more than one single mode optical paths on the primary photonic chip. The single mode optical paths are strongly coupled to each other at the input interface of the primary photonic chip. Regions of strongly coupled single mode optical paths can correspond to one or both of distinct but highly coupled waveguides or waveguides fully merged into a multi-mode section.

Composite optical waveguide structures or mode transformers and their methods of fabrication and integration are disclosed, wherein the structures or mode transformers are capable of bi-directional light beam transformation between a small mode size waveguide and a large mode size waveguide. One aspect of the present invention is directed to an optical mode transformer comprising a waveguide core having a high refractive index contrast between the waveguide core and the cladding, the optical mode transformer being configured such that the waveguide core has a taper wherein a thickness of the waveguide core tapers down to a critical thickness value, the critical thickness value being defined as a thickness value below which a significant portion of the energy of a light beam penetrates into the cladding layers surrounding the taper structure thereby enlarging the small mode size. This primary tapered core structure may be present in either a vertical or horizontal direction and may be combined with further up taper or down taper structures in the directions transverse to the primary taper direction. Another aspect of the present invention is directed to a non-cylindrical graduated refractive index (GRID) lens structure. The non-cylindrical GRIN structure has a graded refractive index having a maximum value at its core and a minimum value at its outer edges. The grading of the refractive index is provided in a either the vertical or horizontal directions and may have either a fixed refractive index or a graded refractive index in the transverse directions. Yet another aspect of the present invention is directed to composite optical mode transformers that are combinations of the taper waveguide structures and the non-cylindrical graduated refractive index structures. Yet another aspect of the present invention is the further integration of the mode transformers with V-grooves for multiple input / output fibers and alignment platform for multiple input / output photonic chips or devices.

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input / output (I / O) integrated circuit that faces the top surface. Furthermore, the front surface of the I / O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I / O integrated circuit.

Methods and systems for silicon photonics wavelength division multiplexing transceivers are disclosed and may include, in a transceiver integrated in a silicon photonics chip: generating a first modulated output optical signal at a first wavelength utilizing a first electrical signal, generating a second modulated output optical signal at a second wavelength utilizing a second electrical signal, communicating the first and second modulated output optical signals into an optical fiber coupled to the chip utilizing a multiplexing grating coupler in the chip. A received input optical signal may be split into a modulated input optical signal at the first wavelength and a modulated input optical signal at the second wavelength utilizing a demultiplexing grating coupler in the chip. The first and second modulated input optical signals may be converted to first and second electrical input signals utilizing first and second photodetectors in the chip.

A silicon photonic chip is provided. An active silicon layer that includes a photonic device is on a front side of the silicon photonic chip. A silicon substrate that includes an etched backside cavity is on a backside of the silicon photonic chip. A microlens is integrated into the etched backside cavity. A buried oxide layer is located between the active silicon layer and the silicon substrate. The buried oxide layer is an etch stop for the etched backside cavity.

A chip system and method includes a photonics chip and an electrical integrated circuit (IC) flip-chip coupled to the photonics chip to form an optochip. The IC or the photonics chip includes an array of bond pads for attachment to the other. The optochip has an array of bond pads for subsequent attachment to a carrier where the photonics chip includes an exposed edge to connect with at least one waveguide.

A method and system for coupling optical signals into silicon optoelectronic chips are disclosed and may include coupling one or more optical signals into a back surface of a CMOS photonic chip comprising photonic, electronic, and optoelectronic devices. The devices may be integrated in a front surface of the chip and one or more grating couplers may receive the optical signals in the front surface of the chip. The optical signals may be coupled into the back surface of the chip via one or more optical fibers and / or optical source assemblies. The optical signals may be coupled to the grating couplers via a light path etched in the chip, which may be refilled with silicon dioxide. The chip may be flip-chip bonded to a packaging substrate. Optical signals may be reflected back to the grating couplers via metal reflectors, which may be integrated in dielectric layers on the chip.

Optical modules and methods for making optical modules are described. In one embodiment, an optical module includes a substrate assembly including a photonic chip mounting region, and a groove extending towards the photonic chip mounting region. A waveguide is disposed within the groove. A plurality of spacers is on the chip mounting region, each spacer having a predetermined height. A photonic chip is placed on the plurality of spacers and above the chip mounting region, and an optical coupler is between the photonic chip and the waveguide.

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input / output (I / O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I / O integrated circuit includes high-speed I / O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I / O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

An optical module includes a waveguide interconnect that transports light signals; a Silicon Photonics chip that modulates the light signals, detects the light signals, or both modulates and detects the light signals; a coupler chip attached to the Silicon Photonics chip and the waveguide interconnect so that the light signals are transported along a light path between the Silicon Photonics chip and the waveguide interconnect; and one of the Silicon Photonics chip and the coupler chip includes first, second, and third alignment protrusions. The other of the coupler chip and the Silicon Photonics chip includes a point contact, a linear contact, and a planar contact. The point contact provides no movement for the first alignment protrusion. The linear contact provides linear movement for the second alignment protrusion. The planar contact provides planar movement for the third alignment protrusion.

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

Methods for realizing integrated lasers and photonic integrated circuits on complimentary metal-oxide semiconductor (CMOS)-compatible silicon (Si) photonic chips, potentially containing integrated electronics, are disclosed. The integration techniques rely on light coupling with integrated light coupling elements such as turning mirrors, lenses, and surface grating couplers. Light is coupled from between two or more substrates using the light coupling elements. The technique can realize integrated lasers on Si where a gain flip chip (the second substrate) is bonded to a Si chip (the first substrate) and light is coupled between a waveguide in the gain flip chip to a Si waveguide by way of a turning mirror or grating coupler in the flip chip and a grating coupler in the Si chip. Integrated lenses and other elements such as spot-size converters can also be incorporated to alter the mode from the gain flip chip to enhance the coupling efficiency to the Si chip. The light coupling integration technique also allows for the integration of other components such as modulators, amplifiers, and photodetectors. These components can be waveguide-based or non-waveguide based, that is to say, surface emitting or illuminating.

A method and system for waveguide mode filters are disclosed and may include processing optical signals of a fundamental mode and higher-order modes by filtering the higher-order modes in rib waveguides in a photonic chip. The higher-order modes may be filtered utilizing doped regions and / or patterns in one or more slab sections in the rib waveguides. The patterns may be periodic or aperiodic along the rib waveguides. The higher-order modes may be filtered utilizing varying widths of slab sections, or doped, patterned, and / or salicided ridges on the slab sections in the rib waveguides. The higher-order modes may be attenuated by scattering and / or absorbing the modes. The chip may comprise a CMOS photonic chip.

A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.

A switch module includes a switch integrated circuit (IC), a silicon photonics chips, and a planar lightwave circuits (PLCs).

Composite materials having colloidal photonic crystals patterned in substrates for use in different technologies including lab-on-chip and photonic chip technologies. The colloidal crystals are patterned either on or within surface relief patterns in the substrates of the composite materials and each colloidal crystal exhibits Bragg diffraction.

A photonic transceiver apparatus in Quad Small Form-factor Pluggable (QSFP) package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a printed circuit board (PCB), installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module. Moreover, the apparatus includes a pair of optical input / output ports being back connected to the fiber-to-silicon attachment module.

An assembly of waveguide wavelength multiplexers and demultiplexers, together with continuous wave (CW) laser transmitters that interface to grating couplers on a silicon photonics chip, providing CW sources, multiplexed output and optionally multiplexed input, all using a single photonic lightwave circuit (PLC).

A method and an apparatus for butt-coupling an input beam incoming from a photonic device of a second optical element to a primary photonic chip at an input interface of the primary photonic chip is disclosed. The primary photonic chip comprises a coupling apparatus. The light from the input beam is butt-coupled to the coupling apparatus. The coupling apparatus comprises a plurality of more than one single mode optical paths on the primary photonic chip. The single mode optical paths are strongly coupled to each other at the input interface of the primary photonic chip. Regions of strongly coupled single mode optical paths can correspond to one or both of distinct but highly coupled waveguides or waveguides fully merged into a multi-mode section.

Embodiments are provided for an optical coupler created by bonded photonic chip coupler for Silicon-on-Insulator (SOI) chip-fiber coupling. System and apparatus embodiments for a bonded photonic chip coupler for SOI chip-fiber coupling provide for reduced mismatch between fiber and chip, increased coupling efficiency, and lower photonics device insertion loss. In an embodiment, an optical coupler for coupling a photonics chip to an optical fiber includes a photonic chip comprising a nano-sized photonic waveguide, photonic optical diffraction surface grating, and a first cladding covering the photonic waveguide and the photonic grating; and an optical coupling chip comprising a micron-sized coupling waveguide and a coupling optical diffraction surface grating embedded in a first coupling cladding and on a second coupling cladding, wherein the first coupling cladding is connected to the first cladding, wherein the optical coupling chip is configured to couple to light transmitted between the photonic chip and an optical fiber.

An optical source is described. This optical source includes a semiconductor optical amplifier, with a semiconductor other than silicon, which provides a gain medium. In addition, a photonic chip, optically coupled to the semiconductor optical amplifier, includes: an optical waveguide that conveys the optical signal; and a pair of ring-resonator modulators that modulate the optical signal. Furthermore, the pair of ring-resonator modulators is included within an optical cavity in the optical source. For example, the optical cavity may be defined by a reflective coating on one edge of the semiconductor optical amplifier and a reflector on one end of the optical waveguide. Alternatively, the optical cavity may be defined by reflectors on ends of the optical waveguide.

The invention discloses a structured light illuminating microscopic imaging system based on an integrated photonic chip. The structured light illuminating microscopic imaging system comprises a light source, the integrated photonic chip, a sample containing table, a microobjective, a filter part, a photoelectric detector, a computer processing system and a control system. The light source is connected with the integrated photonic chip, the integrated photonic chip is arranged below the sample containing table, the microobjective is arranged above the sample containing table, the filter part is arranged above the microobjective, and the photoelectric detector is arranged above the filter part. A sample to be detected is fixed to the sample containing table, and light emitted by the light source irradiates the sample to be detected on the sample containing table after being processed by the integrated photonic chip. The computer processing system is connected with the sample containing table, the photoelectric detector and the control system. The integrated photonic chip is connected with the control system. According to the technical scheme, the system has the advantages of being small in size, compact in structure, high in system stability, high in solar energy utilization rate, high in imaging resolution ratio and the like, and is suitable for the real-time three-dimensional imaging study of living cells.

A method and system for waveguide mode filters are disclosed and may include processing optical signals of a fundamental mode and higher-order modes by filtering the higher-order modes in rib waveguides in a photonic chip. The higher-order modes may be filtered utilizing doped regions and / or patterns in one or more slab sections in the rib waveguides. The patterns may be periodic or aperiodic along the rib waveguides. The higher-order modes may be filtered utilizing varying widths of slab sections, or doped, patterned, and / or salicided ridges on the slab sections in the rib waveguides. The higher-order modes may be attenuated by scattering and / or absorbing the modes. The chip may comprise a CMOS photonic chip.

A multi-chip module (MCM) is described. This MCM includes a driver integrated circuit that includes electrical circuits, a photonic chip, an interposer, and an optical gain chip. The photonic chip may be implemented using a silicon-on-insulator technology, and may include an optical waveguide that conveys an optical signal and traces that are electrically coupled to the driver integrated circuit. Moreover, the interposer may be electrically coupled to the traces. Furthermore, the optical gain chip may include a III / V compound semiconductor (and, more generally, a semiconductor other than silicon), and may include a second optical waveguide that conveys the optical signal and that is vertically aligned with the optical waveguide relative to a top surface of the interposer. Additionally, the optical gain chip may be electrically coupled to the interposer.

An optoelectronic integrated circuit for coupling light to or from an optical waveguide formed in an optical device layer in a near-normal angle to that layer. In an embodiment, the integrated circuit comprises a semiconductor body including a metal-dielectric stack, an optical device layer, a buried oxide layer and a semiconductor substrate arranged in series between first and second opposite sides of the semiconductor body. At least one optical waveguide is formed in the optical device layer for guiding light in a defined plane in that device layer. Diffractive coupling elements are disposed in the optical device layer to couple light from the waveguide toward the second surface of the semiconductor body at a near-normal angle to the defined plane in the optical device layer. In an embodiment, an optical fiber is positioned against the semiconductor body for receiving the light from the coupling elements.