A data storage method, device and medium

Abstract

The application discloses a data storage method and device and medium, and belongs to the technical field of data storage. The method comprises the following steps: starting a timer, outputting an invalid start trigger signal to a power module; outputting a first control signal to a BMC and a start key module to output corresponding prompt information within the timing time of the timer; when the timer ends within the preset time, outputting a second control signal to the BMC and the start key module to receive a power signal instruction, and outputting a start trigger signal to the power module to start the power module to complete data storage within the preset time. The method ensures that the staff cannot misoperate through the front key and the BMC page during the data storage process through the bottom hardware logic, and ensures that the data in the RAID card cache is saved before starting or other operations after the system abnormal power-off or downtime, so that the risk of data loss is avoided.

Description

Technical Field

[0001] This invention relates to the field of data storage technology, and in particular to a data storage method, apparatus and medium. Background Technology

[0002] After an unexpected power outage or abnormal shutdown, the cache in the Redundant Arrays of Inexpensive Disks (RAID) card contains a large amount of system data. Under normal circumstances, the RAID card uses the supercap power supply to save the data in the cache to the RAID card's non-volatile storage. During the storage process, the server cannot be powered on for approximately 90-100 seconds. If the server is powered on and the RAID card is forcibly reset, data loss may occur.

[0003] To prevent data loss, it interacts with the Basic Input Output System (BIOS) via RAID. If the machine is powered on immediately after a power outage, the RAID card sends a restart signal to the BIOS. However, due to compatibility issues between the RAID card and various Central Processing Unit (CPU) platforms, and from a testing perspective, this can lead to system loading anomalies or even system interruptions during AC restart tests, preventing the system from booting. Furthermore, if the machine is powered on immediately after a power outage and loading anomalies, cached data can be lost.

[0004] Therefore, how to avoid data loss is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a data storage method, device, and medium that uses a hardware CPLD to control the power-on operation, ensuring that data in the RAID card cache is saved before power-on or other operations are performed, thus avoiding the risk of data loss.

[0006] To address the aforementioned technical problems, the present invention provides a data storage method, comprising:

[0007] Start the timer and output an invalid power-on trigger signal to the power module;

[0008] Output the first control signal to the BMC and power button module so that the corresponding prompt information can be output within the timer's timing period;

[0009] At the end of the timeout period, a second control signal is output to the BMC and the power button module to receive the power signal command, and a power-on trigger signal is output to the power module to turn on the power module so that the data storage can be completed within the timeout period.

[0010] Preferably, before starting the timer, the following is also included:

[0011] When the system is powered back on but not powered on, the control power module outputs the STBY signal to the CPLD and BMC for power supply, and then proceeds to the step of starting the timer.

[0012] Preferably, the timing period is the storage time for system data cached in the RAID card's storage cache to be stored in memory.

[0013] Preferably, a first control signal is output to the BMC and the power button module so that corresponding prompt information is output within the timer's timing period, including:

[0014] Output the first control signal to the BMC so that the BMC outputs the first prompt message;

[0015] Output the first control signal to the power button module so that the power button module can output the second prompt message.

[0016] Preferably, the BMC outputs the first prompt information through its own display module.

[0017] Preferably, the power button module outputs a second prompt message by switching the light on and off.

[0018] Preferably, after the power module is turned on, the following is also included:

[0019] Output power-on signal to BMC and power-on button module.

[0020] To address the aforementioned technical problems, the present invention also provides a data storage device, comprising:

[0021] The first output module is used to start the timer and output an invalid power-on trigger signal to the power module;

[0022] The second output module is used to output the first control signal to the BMC and the power button module so that the corresponding prompt information can be output within the timer's timing period;

[0023] The third output module is used to output a second control signal to the BMC and the power button module at the end of the timeout period in order to receive the power signal command and output a power-on trigger signal to the power module to turn on the power module so that the data storage can be completed within the timeout period.

[0024] Preferably, it also includes a control module;

[0025] The control module is used to control the power module to output the STBY signal to the CPLD and BMC to power them when the system is powered on but not powered on, and to enter the step of starting the timer.

[0026] Preferably, the first output module includes a timing module;

[0027] The timing module is used to schedule the storage time for system data cached in the RAID card's cache to be stored in memory.

[0028] Preferably, the second output module includes a fourth output module and a fifth output module;

[0029] The fourth output module is used to output the first control signal to the BMC so that the BMC can output the first prompt information;

[0030] The fifth output module is used to output the first control signal to the power button module so that the power button module can output the second prompt information.

[0031] Preferably, the fourth output module includes a first prompt module;

[0032] The first prompt module is used by BMC to output the first prompt information through its own display module.

[0033] Preferably, the fifth output module includes a second prompt module;

[0034] The second prompt module is used by the power button module to output a second prompt message when the lights are switched on or off.

[0035] Preferably, it also includes a sixth output module;

[0036] The sixth output module is used to output a power-on signal to the BMC and the power button module.

[0037] To address the aforementioned technical problems, the present invention also provides a data storage device, comprising:

[0038] Memory, used to store computer programs;

[0039] A processor is used to implement the data storage method described above when executing a computer program.

[0040] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the data storage method described above.

[0041] This invention provides a data storage method, comprising: starting a timer and outputting an invalid power-on trigger signal to a power module; outputting a first control signal to a BMC and a power button module to output corresponding prompt information within the timer's timing period; when the timer ends within a preset time, outputting a second control signal to the BMC and the power button module to receive a power signal command and outputting a power-on trigger signal to the power module to power it on so that data storage is completed within the preset time. This method ensures, through underlying hardware logic, that during data storage, the front-mounted power button and BMC page remind operators not to perform accidental operations. In the event of a system power failure or crash, the hardware CPLD controls the power-on operation to ensure that data in the RAID card cache is saved before power-on or other operations are performed, avoiding the risk of data loss.

[0042] In addition, the present invention also provides a data storage device and medium that have the same beneficial effects as the data storage method described above. Attached Figure Description

[0043] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a diagram illustrating the data storage of a RAID card.

[0045] Figure 2 A flowchart illustrating a data storage method provided in an embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of CPLD control provided in an embodiment of the present invention;

[0047] Figure 4 A structural diagram of a data storage device provided in an embodiment of the present invention;

[0048] Figure 5 A structural diagram of another data storage device provided in an embodiment of the present invention. Detailed Implementation

[0049] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0050] The core of this invention is to provide a data storage method, device, and medium that uses a hardware CPLD to control the power-on operation, ensuring that data in the RAID card cache is saved before power-on or other operations are performed, thus avoiding the risk of data loss.

[0051] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] It should be noted that when the system experiences a sudden power outage or abnormal shutdown, the RAID card needs to transfer the system data cached in the cache to non-volatile memory. During this process, the Super Cap provides power to the RAID card, and this process must be maintained for at least 90 seconds. The system must not be powered on during these 90 seconds. Forcibly resetting the RAID card or repeatedly attempting to power on may cause RAID card malfunctions and result in the loss of stored system data.

[0053] Figure 1 This is a diagram illustrating the storage data of a RAID card, such as... Figure 1 As shown, RAID card cache1 is connected to RAID card 2, and then RAID card 2 stores the system data cached in the cache into RAID card non-volatile memory 3. At the same time, RAID card SuperCap4 provides power support for RAID card 2.

[0054] Figure 2 A flowchart of a data storage method provided in an embodiment of the present invention is shown below. Figure 2 As shown, the method includes:

[0055] S11: Start the timer and output an invalid power-on trigger signal to the power module;

[0056] S12: Output the first control signal to the BMC and power button module so that the corresponding prompt information can be output within the timer's timing period;

[0057] S13: When the timer ends, output the second control signal to the BMC and the power button module to receive the power signal command, and output the power-on trigger signal to the power module to turn on the power module so that the data storage can be completed within the timer period.

[0058] Specifically, this applies to situations where a sudden and abnormal power outage of the system's alternating current (AC) causes a power outage in the entire server room, resulting in damage to the power supply unit (PSU) module and a power outage in the entire server room cabinet. It also applies when staff are repairing power cables. Other application scenarios include server crashes, CPU power failures, sudden power outages in the server room, power restoration immediately after an AC cycle stability test, or situations where AC power remains in the PSU module during abnormal server crashes or shutdowns. Before proceeding to step S11, during the system power restoration process but while the system is not powered on, power must be supplied to the Complex Programmable Logic Device (CPLD) and the Baseboard Management Controller (BMC).

[0059] As a preferred embodiment, before starting the timer, the following is also included:

[0060] When the system is powered back on but not powered on, the control power module outputs the STBY signal to the CPLD and BMC for power supply, and then proceeds to the step of starting the timer.

[0061] Correspondingly, the STBY input signal is STANDBY. The STBY signal is the output signal of the normal operation / standby state control pin, which is the I / O port enable terminal and is active high. After the power cord is plugged into the power module, the power module does not need to turn on the output power.

[0062] The power supply module outputs the STBY signal value to power the CPLD and BMC. A CPLD is a digital logic device developed based on a Programmable Logic Device (PLD). Users can program a pre-compiled CPLD into the CPLD chip using a dedicated CPLD programmer, thereby implementing the designed digital logic functions. Therefore, a CPLD can replace discrete digital logic chips to achieve various digital logic functions by writing specific logic hardware programs.

[0063] A CPLD is primarily composed of programmable logic macrocells (MCs) surrounding a central programmable interconnect matrix. The MC structure is relatively complex, featuring intricate input / output (I / O) interconnection structures, allowing users to generate specific circuit structures to perform particular functions. Because CPLDs use fixed-length metal wires to interconnect logic blocks, the designed logic circuits exhibit time predictability, avoiding the incomplete timing prediction drawbacks of segmented interconnect structures.

[0064] Platform management encompasses a series of monitoring and control functions, operating on system hardware. This includes monitoring system temperature, voltage, fans, power supply, etc., and making appropriate adjustments to ensure the system remains in a healthy state. Of course, if the system malfunctions, it can also be restarted via a reset. Platform management also records various hardware information and logs to alert users and help locate subsequent problems.

[0065] The BMC (Browser Control Center) is an independent system. It does not depend on other hardware on the system (such as the CPU and memory), nor on the BIOS or operating system (OS). (However, the BMC can interact with the BIOS and OS, which allows for better platform management. The OS has system management software that can work with the BMC for better management.) Generally, computers don't have a built-in BMC because its use is limited; the CPU handles management of things like temperature and power. However, for demanding devices like servers, the BMC is used. Of course, because the BMC is an independent system, some embedded devices may not require other processors; a single BMC can handle the work. Ultimately, the BMC itself is a small system with an external processor (usually an Advanced RISC Machines (ARM) processor), perfectly capable of handling certain tasks independently.

[0066] The timer has timing, counting, and timer-counting functions, and features pulse width modulation (PWM) signal output control, including frequency control and duty cycle control. It has a capture function, primarily using the rising or falling edge of the measured signal to export the current data of the timer to a designated random access memory (RAM) unit, typically used for precise period and rectangular pulse width measurements. The timer's core components are adders and some memory to set the adder to start adding from a certain value, control the number of additions, and the interrupt time.

[0067] After the timer inside the CPLD is started, an invalid power-on trigger signal is output to the PSU power module. At this time, the invalid power-on trigger signal is that the Ps_on signal is always pulled low. Since the Ps_on signal is pulled low, pressing the power button and powering on the remote BMC are invalid during this process.

[0068] The first control signal is output to the BMC and power button modules. It's important to note that this first control signal is not identical to the output signal; rather, it serves as a signal to activate both the BMC and power button modules, facilitating the output of corresponding prompt messages. These prompt messages are configured based on the characteristics of the BMC and power button. For example, the BMC typically manages and monitors device information, therefore, prompt messages need to be displayed on the web-based power-on interface. The power button includes a power switch and an indicator light; the flashing of the indicator light is one way to display the prompt message.

[0069] After the timer expires, a second control signal is output to the BMC and the power button module. This second control signal is not exactly the same as the output signal, but is used to control the power-on ready state of the BMC. The power switch light in the power button module stops flashing, making it easier to use the power switch later.

[0070] The CPLD outputs a power-on trigger signal to the power module to turn it on. The CPLD's internal logic enables the Ps_on signal to be sent to the PSU module to turn on the main power. At this time, pressing the power button or remotely turning on the BMC is a valid operation.

[0071] This invention provides a data storage method comprising: starting a timer and outputting an invalid power-on trigger signal to a power module; outputting a first control signal to a BMC and a power button module to output corresponding prompt information within the timer's timing period; when the timer ends within a preset time, outputting a second control signal to the BMC and the power button module to receive a power signal command and outputting a power-on trigger signal to the power module to power it on so that data storage is completed within the preset time. This method ensures, through underlying hardware logic, that during data storage, the front-mounted power button and BMC page remind operators not to perform accidental operations. In the event of a system power failure or crash, the hardware CPLD controls the power-on operation to ensure that data in the RAID card cache is saved before power-on or other operations are performed, thus avoiding the risk of data loss.

[0072] Based on the above embodiments, the timing time is not limited. As one embodiment, the timing time is the storage time for system data cached in the RAID card storage cache to be stored in memory.

[0073] Specifically, the timing interval can be greater than or equal to the storage time of the system data cached in the RAID card's storage cache to memory, but the timing interval cannot be less than the storage time of the system data cached in the RAID card to memory. Since this invention primarily addresses preventing data loss during storage, the system is not allowed to be powered on again or restarted during this storage period. Therefore, the timing interval of the timer inside the CPLD is greater than or equal to the storage time.

[0074] The timing provided in this embodiment is the storage time for system data cached in the RAID card's storage cache to be transferred to memory. This helps to avoid the risk of data loss due to system power-on during data storage.

[0075] Based on the above embodiments, a first control signal is output to the BMC and the power button module so that corresponding prompt information is output within the timer's timing period, including:

[0076] Output the first control signal to the BMC so that the BMC outputs the first prompt message;

[0077] Output the first control signal to the power button module so that the power button module can output the second prompt message.

[0078] It should be noted that the first control signal is output to the BMC so that the BMC can output the first prompt information. The first prompt information can be output by the BMC's Web display module, which outputs a reminder message, countdown time information, a pop-up dialog box, or the BMC's power button is currently inactive.

[0079] A second control signal is output to the power button module so that the power button module outputs a second prompt message, which can be the flashing of an LED or can be set according to the flashing frequency.

[0080] In a preferred embodiment, the BMC outputs a first prompt message through its own display module. The power button module outputs a second prompt message by switching the lights on and off.

[0081] The power button module includes a light switch and a power button, and outputs a second prompt message only by switching the light on and off.

[0082] The embodiments of the present invention provide various ways to output first and second prompt messages, such as using a power on / off indicator light to remind data center maintenance personnel not to operate incorrectly, and using the BMC Web page to inform operators that the system is storing data and should not be operated, thus enriching the types of prompt messages.

[0083] Based on the above embodiments, after the power module is turned on, the following is also included:

[0084] Output power-on signal to BMC and power-on button module.

[0085] After the power module is turned on, it indicates that the data in the current RAID card cache has been successfully stored in the RAID card's non-volatile cache. Then, the CPLD outputs a power-on signal to the BMC and power button module to start normal operation.

[0086] The present invention provides that after the power module is turned on, a power-on signal is output to the BMC and the power button module, which facilitates subsequent operation and management.

[0087] As a preferred embodiment, Figure 3 This is a schematic diagram of CPLD control provided in an embodiment of the present invention, such as... Figure 3 As shown, in the case of a sudden AC power outage (sudden tripping of the power supply in the server room or AC cycle stability test) followed by immediate power restoration, after power restoration, the system is not yet powered on. PSU module 6 only outputs STBY power to CPLD5 and BMC7. After CPLD5's internal timer starts counting and waits for 90 seconds, the internal logic of CPLD5 will then allow the Ps_on signal to be sent to the PSU to start the main circuit. During the 90-second wait, the CPLD5 internally pulls the Ps_on signal low. Because the Ps_on signal is low, pressing the power button or remotely powering on the BMC7 during this period will have no effect. During the 90-second wait, the CPLD5 uses a control signal to flash the power button light twice every second to remind maintenance personnel not to power on the device. After the flashing stops, press the power button 8. The CPLD5 also sends a control signal to the remote operating platform of the BMC7, prompting the BMC7's web power-on interface to wait 90 seconds before powering on. After the CPLD5 timeout ends, the CPLD5 uses a control signal to tell the BMC7 that it is ready to power on, and the power button 8 stops flashing. At this point, pressing the power button or remotely powering on the device will be effective.

[0088] In another implementation, for cases where the PSU module's AC power supply remains continuously after an abnormal server crash or shutdown, the CPLD detects the PSU_power_good signal (a low signal indicates the system is off) being pulled low and starts a timer. Within 90 seconds, the power button indicator flashes, and the BMC console displays a message prompting to wait 90 seconds before powering on. After 90 seconds, the CPLD allows the Ps_on signal to be sent to the PSU to enable main power, and this signal remains low for 90 seconds. Powering on by pressing the power button or remotely via the BMC after 90 seconds is effective. This mechanism prevents accidental operation by maintenance personnel and ensures that data in the RAID card cache is correctly stored in the RAID card's non-volatile cache.

[0089] For a description of the CPLD control schematic diagram provided by the present invention, please refer to the above method embodiment. The present invention will not be described again here, but it has the same beneficial effects as the above data storage method.

[0090] The various embodiments corresponding to the data storage method have been described in detail above. Based on this, the present invention also discloses a data storage device corresponding to the above method. Figure 4 This is a structural diagram of a data storage device provided in an embodiment of the present invention. Figure 4As shown, the data storage device includes:

[0091] The first output module 11 is used to start the timer and output an invalid power-on trigger signal to the power module;

[0092] The second output module 12 is used to output the first control signal to the BMC and the power button module so that the corresponding prompt information can be output within the timer's timing period;

[0093] The third output module 13 is used to output a second control signal to the BMC and the power button module at the end of the timed period so as to receive the power signal command and output a power-on trigger signal to the power module to turn on the power module so as to complete the data storage within the timed period.

[0094] Based on the above embodiments, a control module is also included;

[0095] The control module is used to control the power module to output the STBY signal to the CPLD and BMC to power them when the system is powered on but not powered on, and to enter the step of starting the timer.

[0096] As one embodiment, the first output module includes a timing module;

[0097] The timing module is used to schedule the storage time for system data cached in the RAID card's cache to be stored in memory.

[0098] As one embodiment, the second output module includes a fourth output module and a fifth output module;

[0099] The fourth output module is used to output the first control signal to the BMC so that the BMC can output the first prompt information;

[0100] The fifth output module is used to output the first control signal to the power button module so that the power button module can output the second prompt information.

[0101] As one embodiment, the fourth output module includes a first prompting module;

[0102] The first prompt module is used by BMC to output the first prompt information through its own display module.

[0103] As one embodiment, the fifth output module includes a second prompt module;

[0104] The second prompt module is used by the power button module to output a second prompt message when the lights are switched on or off.

[0105] As one embodiment, a sixth output module is also included;

[0106] The sixth output module is used to output a power-on signal to the BMC and the power button module.

[0107] Since the embodiments of the device part correspond to the embodiments described above, please refer to the embodiments described in the method part for the embodiments of the device part, and will not be repeated here.

[0108] This invention provides a data storage device, comprising: activating a timer and outputting an invalid power-on trigger signal to a power module; outputting a first control signal to a BMC and a power button module to output corresponding prompt information within the timer's timing period; and when the timer expires within a preset time, outputting a second control signal to the BMC and the power button module to receive a power signal command and outputting a power-on trigger signal to the power module to power it on so as to complete data storage within the preset time. This device ensures, through underlying hardware logic, that during data storage, the front-mounted power button and BMC page remind operators not to perform accidental operations. In the event of a system power failure or crash, the hardware CPLD controls the power-on operation to ensure that data in the RAID card cache is saved before power-on or other operations are performed, thus avoiding the risk of data loss.

[0109] Figure 5 A structural diagram of another data storage device provided in an embodiment of the present invention is shown below. Figure 5 As shown, the device includes:

[0110] Memory 21 is used to store computer programs;

[0111] Processor 22 is used to implement the steps of a data storage method when executing a computer program.

[0112] The data storage device provided in this embodiment may include, but is not limited to, smartphones, tablets, laptops, or desktop computers.

[0113] The processor 22 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 22 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 22 may also include a main processor and a coprocessor. The main processor, also known as the CPU, is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 22 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 22 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0114] The memory 21 may include one or more computer-readable storage media, which may be non-transitory. The memory 21 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 21 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 22, is capable of implementing the relevant steps of the data storage method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 21 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the data storage method, etc.

[0115] In some embodiments, the data storage device may further include a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27.

[0116] Those skilled in the field can understand, Figure 5 The structure shown does not constitute a limitation on the data storage device and may include more or fewer components than illustrated.

[0117] The processor 22 implements the data storage method provided in any of the above embodiments by calling instructions stored in the memory 21.

[0118] This invention provides a data storage device, comprising: activating a timer and outputting an invalid power-on trigger signal to a power module; outputting a first control signal to a BMC and a power button module to output corresponding prompt information within the timer's timing period; and when the timer expires within a preset time, outputting a second control signal to the BMC and the power button module to receive a power signal command and outputting a power-on trigger signal to the power module to power it on so as to complete data storage within the preset time. This device ensures, through underlying hardware logic, that during data storage, the front-mounted power button and BMC page remind operators not to perform accidental operations. In the event of a system power failure or crash, the hardware CPLD controls the power-on operation to ensure that data in the RAID card cache is saved before power-on or other operations are performed, thus avoiding the risk of data loss.

[0119] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by processor 22, implements the steps of the data storage method described above.

[0120] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), RAM, magnetic disks, or optical disks.

[0121] This invention provides a computer-readable storage medium, comprising: activating a timer to output an invalid power-on trigger signal to a power module; outputting a first control signal to a BMC and a power button module to output corresponding prompt information within the timer's timing period; and when the timer expires within a preset time, outputting a second control signal to the BMC and the power button module to receive a power signal command and outputting a power-on trigger signal to the power module to power it on so as to complete data storage within the preset time. This computer-readable storage medium ensures, through underlying hardware logic, that during data storage, the front-mounted power button and BMC page remind operators not to perform accidental operations. In the event of a system power failure or crash, the hardware CPLD controls the power-on operation to ensure that data in the RAID card cache is saved before power-on or other operations are performed, avoiding the risk of data loss.

[0122] The present invention has provided a detailed description of a data storage method, data storage device, and medium. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

[0123] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A data storage method, characterized in that, include: Start the timer and output an invalid power-on trigger signal to the power module; wherein, the invalid power-on trigger signal pulled low renders the power-on of the corresponding BMC and power button module invalid; The first control signal is output to the BMC and the power button module so that the corresponding prompt information is output within the time interval of the timer; wherein the time interval is greater than or equal to the storage time of the system data mixed in the RAID card storage cache to the memory; When the timed period ends, a second control signal is output to the BMC and the power button module to receive a power signal command, and a power-on trigger signal is output to the power module to turn on the power module so that the data storage is completed within the timed period. Correspondingly, before starting the timer, the following is also included: When the system is powered on but not powered on, the power module is controlled to output the STBY signal to the CPLD and the BMC for power supply, and then proceeds to the step of starting the timer.

2. The data storage method according to claim 1, characterized in that, The timing period is the storage time for system data cached in the RAID card's storage cache to be transferred to memory.

3. The data storage method according to claim 1, characterized in that, The first control signal is output to the BMC and power button module so as to output corresponding prompt information within the timer's timing period, including: The first control signal is output to the BMC so that the BMC outputs the first prompt information; The first control signal is output to the power button module so that the power button module outputs the second prompt information.

4. The data storage method according to claim 3, characterized in that, The BMC outputs the first prompt information through its own display module.

5. The data storage method according to claim 3, characterized in that, The power button module outputs the second prompt information by switching the lights on and off.

6. The data storage method according to any one of claims 1 to 5, characterized in that, After the power module is turned on, the following is also included: Output a power-on signal to the BMC and the power-on button module.

7. A data storage device, characterized in that, include: The first output module is used to start a timer and output an invalid power-on trigger signal to the power module; wherein, the invalid power-on trigger signal pulled low makes the power-on of the corresponding BMC and power button module invalid; The second output module is used to output a first control signal to the BMC and the power button module so as to output corresponding prompt information within the timer's timing period; wherein, the timing period is greater than or equal to the storage time of the system data mixed in the RAID card's storage cache to the memory; The third output module is used to output a second control signal to the BMC and the power button module at the end of the timed period in order to receive a power signal command, and to output a power-on trigger signal to the power module to turn on the power module so as to complete the data storage within the timed period. Correspondingly, before starting the timer, the following is also included: When the system is powered on but not powered on, the power module is controlled to output the STBY signal to the CPLD and the BMC for power supply, and then proceeds to the step of starting the timer.

8. A data storage device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the data storage method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the data storage method as described in any one of claims 1 to 6.

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