A broadband low-noise amplifier with high gain flatness and high linearity

Abstract

This invention belongs to the field of semiconductor integrated circuit design, and specifically relates to a broadband low-noise amplifier with high gain flatness and high linearity. It includes an input matching network, a bias network, a feedback network, an amplifier circuit, an output matching network, an input terminal, an output terminal, and a power supply terminal. The input terminal is connected to the input terminal of the input matching network. The output terminals of the input matching network, the bias network, and the feedback network are connected to the input terminal of the amplifier circuit. The first input terminal of the bias network is connected to the first output terminal of the amplifier circuit and the input terminal of the feedback network. The second input terminal of the bias network is connected to the second output terminal of the amplifier circuit. The third output terminal of the amplifier circuit is connected to the first input terminal of the output matching network. The second input terminal of the output matching network is connected to the power supply terminal. This invention effectively improves the gain flatness and linearity of the broadband low-noise amplifier and achieves excellent input-output matching characteristics over a wide frequency band.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit design, and specifically relates to a broadband low-noise amplifier with high gain flatness and high linearity. Background Technology

[0002] In wireless transceiver communication systems, the broadband low-noise amplifier (LNA) is a core component of the radio frequency (RF) front-end. Its main task is to amplify the received RF signal. Its gain and noise performance directly affect the overall system's receiving performance. Broadband low-noise amplifiers are widely used in wireless communication fields such as base stations, point-to-point communication, radar, electronic warfare, remote sensing and control, and navigation. In broadband RF systems, low-noise amplifiers are required to have good gain flatness, high linearity, noise characteristics, input-output matching characteristics, and stability across the entire bandwidth.

[0003] Gain flatness primarily characterizes the gain fluctuation of an amplifier within a certain frequency band, describing the signal amplitude distortion characteristics within that band. This parameter is particularly important in broadband radio frequency (RF) systems. Linearity generally includes characteristics such as the output 1dB compression point power, the output third-order intermodulation point power, and the output second-order intermodulation point power. It mainly characterizes the amplifier's distortion resistance and its ability to distinguish the quality of adjacent signals within a certain bandwidth. Therefore, linearity-related parameters are especially important in broadband wireless communication systems. The broadband characteristics of the amplifier's output 1dB compression point power, third-order intermodulation point power, and second-order intermodulation point power, particularly the power flatness characteristics within a specific bandwidth, greatly affect the communication quality of the RF system.

[0004] Currently, ultra-wideband applications such as phased array radar, electronic countermeasures, and satellite communications place higher demands on the linearity of RF amplifiers, especially gain flatness and third-order intermodulation, directly determining the link sensitivity and dynamic range of the receiving system. Therefore, in high-performance wireless communication systems, for broadband low-noise amplifiers, the noise figure is generally required to be below 1dB, the output 1dB compression point power requirement is above 22dBm, the output third-order intermodulation point power requirement is above 35dBm, and the output second-order intermodulation point power requirement is above 45dBm. Through circuit structure optimization and compensation, a trade-off between amplifier gain flatness and linearity can be achieved, improving the anti-interference capability of the RF system and meeting the requirements of the RF system for a large dynamic range. Therefore, designing and inventing a broadband low-noise amplifier with high gain flatness and high linearity has significant research and application value. Summary of the Invention

[0005] To improve the gain flatness, output 1dB compression point power flatness, and output third-order intermodulation point power flatness of a broadband low-noise amplifier (LNOA), thereby enabling the amplifier to possess excellent gain flatness and linearity characteristics and better suited for high-quality and wide dynamic range wireless communication transceiver systems, this invention proposes a broadband LNOA with high gain flatness and high linearity. The LNOA includes an input matching network, a bias network, a feedback network, an amplifier circuit, an output matching network, an input terminal, an output terminal, and a power supply terminal. The input terminal is connected to the input terminal of the input matching network. The output terminals of the input matching network, the bias network, and the feedback network are connected to the input terminal of the amplifier circuit, providing input current, bias current, and feedback current to the amplifier circuit. The first input terminal of the bias network... The first input terminal of the bias network is connected to the first output terminal of the amplifier circuit. This first input terminal is the port of the DC power supply path, which provides DC bias for the transistors inside the bias circuit. The first output terminal of the amplifier circuit is also connected to the input terminal of the feedback network, which provides DC bias for the feedback network. The second input terminal of the bias network is connected to the second output terminal of the amplifier circuit, which provides the feedback path port for the bias network. The third output terminal of the amplifier circuit is connected to the first input terminal of the output matching network, which outputs the RF signal of the amplifier circuit. The second input terminal of the output matching network is connected to the power supply terminal, which provides power to the output matching network. The output terminal of the output matching network serves as the output terminal of a broadband low-noise amplifier with high gain flatness and high linearity.

[0006] Furthermore, the input matching network includes a first capacitor, one end of which is connected to the input terminal of the input matching network, and the other end of which is connected to the output terminal of the input matching network.

[0007] Furthermore, the bias network includes a first resistor, a second resistor, a third resistor, a fourth resistor, a third transistor, a fourth transistor, and a first inductor. One end of the first resistor is connected to the output terminal of the bias network; the other end of the first resistor is connected to one end of the first inductor and the first input terminal of the bias network; the other end of the first inductor is connected to one end of the second resistor; the other end of the second resistor is connected to one end of the third resistor, the drain of the third transistor, the drain of the fourth transistor, and the source of the fourth transistor; the other end of the third resistor is connected to the gate of the third transistor; the source of the third transistor is grounded; the gate of the fourth transistor is connected to one end of the fourth resistor; and the other end of the fourth resistor is connected to the second input terminal of the bias network.

[0008] Furthermore, the feedback network includes a fifth resistor, a sixth resistor, a seventh resistor, a second capacitor, a third capacitor, and a second inductor. One end of the fifth resistor serves as the output terminal of the feedback network. The other end of the fifth resistor is connected to one end of the second capacitor and one end of the second inductor. The other end of the second capacitor is connected to one end of the seventh resistor and one end of the third capacitor. The other end of the second inductor is connected to one end of the sixth resistor. The other end of the sixth resistor is connected to the other end of the third capacitor. The other end of the seventh resistor is connected to the first input terminal of the feedback network and the first output terminal of the amplifier circuit.

[0009] Furthermore, the amplifier circuit includes a first transistor, a second transistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a third inductor, a fourth inductor, and a fifth inductor. The gate of the first transistor is connected to the input terminal of the amplifier circuit; the drain of the first transistor is connected to the source of the second transistor; the source of the first transistor is connected to one end of the third inductor; the other end of the third inductor is grounded; the gate of the second transistor is connected to one end of the ninth resistor, one end of the fourth capacitor, and one end of the fifth capacitor; the other end of the ninth resistor is connected to one end of the eighth resistor. One end of the fifth capacitor is connected to the drain of the second transistor, one end of the sixth capacitor, and one end of the fourth inductor; the other end of the eighth resistor is connected to the ground; the other end of the tenth resistor is connected to one end of the eleventh resistor, one end of the seventh capacitor, and the first output terminal of the amplifier circuit; the other end of the sixth capacitor is connected to the second output terminal of the amplifier circuit; the other end of the eleventh resistor is connected to the other end of the fourth inductor and one end of the fifth inductor; the other end of the seventh capacitor is connected to the other end of the fifth inductor and the third output terminal of the amplifier circuit.

[0010] Furthermore, the first transistor, the second transistor, the third transistor, and the fourth transistor are transistors of the same type, and the first transistor, the second transistor, the third transistor, and the fourth transistor are of one type among GaAs E-pHEMT, GaN E-pHEMT, and RF CMOS NMOS.

[0011] Furthermore, the output matching network includes an eighth capacitor, a ninth capacitor, and a sixth inductor. One end of the eighth capacitor is connected to one end of the sixth inductor and the first input terminal of the output matching circuit; the other end of the eighth capacitor is connected to the output terminal of the output matching network; the other end of the sixth inductor is connected to one end of the ninth capacitor and the second input terminal of the output matching circuit; and the other end of the ninth capacitor is grounded.

[0012] This invention employs a Cascode amplifier unit architecture, utilizing a double negative feedback structure with resistors, capacitors, and inductors connected in series and then in parallel with the capacitor to improve overall gain flatness. Compensation at the amplifier unit's output is achieved through resistor, capacitor, and inductor structures, effectively enhancing the power gain flatness, third-order intermodulation point power flatness, and absolute power of the broadband low-noise amplifier. Furthermore, this invention employs capacitor and inductor matching at specific frequency points, achieving excellent power characteristics and input-output matching characteristics over a wide frequency band. Under a 5V power supply and a 115mA power supply current, this invention achieves approximately 25dB power gain and ±0.5dB gain flatness within a 0.1GHz to 3GHz bandwidth. The output 1dB compression point power reaches 23dBm; the third-order intermodulation point power reaches 35dBm; and the second-order intermodulation point power reaches 45dBm. The noise figure is within 1dB. The circuit simultaneously achieves high gain flatness and high linearity across a wide frequency range, and the amplifier remains stable throughout the entire frequency band. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the overall structure of a broadband low-noise amplifier with high gain flatness and high linearity.

[0014] Figure 2 This is a preferred embodiment of the input matching network in a broadband low-noise amplifier with high gain flatness and high linearity;

[0015] Figure 3 This is a preferred embodiment of a broadband low-noise amplifier bias network with high gain flatness and high linearity;

[0016] Figure 4 This is a preferred embodiment of the feedback network in a broadband low-noise amplifier with high gain flatness and high linearity;

[0017] Figure 5 This is a preferred embodiment of the amplifier circuit in a broadband low-noise amplifier with high gain flatness and high linearity;

[0018] Figure 6 This is a preferred embodiment of the output matching network in a broadband low-noise amplifier with high gain flatness and high linearity;

[0019] Figure 7 This is a schematic diagram of the power gain and flatness parameters of the present invention;

[0020] Figure 8 This is a schematic diagram of the 1dB compression point power parameters output by the present invention;

[0021] Figure 9 This is a schematic diagram of the third-order intermodulation point power parameters output by the present invention;

[0022] Figure 10 This is a schematic diagram of the second-order intermodulation point power parameters output by the present invention;

[0023] Figure 11 This is a schematic diagram of the noise figure parameters of the present invention;

[0024] Wherein, R1 is the first resistor; R2 is the second resistor; R3 is the third resistor; R4 is the fourth resistor; R5 is the fifth resistor; R6 is the sixth resistor; R7 is the seventh resistor; R8 is the eighth resistor; R9 is the ninth resistor; R10 is the tenth resistor; R11 is the eleventh resistor; R1 is the first resistor; L1 is the first inductor; L2 is the second inductor;

[0025] L3, third inductor; L4, fourth inductor; L5, fifth inductor; L6, sixth inductor; M1, first transistor; M2, second transistor; M3, third transistor; M4, fourth transistor; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor; C6, sixth capacitor; C7, seventh capacitor; C8, eighth capacitor; C9, ninth capacitor. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] This invention proposes a broadband low-noise amplifier with high gain flatness and high linearity, comprising an input matching network, a bias network, a feedback network, an amplifier circuit, an output matching network, an input terminal, an output terminal, and a power supply terminal. The input terminal is connected to the input terminal of the input matching network. The output terminals of the input matching network, the bias network, and the feedback network are connected to the input terminal of the amplifier circuit, providing input matching, bias, and feedback paths for the amplifier circuit. The first input terminal of the bias network is connected to the first output terminal of the amplifier circuit. The first input terminal of the bias network is also a port of the DC power supply path, which provides DC power to the transistors inside the bias circuit. The first output terminal of the bias amplifier circuit is also connected to the input terminal of the feedback network, providing DC bias for the feedback network. The second input terminal of the bias network is connected to the second output terminal of the amplifier circuit, providing a feedback path port for the bias network. The third output terminal of the amplifier circuit is connected to the first input terminal of the output matching network, outputting the RF signal of the amplifier circuit. The second input terminal of the output matching network is connected to the power supply terminal, providing power to the output matching network. The output terminal of the output matching network serves as the output terminal of a broadband low-noise amplifier with high gain flatness and high linearity.

[0028] This embodiment provides a broadband low-noise amplifier with high gain flatness and high linearity, such as... Figure 1 It includes an input matching network, a bias network, a feedback network, an amplifier circuit, an output matching network, an input terminal, an output terminal, and a power supply terminal;

[0029] One end of the input matching network (i.e., the input end of the input matching network) is connected to the input end. The other end of the input matching network (i.e., the output end of the input matching network) is connected to the third end of the bias network (the output end of the bias circuit), the second end of the feedback network (i.e., the output end of the feedback network), and the first end of the amplifier circuit (i.e., the input end of the amplifier circuit). This input matching network is used for input stage port matching of the amplifier circuit, ensuring good input return loss performance at the amplifier input port, and providing DC blocking.

[0030] Terminal 1 of the bias network (i.e., the first input terminal of the bias network) is connected to terminal 1 of the feedback network (i.e., the input terminal of the feedback network) and terminal 3 of the amplifier circuit (i.e., the first output terminal of the amplifier circuit). Terminal 2 of the input bias network (i.e., the second input terminal of the bias network) is connected to terminal 2 of the amplifier circuit (i.e., the second output terminal of the amplifier circuit). Terminal 3 of the bias network is connected to terminal 2 of the input matching network, terminal 2 of the feedback network (i.e., the output terminal of the feedback circuit), and terminal 1 of the amplifier circuit. This bias network is used to provide bias for the transistors of the amplifier circuit.

[0031] One end of the feedback network is connected to one end of the bias network and three ends of the amplifier circuit. The other end of the feedback network is connected to two ends of the input matching network, three ends of the bias network, and one end of the amplifier circuit. This feedback network is used to provide good input and output return loss parameters for the amplifier circuit, while also improving the gain flatness and stability of the amplifier.

[0032] Terminal 1 of the amplifier circuit is connected to terminal 2 of the input matching network, terminal 3 of the bias network, and terminal 2 of the feedback network. Terminal 2 of the amplifier circuit is connected to terminal 2 of the bias network. Terminal 3 of the amplifier circuit is connected to terminal 1 of the bias network and terminal 1 of the feedback network. Terminal 4 of the amplifier circuit (i.e., the third output terminal of the amplifier circuit) is connected to terminal 1 of the output matching network (i.e., the first input terminal of the output matching circuit). This amplifier circuit amplifies the RF signal at the input terminal, providing sufficient high flatness power gain, high linearity output characteristics, and low noise figure.

[0033] One end of the output matching network is connected to the fourth end of the amplifier circuit. The second end of the output matching network (i.e., the second input end of the output matching circuit) is connected to the output end. The third end of the output matching network (i.e., the output end of the output matching circuit) is connected to the power supply end. This output matching network is used for matching the output port of the amplifier circuit, ensuring good output return loss index of the amplifier output port, and providing power supply choke and filtering, while also providing DC blocking.

[0034] like Figure 2 As shown, the input matching network includes a first capacitor C1, one end of which is connected to the input terminal of the input matching network, and the other end of which is connected to the output terminal of the input matching network.

[0035] like Figure 3 As shown, the bias network includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a third transistor M3, a fourth transistor M4, and a first inductor L1. One end of the first resistor R1 is connected to the output terminal of the bias network; the other end of the first resistor R1 is connected to one end of the first inductor L1 and the first input terminal of the bias network; the other end of the first inductor L1 is connected to one end of the second resistor R2; the other end of the second resistor R2 is connected to one end of the third resistor R3, the drain of the third transistor M3, the drain of the fourth transistor M4, and the source of the fourth transistor M4; the other end of the third resistor R3 is connected to the gate of the third transistor M3; the source of the third transistor M3 is grounded; the gate of the fourth transistor M4 is connected to one end of the fourth resistor R4; and the other end of the fourth resistor R4 is connected to the second input terminal of the bias network.

[0036] like Figure 4As shown, the feedback network includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a second capacitor C2, a third capacitor C3, and a second inductor L2. One end of the fifth resistor R5 serves as the output terminal of the feedback network; the other end of the fifth resistor R5 is connected to one end of the second capacitor C2 and one end of the second inductor L2; the other end of the second capacitor C2 is connected to one end of the seventh resistor R7 and one end of the third capacitor C3; the other end of the second inductor L2 is connected to one end of the sixth resistor R6; the other end of the sixth resistor R6 is connected to the other end of the third capacitor C3; and the other end of the seventh resistor R7 is connected to the first input terminal of the feedback network and the first output terminal of the amplifier circuit.

[0037] like Figure 5 As shown, the amplifier circuit includes a first transistor M1, a second transistor M2, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, a third inductor L3, a fourth inductor L4, and a fifth inductor L5. The gate of the first transistor M1 is connected to the input terminal of the amplifier circuit; the drain of the first transistor M1 is connected to the source of the second transistor M2; the source of the first transistor M1 is connected to one end of the third inductor L3; the other end of the third inductor L3 is grounded; the gate of the second transistor M2 is connected to one end of the ninth resistor R9, one end of the fourth capacitor C4, and one end of the fifth capacitor C5; the other end of the ninth resistor R9 is connected to... One end of the eighth resistor R8 is connected to one end of the tenth resistor R10; the other end of the fourth capacitor C4 is grounded; the other end of the fifth capacitor C5 is connected to the drain of the second transistor M2, one end of the sixth capacitor C6, and one end of the fourth inductor L4; the other end of the eighth resistor R8 is grounded; the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11, one end of the seventh capacitor C7, and the first output terminal of the amplifier circuit; the other end of the sixth capacitor C6 is connected to the second output terminal of the amplifier circuit; the other end of the eleventh resistor R11 is connected to the other end of the fourth inductor L4 and one end of the fifth inductor L5; the other end of the seventh capacitor C7 is connected to the other end of the fifth inductor L5 and the third output terminal of the amplifier circuit.

[0038] like Figure 6 As shown, the output matching network includes an eighth capacitor C8, a ninth capacitor C9, and a sixth inductor L6. One end of the eighth capacitor C8 is connected to one end of the sixth inductor L6 and the first input terminal of the output matching circuit; the other end of the eighth capacitor C8 is connected to the output terminal of the output matching network; the other end of the sixth inductor L6 is connected to one end of the ninth capacitor C9 and the second input terminal of the output matching circuit; and the other end of the ninth capacitor C9 is grounded.

[0039] In a preferred embodiment, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are transistors of the same type, and the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are one of GaAs E-pHEMT, GaN E-pHEMT, and RF CMOS NMOS.

[0040] The working principle of this invention is as follows:

[0041] The first transistor M1 and the second transistor M2 form a Cascode structure unit. The bias network formed by the third transistor M3 and the fourth transistor M4 provides the bias voltage for the first transistor M1. The circuit structure formed by the eighth resistor R8, the ninth resistor R9, the tenth resistor R10 and the fourth capacitor C4 provides the bias voltage for the second transistor M2. The fifth resistor R5, the sixth resistor R6, the first resistor R0, the second capacitor C2, the third capacitor C3 and the second inductor L2 form a double negative feedback structure to ensure the gain flatness of the amplifier and the input and output impedance matching characteristics. The third inductor L3 forms the source stage negative feedback of the amplification structure. Combined with the feedback structure formed by the fifth capacitor C5 and the sixth capacitor C6, the high-frequency power characteristics of the circuit are optimized, and the overall circuit stability is improved. The first resistor R1, the fourth inductor L4, the fifth inductor L5 and the seventh capacitor C7 provide partial feedback characteristics. At the same time, the inductors and capacitors introduce high-frequency compensation to improve the linearity and power flatness characteristics of the amplifier circuit. The first capacitor C1 forms the input matching network, while the eighth capacitor C8, the sixth inductor L6, and the ninth capacitor C9 form the output matching network. The ninth capacitor C9 filters the power supply. The entire broadband low-noise amplifier employs multiple negative feedback structures, using capacitors and inductors for matching and compensation to ensure good input and output matching characteristics and improve the gain flatness and linearity of the amplifier circuit over its wide bandwidth.

[0042] like Figure 7 As shown, under a power supply voltage of 5V and a power supply current of 115mA, the power gain reaches approximately 25dB within a bandwidth ranging from 0.1GHz to 3GHz, with gain flatness of ±0.5dB. The output power at the 1dB compression point reaches 23dBm; the output power at the third-order intermodulation point reaches 35dBm; and the output power at the second-order intermodulation point reaches 45dBm. The noise figure is within 1dB. The circuit simultaneously achieves high gain flatness and high linearity over a wide frequency range, and the amplifier remains stable across the entire frequency band.

[0043] The above-described embodiments further illustrate the purpose, technical solution, and advantages of the present invention. It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made to the present invention within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-gain flatness, high-linearity wideband low noise amplifier, characterized by, The input matching network, the bias network, the feedback network, the amplification circuit, the output matching network, the input terminal, the output terminal and the power terminal are included. The input terminal is connected with the input terminal of the input matching network. The output terminal of the input matching network, the first output terminal of the bias network and the output terminal of the feedback network are connected with the input terminal of the amplification circuit, so as to provide the input matching, the bias path and the feedback path for the amplification circuit. The first output terminal of the amplification circuit is connected with the first input terminal of the bias network and the input terminal of the feedback network, so as to provide the DC bias for the bias network and the feedback network. The second input terminal of the amplification circuit is connected with the second output terminal of the bias network, so as to provide the AC feedback path for the bias network. The third output terminal of the amplification circuit is connected with the first input terminal of the output matching network. The second output terminal of the amplification circuit outputs the radio frequency signal. The second input terminal of the output matching network is connected with the power terminal. The output terminal of the output matching circuit is used as the output terminal of the wideband low noise amplifier with high gain flatness and high linearity.

2. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 1, wherein, The input matching network includes a first capacitor. One end of the first capacitor is connected with the input terminal of the input matching network. The other end of the first capacitor is connected with the output terminal of the input matching network.

3. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 1, wherein, The bias network includes a first resistor, a second resistor, a third resistor, a fourth resistor, a third transistor, a fourth transistor and a first inductor. One end of the first resistor is connected with the first output terminal of the bias network. The other end of the first resistor is connected with one end of the first inductor and the first input terminal of the bias network. The other end of the first inductor is connected with one end of the second resistor. The other end of the second resistor is connected with one end of the third resistor, the drain of the third transistor, the drain of the fourth transistor and the source of the fourth transistor. The other end of the third resistor is connected with the gate of the third transistor. The source of the third transistor is grounded. One end of the fourth resistor is connected with the gate of the fourth transistor. The other end of the fourth resistor is connected with the second output terminal of the bias network.

4. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 3, wherein, The feedback network includes a fifth resistor, a sixth resistor, a seventh resistor, a second capacitor, a third capacitor and a second inductor. One end of the fifth resistor is used as the output terminal of the feedback network. The other end of the fifth resistor is connected with one end of the second capacitor and one end of the second inductor. The other end of the second capacitor is connected with one end of the seventh resistor and one end of the third capacitor. The other end of the second inductor is connected with one end of the sixth resistor. The other end of the sixth resistor is connected with the other end of the third capacitor. The other end of the seventh resistor is connected with the first input terminal of the feedback network and the first output terminal of the amplification circuit.

5. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 3, wherein, The amplification circuit comprises a first transistor, a second transistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a third inductor, a fourth inductor and a fifth inductor, the gate of the first transistor is connected with an input end of the amplification circuit; the drain of the first transistor is connected with the source of the second transistor; the source of the first transistor is connected with one end of the third inductor; the other end of the third inductor is grounded; the gate of the second transistor is connected with one end of the ninth resistor, one end of the fourth capacitor and one end of the fifth capacitor; the other end of the ninth resistor is connected with one end of the eighth resistor and one end of the tenth resistor; the other end of the fourth capacitor is grounded; the other end of the fifth capacitor is connected with the drain of the second transistor, one end of the sixth capacitor and one end of the fourth inductor; the other end of the eighth resistor is grounded; the other end of the tenth resistor is connected with one end of the eleventh resistor, one end of the seventh capacitor and a first output end of the amplification circuit; the other end of the sixth capacitor is connected with a second input end of the amplification circuit; the other end of the eleventh resistor is connected with the other end of the fourth inductor and one end of the fifth inductor; the other end of the seventh capacitor is connected with the other end of the fifth inductor and a third output end of the amplification circuit.

6. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 5, wherein, The first transistor, the second transistor, the third transistor and the fourth transistor are the same type of transistors, and the type of the first transistor, the second transistor, the third transistor and the fourth transistor is one of GaAs E-pHEMT, GaN E-pHEMT and NMOS of RF CMOS.

7. The high-gain flatness, high-linearity, wideband low noise amplifier of claim 1, wherein, The output matching network comprises an eighth capacitor, a ninth capacitor and a sixth inductor, one end of the eighth capacitor is connected with one end of the sixth inductor and a first input end of the output matching circuit; the other end of the eighth capacitor is connected with an output end of the output matching network; the other end of the sixth inductor is connected with one end of the ninth capacitor and a second input end of the output matching circuit; the other end of the ninth capacitor is grounded.

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