Carrier index multi-level chaotic modulation and demodulation method based on code shift and modem

Abstract

A carrier index multi-level chaotic modulation and demodulation method and a modem based on code shift relate to the technical field of communication signal processing. The present invention transmits information through the MDCSK constellation and the carrier number, which greatly increases the data transmission rate and energy efficiency of the system. In addition, the system adopts a repetitive circuit at the transmitting end and an average processing at the receiving end, which greatly reduces the noise component in the decision variable, thereby improving the bit error performance of the system. At the same time, the present invention can also avoid the use of delay units in the receiving end and the transmitting end, effectively reducing the noise component in the decision variable at the receiving end, improving the bit error performance of the system, and obtaining a lower bit error rate.

Description

Technical Field

[0001] The invention relates to the technical field of communication signal processing, and in particular to a carrier index multi-ary chaotic modulation and demodulation method based on code shift and a modem. Background Art

[0002] Most of the existing chaotic digital modulation and demodulation methods are based on the transmission reference method, that is, both the carrier signal and the signal carrying the information are sent to the receiving end. Among them, the differential chaos shift keying (DCSK) modulation and demodulation method does not need to complete channel estimation, and can obtain good error performance. It has shown strong competitiveness in many practical applications (including wireless personal area networks, wireless sensor networks, etc.). However, in order to ensure the orthogonality between the reference signal and the information signal, DCSK transmits these two signals in different time periods, so both the transmitter and the receiver must use delay units. In ultra-wideband transmission, it is almost impossible to integrate analog delay units using existing processes, and the delay units implemented in digital mode will consume huge power.

[0003] The multi-carrier differential chaos shift keying (MC-DCSK) modulation and demodulation method uses multiple subcarriers to simultaneously transmit reference signals and multiple information signals, and uses different subcarriers to distinguish the reference signal from each information signal. Among all the subcarriers, only one subcarrier is allocated to the reference signal, and all the remaining subcarriers are allocated to the information signal, and each information signal occupies one subcarrier. Although MC-DCSK eliminates the delay unit in the transceiver, compared with the traditional binary phase shift keying (BPSK), the bit error rate of MC-DCSK is still high, and the bit error performance is not ideal. Summary of the invention

[0004] One of the purposes of the present invention is to provide a high data rate carrier index multi-ary differential chaotic keying modulation and demodulation method based on code shift to solve the problems of high bit error rate, poor bit error performance and low data rate of the existing MC-DCSK modulation and demodulation method.

[0005] In order to achieve the above object, the present invention adopts the following technical solution: a carrier index multi-level chaotic modulation and demodulation method based on code shift, at the transmitting end:

[0006] The information to be transmitted is converted into N groups of parallel information through serial-to-parallel conversion, and each group of information is divided into P index bits and 1 modulation bit, where each group of index bits is selected by the index selector 2P One of the carriers is used to transmit information bits; N modulated bits are subjected to multi-level differential chaotic keying modulation after passing through a bit-to-symbol converter: a chaotic signal is generated by a chaotic generator and repeated T times, a signal obtained by multiplying one Walsh sequence with the chaotic signal is selected as a reference signal, and another 2N different Walsh sequences are multiplied with the chaotic signal and input into a multi-level DCSK modulator, in which an odd-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the real part of the multi-level constellation symbol, and an even-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the imaginary part of the multi-level constellation symbol, to obtain N multi-level DCSK modulated signals respectively; the N multi-level DCSK modulated signals are multiplied with the mapped index bit, and then added with the reference signal and sent to the channel;

[0007] On the receiving end:

[0008] After multi-carrier demodulation, the reference signal and 2N information signals are restored respectively; the averaged reference signal sequence is obtained, and correlated demodulated with the 2N information signal sequences respectively, and then the index bit and modulation bit are restored after energy comparator and multi-base DCSK demodulation, and finally the original information is output after parallel-to-serial conversion.

[0009] Specifically, at the transmitting end, signal modulation includes the following steps:

[0010] 1) Perform serial-to-parallel conversion on the input information signal and divide it into N groups of information, each group of information includes two parts: P-bit index bits and 1-bit modulation bit;

[0011] 2) Pass N groups of index bits through the mapping selector, from 2 P Select one carrier from among the carriers for transmission;

[0012] 3) Pass N groups of modulated bits through the bit symbol converter to obtain the constellation symbol s of each group of modulated bits m,i =a m,i +ib m,i ;

[0013] 4) Generate a Logistic chaotic signal of length θ and repeat it T times;

[0014] 5) Generate a 512*512 Hadamard matrix and select each row as a Walsh code;

[0015] 6) Combine the chaotic signal x with the first Walsh sequence W r Perform Kronecker product multiplication to obtain the reference signal And multiply it with the carrier f0;

[0016] 7) Combine the chaotic signal x with the 2m-1th Walsh sequence W 2m-1 Multiplying the Kronecker product, we get Chaotic signal x and the 2mth Walsh sequence W 2m Multiplying the Kronecker product, we get

[0017] 8) Set the mth constellation symbol s m,i =a m,i +ib m,i The real and imaginary parts of and Multiply to realize code-shifted multi-base DCSK signal;

[0018] 9) Multiply the N groups of code-shifted multi-ary DCSK signals by the result of step 2 and then add them to the reference signal of step 6 to obtain the transmission signal of the transmitting end:

[0019]

[0020] Further, at the receiving end, signal demodulation includes the following steps:

[0021] 10) Receive the signal sent in step 9) and compare it with 2 P +1 synchronized carrier waves are multiplied separately to obtain n product signals;

[0022] 11) The 2 obtained in step 10) P +1 product signals are matched filtered respectively, and the filtered 2 P +1 channel multiplication signal is sampled in the time domain, and each sampled signal is passed through matrix B and matrix A to obtain 1 channel reference signal and 2N channel information signals;

[0023] 12) multiplying the 2N+1 signals obtained in step 11) by their corresponding Walsh sequences respectively, and averaging the obtained results;

[0024] 13) Correlating the averaged reference signal sequence obtained in step 12) with the 2N information signal sequences obtained in step 11) respectively to obtain 2N correlation values;

[0025] 14) The real parts and imaginary parts of the 2N correlation values ​​obtained in step 13) are combined respectively, and then passed through N energy comparators respectively to obtain the element with the largest absolute value, so that the index bit can be demodulated;

[0026] 15) combining the real part and the imaginary part of the 2N correlation values ​​obtained in step 15), respectively, and then passing through N energy comparators, and then passing through a code shift multi-ary DCSK demodulator, and then through a sign bit conversion to restore the modulated bits;

[0027] 16) Combining the index bit obtained in step 14) and the modulation bit obtained in step 15) and performing parallel-to-serial conversion to restore the original information signal.

[0028] In addition, the present invention also provides a carrier index multi-level chaotic modem based on code shift, including a modulator and a demodulator, which adopts the above method to modulate and demodulate information.

[0029] In one embodiment of the present invention, the modulator modulates the input information signal according to the method of steps 1) to 9) above.

[0030] Furthermore, the demodulator demodulates the received signal according to the method of steps 10) to 16) above.

[0031] In one embodiment of the present invention, the modulator includes a chaotic signal generator, a pulse shaping filter, a serial-to-parallel conversion circuit, a repetition circuit, N index selectors, N*2 P Carrier multipliers, N carrier adders, N+1 modulation multipliers, 2N+1 Walsh sequence multipliers, N code shift multi-ary modulators;

[0032] The chaotic signal generator is used to generate a discrete chaotic signal sequence, which is subjected to pulse shaping filtering by a pulse shaping filter to obtain a DCSK reference signal within the current symbol period; the pulse shaping filter is used to perform pulse shaping filtering to obtain a reference signal within the current symbol period; the serial-to-parallel conversion circuit is used to convert the serial data bits to be transmitted within the current symbol time into parallel data bits; the repetition circuit is used to repeat the chaotic signal to reduce noise interference; the N index selectors are used to select a carrier for signal transmission according to the index bit; the N*2 P The carrier multipliers are used to multiply the carrier modulation coefficient with the carrier to realize carrier index modulation; the N carrier adders are used to add the signals multiplied with the carrier; the N+1 modulation multipliers are used to multiply the carrier index modulation signal with the code-shifted multi-base DCSK signal; the 2N+1 Walsh sequence multipliers are used to multiply the chaotic signal with 2N+1 Walsh sequences; and the N code-shifted multi-base modulators are used to realize code-shifted multi-base DCSK modulation.

[0033] Wherein, the demodulator comprises 2 P +1 carrier multiplier, 2 P +1 matched filter, 2 P +1 sampling switch, 2N+1 decoding shift circuits, 2N correlators, N energy comparators, N multi-level threshold decision devices, N sign bit conversion circuits and parallel-to-serial conversion circuits;

[0034] 2 P +1 carrier multiplier utilizing 2 P +1 synchronized subcarriers are multiplied by the received signal to obtain 2 P +1 product signal; 2 P +1 matched filter pair 2 P +1 product signals are matched filtered respectively; the 2 P +1 sampling switch for matched filtered 2 P +1 product signal is sampled in the time domain to recover 1 discrete reference signal sequence and 2 P The 2N+1 decoding shift circuits multiply the sampling results with the Walsh code and then add them; the 2N correlators respectively correlate the recovered reference signals with the output signals of the decoding shift circuits; the N energy comparators compare the energies of the N signals respectively, thereby demodulating the index bits; the N multi-base threshold decision devices output the element with the maximum absolute value; the N sign bit conversion circuits convert the symbols into modulation bits for output; the parallel-to-serial conversion circuit combines the obtained N index bits and modulation bits respectively, and then merges them into 1 serial demodulation data bit and outputs it.

[0035] In the code shift-based carrier index multi-level chaotic modulation and demodulation method and modem provided by the present invention, information is transmitted through the MDCSK constellation and the carrier number, which greatly increases the data transmission rate and energy efficiency of the system. In addition, the system adopts a repetitive circuit at the transmitting end and an average processing at the receiving end, which greatly reduces the noise component in the decision variable, thereby improving the bit error performance of the system. At the same time, the present invention can avoid using a delay unit in the receiving end and the transmitting end, effectively reducing the noise component in the decision variable at the receiving end, improving the bit error performance of the system, and obtaining a lower bit error rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a flowchart of the modulation and demodulation method involved in the embodiment.

[0037] Figure 2 Schematic diagram of the structure of the modulator in the embodiment.

[0038] Figure 3 FIG. 4 is a schematic diagram of the structure of a demodulator in an embodiment.

[0039] Figure 4 The figure is a comparison diagram of the bit error performance of the modulation and demodulation method involved in the embodiment and the existing MCS-MDCSK method in an additive white Gaussian noise channel. DETAILED DESCRIPTION

[0040] To facilitate understanding by those skilled in the art, the present invention is further described below in conjunction with embodiments and drawings.

[0041] In general, the present invention converts the information to be transmitted into N groups of parallel information through serial-to-parallel conversion, and divides each group of information into P index bits and 1 modulation bit, wherein each group of index bits is selected by an index selector 2 P One of the carriers is used to transmit information bits; N modulated bits are subjected to multi-level differential chaotic keying modulation after passing through a bit-to-symbol converter. The multi-level differential chaotic keying modulation is implemented using code shift technology: a chaotic signal is generated by a chaotic generator and repeated T times, a signal obtained by multiplying one Walsh sequence with the chaotic signal is selected as a reference signal, and another 2N different Walsh sequences are multiplied with the chaotic signal and input into a multi-level DCSK modulator. In the multi-level DCSK modulator, the odd-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the real part of the multi-level constellation symbol, and the even-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the imaginary part of the multi-level constellation symbol, so as to obtain N multi-level DCSK modulated signals respectively; the N multi-level DCSK modulated signals are multiplied with the mapped index bit, added with the reference signal, and sent to the channel. At the receiving end, after multi-carrier demodulation, the reference signal and 2N information signals are restored respectively; the averaged reference signal sequence is obtained, and correlated demodulated with the 2N information signal sequences respectively, and then the index bit and modulation bit are restored after energy comparator and multi-base DCSK demodulation, and finally the original information is output after parallel-to-serial conversion.

[0042] Figure 1 The specific process of high data rate carrier index multi-ary differential chaotic keying modulation and demodulation based on code shift is shown, including the following steps:

[0043] On the sending side:

[0044] Step 1: Perform serial-to-parallel conversion on the input information signal and divide it into N groups of information, each group of information includes two parts: P-bit index bits and 1-bit modulation bit;

[0045] Step 2: Pass N groups of index bits through the mapping selector, from 2 P Select one carrier from among the carriers for transmission;

[0046] Step 3: Pass N groups of modulated bits through the bit-to-symbol converter to obtain the constellation symbol s for each group of modulated bits m,i =a m,i +ib m,i ;

[0047] Step 4: Generate a Logistic chaotic signal of length θ and repeat it T times;

[0048] Step 5: Generate a 512*512 Hadamard matrix and select each row as the Walsh code;

[0049] Step 6: Chaotic signal x and the first Walsh sequence W r Perform Kronecker product multiplication to obtain the reference signal And multiply it with the carrier f0;

[0050] Step 7: Chaotic signal x and the 2m-1th Walsh sequence W 2m-1 Multiplying the Kronecker product, we get Chaotic signal x and the 2mth Walsh sequence W 2m Multiplying the Kronecker product, we get

[0051] Step 8: mth constellation symbol s m,i =a m,i +ib m,i The real and imaginary parts of and Multiply to realize code-shifted multi-base DCSK signal;

[0052] Step 9: Multiply the N-group code-shifted multi-binary DCSK signal by the result of step 2 and then add it to the reference signal of step 6 to obtain the transmission signal of the transmitter:

[0053]

[0054] On the receiving end:

[0055] Step 10: Receive the signal sent in step 9 and compare it with 2 P +1 synchronized carrier waves are multiplied separately to obtain n product signals;

[0056] Step 11: Add the result from step 10 to 2 P +1 product signals are matched filtered respectively, and the filtered 2 P +1 channel multiplication signal is sampled in the time domain, and each sampled signal is passed through matrix B and matrix A to obtain 1 channel reference signal and 2N channel information signals;

[0057] Step 12: Multiply the 2N+1 signals obtained in step 11 by their corresponding Walsh sequences respectively, and average the obtained results;

[0058] Step 13: Correlate the averaged reference signal sequence obtained in step 12 with the 2N information signal sequences obtained in step 12 to obtain 2N correlation values;

[0059] Step 14: The real parts and imaginary parts of the 2N correlation values ​​obtained in step 13 are combined respectively, and then passed through N energy comparators respectively to obtain the element with the largest absolute value, so that the index bit can be demodulated;

[0060] Step 15: The real parts and imaginary parts of the 2N correlation values ​​obtained in step 13 are combined respectively, and then passed through N energy comparators respectively, and then through a code shift multi-ary DCSK demodulator, and then through a sign bit conversion to restore the modulated bits;

[0061] Step 16: Combine the index bit obtained in step 14 and the modulation bit obtained in step 15 and then perform parallel-to-serial conversion to restore the original information signal.

[0062] Based on the same technical concept as the above modulation and demodulation method, the present invention also proposes a high data rate carrier index multi-level differential chaotic keying modem based on code shift, which can modulate and demodulate the signal using the above method. Specifically, a certain number of subcarriers are allocated for the transmission of the index bit signal through the modulator, and the modulated bit is modulated by the multi-level code shift and then multiplied by the modulated index bit. The demodulator uses an energy comparator, a threshold decision device, etc. to achieve demodulation.

[0063] Figure 2 The specific structure of the modulator in the modem is shown. Generally speaking, it mainly includes: a chaotic signal generator, a pulse shaping filter, a serial-to-parallel conversion circuit, a repetition circuit, N index selectors, N*2 P Carrier multipliers, N carrier adders, N+1 modulation multipliers, 2N+1 Walsh sequence multipliers, and N code shift multi-level modulators. Secondly, the chaotic signal generator generates a discrete chaotic signal sequence, which is pulse-shaped filtered by a pulse shaping filter to obtain a DCSK reference signal within the current symbol period; the pulse shaping filter is a pulse shaping filter to obtain a reference signal within the current symbol period; the serial-to-parallel conversion circuit converts the serial data bits to be transmitted within the current symbol time into parallel data bits; the repetition circuit repeats the chaotic signal to reduce noise interference; the N index selectors select a carrier pair signal for transmission based on the index bit; N*2 P The carrier multipliers multiply the carrier modulation coefficient with the carrier to realize carrier index modulation; the N carrier adders add the signals multiplied by the carrier; the N+1 modulation multipliers multiply the carrier index modulation signal with the code-shifted multi-base DCSK signal; the 2N+1 Walsh sequence multipliers multiply the chaotic signal with 2N+1 Walsh sequences; and the N code-shifted multi-base modulators realize code-shifted multi-base DCSK modulation.

[0064] Figure 3 The structure of the demodulator in the modem is shown, which specifically includes 2P +1 carrier multiplier, 2 P +1 matched filter, 2 P +1 sampling switch, 2N+1 decoding shift circuits, 2N correlators, N energy comparators, N multi-level threshold decision devices, N sign bit conversion circuits and parallel-to-serial conversion circuits; the 2 P +1 carrier multiplier utilizing 2 P +1 synchronized subcarriers are multiplied by the received signal to obtain 2 P +1 product signal. P +1 matched filter pair 2 P +1 product signals are matched filtered separately; 2 P +1 sampling switch for matched filtered 2 P +1 product signal is sampled in the time domain to recover 1 discrete reference signal sequence and 2 P The invention discloses a method for obtaining a discrete information signal sequence of N paths; 2N+1 decoding shift circuits multiply the sampling results with the Walsh code and then add the results; 2N correlators respectively correlate the recovered reference signal with the output signal of the decoding shift circuit; N energy comparators compare the energy of the N paths of signals respectively, so as to demodulate the index bit; N multi-base threshold decision devices output the element with the maximum absolute value; the N sign bit conversion circuits convert the sign into a modulation bit output; the parallel-to-serial conversion circuit combines the obtained N paths of index bits and modulation bits respectively, and then merges them into one path of serial demodulation data bits and outputs them.

[0065] In order to verify the specific performance of the above-mentioned code shift-based high data rate carrier index multi-ary differential chaotic keying modulation and demodulation method in reducing the bit error rate, a specific example is used for verification and explanation below.

[0066] At the transmitting end, the signal is modulated by high data rate carrier index multi-ary differential chaotic keying based on code shift. The specific process is as follows:

[0067] Step 1: Select the bit signal-to-noise ratio E in the channel b When / N0=10dB, the length of the discrete chaotic signal sequence θ within one symbol time is 10, and the number of available carriers is 2 P +1=9, N=800, P=3.

[0068] Step 2: Within one symbol period [0, Tb], the chaotic signal generator outputs a discrete chaotic signal sequence {x1, x2, ..., x 16} and repeat 5 times.

[0069] Step 3: Pass the discrete chaotic signal sequence generated in step 2 through a square raised cosine roll-off filter, whose time domain impulse response is h(t), to complete the pulse shaping filter and obtain the reference signal in the current symbol period:

[0070]

[0071] Where, t represents time; T c Indicates chip time.

[0072] Step 4: Use the serial-to-parallel conversion circuit to convert the 3200 serial data bits to be transmitted in the current symbol period into 800 parallel low-speed data bits. Each group of information includes two parts: 3 index bits and 1 modulation bit;

[0073] Step 5: Pass 800 groups of index bits through the mapping selector at the same time, and each selects a carrier from the 8 carriers for transmission;

[0074] Step 6: Pass the 800 groups of modulated bits through the bit-to-symbol converter to obtain the constellation symbol s for each group of modulated bits. m,i =a m,i +ib m,i ;

[0075] Step 7: Generate a 512*512 Hadamard matrix and select each row as the Walsh code;

[0076] Step 8: Chaotic signal x and the first Walsh sequence W r Perform Kronecker product multiplication to obtain the reference signal And multiply it with the carrier f0;

[0077] Step 9: Chaotic signal x and the 2m-1th Walsh sequence W 2m-1 Multiplying the Kronecker product, we get Chaotic signal x and the 2mth Walsh sequence W 2m Multiplying the Kronecker product, we get

[0078] Step 10: mth constellation symbol s m,i =a m,i +ib m,i The real and imaginary parts of and Multiply to realize code-shifted multi-base DCSK signal;

[0079] Step 11: The 800-code-shifted multi-binary DCSK signal is multiplied by the result of step 5 and then added to the reference signal of step 8 to obtain the transmit signal of the transmitter and send it to the demodulator:

[0080]

[0081] At the receiving end, the specific process of signal demodulation is as follows:

[0082] Step 12: Receive the signal sent in step 11, and multiply it with 9 synchronized carriers respectively to obtain n product signals;

[0083] Step 13: Perform matched filtering on the 9 product signals obtained in step 10, perform time domain sampling on the filtered 9 product signals, and obtain 1 reference signal and 1600 information signals by passing each sampled signal through matrix B and matrix A respectively;

[0084] Step 14: Multiply the 1600+1 signals obtained in step 13 by their corresponding Walsh sequences respectively, and average the obtained results;

[0085] Step 15: Correlate the averaged reference signal sequence obtained in step 14 with the 1600 information signal sequences obtained in step 12 to obtain 1600 correlation values;

[0086] Step 16: The real and imaginary parts of the 1600 correlation values ​​obtained in step 15 are combined, and then passed through 800 energy comparators to obtain the element with the largest absolute value, so that the index bit can be demodulated;

[0087] Step 17: The real and imaginary parts of the 1600 correlation values ​​obtained in step 16 are combined, respectively, and then passed through 800 energy comparators, and then through a code shift multi-base DCSK demodulator, and then through a sign bit conversion to restore the modulated bits;

[0088] Step 18: Combine the index bit obtained in step 17 and the modulation bit obtained in step 16 and then perform parallel-to-serial conversion to restore the original information signal.

[0089] The present invention uses computer simulation to test the code shift-based high data rate carrier index multi-ary differential chaotic keying modulation and demodulation method provided by the present invention. In the experiment, the number of transmitted data bits is 3200, and the discrete chaotic signal sequence is mapped by Logistic The chaotic signal sampling frequency is 1MHz, the symbol duration T=16μs, the equivalent number of signal sampling points in each symbol time is 16, the square raised cosine roll-off filter roll-off coefficient α=0.25, and the center frequency interval of all subcarriers satisfies Δf=1.25MHz.

[0090] Figure 4is the bit error rate of the above verification example simulated in the additive white Gaussian noise channel. As a comparison, the figure also shows the bit error rate of the existing MCS-MDCSK method simulated under the same conditions. It can be seen from the figure that compared with the existing MCS-MDCSK method, the method of the present invention greatly reduces the bit error rate and shows better bit error performance.

[0091] In summary, the present invention can greatly reduce the noise component in the decision variable, thereby significantly improving the bit error performance of the system. At the same time, the method described in the present invention can avoid using a delay unit in the receiving end and the transmitting end, effectively reducing the noise component in the decision variable of the receiving end, improving the bit error performance of the system, and obtaining a lower bit error rate.

[0092] The above embodiments are preferred implementation schemes of the present invention. In addition, the present invention may also be implemented in other ways. Any obvious replacement without departing from the concept of the present technical solution is within the protection scope of the present invention.

[0093] In order to make it easier for ordinary technicians in the field to understand the improvements of the present invention over the prior art, some drawings and descriptions of the present invention have been simplified, and for the sake of clarity, some other elements are omitted in this application document. Ordinary technicians in the field should realize that these omitted elements may also constitute the content of the present invention.

Claims

1. A carrier index multi-level chaotic modulation and demodulation method based on code shift, characterized in that: On the sending side: The information to be transmitted is converted into N groups of parallel information through serial-to-parallel conversion, and each group of information is divided into P index bits and 1 modulation bit, where each group of index bits is selected by the index selector 2 P One of the carriers is used to transmit information bits; N modulated bits are subjected to multi-level differential chaotic keying modulation after passing through a bit-to-symbol converter: a chaotic signal is generated by a chaotic generator and repeated T times, a signal obtained by multiplying one Walsh sequence with the chaotic signal is selected as a reference signal, and another 2N different Walsh sequences are multiplied with the chaotic signal and input into a multi-level DCSK modulator, in which an odd-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the real part of the multi-level constellation symbol, and an even-numbered Walsh sequence is multiplied with the chaotic signal and then multiplied with the imaginary part of the multi-level constellation symbol, to obtain N multi-level DCSK modulated signals respectively; the N multi-level DCSK modulated signals are multiplied with the mapped index bit, and then added with the reference signal and sent to the channel; The specific process of signal modulation includes the following steps: 1) Perform serial-to-parallel conversion on the input information signal and divide it into N groups of information, each group of information includes two parts: P-bit index bits and 1-bit modulation bit; 2) Pass N groups of index bits through the mapping selector, from 2 P Select one carrier from among the carriers for transmission; 3) Pass N groups of modulated bits through the bit symbol converter to obtain the constellation symbol s of each group of modulated bits m,i =a m,i +ib m,i ; 4) Generate a Logistic chaotic signal of length θ and repeat it T times; 5) Generate a 512*512 Hadamard matrix and select each row as a Walsh code; 6) Combine the chaotic signal x with the first Walsh sequence W r Perform Kronecker product multiplication to obtain the reference signal And multiply it with the carrier f0; 7) Combine the chaotic signal x with the 2m-1th Walsh sequence W 2m-1 Multiplying the Kronecker product, we get Chaotic signal x and the 2mth Walsh sequence W 2m Multiplying the Kronecker product, we get 8) Set the mth constellation symbol s m,i =a m,i +ib m,i The real and imaginary parts of and Multiply to realize code-shifted multi-base DCSK signal; 9) Multiply the N groups of code-shifted multi-ary DCSK signals by the result of step 2 and then add them to the reference signal of step 6 to obtain the transmission signal of the transmitting end: On the receiving end: After multi-carrier demodulation, the reference signal and 2N information signals are restored respectively; the averaged reference signal sequence is obtained, and correlated demodulated with the 2N information signal sequences respectively, and then the index bit and modulation bit are restored after energy comparator and multi-base DCSK demodulation, and finally the original information is output after parallel-to-serial conversion.

2. The carrier index multi-level chaotic modulation and demodulation method based on code shift as claimed in claim 1, characterized in that: At the receiving end, signal demodulation includes the following steps: 10) Receive the signal sent in step 9) and compare it with 2 P +1 synchronized carrier waves are multiplied separately to obtain n product signals; 11) The 2 obtained in step 10) P +1 product signals are matched filtered respectively, and the filtered 2 P +1 channel multiplication signal is sampled in the time domain, and each sampled signal is passed through matrix B and matrix A to obtain 1 channel reference signal and 2N channel information signals; 12) multiplying the 2N+1 signals obtained in step 11) by their corresponding Walsh sequences respectively, and averaging the obtained results; 13) Correlating the averaged reference signal sequence obtained in step 12) with the 2N information signal sequences obtained in step 11) respectively to obtain 2N correlation values; 14) The real parts and imaginary parts of the 2N correlation values ​​obtained in step 13) are combined respectively, and then passed through N energy comparators respectively to obtain the element with the largest absolute value, so that the index bit can be demodulated; 15) combining the real part and the imaginary part of the 2N correlation values ​​obtained in step 15), respectively, and then passing through N energy comparators, and then passing through a code shift multi-ary DCSK demodulator, and then through a sign bit conversion to restore the modulated bits; 16) Combining the index bit obtained in step 14) and the modulation bit obtained in step 15) and performing parallel-to-serial conversion to restore the original information signal.

3. A carrier indexed multi-ary chaotic modem based on code shift, including a modulator and a demodulator, including a modulator and a demodulator, characterized in that: The method of claim 1 is used to modulate and demodulate the signal.

4. The carrier indexed multi-level chaotic modem based on code shift as claimed in claim 3, characterized in that: The demodulator demodulates the received signal according to the method of steps 10) to 16) in claim 2.

5. The carrier indexed multi-level chaotic modem based on code shift as claimed in claim 3 or 4, characterized in that: The modulator includes a chaotic signal generator, a pulse shaping filter, a serial-to-parallel conversion circuit, a repetition circuit, N index selectors, N*2 P Carrier multipliers, N carrier adders, N+1 modulation multipliers, 2N+1 Walsh sequence multipliers, N code shift multi-ary modulators; The chaotic signal generator is used to generate a discrete chaotic signal sequence, which is subjected to pulse shaping filtering by a pulse shaping filter to obtain a DCSK reference signal within the current symbol period; the pulse shaping filter is used to perform pulse shaping filtering to obtain a reference signal within the current symbol period; the serial-to-parallel conversion circuit is used to convert the serial data bits to be transmitted within the current symbol time into parallel data bits; the repetition circuit is used to repeat the chaotic signal to reduce noise interference; the N index selectors are used to select a carrier for signal transmission according to the index bit; the N*2 P The carrier multipliers are used to multiply the carrier modulation coefficient with the carrier to realize carrier index modulation; the N carrier adders are used to add the signals multiplied with the carrier; the N+1 modulation multipliers are used to multiply the carrier index modulation signal with the code-shifted multi-base DCSK signal; the 2N+1 Walsh sequence multipliers are used to multiply the chaotic signal with 2N+1 Walsh sequences; and the N code-shifted multi-base modulators are used to realize code-shifted multi-base DCSK modulation.

6. The carrier indexed multi-level chaotic modem based on code shift as claimed in claim 5, characterized in that: The demodulator comprises 2 P +1 carrier multiplier, 2 P +1 matched filter, 2 P +1 sampling switch, 2N+1 decoding shift circuits, 2N correlators, N energy comparators, N multi-level threshold decision devices, N sign bit conversion circuits and parallel-to-serial conversion circuits; 2 P +1 carrier multiplier utilizing 2 P +1 synchronized subcarriers are multiplied by the received signal to obtain 2 P +1 product signal; 2 P +1 matched filter pair 2 P +1 product signals are matched filtered respectively; the 2 P +1 sampling switch for matched filtered 2 P +1 product signal is sampled in the time domain to recover 1 discrete reference signal sequence and 2 P The 2N+1 decoding shift circuits multiply the sampling results with the Walsh code and then add them; the 2N correlators respectively correlate the recovered reference signals with the output signals of the decoding shift circuits; the N energy comparators compare the energies of the N signals respectively, thereby demodulating the index bits; the N multi-base threshold decision devices output the element with the maximum absolute value; the N sign bit conversion circuits convert the symbols into modulation bits for output; the parallel-to-serial conversion circuit combines the obtained N index bits and modulation bits respectively, and then merges them into 1 serial demodulation data bit and outputs it.

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