A safe earphone amplifier based on high-speed sampling technology

Abstract

The application provides a safe earphone amplifier based on high-speed sampling technology, two DSP chips are arranged, the first DSP chip works at 100 kHz, keeps a certain difference frequency with an audio signal, and an ultrahigh frequency DSP chip works at audio signal frequency multiplication, and the result output by the first DSP is corrected, so that the noise of the device itself can be effectively collected and the cooperativity of control is ensured, and the first DSP chip can have good processing speed when controlling, the application adopts high-speed sampling and signal processing loop, improves the bias following problem, and effectively protects the circuit from being damaged.

Description

Technical Field

[0001] This invention relates to the field of audio amplifiers, and more specifically to a safe headphone amplifier based on high-speed sampling technology. Background Technology

[0002] A power amplifier is an amplifier that can produce maximum power output to drive a load (such as a loudspeaker) under a given distortion rate. The power amplifier plays a pivotal role in the entire audio system, acting as a "coordinator" and, to a certain extent, determining whether the entire system can provide good sound quality.

[0003] For example, application number CN201910096690.8 discloses a digital power amplifier system, including a first branch and a second branch. The first branch includes a first switching structure and a first current source connected in series. The first current source includes a fourth resistor, a first field-effect transistor, a second field-effect transistor, and a second operational amplifier. The second branch includes a second switching structure and a second current source connected in series. The second current source includes a fifth resistor, a third field-effect transistor, a fourth field-effect transistor, and a third operational amplifier. When applied to a digital power amplifier system, this increases the equivalent output impedance of the digital-to-analog converter and reduces the power supply rejection ratio of the digital power amplifier system. Traditional power amplifiers use analog bias, which has large dispersion and poor bias tracking.

[0004] Our company has previously developed a headphone amplifier that uses a DSP-acquired signal matched with a pre-established power amplifier stage bias model in 5ms increments to detect overload trends and whether the power amplifier is about to exceed the bias linearity range. This determines whether to adjust the power amplifier bias. If there is a strong overload trend (short circuit), the final stage of the power amplifier is shut down in time. For the bias leading region (Class A region), a certain degree of overfit compensation is applied to ensure that the power amplifier stage always stays in the high linearity region, while reducing the fixed bias current, reducing power consumption, and protecting the equipment.

[0005] However, currently, the sampling rate of audio formats is generally 44.1kHz, 48kHz, or 96kHz. Since amplifiers generally operate in analog signal mode, the noise of the device itself will not be the same as the sampling rate of the audio format. Directly using the same DSP sampling rate as the audio format will result in the effective collection of noise generated by the device itself. Using other frequencies will lead to reduced control synchronization. In addition, if ultra-high frequency DSPs are used for control, the large amount of computation will result in high control delay. Summary of the Invention

[0006] To address the aforementioned issues, this invention provides a safety headphone amplifier based on high-speed sampling technology, comprising: an input terminal, a bias power amplifier module, and an output terminal; it also includes an information acquisition module, a frequency doubling sampling module, an ultra-high frequency DSP, a current sampling module, an analog-to-digital conversion module, a first digital signal processor / DSP, a digital-to-analog converter, a low-pass filter, a current-to-voltage converter, and a current-to-voltage control module.

[0007] The bias power amplifier module is connected to the input and output terminals respectively. The input terminal is used to input signals, which are amplified by the bias amplifier and then output through the output terminal.

[0008] The information acquisition module is used to acquire the data format of the audio being played, including the audio sampling rate, through the input terminal; and send the sampling rate to the frequency doubling sampling module;

[0009] The frequency doubling sampling module performs frequency doubling sampling from the output terminal based on the audio sampling rate, with the frequency doubling factor k; the frequency doubling sampling module sends the frequency doubling samples to the ultra-high frequency DSP; the ultra-high frequency DSP processes the frequency doubling samples to obtain voltage correction data, and the voltage correction data is input to the first DSP;

[0010] The current sampling module is connected to the bias power amplifier module and is used to replicate the proportional current of the output stage of the bias power amplifier module. The replicated current is then converted into a digital signal by the analog-to-digital converter module and input to the first DSP.

[0011] The signal output from the analog-to-digital converter is input into the power amplifier bias model in the first DSP for calculation. The first DSP combines the voltage correction data to output voltage control data.

[0012] After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal.

[0013] The signal acquired by the DSP is model matched with the pre-established power amplifier bias model in 5ms increments; the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kHz.

[0014] The sampling rate of the audio acquired by the information acquisition module is the sampling rate of the audio file being played or the sampling rate of the audio track of the video file being played; the sampling rate is 44.1kHz, 48kHz or 96kHz; the octave factor k is 2, 4, 8 or 16;

[0015] The frequency doubling sampling module collects ultra-high frequency data and sends it to the ultra-high frequency DSP; the ultra-high frequency DSP performs real-time fast Fourier transform on the input data to obtain the spectrum curve of the ultra-high frequency data and calculates the total energy E of the spectrum curve;

[0016] The UHF DSP compares the total energy E with the energy threshold E0 and calculates V. k =A〃(E-E0); where A is a coefficient and less than 0, V k This is voltage correction data; since the UHF DSP converts signals in real time, E and V... k These are all quantities that change over time.

[0017] The power amplifier bias model consists of two parts. The first part is the overload identification model, which is used to detect whether there is an overload trend and perform corresponding control. The second part is the compensation model, which is used to detect whether the power amplifier is about to exceed the bias linear range and apply corresponding control.

[0018] The working process of the overload recognition model is as follows:

[0019] The digital signal input to the first DSP is transformed from the time domain to the frequency domain at fixed time intervals. The transformation method is Fourier transform or wavelet transform. The frequency domain signal is calculated in real time, and the waveform energy is compared with the energy threshold. If the waveform energy exceeds the energy threshold, the first DSP controls the power amplifier's final stage to shut down.

[0020] The energy threshold is a curve that varies with frequency, that is, the energy threshold G is a function G(f), where f represents the frequency of the signal; the waveform energy calculated in real time is also a curve that varies with frequency. The energy of signals at different frequencies is different, and the waveform energy H is a function H(f).

[0021] Calculate Y(f) = H(f) - G(f). When any value of Y(f) < 0 occurs, the first DSP controls the shutdown of the final stage of the power amplifier.

[0022] The working process of the compensation model is as follows:

[0023] The digital signal input to the first DSP undergoes time-domain to frequency-domain transformation at fixed time intervals, using either Fourier transform or wavelet transform. The first DSP then extracts features from the frequency-domain signal, including the strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W max The sum of energy values ​​M in the characteristic frequency range; where the characteristic frequency range is a pre-set frequency range.

[0024] The first DSP will display the frequency domain signal graph and the strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W maxThe sum of energy values ​​M in the characteristic frequency band is used as a parameter input into the neural network model to obtain the voltage V0.

[0025] V0 is a quantity that changes over time. The first DSP calculates V = V0 + V k V represents the voltage control data;

[0026] After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal.

[0027] When the total energy E of the spectrum curve exceeds E0, V k The value is negative, which reduces the bias voltage, further reducing the distortion of the bias power amplifier module; when the total energy E is less than E0, V k The value is positive, which causes the adjustment voltage bias to increase, ensuring the power amplifier module works effectively.

[0028] The current sampling module includes a circuit that performs current-to-voltage conversion and low-pass filtering simultaneously. It converts the current signal into a voltage signal and performs low-pass filtering at the same time. The purpose of low-pass filtering is to remove out-of-band interference.

[0029] The bias power amplifier module includes two resistors R3 and R4 connected in series, an NPN transistor Q6 and a PNP transistor Q4; the bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to drive the output; the emitters of the NPN transistor Q6 and the PNP transistor Q4 are connected between two resistors in series, and the output is located between the two resistors in series.

[0030] The collector of NPN transistor Q6 is connected to vcc, and the base of PNP transistor Q4 is connected to vee.

[0031] The first DSP chip uses the TMS320C6713B series from Texas Instruments.

[0032] The ultra-high frequency DSP chip has a maximum clock frequency of 300MHz.

[0033] The beneficial effects of this invention are as follows:

[0034] This invention employs two DSP chips. The first DSP chip operates at 100kHz, maintaining a certain frequency difference with the audio signal. The ultra-high frequency DSP chip operates at a frequency multiple of the audio signal, correcting the output of the first DSP. This ensures that the device's own noise can be effectively collected, guaranteeing control coordination, and also ensuring that the first DSP chip has good processing speed during control. This invention uses a high-speed sampling and signal processing loop to improve the bias tracking problem while effectively protecting the circuit from damage.

[0035] This invention addresses the time-domain to frequency-domain transformation of the input signal within a DSP. It compares the waveform energy in the frequency domain with an energy threshold; if the waveform energy exceeds the energy threshold, the DSP controls the shutdown of the final stage of the power amplifier. The invention also includes the waveform of the frequency domain signal and its strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W max Using the sum of energy values ​​M in the characteristic frequency band as input and the corresponding voltage control data as output, a neural network model is constructed, which greatly improves the speed and accuracy of data processing, improves the bias tracking problem, and effectively protects the circuit. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Appendix Figure 1 This is a schematic diagram of the overall architecture of the present invention;

[0038] Appendix Figure 2 This is a structural diagram of a portion of the circuit of the present invention.

[0039] Where Q represents a transistor and R represents a resistor; Q4, Q6 and R3, R4 form the output stage of the power amplifier; Q1, Q2, Q3, Q5, Q7, Q8, R1, R2, R5, R6 and R8 constitute the proportional current replicator of the power output stage; R7, OP-1 complete the current-to-voltage conversion, and C1 and R7 form a low-pass filter to remove out-of-band interference. Detailed Implementation

[0040] Example 1:

[0041] See Figure 1The present invention provides a safety headphone amplifier based on high-speed sampling technology, comprising: an input terminal, a bias power amplifier module, and an output terminal; and further comprising an information acquisition module, a frequency doubling sampling module, an ultra-high frequency DSP, a current sampling module, an analog-to-digital conversion module, a first digital signal processor / DSP, a digital-to-analog converter, a low-pass filter, a current-to-voltage converter, and a current-to-voltage control module;

[0042] The bias power amplifier module is connected to the input and output terminals respectively. The input terminal is used to input signals, which are amplified by the bias amplifier and then output through the output terminal.

[0043] The information acquisition module is used to acquire the data format of the audio being played, including the audio sampling rate, through the input terminal; and send the sampling rate to the frequency doubling sampling module;

[0044] The frequency doubling sampling module performs frequency doubling sampling from the output terminal based on the audio sampling rate, with the frequency doubling factor k; the frequency doubling sampling module sends the frequency doubling samples to the ultra-high frequency DSP; the ultra-high frequency DSP processes the frequency doubling samples to obtain voltage correction data, and the voltage correction data is input to the first DSP;

[0045] The current sampling module is connected to the bias power amplifier module and is used to replicate the proportional current of the output stage of the bias power amplifier module. The replicated current is then converted into a digital signal by the analog-to-digital converter module and input to the first DSP.

[0046] The signal output from the analog-to-digital converter is input into the power amplifier bias model in the first DSP for calculation. The first DSP combines the voltage correction data to output voltage control data.

[0047] After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal.

[0048] The signal acquired by the DSP is model matched with the pre-established power amplifier bias model in 5ms increments; the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100kHz.

[0049] The sampling rate of the audio acquired by the information acquisition module is the sampling rate of the audio file being played or the sampling rate of the audio track of the video file being played; the sampling rate is 44.1kHz, 48kHz or 96kHz; the octave factor k is 2, 4, 8 or 16;

[0050] The frequency doubling sampling module collects ultra-high frequency data and sends it to the ultra-high frequency DSP; the ultra-high frequency DSP performs real-time fast Fourier transform on the input data to obtain the spectrum curve of the ultra-high frequency data and calculates the total energy E of the spectrum curve;

[0051] The UHF DSP compares the total energy E with the energy threshold E0 and calculates V. k =A〃(E-E0); where A is a coefficient and less than 0, V k This is voltage correction data; since the UHF DSP converts signals in real time, E and V... k These are all quantities that change over time.

[0052] The power amplifier bias model consists of two parts. The first part is the overload identification model, which is used to detect whether there is an overload trend and perform corresponding control. The second part is the compensation model, which is used to detect whether the power amplifier is about to exceed the bias linear range and apply corresponding control.

[0053] The working process of the overload recognition model is as follows:

[0054] The digital signal input to the first DSP is transformed from the time domain to the frequency domain at fixed time intervals. The transformation method is Fourier transform or wavelet transform. The frequency domain signal is calculated in real time, and the waveform energy is compared with the energy threshold. If the waveform energy exceeds the energy threshold, the first DSP controls the power amplifier's final stage to shut down.

[0055] The energy threshold is a curve that varies with frequency, that is, the energy threshold G is a function G(f), where f represents the frequency of the signal; the waveform energy calculated in real time is also a curve that varies with frequency. The energy of signals at different frequencies is different, and the waveform energy H is a function H(f).

[0056] Calculate Y(f) = H(f) - G(f). When any value of Y(f) < 0 occurs, the first DSP controls the shutdown of the final stage of the power amplifier.

[0057] The working process of the compensation model is as follows:

[0058] The digital signal input to the first DSP undergoes time-domain to frequency-domain transformation at fixed time intervals, using either Fourier transform or wavelet transform. The first DSP then extracts features from the frequency-domain signal, including the strongest frequency F. max F max Corresponding peak heights Pmax and F max Corresponding half-width W max The sum of energy values ​​M in the characteristic frequency range; where the characteristic frequency range is a pre-set frequency range.

[0059] The first DSP will display the frequency domain signal graph and the strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W max The sum of energy values ​​M in the characteristic frequency band is used as a parameter input into the neural network model to obtain the voltage V0.

[0060] V0 is a quantity that changes over time. The first DSP calculates V = V0 + V k V represents the voltage control data;

[0061] After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal.

[0062] When the total energy E of the spectrum curve exceeds E0, V k The value is negative, which reduces the bias voltage, further reducing the distortion of the bias power amplifier module; when the total energy E is less than E0, V k The value is positive, which causes the adjustment voltage bias to increase, ensuring the power amplifier module works effectively.

[0063] The training method for neural network models is as follows:

[0064] Install a power amplifier with the same structure as the one used in actual applications in the laboratory and control it to work, the difference being that the voltage control data output by the DSP is set to random numbers;

[0065] The digital signal input to the DSP undergoes time-domain to frequency-domain transformation at fixed time intervals, using either Fourier transform or wavelet transform. The DSP then extracts features from the frequency-domain signal, including the strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W max The total energy value M of the characteristic frequency band;

[0066] The system monitors the time period during which the power amplifier exceeds the bias linear range and then returns to the linear range, and extracts data from this period; the extracted data includes a graph of the frequency domain signal and the strongest frequency F. max F max Corresponding peak height P max F max Corresponding half-width W max The total energy value M of the characteristic frequency band and the corresponding voltage control data;

[0067] The graph of the frequency domain signal and the strongest frequency F max F max Corresponding peak height P max F max Corresponding half-width W maxThe total energy value M of the characteristic frequency band is used as input, and the corresponding voltage control data is used as output to construct a neural network model; the type of neural network model is a convolutional neural network model.

[0068] Example 2:

[0069] See Figure 2 The circuit structure diagram of the present invention is as follows:

[0070] The current sampling module includes a circuit that performs current-to-voltage conversion and low-pass filtering simultaneously. It converts the current signal into a voltage signal and performs low-pass filtering at the same time. The purpose of low-pass filtering is to remove out-of-band interference.

[0071] The collector of NPN transistor Q6 is connected to vcc, and the base of PNP transistor Q4 is connected to vee.

[0072] The first DSP chip uses the TMS320C6713B series from Texas Instruments.

[0073] The ultra-high frequency DSP chip has a maximum clock frequency of 300MHz.

[0074] The bias power amplifier module includes two resistors R3 and R4 connected in series, an NPN transistor Q6 and a PNP transistor Q4; the bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to drive the output; the emitters of the NPN transistor Q6 and the PNP transistor Q4 are connected between two resistors in series, and the output is located between the two resistors in series.

[0075] The collector of NPN transistor Q6 is connected to vcc, and the base of PNP transistor Q4 is connected to vee.

[0076] Q1, Q2, Q3, Q5, Q7, Q8, R1, R2, R5, R6, and R8 constitute the proportional current replicator of the power output stage.

[0077] R7, OP-1, and C1 connected in parallel form a circuit that performs current-to-voltage conversion and low-pass filtering simultaneously. This circuit converts the current signal into a voltage signal and performs low-pass filtering at the same time. The purpose of low-pass filtering is to remove out-of-band interference.

[0078] Q1, Q2, Q3, and Q5 are PNP transistors, and Q7 and Q8 are NPN transistors. One end of R1, R2, and R5 is connected to Vcc. The other end of R1 is connected to the emitter of Q1, the other end of R2 is connected to the emitter of Q2, and the other end of R3 is connected to the emitter of Q3 and the base of Q5. The emitter of Q5 is connected to Vcc, and the collector of Q5 is connected to the base of Q3 and then grounded through R6.

[0079] The collector and base of Q1 are connected to the collector of Q7. The emitter of Q7 is connected to the emitter of Q6. The base of Q7 is connected to the base and collector of Q8, as well as the collector of Q3. The collector of Q2 is connected to one end of R9 and the negative terminal of OP-1. The other end of R9 is connected to the positive terminal of OP-1. R7, OP-1, and C1 are connected in parallel. The output of OP-1 is sent to a high-speed ADC, i.e., an analog-to-digital converter.

[0080] Thus far, the description of the above embodiments has been provided for illustrative and descriptive purposes. This is not intended to be exhaustive or limiting of the present disclosure. Individual elements or features of particular embodiments are generally not limited to those particular embodiments, but may be interchanged and used in selected embodiments where applicable, even if not specifically shown or described. In many respects, the same elements or features may also be varied. Such variations are not considered a departure from this disclosure, and all such modifications are intended to be included within the scope of this disclosure.

[0081] Example embodiments are provided so that this disclosure will become thorough and will fully convey the scope to those skilled in the art. Numerous details, such as examples of specific parts, apparatus, and methods, are set forth to provide a thorough understanding of embodiments of this disclosure. It will be apparent to those skilled in the art that the specific details are not required, and the example embodiments may be implemented in many different forms, neither of which should be construed as limiting the scope of this disclosure. In some example embodiments, well-known processes, well-known apparatus structures, and well-known techniques are not described in detail.

[0082] Technical terms are used herein for the purpose of describing specific exemplary embodiments only and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a” and “the” as used herein may also refer to the plural forms. The terms “comprising” and “having” are inclusive and therefore specify the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or additional having of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof. Unless expressly indicated in order of execution, the method steps, processes, and operations described herein are not to be construed as necessarily requiring performance in the specific order discussed and shown. It should also be understood that additional or optional steps may be employed.

Claims

1. A secure headphone amplifier based on high-speed sampling technology, comprising: The system comprises an input terminal, a bias power amplifier module, and an output terminal; characterized in that it further includes an information acquisition module, a frequency multiplication sampling module, an ultra-high frequency DSP, a current sampling module, an analog-to-digital converter, a first digital signal processor / DSP, a digital-to-analog converter, a low-pass filter, a current-to-voltage converter, and a current-to-voltage control module. The bias power amplifier module is connected to the input and output terminals respectively. The input terminal is used to input signals, which are amplified by the bias amplifier and then output through the output terminal. The information acquisition module is used to acquire the data format of the audio being played, including the audio sampling rate, through the input terminal; and send the sampling rate to the frequency doubling sampling module; The frequency doubling sampling module performs frequency doubling sampling from the output terminal based on the audio sampling rate, with the frequency doubling factor k; the frequency doubling sampling module sends the frequency doubling samples to the ultra-high frequency DSP; the ultra-high frequency DSP processes the frequency doubling samples to obtain voltage correction data, and the voltage correction data is input to the first DSP; the operating frequency of the first DSP is different from the frequency of the ultra-high frequency DSP; The current sampling module is connected to the bias power amplifier module and is used to replicate the proportional current of the output stage of the bias power amplifier module. The replicated current is then converted into a digital signal by an analog-to-digital converter and input to the first DSP. The signal output from the analog-to-digital converter is input into the power amplifier bias model in the first DSP for calculation. The first DSP combines the voltage correction data to output voltage control data. After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal. The bias power amplifier module includes two resistors R3 and R4 connected in series, an NPN transistor Q6 and a PNP transistor Q4; the bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to drive the output; the emitters of the NPN transistor Q6 and the PNP transistor Q4 are connected between two resistors in series, and the output is located between the two resistors in series. The collector of NPN transistor Q6 is connected to vcc, and the collector of PNP transistor Q4 is connected to vee.

2. The safety headphone amplifier based on high-speed sampling technology according to claim 1, characterized in that: The signal acquired by the first DSP is model matched with the pre-established power amplifier bias model in 5 ms increments; the sampling rate of the analog-to-digital converter and the digital-to-analog converter is 100 kHz.

3. The safety headphone amplifier based on high-speed sampling technology according to claim 1, characterized in that: The sampling rate of the audio acquired by the information acquisition module is the sampling rate of the audio file being played or the sampling rate of the audio track of the video file being played; the sampling rate is 44.1kHz, 48kHz or 96kHz; the octave factor k is 2, 4, 8 or 16; The frequency doubling sampling module collects ultra-high frequency data and sends it to the ultra-high frequency DSP; the ultra-high frequency DSP performs real-time fast Fourier transform on the input data to obtain the spectrum curve of the ultra-high frequency data and calculates the total energy E of the spectrum curve; The UHF DSP compares the total energy E with the energy threshold E0 and calculates Vk=A·(E-E0); where A is a coefficient and is less than 0, and Vk is the voltage correction data; since the UHF DSP converts the signal in real time, E and Vk are both quantities that change with time.

4. The safety headphone amplifier based on high-speed sampling technology according to claim 3, characterized in that: The power amplifier bias model consists of two parts. The first part is the overload identification model, which is used to detect whether there is an overload trend and perform corresponding control. The second part is the compensation model, which is used to detect whether the power amplifier is about to exceed the bias linear range and apply corresponding control. The working process of the overload recognition model is as follows: The digital signal input to the first DSP is transformed from the time domain to the frequency domain at fixed time intervals. The transformation method is Fourier transform or wavelet transform. The frequency domain signal is calculated in real time, and the waveform energy is compared with the energy threshold. If the waveform energy exceeds the energy threshold, the first DSP controls the power amplifier's final stage to shut down. The energy threshold is a curve that varies with frequency, that is, the energy threshold G is a function G(f), where f represents the frequency of the signal; the waveform energy calculated in real time is also a curve that varies with frequency. The energy of signals at different frequencies is different, and the waveform energy H is a function H(f). Calculate Y(f) = H(f) - G(f). When any value of Y(f) < 0 occurs, the first DSP controls the shutdown of the final stage of the power amplifier. The working process of the compensation model is as follows: The digital signal input to the first DSP is transformed from the time domain to the frequency domain at fixed time intervals. The transformation method is Fourier transform or wavelet transform. The first DSP extracts features from the frequency domain signal. The extracted features include the strongest frequency Fmax, the peak height Pmax corresponding to Fmax, the full width at half maximum (Wmax) corresponding to Fmax, and the sum of energy values ​​M of the characteristic frequency band. The characteristic frequency band is a pre-set frequency range; The first DSP inputs the graph of the frequency domain signal, the strongest frequency Fmax, the peak height Pmax corresponding to Fmax, the full width at half maximum (Wmax) corresponding to Fmax, and the total energy value M of the characteristic frequency band into the neural network model to obtain the voltage V0.

5. The safety headphone amplifier based on high-speed sampling technology according to claim 4, characterized in that: V0 is a quantity that changes over time. The first DSP calculates V = V0 + Vk, where V is the voltage control data. After the voltage control data is input to the digital-to-analog converter, it passes through a low-pass filter and enters the current-to-voltage converter to obtain the control current. The control current is input to the current-to-voltage control module to obtain the regulated voltage, which is then applied to the bias amplifier module along with the input signal. When the total energy E of the spectrum curve exceeds E0, Vk is negative, which reduces the bias voltage and further reduces the distortion of the bias power amplifier module; when the total energy E is less than E0, Vk is positive, which increases the bias voltage and ensures the working effect of the power amplifier module.

6. The safety headphone amplifier based on high-speed sampling technology according to claim 1, characterized in that: The current sampling module includes a circuit that performs current-to-voltage conversion and low-pass filtering simultaneously. It converts the current signal into a voltage signal and performs low-pass filtering at the same time. The purpose of low-pass filtering is to remove out-of-band interference.

7. The safety headphone amplifier based on high-speed sampling technology according to claim 1, characterized in that: The first DSP chip uses the TMS320C6713B series from Texas Instruments.

8. The safety headphone amplifier based on high-speed sampling technology according to claim 1, characterized in that: The ultra-high frequency DSP chip has a maximum clock frequency of 300 MHz.

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