A universal verification platform architecture automatic generation method based on UVM
By constructing a general verification platform architecture based on UVM, and using the mako template library and Python scripts to automatically generate the verification platform framework, the problem of high manpower and time costs in existing technologies is solved, and rapid generation and efficient verification are achieved.
Patent Information
- Application Number
- CN202211398410.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-09
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2042-11-09
AI Technical Summary
Existing UVM verification platform generation methods suffer from problems such as high labor costs, high time costs, complex scripts, inapplicability to other module verifications, inconsistent code style and structure of generated verification platforms, inability to automatically connect, limited functionality of generated verification platforms, inconsistent structure of test case generation verification platforms, and long test case generation time.
A UVM-based method for automatically generating a general verification platform architecture is adopted. This method involves building a Mako template library using a verification language, running a Python script to input configuration information, automatically parsing and importing component templates, generating the verification platform framework code, and automatically generating connection files and test cases.
It enables rapid generation of verification platform framework code, reduces manpower and learning costs, improves verification efficiency, ensures consistency in the generated platform structure and code style, and supports verification requirements of multiple modules.
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Figure CN115576768B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of IC verification technology, and in particular to a method for automatically generating a universal verification platform architecture based on UVM. Background Technology
[0002] In recent years, my country's digital integrated circuit industry has developed rapidly, and the importance of chip verification technology has become increasingly prominent. In today's era of rapid product iteration, improving verification efficiency is essential.
[0003] UVM is currently the most widely used methodology in the field of functional verification. There are two existing methods for building a verification platform in the industry: one is manual construction, which requires a large amount of manpower and time.
[0004] Another approach is to use scripts to generate the verification platform architecture code through file reading and writing and statement printing. The problem with this approach is that the script and the verification environment code to be generated are mixed together, resulting in high maintenance and learning costs, as well as requiring more manpower and time.
[0005] Due to UVM's limitations, the types of components in the verification platform are relatively fixed, while their names, quantities, instantiation counts, and connection relationships are customizable.
[0006] A search revealed a Chinese patent document with patent number CN202210249193.9, which discloses a method for rapidly generating a PCIe UVM verification platform. During use, users only need to input the unique components of the verification platform as prompted to generate a PCIe UVM verification platform framework, significantly improving the efficiency of building the verification platform. Although UVM is used, PCIe is only a dedicated module, and the PCIe verification platform structure is not applicable to verification of other modules. The generated verification platform has fixed functions and a fixed number of components.
[0007] If the number of components can vary according to the input configuration, the code style and nested structure of the verification platform can be consistent. However, the generated verification platform structure is not fixed, so it can be used by various modules, achieving uniqueness such as universality, unified style, and variable structure. It can also solve the problems of not being able to automatically connect the verification platform and the design under test when generating a single verification platform code, the inability to generate test cases, and the long connection time and laborious debugging of test cases during verification, which makes it difficult to improve efficiency. Summary of the Invention
[0008] The purpose of this invention is to address the shortcomings of existing technologies by proposing an automatic generation method for a universal verification platform architecture based on UVM.
[0009] To achieve the above objectives, the present invention adopts the following technical solution:
[0010] A method for automatically generating a general verification platform architecture based on UVM includes the following steps:
[0011] S1: Use the validation language to build the Mako template library, a general component for the UVM validation platform;
[0012] S2: Run the Python script and prompt the user to enter the configuration information of the design under test to be generated and the path of the top-level code of the design under test;
[0013] S3: The script parses the configuration information, retrieves environment component, environment configuration component, agent component, agent configuration component, ideal model component, and scoreboard component templates from the template library, and imports the configuration information.
[0014] S4: Import configuration information into the template, automatically execute control statements within the template, and complete the conversion from template to code file;
[0015] S5: Ask the user whether to generate an automatic connection between the verification platform and the design under test, and output the connection file as required;
[0016] S6: Ask the user whether to generate basic test cases and stimuli, and output the test case and stimulus files as required;
[0017] S7: Automatically generate folders for all code files according to their file functions;
[0018] S8: Users can start the verification process by filling in the special function verification statements of the design under test according to the prompts embedded in the code file.
[0019] Furthermore, in step S2, the configuration information includes: agent name, number of agent instantiations, environment component name, and path to the top-level file of the design under test.
[0020] Further, in step S1, the verification platform template library includes:
[0021] Environment component template, environment configuration component template, agent configuration component template, agent component template, driver component template, stimulus generator component template, stimulus object template, monitor component template, scoreboard component template, ideal template component template, test case template, design under test connection template, transmission interface template, and register template.
[0022] Furthermore, in step S1, the templates in the verification platform template library all contain insertion prompts for functional codes.
[0023] Furthermore, in step S4, the general verification platform components include verification platform test case components, ideal model components, scoreboard components, environment components, and agent components. The number and connection method of the verification platform components are variable. When templates are captured and components are generated, the agent components, ideal model components, and scoreboard components will appear in pairs as input and output.
[0024] Furthermore, in step S4, when the agent component is activated, the agent component includes an excitation generator component, a driver component, and a monitor component.
[0025] When the agent component incentive is not activated, the agent component only contains the monitor component.
[0026] Furthermore, when generating the verification platform framework code, a generation log for the verification platform is automatically generated. The log includes: author, generation time, component list, storage path of the verification platform code file, and recommended verification commands.
[0027] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0028] It can generate all the framework code of the verification platform with one click, without manual intervention, which can improve verification efficiency, save development time, reduce development costs, reduce human error, and improve the reliability of the verification platform.
[0029] The logic for importing Mako templates is implemented using Python scripts. Therefore, when maintaining the generation code of the verification platform framework, whether adding or deleting, it is only necessary to operate directly on the template library.
[0030] The templates in the template library are all written in a validation language, so validation personnel do not need to spend extra learning costs to learn scripting languages, but can start maintaining them directly, which greatly reduces labor and learning costs. Attached Figure Description
[0031] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof.
[0032] Figure 1 This is a flowchart illustrating the steps of the automatic generation method for a universal verification platform architecture based on UVM proposed in this invention.
[0033] Figure 2 This is a flowchart illustrating the automatic generation method for a general verification platform architecture based on UVM proposed in this invention.
[0034] Figure 3 This is a diagram of the automatically generated verification platform structure in an embodiment of the present invention. Detailed Implementation
[0035] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.
[0036] Example 1
[0037] Reference Figure 1-2 The method for automatically generating a general verification platform architecture based on UVM includes the following steps:
[0038] S1: Use the validation language to build the Mako template library, a general component for the UVM validation platform;
[0039] S2: Run the Python script and prompt the user to enter the configuration information of the design under test to be generated and the path of the top-level code of the design under test;
[0040] S3: The script parses the configuration information, retrieves environment component, environment configuration component, agent component, agent configuration component, ideal model component, and scoreboard component templates from the template library, and imports the configuration information.
[0041] S4: Import configuration information into the template, automatically execute control statements within the template, and complete the conversion from template to code file;
[0042] S5: Prompt the user to generate an automatic connection between the verification platform and the design under test, and output the connection file as required.
[0043] S6: Ask the user whether to generate basic test cases and stimuli, and output the test case and stimulus files as required;
[0044] S7: Automatically generate folders for all code files according to their file functions;
[0045] S8: Users can start the verification process by filling in the special function verification statements of the design under test according to the prompts embedded in the code file.
[0046] Example 2
[0047] Based on Example 1, in step S2, the configuration information includes: agent name, number of agent instantiations, environment component name, and path to the top-level file of the design under test;
[0048] In step S1, the verification platform template library includes:
[0049] Environment component template, environment configuration component template, agent configuration component template, agent component template, driver component template, stimulus generator component template, stimulus object template, monitor component template, scoreboard component template, ideal template component template, test case template, design under test connection template, transmission interface template, and register template;
[0050] In step S1, the templates in the verification platform template library all contain insertion prompts for functional codes;
[0051] When generating the verification platform framework code, a generation log for the verification platform is automatically generated. The log includes: author, generation time, component list, storage path of the verification platform code file, and recommended verification commands.
[0052] To better understand the technical solution of the present invention, the following description is provided in conjunction with specific embodiments.
[0053] In step S4, the general verification platform components include verification platform test case components, ideal model components, scoreboard components, environment components, and proxy components. The number and connection method of the verification platform components are variable. When templates are captured and components are generated, the proxy components, ideal model components, and scoreboard components will appear in pairs, one for input and one for output.
[0054] Specifically, each component has its own specific function, and the number and connections are variable to serve multiple chip modules to verify more functions;
[0055] More specifically, the number of components in the verification platform changes non-randomly. For example, the proxy components for the sending and receiving paths can only appear in pairs. When the number changes, it changes from 1 pair to 3 pairs. The same applies to the interfaces. Because the number of instantiations is variable, but there are constraints that prevent random changes, a unified structural style and coding style can be formed, which is convenient for management and debugging.
[0056] In step S4, when the agent component is activated, the agent component includes an excitation generator component, a driver component, and a monitor component.
[0057] When the agent component incentive is not activated, the agent component only contains the monitor component;
[0058] Example 3
[0059] A verification platform architecture was designed for the TDMA module in the chip. The designed verification platform includes an environment component env_1, which contains two agent components, agent_A and agent_B. Agent A has two instances (agtA1, agtA2), which are activated by stimuli. Agent B has three instances (agtB1, agtB2, agtB3), which are not activated by stimuli. The verification platform is stored in the current path of the input command. The module path is "share / my_test / dut_test.v".
[0060] S1: Use SystemVerilog to build a Mako template library for the verification platform environment components, environment configuration components, proxy components, proxy configuration components, interfaces, stimuli, and basic test cases;
[0061] S2: Enter the startup command to start running the Python script with one click. The Python script prompts the user to enter the configuration information of the verification platform design for the design under test and the top-level code file of the design under test. According to the TDMA verification platform structure design, enter the configuration information: 1 environment component, named env_1; 2 agent components, named agent_A and agent_B respectively; agent_A instance name (agtA1, agtA2); enter the incentive activation configuration; agent_B instance name (agtB1, agtB2, agtB3); enter the incentive deactivation configuration. Enter the top-level code path of the design under test, "share / my_test / dut_test.v". No personal information is required here; the script can automatically capture the user's name, ID, and runtime from the backend and generate them in the code file and log document.
[0062] S3: This invention can generate a complete verification platform containing all components and can automatically connect the verification platform and the design under test to generate basic test cases and stimuli. After the user inputs configuration information, the Python script parses the configuration information, converts it into a data format that is easy to process using the Mako template, and then, according to the configuration requirements, retrieves environment component templates, environment configuration component templates, proxy component templates, proxy configuration component templates, interface templates, scoreboard templates, ideal model templates, monitor templates, driver templates, stimulus generator templates, stimulus templates, and test case templates.
[0063] S4: The Python script imports the configuration into the template. The control statements in the template are executed automatically with almost no time consumption. After execution, the filenames and internal code declaration class names of the environment component template and environment configuration component template will be prefixed with "env_1". It will output one environment component code file and one environment configuration component code file. The environment component code file will instantiate five agents: two "agent_A" instances named "agtA1" and "agtA2", and three "agent_B" instances named "agtB1", "agtB2", and "agtB3". The agent component template, agent configuration component template, monitor template, driver template, and stimulus generator template will generate two sets of code files. One set of agent component code, agent configuration component, monitor, driver, and stimulus generator code filenames and internal code declaration class names will be prefixed with "agent_A", and the other set of code filenames and internal code declaration class names will be prefixed with "agent_B". The interface template will also generate two code files, one prefixed with `agent_A` and the other with `agent_B`. Within the agent component, the connection relationships between the monitor, driver, and stimulus generator components have already been set up. The scoreboard template and ideal model template will generate two sets of code files, used for data capture and comparison of the sending and receiving paths, respectively. The prefix of the component code file name and the internal code declaration class name will change to `env_1`. After importing the configuration information, the stimulus template and test case template will also have `env_1` as the prefix in their code files. All code files will import automatically generated user information, time, and date, and format them accordingly.
[0064] S5: The script will display a prompt on the computer screen asking whether to generate a connection between the verification platform and the design under test. If so, it will retrieve the interface information from the top-level path of the design under test code "share / my_test / dut_test.v" entered in the configuration information, execute the automatic connection, and output the connection file.
[0065] S6: The script will again display a prompt on the computer screen asking whether to generate test cases for the platform's incentives and basic data transmission and reception. If you want to generate them, it will output the previously converted test case files and incentive files.
[0066] S7: Summarize all code files generated in the previous steps and organize them by function. Create a separate folder for test cases and stimulus files, as these are essential for verifying the platform's startup functionality. The folder name should be prefixed with "env_l". Create a separate folder for the platform's functional structural components, including environment components, agent components, ideal model components, scoreboard components, drivers, monitors, and stimulus generator components. The default folder name should be "env_l_func". Place the environment configuration components and agent configuration components together in a folder named "env_l_config" by default. This automatic categorization by function facilitates file retrieval and management.
[0067] S8. All code files contain function insertion prompts. If users need to add additional functions based on module configurations beyond the general functions, they can simply fill in the prompt after it. In this example, TDMA has a timeout detection function, so a timeout handling function has been added under the statement prompt in the driver component; a timeout interrupt detection function has been added to the scoring board component. After adding these, a verification platform for verifying TDMA is generated.
[0068] As can be seen from the above, this method can also generate verification platforms for other modules. Based on the structural design of the verification platform of the module, the configuration information can be re-entered, and the component names and quantities can be changed to generate a verification platform with a different structure than the embodiment, which is suitable for the module.
[0069] Furthermore, to better explain the process of this technical solution, a more detailed explanation is provided based on the above embodiments and in conjunction with the user's usage process.
[0070] The user flow for this method is as follows:
[0071] Step 1: Input Configuration
[0072] Step 2: Enter the command
[0073] Step 3: Select whether test cases and stimuli are needed, as well as automatic connection.
[0074] Step 4: Enter the special function as prompted in the code file.
[0075] Finish.
[0076] Based on the above embodiments, such as Figure 1-3 The diagram shown is a structure diagram of the verification platform automatically generated in the embodiment.
[0077] The verification platform, as required, includes verification platform test cases, environment components (env), and agent components (agent), and five of them are instantiated. Among them, agtA1 and agtA2 are activated, so they contain three components: stimulus generator (sqr), driver (drv), and monitor (mon); agtB1, agtB2, and agtB3 are not activated and only contain the monitor component; the two agent models AB each have their own function coverage statistics, interface, and agent file list (agent_pkg).
[0078] The DUT interface automatically connects to the verification platform interface. In addition, the verification platform includes an environment configuration component (env_cfg), registers, and stimuli.
[0079] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.
Claims
1. A universal verification platform architecture automatic generation method based on UVM, characterized in that, Comprise the following steps: S1: using the verification language to build a UVM verification platform universal component mako template library; S2: running the Python script, prompting the user to input the to-be-tested design configuration information and to-be-tested design top-level code path to be generated; S3: the script parses the configuration information, extracts the environment component, environment configuration component, agent component, agent configuration component, ideal model component, scoreboard component template from the template library, and imports the configuration information; S4: the template imports the configuration information, and the control statements in the template are automatically executed to complete the conversion of the template to the code file; S5: ask the user whether to generate the automatic connection of the verification platform and the to-be-tested design, and output the connection file according to the requirements; S6: ask the user whether to generate the basic test case and excitation, and output the test case and excitation file according to the requirements; S7: all code files are automatically generated into folders according to file functions; S8: the user fills in the special function verification statements of the to-be-tested design according to the prompt statements embedded in the code file, and the verification work can be started; In step S1, the templates of the verification platform template library all contain function code insertion prompts; In step S4, the universal verification platform components include verification platform test case components, ideal model components, scoreboard components, environment components and agent components, wherein the number and connection mode of the verification platform components are variable, and when the templates are extracted and generated, the agent components, ideal model components and scoreboard components will be paired as input and output.
2. The UVM-based universal verification platform architecture automatic generation method according to claim 1, characterized in that, In step S2, the configuration information includes: agent name, agent instantiation quantity, environment component name and to-be-tested design top-level file path. 3.The UVM-based universal verification platform architecture automatic generation method according to claim 2, characterized in that, In step S1, the verification platform template library includes: Environment component template, environment configuration component template, agent configuration component template, agent component template, driver component template, excitation generator component template, excitation object template, monitor component template, scoreboard component template, ideal model component template, test case template, to-be-tested design connection template, transmission interface template and register template.
4. The UVM-based universal verification platform architecture automatic generation method according to claim 1, wherein, In step S4, when the agent component excitation is activated, the agent component includes the excitation generator component, the driver component and the monitor component; When the agent component excitation is not activated, the agent component only includes the monitor component.
5. The UVM-based universal verification platform architecture automatic generation method according to claim 4, characterized in that, When generating the verification platform framework code, the generation log of the verification platform is automatically generated, and the log includes: author, generation time, component list, verification platform code file storage path, recommended verification command.
Citation Information
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