Method for optimizing a screen based on displayed content and related display control chip

Abstract

The present disclosure relates to a method for optimizing a screen based on display content and a related display control chip. A method for optimizing a screen based on display content. The foregoing method is applicable to a display control chip and includes the following processes: receiving a video signal, where the video signal is used to transmit a frame image; for multiple different sub-regions in the region of the frame image, calculating the pixel quantity distribution of each sub-region on multiple feature values; based on the pixel quantity distribution, determining whether the sub-region contains a corresponding first target pattern among multiple first target patterns; if the multiple sub-regions respectively contain multiple first target patterns, performing a first preset image processing on the frame image to generate a processed frame image; if the multiple sub-regions do not respectively contain multiple first target patterns, not performing the first preset image processing on the frame image; and generating a display signal based on the processed frame image or the frame image.

Description

Technical Field

[0001] This disclosure relates to a method for optimizing a screen and a related display control chip, particularly to a method for optimizing a screen based on display content and a related display control chip. Background Art

[0002] Monitors on the market allow users to manually select different display modes for different scenarios through buttons. For example, users can adjust the monitor to a high-color mode when playing computer games. Another example is that when watching a movie, the user can adjust the monitor to a high-contrast mode. However, operating the monitor through buttons is a cumbersome and time-consuming action. If the monitor can identify the current usage scenario through the display content and automatically adjust the display mode according to the usage scenario, the user experience can be greatly improved. Summary of the Invention

[0003] This disclosure provides a method for optimizing a screen based on display content. The foregoing method is applicable to a display control chip and includes the following processes: receiving a video signal, where the video signal is used to transmit a frame image; calculating the pixel quantity distribution of each of a plurality of different sub-regions in a region of the frame image on a plurality of feature values; determining, according to the pixel quantity distribution, whether the sub-region includes a corresponding first target pattern among a plurality of first target patterns; if the plurality of sub-regions respectively include the plurality of first target patterns, performing a first preset image processing on the frame image to generate a processed frame image; if the plurality of sub-regions do not respectively include the plurality of first target patterns, not performing the first preset image processing on the frame image; and generating a display signal according to the processed frame image or the frame image.

[0004] This disclosure provides a display control chip, which includes a calculation circuit. The calculation circuit is configured to perform the following operations: receiving a video signal, where the video signal is used to transmit a frame image; calculating the pixel quantity distribution of each of a plurality of different sub-regions in a region of the frame image on a plurality of feature values; determining, according to the pixel quantity distribution, whether the sub-region includes a corresponding first target pattern among a plurality of first target patterns; if the plurality of sub-regions respectively include the plurality of first target patterns, performing a preset image processing on the frame image to generate a processed frame image; if the plurality of sub-regions do not respectively include the plurality of first target patterns, not performing the preset image processing on the frame image; and generating a display signal according to the processed frame image or the frame image.

[0005] One of the advantages of the above method and display control chip is that it helps to reduce the overall circuit area.

[0006] Another advantage of the above method and display control chip is that it helps to improve the picture delay. Brief Description of the Drawings

[0007] Figure 1 A simplified functional block diagram of a display according to an embodiment of the present disclosure document.

[0008] Figure 2 A schematic diagram of a frame of a video signal being transmitted.

[0009] Figure 3 For explaining the operation of pixel data in the area of calculating circuit analysis Figure 1 of.

[0010] Figure 4 A schematic diagram of multiple target patterns.

[0011] Figure 5 Illustrates the calculation results of the error values of the sub-regions. Detailed implementation manners

[0012] The embodiments of the present disclosure document will be described below in conjunction with the relevant drawings. In the drawings, the same reference numerals denote the same or similar components or method flows.

[0013] Figure 1 A simplified functional block diagram of a display 100 according to an embodiment of the present disclosure document. The display 100 includes a display control chip 110 and a display panel 120. The display control chip 110 can be coupled to the display panel 120 and is used to receive a video signal VS. In some embodiments, the video signal VS is a decoded D-SUB signal, a Digital Visual Interface (DVI) signal, or a High-Definition Multimedia Interface (HDMI) signal. The display control chip 110 includes a calculation circuit 112 and a memory circuit 114. The calculation circuit 112 is used to execute a computer program in the memory circuit 114 to optimize the picture information transmitted by the video signal VS, and transmit the optimized picture information to the display panel 120 as a display signal DS compatible with the display panel 120. In one embodiment, the display signal DS is a Low Voltage Differential (LVDS) signal.

[0014] In some embodiments, the display control chip 110 is a Scaler IC. In other embodiments, the memory circuit 114 is a read-only memory, such as an Electrically Erasable Programmable Read-Only Memory (EEPROM).

[0015] The display panel 120 includes a timing control chip 122, a source driver 124, a gate driver 126, a plurality of data lines SL, a plurality of gate lines GL, and a plurality of pixel circuits PX. The timing control chip 122 is configured to transmit the picture information in the display signal DS to the source driver 124 at certain specific times. The timing control chip 122 is also configured to provide an operating frequency to the source driver 124 and the gate driver 126, so that the source driver 124 and the gate driver 126 enable the data lines SL and the scan lines GL respectively at certain specific times. In this way, the pixel circuits PX are driven by the data lines SL and the scan lines GL to form a display picture.

[0016] The following will be described in conjunction with Figures 2 to 4 the operation of the computing circuit 112 when executing the computer program in the memory circuit 114 in further detail. Figure 2 FIG. 200 is a schematic diagram of a frame of picture transmitted by the video signal VS. The picture 200 is composed of a plurality of pixel data 22 sequentially transmitted by the video signal VS. For example, the computing circuit 112 sequentially receives the pixel data 22 from the video signal VS 1,1 ~22 1,n , and then sequentially receives the pixel data 22 2,1 ~22 2,n , and so on, until the pixel data 22 m,n is received and the reception of the picture 200 is completed. In the present disclosure, the pixel data 22 refers to any unspecified pixel data 22 1,1 ~22 m,n . The pixel data 22 is used to specify the gray scale value of a corresponding pixel circuit PX. Therefore, if the resolution of the picture 200 is 1920x1080, then m is 1080 and n is 1920.

[0017] When the computing circuit 112 sequentially receives the pixel data 22 1,1 ~22 m,n , it determines whether the pixel data 22 belongs to the area 210 of the picture 200. The sizes of the pixel data 22 and the area 210 are only for illustration, and the present disclosure is not limited thereto. The area 210 corresponds to a plurality of pixel data 22. For example, the area 210 may have a resolution of 480x360. In some embodiments, the area 210 is located at a fixed position in the picture 200. The computing circuit 112 can determine the position of the currently received pixel data 22 in the picture 200 by counting the received pixel data 22, and then determine whether the currently received pixel data 22 belongs to the area 210. The computing circuit 112 analyzes the characteristic values of the pixel data 22 in the area 210 to determine whether the area 210 contains a plurality of target patterns. If so, the computing circuit 112 performs a predetermined image processing on the picture 200, and the related content will be described in the following paragraphs.

[0018] In embodiments where the computing circuit 112 has relatively strong computing capabilities, the computing circuit 112 can analyze multiple regions in the screen 200 to determine whether any one of the multiple regions contains the aforementioned multiple target patterns, rather than being limited to analyzing only one region 210.

[0019] The following will be combined with Figure 3 to further illustrate how the computing circuit 112 analyzes the pixel data 22 in the region 210 to determine whether to perform image processing on the screen 200. Figure 3 For explaining the operation of the computing circuit analyzing the pixel data 22 in the region 210. The region 210 includes multiple sub-regions 310 to 390, and each of the sub-regions 310 to 390 corresponds to multiple pixel data 22. For example, the resolution of each of the sub-regions 310 to 390 can be 180x160. Figure 3 The number and shape of the sub-regions 310 to 390 are only examples, and this disclosure document is not limited thereto. In some embodiments, the computing circuit 112 can divide the region 210 into more than 9 sub-regions to improve the accuracy of analysis, or divide the region 210 into less than 9 sub-regions to save the amount of calculation. In other embodiments, the sub-regions 310 to 390 can be set as multiple concentric circles or multiple concentric polygons.

[0020] The computing circuit 112 will analyze the sub-regions 310 to 390 respectively to calculate the quantity distribution situation (hereinafter referred to as pixel quantity distribution) of the pixel data 22 of each of the sub-regions 310 to 390 on multiple eigenvalues. By counting the received pixel data 22, the computing circuit 112 can know which one of the sub-regions 310 to 390 the currently received pixel data 22 belongs to.

[0021] In this embodiment, the computing circuit 112 will calculate the pixel quantity distribution corresponding to each of the sub-regions 310 to 390. The following will further illustrate with the sub-regions 350, 360, and 380. As Figure 3 shown, the computing circuit 112 can sequentially receive multiple pixel data 22 of the sub-region 350 from the video signal VS. When the computing circuit 112 receives each pixel data 22 of the sub-region 350, the computing circuit 112 will determine which of the multiple eigenvalues the pixel data 22 corresponds to. In some embodiments, the eigenvalues are multiple different grayscale ranges, such as eight ranges of 0 to 31 grayscale, 32 to 63 grayscale, 64 to 95 grayscale, 96 to 127 grayscale, 128 to 159 grayscale, 160 to 191 grayscale, 192 to 223 grayscale, and 224 to 255 grayscale, etc.

[0022] Therefore, for each pixel data 22 of sub-region 350, the calculation circuit 112 determines the gray-scale range corresponding to the pixel data 22 and accumulates the number of pixels corresponding to the gray-scale range to form a pixel number distribution 352. For example, if the calculation circuit 112 determines that a certain pixel data 22 in sub-region 350 corresponds to the gray scale of 128-159, the calculation circuit 112 will increment the number of pixels corresponding to the gray scale of 128-159 in the pixel number distribution 352. As can be seen from Figure 3 it, the calculation circuit 112 calculates that the pattern of sub-region 350 corresponds to approximately equal numbers of medium-gray-scale pixel data 22 and high-gray-scale pixel data 22, as shown in the pixel number distribution 352; the pattern of sub-region 360 corresponds to a larger number of medium-gray-scale pixel data 22 and a smaller number of high-gray-scale pixel data 22, as shown in the pixel number distribution 362; the pattern of sub-region 380 corresponds to a smaller number of medium-gray-scale pixel data 22, a larger number of high-gray-scale pixel data 22, and a small number of low-gray-scale pixel data 22, as shown in the pixel number distribution 392, and so on.

[0023] In summary, when analyzing sub-regions 310-390, the calculation circuit 112 does not store the complete images of sub-regions 310-390 in the memory circuit 114, but only stores the number distribution of the pixel data 22 of each of sub-regions 310-390 on multiple eigenvalues. The calculation circuit 112 will use the pixel number distributions of sub-regions 310-390 to determine whether sub-regions 310-390 contain multiple target images to decide whether to perform image processing on the image 200.

[0024] In some embodiments, the eigenvalues can be multiple different colors, such as three colors: red, blue, and green.

[0025] Figure 4 FIGS. are schematic diagrams of multiple target patterns 410-490. Each of the target patterns 410-490 contains multiple pixels, and the number of target patterns 410-490 is the same as the number of sub-regions 310-390. It should be noted that the memory circuit 114 does not store the complete target patterns 410-490. What the memory circuit 114 stores is the ideal number distribution (hereinafter referred to as the ideal number distribution) of the pixel data 22 on multiple eigenvalues when transmitting the target patterns 410-490 in terms of pixel data 22. Each of the target patterns 410-490 corresponds to an ideal number distribution, which will be further described in conjunction with the target patterns 450, 460, and 480 below.

[0026] As Figure 4As shown, the target pattern 450 is formed by approximately equal numbers of medium gray-scale pixels and high gray-scale pixels. Therefore, if the target pattern 450 is transmitted with pixel data 22, ideally about half of these pixel data 22 would be distributed in the medium gray-scale range and about half would also be distributed in the high gray-scale range, and thus the memory circuit 114 would correspondingly store Figure 4 the ideal number distribution 452 in

[0027] Similarly, if the target pattern 460 is transmitted with pixel data 22, the number of these pixel data 22 distributed in the medium gray-scale range would be larger, and the number distributed in the high gray-scale range would be smaller, and thus the memory circuit 114 would correspondingly store the ideal number distribution 462. If the target pattern 490 is transmitted with pixel data 22, the number of these pixel data 22 distributed in the medium gray-scale range would be smaller, and the number distributed in the high gray-scale range would be larger, and thus the memory circuit 114 would correspondingly store the ideal number distribution 492. In summary, for each of the target patterns 410 - 490, the memory circuit 114 records the ideal number distribution of the pixel data 22 at each eigenvalue. Figures 3 to 5 The operation of the calculation circuit 112 to determine whether to perform image processing on the screen 200 will be further described below in conjunction with

[0028] Taking the sub-region 350 as an example, the calculation circuit 112 can calculate the difference between the number of pixels in the pixel number distribution 352 and the ideal number in the ideal number distribution 452 in the range of 0 - 31 gray scales, and calculate the difference between the pixel number distribution 352 and the ideal number distribution 452 in the range of 32 - 63 gray scales, until the multiple differences between the pixel number distribution 352 and the ideal number distribution 452 in all gray scale ranges are calculated. The calculation circuit 112 can further average the multiple differences obtained to obtain the error value of the sub-region 350. The error values of the sub-regions 310 - 390 can be calculated by a similar method and will not be elaborated here.

[0029] Figure 5 Illustrates the calculation results of the error values of the sub-regions 310 - 390. The calculation circuit 112 will compare the error value of each of the sub-regions 310 - 390 with a threshold value, where the threshold value can be pre-stored in the memory circuit 114. From Figure 3 and Figure 5It can be seen that the sub-regions located at the edge of region 210 are more susceptible to interference and may have relatively large error values (such as sub-regions 370 - 380). On the other hand, the sub-regions located at the center of region 210 may have relatively small error values (such as sub-region 350). Therefore, the calculation circuit 112 can select different thresholds for different sub-regions.

[0030] In some embodiments, the sub-regions close to the center of region 210 correspond to smaller thresholds, while the sub-regions far from the center of region 210 correspond to larger thresholds. That is to say, the threshold of a sub-region is positively correlated with the distance between the sub-region and the center of region 210. For example, the threshold of sub-region 350 is 5%, while the thresholds of sub-regions 310 - 340 and 360 - 390 are 20%. The aforementioned distance can be the straight-line distance from the center of the sub-region to the center of region 210, but the present disclosure is not limited thereto.

[0031] If the error value of a certain sub-region is less than the threshold, the calculation circuit 112 will determine that the certain sub-region contains the corresponding target pattern. When the error values of sub-regions 310 - 390 are respectively less than the corresponding thresholds (as Figure 5 shown), such that the calculation circuit 112 determines that sub-regions 310 - 390 respectively contain target patterns 410 - 490, the calculation circuit 112 will perform a predetermined image processing on the image 200. On the contrary, if the error values of sub-regions 310 - 390 are not respectively less than the corresponding thresholds, and the calculation circuit 112 determines that sub-regions 310 - 390 do not respectively contain target patterns 410 - 490, the calculation circuit 112 will not perform a predetermined image processing on the image 200.

[0032] In some embodiments, the predetermined image processing can be brightness setting, contrast setting, color setting, etc. performed on the image 200.

[0033] The calculation circuit 112 can determine the content of the predetermined image processing according to the patterns recognized from region 210. For example, when the calculation circuit 112 determines that region 210 contains target patterns 410 - 490, the calculation circuit 112 can perform a brightness setting on the image 200. For another example, when the calculation circuit 112 determines that region 210 contains other target patterns different from target patterns 410 - 490, the calculation circuit 112 can perform a contrast setting on the image 200.

[0034] After finishing the operations of the above-mentioned multiple embodiments, the calculation circuit 112 will transmit the image 200 with or without image processing to the display panel 120 via the display signal DS. In some embodiments, before transmitting the image 200 with or without image processing to the display panel 120, the calculation circuit 112 will adjust the resolution of the image 200 to correspond to the resolution of the display panel 120.

[0035] In summary, the display control chip 110 can adaptively optimize the images transmitted by the video signal VS, enhancing the user's viewing experience. Additionally, the display control chip 110 does not need to store each received frame, nor does it require a pre-stored complete target pattern. The display control chip 110 only needs to use a small number of pre-stored parameters to perform image recognition and image comparison operations. Therefore, the display control chip 110 helps to improve frame delay and helps to save the amount of memory used, thus reducing the overall circuit area.

[0036] In the specification and the claims of the patent application, certain terms are used to refer to specific components. However, those of ordinary skill in the art should understand that the same component may be referred to by different names. The specification and the claims of the patent application do not use the difference in names as a way to distinguish components, but rather use the difference in functions of the components as the basis for distinction. The term "comprising" mentioned in the specification and the claims is an open-ended term and should be interpreted as "including but not limited to". Additionally, "coupled" herein includes any direct and indirect connection means. Therefore, if the text describes that the first component is coupled to the second component, it means that the first component can be directly connected to the second component through electrical connection, wireless transmission, optical transmission, or other signal connection means, or can be indirectly electrically or signal-connected to the second component through other components or connection means.

[0037] The description method of "and / or" used herein includes any combination of one or more of the listed items. Additionally, unless specifically specified in the specification, any singular term also includes the plural meaning.

[0038] The above is only the preferred embodiment of this disclosure document. All equivalent changes and modifications made according to the claims of this disclosure document shall fall within the scope covered by this disclosure document.

[0039] Symbolic description

[0040] 100: Display

[0041] 110: Display control chip

[0042] 112: Computing circuit

[0043] 114: Memory circuit

[0044] 120: Display panel

[0045] 122: Timing control chip

[0046] 124: Source driver

[0047] 126: Gate driver

[0048] PX: Pixel circuit

[0049] VS: Video signal

[0050] DS: Display signal

[0051] SL: Data line

[0052] GL: Gate line

[0053] 200: Screen

[0054] 210: Area

[0055] 22 1,1 ~22 m,n : Pixel data

[0056] 310~390: Sub - area

[0057] 352,362,382: Pixel quantity distribution

[0058] 410~490: Target pattern

[0059] 452,462,482: Ideal quantity distribution.

Claims

1. A method for optimizing a picture based on display content, applicable to a display control chip, comprising: Receiving a video signal, where the video signal is used to transmit a frame of picture; For a plurality of different sub-regions in the region of the frame of picture, calculating the pixel quantity distribution of each sub-region on a plurality of characteristic values; Based on the pixel quantity distribution, determining whether the sub-region contains the corresponding first target pattern among a plurality of first target patterns; If the plurality of sub-regions respectively contain the plurality of first target patterns, performing a first preset image processing on the frame of picture to generate a processed frame of picture; If the plurality of sub-regions do not respectively contain the plurality of first target patterns, not performing the first preset image processing on the frame of picture; And Generating a display signal based on the processed frame of picture or the frame of picture.

2. The method according to claim 1, wherein, Determining whether the sub-region contains the corresponding first target pattern among the plurality of first target patterns based on the pixel quantity distribution includes: Comparing the pixel quantity distribution with an ideal quantity distribution corresponding to the sub-region to generate an error value; and If the error value is less than a threshold value corresponding to the sub-region, determining that the sub-region contains the corresponding first target pattern.

3. The method according to claim 2, wherein, The threshold value corresponding to the sub-region is positively correlated with the distance between the sub-region and the center of the region.

4. The method according to claim 1, wherein, The display control chip is used to output the display signal to a display panel, and generating the display data based on the processed frame of picture or the frame of picture includes: adjusting the resolution of the processed frame of picture or the frame of picture to correspond to the resolution of the display panel.

5. The method according to claim 1, wherein, Calculating the pixel quantity distribution of each sub-region on the plurality of characteristic values includes: Sequentially receiving a plurality of pixel data of the sub-region from the video signal; When each pixel data is received, determining the corresponding characteristic value among the plurality of characteristic values corresponding to the pixel data; And Accumulating the pixel quantity of the corresponding characteristic value to form the pixel quantity distribution.

6. The method according to claim 1, further comprising: Based on the pixel quantity distribution, determining whether the sub-region contains the corresponding second target pattern among a plurality of second target patterns, where the plurality of first target patterns are different from the plurality of second target patterns; If the plurality of sub-regions respectively contain the plurality of second target patterns, performing a second preset image processing on the frame of picture to generate the processed frame of picture, where the first preset image processing is different from the second preset image processing; And If the plurality of sub-regions do not respectively contain the plurality of second target patterns, not performing the second preset image processing on the frame of picture.

7. The method according to claim 1, wherein, The region is located at a predetermined position of the frame of picture.

8. A display control chip, comprising a calculation circuit, where the calculation circuit is configured to perform the following operations: Receiving a video signal, where the video signal is used to transmit a frame of picture; For a plurality of different sub-regions in the region of the frame of picture, calculating the pixel quantity distribution of each sub-region on a plurality of characteristic values; Based on the pixel quantity distribution, determine whether the sub-region contains the corresponding first target pattern among the multiple first target patterns; If the multiple sub-regions respectively contain the multiple first target patterns, perform preset image processing on the frame image to generate a processed frame image; If the multiple sub-regions do not respectively contain the multiple first target patterns, do not perform the preset image processing on the frame image; and Generate a display signal based on the processed frame image or the frame image.

9. The display control chip according to claim 8, wherein, When the calculation circuit determines whether the sub-region contains the corresponding first target pattern among the multiple first target patterns based on the pixel quantity distribution, the calculation circuit compares the pixel quantity distribution with the ideal quantity distribution corresponding to the sub-region to generate an error value; wherein if the error value is less than the threshold corresponding to the sub-region, the calculation circuit determines that the sub-region contains the corresponding first target pattern.

10. The display control chip according to claim 9, wherein, The threshold corresponding to the sub-region is positively correlated with the distance between the sub-region and the center of the region.

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