A method for selecting the optimal read voltage axis for blocks that are not fully written at one time

Abstract

The present invention provides a method for selecting the optimal read voltage axis for a block that is not fully written at one time, thereby reducing the number of block read errors. The method includes determining the basic parameters of the SSD; grouping the blocks according to the degree of wear, and then grouping them again according to the SSD operating temperature range based on the first-level grouping results; writing each block in batches according to the longest interval write time, and refreshing it according to the read refresh time after writing; starting the timing of the fully written block from the time when it is fully written, and selecting the corresponding read voltage axis to read the block after a certain period of time; then using other read voltage axes provided by the manufacturer to read the block and compare them. If the read voltage axis corresponding to the different wear degrees and different storage times used for each block meets the error correction requirements, the original read voltage axis is used; if not, a group of other read voltage axes are selected to read the block. The present application improves the accuracy of reading the data of a block that is not fully written at one time and reduces the number of errors.

Description

Technical Field

[0001] The present invention relates to a method for selecting an optimal read voltage axis for a block that is not fully written at one time, and belongs to the technical field of memory. Background Art

[0002] NAND Flash is a non-volatile memory that maintains data during power outages. Its compact size allows for cost-effective, high-capacity storage, making it widely used. Generally speaking, a NAND Flash memory consists of many blocks. Each block contains many word lines, and each word line contains several pages. Users can perform erase, write, and read operations on NAND Flash. A block is generally the smallest addressable unit for erase operations, a word line is generally the smallest addressable unit for write operations, and a page is generally the smallest addressable unit for read operations. A block that has not yet been written to the last word line after erasure is called an open block, while a fully written block is called a closed block.

[0003] Due to internal principles and manufacturing process limitations, NAND Flash memory can experience bit flips during use. This means that when written data is read, some bits change from 1 to 0, while others change from 0 to 1. This means that the data read is inconsistent with the written data, resulting in errors caused by bit flips. Incomplete blocks can cause more bit flips after long retention periods. Depending on actual usage, a block is only partially written to the WL (not fully written at once, called an open block), and is filled after multiple writes. Therefore, a method is needed to select the optimal read voltage axis for partially written blocks. Summary of the Invention

[0004] The present invention aims to provide a method for selecting an optimal read voltage axis for a block that is not fully written at one time, thereby reducing the number of errors in reading the block.

[0005] To achieve the above-mentioned purpose, the present invention is implemented through the following technical solutions:

[0006] Step 1: Determine the SSD's NAND Flash operating temperature range, read refresh time, read voltage axis at different wear levels and retention times, maximum interval write time, and maximum full write time.

[0007] Step 2: Group the blocks according to their wear levels to obtain i primary groups;

[0008] Step 3: Based on the first-level grouping results, perform a second-level grouping based on the NAND Flash operating temperature range. Each first-level group is further divided into j second-level groups.

[0009] Step 4: Write each block in batches according to the longest interval write time, and ensure that the total write time does not exceed the longest full write time; before each write, read the storage content of the block once using the normal voltage axis or the original voltage axis; after each write, refresh according to the read refresh time;

[0010] Step 5: Start timing the full block from the time it is filled. After the manually set retention time, select the corresponding read voltage axis based on the different wear levels and retention times of each block to read the block; then use other read voltage axes provided by the manufacturer to read the block.

[0011] Step 6: Compare the value read by the read voltage axis used in step 5 with the written data. If the block reading using the corresponding read voltage axis selected using the different wear levels and different retention times used for each block meets the error correction requirements, then use the original read voltage axis; if not, select a group of other read voltage axes to read the block;

[0012] Step 7: If no result is found, reduce the maximum interval writing time and the maximum fill time, and repeat steps 2 to 6.

[0013] Specifically, the specific steps of step 5 are as follows: setting the Nand Flash temperature to the Nand Flash's maximum operating temperature, obtaining the Nand Flash's maximum storage time at this temperature, dividing this time period into five or more sampling time points, reading the block after the Nand Flash is cooled to room temperature while maintaining the high temperature until the sampling time point, then heating it again to the Nand Flash's maximum operating temperature and waiting for the next sampling time point, and repeating the operation until the last sampling time point.

[0014] The advantages of the present invention are that: the present application improves the accuracy of reading the block data that is not fully written at one time and reduces the number of errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0016] Figure 1 It is a schematic diagram of the process structure of the present invention. DETAILED DESCRIPTION

[0017] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0018] A method for selecting the optimal read voltage axis for a block that is not fully written at one time. The specific steps are as follows:

[0019] S01) Determine the NAND Flash operating temperature range, read refresh time, read voltage axis under different wear levels and retention times, maximum interval write time, and maximum fill time based on actual SSD usage.

[0020] S02) Blocks are grouped into first-level groups according to different wear levels (PE). For example, NAND Flash is further divided into i first-level groups according to the wear level (PE).

[0021] S03) The i primary groups of different PEs are secondary grouped according to the operating temperature range of S01), and further divided into j secondary groups; a total of i*j groups are obtained.

[0022] Specifically, in the first-level grouping, the wear degree from PE0 to the end of the NAND Flash life is first divided into intervals of 1000 erases and writes, namely: PE0, PE1000, PE2000, PE3000, etc.

[0023] In the second-level grouping, the operating temperature range is intervals of 10°C. In this example, the minimum and maximum operating temperatures of the SSD are 60°C and 78°C. Each first-level group is further divided into three groups: 60°C, 70°C, and 78°C.

[0024] Due to the differences in blocks, it is necessary to ensure that the blocks in group i*j have sufficient sample size. In this embodiment, the sample size of each control group is 10 blocks.

[0025] S04) Write the blocks of each group in batches according to the longest interval writing time, and ensure that the total writing time does not exceed the longest filling time.

[0026] Specifically, before each write in S04), read the voltage using the normal or original voltage axis to check the trend. In this example, write is performed in 8 steps, and the WLs at which the write is stopped are WL 2, 5, 35, 102, 199, 266, 363, and 446. After writing, refresh is performed according to the refresh time.

[0027] S05) For a fully written block, the timer starts from the time it is fully written, and the manually set retention time begins. Based on the different wear levels and retention times of each block, the corresponding read voltage axis is selected to read the block. Then, other read voltage axes provided by the manufacturer are used to read the block.

[0028] Specifically, the Nand Flash temperature is set to its maximum operating temperature, the maximum storage time at this temperature is obtained, and this period is evenly divided into five or more sampling time points. After the Nand Flash maintains its high temperature until the sampling time point, it cools down to room temperature and reads the block. The temperature is then raised again to the Nand Flash's maximum operating temperature and waits for the next sampling time point. This cycle continues until the final sampling time point. In this example, the high-temperature storage operating temperature is 85°C, and the maximum storage time at this temperature is 1260 minutes. The five sampling time points are 0 minutes, 315 minutes, 630 minutes, 945 minutes, and 1260 minutes, respectively.

[0029] S06) Analyze the data and compare the value read by the read voltage axis used in step 5 with the written data. If the error correction requirements are met by selecting the corresponding read voltage axis using the different wear levels and different storage times used for each block, the original read voltage axis is used; if not, a group of other read voltage axes are selected to read the block.

[0030] S07) If no result is found after screening, the longest interval writing time and the longest filling time are reduced, and steps S02) to S06) are repeated.

[0031] In this example, it was finally measured that when the longest interval write time was 4 hours and the longest fill time was 32 hours, within the NAND Flash operating temperature range and with a 3-minute read refresh interval, the read voltage axis under each of the original conditions (PE, Retention, etc.) met the error correction requirement, that is, the number of error bits per 4KB of data did not exceed 230 bits.

[0032] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions described in the aforementioned embodiments or substitute equivalents for some of the technical features. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A method for selecting the optimal read voltage axis for a block that is not fully written at one time, characterized in that: The following steps are involved: Step 1: Determine the SSD's NAND Flash operating temperature range, read refresh time, read voltage axis at different wear levels and retention times, maximum interval write time, and maximum full write time. Step 2: Group the blocks according to their wear levels to obtain i primary groups; Step 3: Based on the first-level grouping results, perform a second-level grouping based on the NAND Flash operating temperature range. Each first-level group is further divided into j second-level groups. Step 4: Write each block in batches according to the longest interval writing time, and ensure that the total writing time does not exceed the longest full writing time; Before each write, the storage content of the block is read once using the normal voltage axis or the original voltage axis; after each write, it is refreshed according to the read refresh time; Step 5: Start timing the full block from the time it is filled. After the preset retention time, select the corresponding read voltage axis based on the different wear levels and retention times of each block to read the block. Then use other read voltage axes provided by the manufacturer to read the block. Step 6: Compare the value read by the read voltage axis used in step 5 with the written data. If the block reading using the corresponding read voltage axis selected using the different wear levels and different retention times used for each block meets the error correction requirements, then use the original read voltage axis; if not, select a set of other read voltage axes to read the block; Step 7: If no result is found, reduce the maximum interval writing time and the maximum fill time, and repeat steps 2 to 6.

2. The method for selecting the optimal read voltage axis for a block that is not fully written at one time according to claim 1, characterized in that: The specific steps of step 5 are as follows: setting the Nand Flash temperature to the Nand Flash's maximum operating temperature, obtaining the maximum storage time of the Nand Flash at this temperature, dividing this time period into five or more sampling time points, and reading the block after the Nand Flash is cooled to room temperature while maintaining the high temperature until the sampling time point. The temperature is then raised to the Nand Flash's maximum operating temperature and waits for the next sampling time point. This operation is repeated until the last sampling time point.

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