An automatic gain control circuit

Abstract

The present invention discloses an automatic gain control circuit, which belongs to the field of electronic circuit technology. It includes a directional coupler, a first / second low-noise amplifier, a threshold detector, and a first / second single-pole double-throw switch; the input end of the directional coupler is used to receive an input signal, and the two signal output ends of the directional coupler are respectively connected to the input ends of the first low-noise amplifier and the first single-pole double-throw switch, and the second low-noise amplifier is connected between the first single-pole double-throw switch and the second single-pole double-throw switch; the input end of the threshold detector is connected to the output end of the first low-noise amplifier, and the output end of the threshold detector is respectively connected to the control ends of the first single-pole double-throw switch and the second single-pole double-throw switch. The present invention controls whether the second low-noise amplifier is connected to the circuit through the threshold detector, thereby controlling whether the radio frequency output signal is gain amplified. The present invention has the characteristics of simplicity and practicality, large dynamic range, short response time, and high system stability.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuits, and in particular relates to an automatic gain control circuit. Background Art

[0002] With the rapid development of industries like microelectronics, computer networks, and communications, automatic gain control (AGC) circuits are becoming increasingly well-known and widely used in various fields. AGC, a type of output limiting device, utilizes an effective combination of linear amplification and compression amplification to adjust the output signal. When the input signal amplitude fluctuates significantly, it can stabilize the output signal amplitude or limit its variation to a very small range. This prevents the receiver from malfunctioning due to too small an input signal, nor from saturation or jamming due to too large an input signal.

[0003] Electronic circuits in instrumentation, especially those used for sensor signal acquisition, often feature automatic gain control (AGC) amplifiers, powered by positive and negative power supplies, to adjust the input signal's gain. AGC circuits are typical closed-loop electronic circuits, categorized by structure as feedforward AGC and feedback AGC. Their implementation methods include analog AGC, digital AGC, and hybrid AGC.

[0004] At present, since most sensors output bipolar AC analog signals with small output signal amplitude and wide dynamic range, only automatic gain control amplification with dual power supply can provide the back-end data acquisition module with complete sensor signals that meet its input range requirements, so as to realize digital processing of analog physical quantities.

[0005] Most of the dual-power supply automatic gain control amplifier circuits currently used have problems such as narrow bandwidth and large fluctuations in amplitude-frequency characteristics within the passband. Therefore, an improved automatic gain control circuit is needed to meet the usage requirements. Summary of the Invention

[0006] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide an automatic gain control circuit to solve the shortcomings of the original dual-power automatic gain control amplifier circuit, such as narrow bandwidth and large fluctuations in amplitude-frequency characteristics within the passband.

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] An automatic gain control circuit includes a directional coupler, a first low noise amplifier, a second low noise amplifier, a threshold detector, a first single-pole double-throw switch, and a second single-pole double-throw switch;

[0009] The input end of the directional coupler is used to receive an input signal, the two signal output ends of the directional coupler are respectively connected to the input ends of the first low-noise amplifier and the first single-pole double-throw switch, and the second low-noise amplifier is connected between the first single-pole double-throw switch and the second single-pole double-throw switch; the input end of the threshold detector is connected to the output end of the first low-noise amplifier, and the output end of the threshold detector is respectively connected to the control ends of the first single-pole double-throw switch and the second single-pole double-throw switch;

[0010] The threshold detector receives the analog signal output by the first low noise amplifier, and determines whether the received analog signal exceeds the threshold, thereby outputting a digital signal Q and The high and low levels are used to control the connection mode of the first single-pole double-throw switch and the second single-pole double-throw switch; if the received analog signal exceeds the threshold value of the threshold detector, the threshold detector output Q is high, controlling the first single-pole double-throw switch to be directly connected to the second single-pole double-throw switch, and the second low-noise amplifier is not connected to the circuit; if the received analog signal does not reach the threshold value of the threshold detector, the threshold detector output Q is low, controlling the output end of the first single-pole double-throw switch to be connected to the input end of the second low-noise amplifier, and the output end of the second low-noise amplifier to be connected to the input end of the second single-pole double-throw switch, so that the RF output signal is amplified by the second low-noise amplifier and then output.

[0011] Furthermore, the first single-pole double-throw switch is controlled by the output signal of the threshold detector, and its two input ends are respectively connected to the directional coupler and the output end of the threshold detector, and its two output ends are respectively connected to the input end of the second low-noise amplifier and the second single-pole double-throw switch.

[0012] The second single-pole double-throw switch is controlled by the output signal of the threshold detector. The three input ends of the single-pole double-throw switch are respectively connected to the second low-noise amplifier, the first single-pole double-throw switch, and the output end of the threshold detector, and the single output end is used as the final signal output.

[0013] Furthermore, the low-noise amplifier has a gain of 16-25dB for the signal, the threshold detector has an attenuation of 30-50dBm for the signal, and the single-pole double-throw switch has an attenuation of 0.5-2.5dB for the signal; in the directional coupler, the coupled RF signal has an attenuation of 10-20dB relative to the RF input signal, and the RF output signal has an attenuation of 0.5-1.5dB relative to the RF input signal.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] In the automatic gain control circuit of this solution, a threshold detector detects the amplified coupled RF signal and generates a digital signal to control the connection mode of the single-pole double-throw switch, thereby controlling whether to perform gain amplification on the RF output signal. The design is simple and practical. At the same time, the control mode of the single-pole double-throw switch makes the circuit have a large dynamic range, a short response time, and high system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a block diagram of the overall structure of the automatic gain control circuit shown in this embodiment.

[0017] Figure 2 FIG. 4 is a circuit structure diagram of the automatic gain control circuit shown in this embodiment. DETAILED DESCRIPTION

[0018] The present invention is further described in detail below with reference to the accompanying drawings and embodiments.

[0019] See also Figure 1 As shown, the present invention provides an automatic gain control circuit, including a directional coupler, a first low noise amplifier 2, a second low noise amplifier 5, a threshold detector 3, a first single-pole double-throw switch 4 and a second single-pole double-throw switch 6.

[0020] Directional coupler, used to couple a single input signal into two output signals;

[0021] A low noise amplifier, used to amplify the analog signal coupled from the directional coupler;

[0022] a threshold detector for receiving the amplified analog signal and determining whether the analog signal exceeds a threshold;

[0023] A single-pole double-throw switch determines whether to apply gain to the original input signal based on the output of the threshold detector.

[0024] The input end of the directional coupler 1 is used to receive an input signal. The two signal output ends of the directional coupler 1 are respectively connected to the input ends of the first low-noise amplifier 2 and the first single-pole double-throw switch 4. The second low-noise amplifier 5 is connected between the first single-pole double-throw switch 4 and the second single-pole double-throw switch 6. The input end of the threshold detector 3 is connected to the output end of the first low-noise amplifier 2, and the output end of the threshold detector 3 is respectively connected to the control ends of the first single-pole double-throw switch 4 and the second single-pole double-throw switch 6, which is used to control whether the second low-noise amplifier 5 is connected to the circuit, thereby controlling whether the input signal is gain amplified. Finally, the second single-pole double-throw switch 6 outputs the resulting signal.

[0025] Figure 2 Shown is a specific circuit diagram of the present invention. Table 1 is Figure 2 Explanation of each symbol in the circuit structure diagram shown.

[0026] Table 1

[0027]

[0028] The directional coupler performs directionally coupling on the input analog signal to generate a radio frequency output signal and a coupled radio frequency signal. In this embodiment, the directional coupler is centered around the ADC-15-4+ chip U5. Pin 1 of chip U5 is connected to the input signal, pin 2 of chip U5 is grounded, pin 3 of chip U5 is connected to one end of capacitor C26 (1.5pF) and the other end of inductor L4 (5.1nH), the other end of capacitor C26 is grounded, and the other end of inductor L4 is connected to one end of capacitor C28 (2.2uF). Pin 4 of chip U5 is connected to one end of resistor R11 (49.9Ω), the other end of resistor R11 is grounded, pin 5 of chip U5 is connected to one end of resistor R12, the other end of resistor R12 is grounded, pin 3 of chip U5 serves as the output end of the coupled radio frequency signal, and pin 6 of chip U5 serves as the output end of the radio frequency output signal.

[0029] In this embodiment, the RF output signal generated by the above circuit has an attenuation of 0.7 dB relative to the RF input signal, and the coupled RF signal has an attenuation of -15.5 dB relative to the RF input signal.

[0030] The first low noise amplifier 2 is connected to the 3rd pin of the directional coupler through the capacitor C28 and the inductor L4. The first low noise amplifier 2 inputs the coupled radio frequency signal generated by the directional coupler, and outputs the signal after gaining the signal.

[0031] In this embodiment, the first low-noise amplifier is based on the LHA-13LN+ chip U9, and pin 3 of chip U9 is connected to the other end of capacitor C28. At the same time, pin 3 of chip U9 is connected to one end of capacitor C31 (0.1uF), and the other end of capacitor C31 is connected to one end of resistor R19 (1.5kΩ); pin 7 of chip U9, the other end of resistor R19 (1.5kΩ), one end of capacitor C30 (2.2uF), and one end of inductor L5 (LQH32DN150K53L) are connected, and the other end of inductor L5, one end of capacitor C34 (10uF), one end of capacitor C35 (1nF), and +3.3V power supply are connected, and the other end of capacitor C34 and the other end of capacitor C35 are grounded; the other pins of chip U9 are all grounded. The +3.3V power supply serves as the DC input source of the chip U9, and the pin 7 of the chip U9 serves as the output end of the first low-noise amplifier, generating a gain of 16-25dB for the coupled RF signal generated by the received directional coupler.

[0032] The input end of the threshold detector is connected to the output end of the first low-noise amplifier 2. By determining whether the voltage of the received analog signal exceeds the set threshold voltage, a digital signal is output to control the connection mode of the two single-pole double-throw switches. The two output ends of the detector are respectively connected to the control ends of the two single-pole double-throw switches, which are used to provide control signals to the two single-pole double-throw switches to determine whether to gain the RF output signal of the directional coupler. Specifically, if the voltage of the received analog signal exceeds the threshold voltage set by the threshold detector, a digital signal is output to adjust the two single-pole double-throw switches to a state of interconnection; if the voltage of the received analog signal does not reach the threshold voltage set by the threshold detector, a digital signal is output to connect both single-pole double-throw switches to the second low-noise amplifier to achieve gain of the RF output signal.

[0033] The threshold detector is based on the ADL5904 chip U10. The threshold calibration pin 3 and VRMS pin of the chip U10 are both connected to the digital high level. The DECL pin is grounded through a 4.02Ω resistor and a 0.1uF capacitor, and is connected to the CRMS pin through a 0.1uF capacitor; the VP pin is connected to a 3.3V power supply that is stabilized by connecting 10uF, 0.1uF, and 0.1nF capacitors in parallel to ground. The two outputs Q, They are connected to the TTL control voltage input pins of two SPDT switches through a 100Ω resistor circuit (switch 4 and Connected to, switch 6 is connected to Q) to control the different connections of the single-pole double-throw switch through different outputs of the threshold detector to determine whether to gain the RF output signal of the directional coupler. The threshold detector has a 30-50dBm attenuation on the signal.

[0034] In this embodiment, the threshold detector is based on the ADL5904 chip U10. Pin 1 of the chip U10 is connected to the other end of the capacitor C30; Pin 3 of the chip U10 is connected to the high-level signal; Pin 4 of the chip U10, one end of the resistor R20 (4.02Ω), and one end of the capacitor C32 (0.1uF) are connected. The other end of the capacitor C32 is connected to Pin 9 of the chip U10, and the other end of the resistor R20 is connected to one end of the capacitor C36 (0.1uF). The other end of the capacitor C36 is grounded; Pin 5 of the chip U10 is connected to the high-level signal; Pin 6 of the chip U10 is connected to the high-level signal; Pin 7 of the chip U10 is connected to the high-level signal; Pin 8 of the chip U10 is connected to the high-level signal; Pin 9 of the chip U10 is connected to the high-level signal; Pin 10 ... The 10th pin of chip U10 is connected to the high-level signal and one end of capacitor C33 (10nF), and the other end of capacitor C33 is grounded. The 12th pin of chip U10, one end of resistor R13, and the 10th pin of resistor R8 (100Ω) are connected to the high-level signal and one end of capacitor C33 (10nF). The other end of capacitor C39 is grounded. The three are connected at one end, the other end of resistor R13 is connected to the A and B pins of the AND gate (SN74AHC1G08DBV chip U8), the VCC pin of chip U8 is connected to the +3.3V power supply and one end of capacitor C27 (0.1uF), the other end of capacitor C27 is grounded, the Y pin of chip U8 is connected to one end of resistor R15 (33Ω), and the other end of resistor R15 is connected to the signal port; pin 13 of chip U10 is connected to one end of resistor R9 (100Ω); pin 14 of chip U10 is connected to resistor R Pin 14 (10kΩ) is connected to the +3.3V power supply, and the other end of resistor R18 is connected to the +3.3V power supply. Pin 15 of chip U10 is connected to the signal port and one end of resistor R18 (10kΩ), respectively. The other end of resistor R18 is grounded. Pin 16 of chip U10 is connected to one end of capacitor C29 (0.1uF), one end of resistor R16 (10kΩ), and one end of resistor R17 (1kΩ), respectively. The other ends of capacitor C29 and resistor R17 are both grounded, and the other end of resistor R16 is connected to the +3.3V power supply. Pins 2, 6, and 8 of chip U10 are left floating, and pins 11 and 17 are grounded.

[0035] The two single-pole double-throw switches are based on the M3SW-2-50DRA+ chip. The VDD and VEE pins are connected to the ±5V power supply via 11.5Ω and grounded via a 0.1uF capacitor. The two output pins of the first single-pole double-throw switch 4 are respectively connected to an input pin of the second single-pole double-throw switch 6 and the signal input pin of the second low-noise amplifier 5 via a 2.2uF capacitor; the other input pin of the second single-pole double-throw switch 6 is connected to the output pin of the second low-noise amplifier 5 via a 2.2uF capacitor.

[0036] In this embodiment, the first SPDT switch is based on the M3SW-2-50DRA+ chip U6, and the second SPDT switch is based on the M3SW-2-50DRA+ chip U7. Both are controlled by the output signal of the threshold detector. The SPDT switches have a signal attenuation of 0.5-2.5dB.

[0037] Pin 1 of chip U6 is connected to pin 4 of chip U7, pin 2 of chip U6 is connected to the other end of resistor R9, and pin 4 of chip U6 is connected to one end of capacitor C21 (2.2uF); pin 5 of chip U6 is respectively connected to one end of capacitor C20 (0.1uF) and one end of resistor R5 (11.5Ω), the other end of capacitor C20 is grounded, and the other end of resistor R5 is connected to a +5V power supply; pin 6 of chip U6 is connected to pin 6 of chip U5 of the directional coupler; pin 7 of chip U6 is respectively connected to one end of capacitor C24 (0.1uF) and one end of resistor R7 (11.5Ω), the other end of capacitor C24 is grounded, and the other end of resistor R7 is connected to a -5V power supply; pins 3, 8, and 9 of chip U6 are all grounded.

[0038] Pin 1 of chip U7 is connected to one end of capacitor C22 (2.2uF); pin 2 of chip U7 is connected to the other end of resistor R8; pin 5 of chip U7 is respectively connected to one end of capacitor C25 (0.1uF) and one end of resistor R10 (11.5Ω), the other end of capacitor C25 is grounded, and the other end of resistor R10 is connected to a +5V power supply; pin 7 of chip U7 is respectively connected to one end of capacitor C23 (0.1uF) and one end of resistor R6 (11.5Ω), the other end of capacitor C23 is grounded, and the other end of resistor R6 is connected to a -5V power supply; pins 3, 8, and 9 of chip U7 are all grounded, and pin 6 of chip U7 is used as the signal output end.

[0039] The second low noise amplifier 5 is connected to two single-pole double-throw switches through the capacitor C21 and the capacitor C22 respectively.

[0040] In this embodiment, the second low-noise amplifier is based on the LHA-13LN+ chip U4. Pin 3 of chip U4 is connected to the other end of capacitor C21 and one end of capacitor C19 (0.1uF), and the other end of capacitor C19 is connected to one end of resistor R4 (1.5kΩ); pin 7 of chip U4 is connected to the other end of resistor R4, the other end of capacitor C22, and one end of inductor L3 (LQH32DN150K53L), and the other end of inductor L3, one end of capacitor C13 (1uF), one end of capacitor C14 (1nF), and a +5V voltage source; the remaining pins of chip U4 are all grounded.

[0041] When the above circuit is working, the threshold detector receives the signal output by the first low noise amplifier 2, and judges whether the received analog signal exceeds the threshold, thereby outputting the digital signal Q and The connection mode of the single-pole double-throw switch is controlled by the high and low levels of the threshold detector. If the received analog signal exceeds the threshold of the threshold detector, the threshold detector output Q is high, controlling OUT1 of the first single-pole double-throw switch 4 (pin 1 of chip U6) to be connected, and OUT2 of the second single-pole double-throw switch 6 (pin 4 of chip U7) to be connected, so that the two single-pole double-throw switches are directly connected, that is, the RF output signal is directly output without passing through the second low-noise amplifier 5; if the received analog signal does not reach the threshold of the threshold detector, the threshold detector output Q is low, controlling OUT2 of the first single-pole double-throw switch 4 (pin 4 of chip U6) to be connected, and OUT1 of the second single-pole double-throw switch 6 (pin 1 of chip U7) to be connected, so that the RF output signal is amplified by the second low-noise amplifier 5 and then output.

[0042] In summary, this automatic gain control circuit controls the single-pole double-throw switch to connect different paths by judging the size of the coupled RF signal, thereby controlling the gain of the RF output signal, that is, the original input signal.

[0043] The above describes the specific embodiments of the present invention in conjunction with the accompanying drawings, but these descriptions should not be understood as limiting the scope of the present invention. The scope of protection of the present invention is defined by the appended claims, and any changes based on the claims of the present invention are within the scope of protection of the present invention.

Claims

1. An automatic gain control circuit, characterized in that: It includes a directional coupler (1), a first low-noise amplifier (2), a second low-noise amplifier (5), a threshold detector (3), a first single-pole double-throw switch (4), and a second single-pole double-throw switch (6); The input end of the directional coupler (1) is used to receive an input signal, the two signal output ends of the directional coupler (1) are respectively connected to the input ends of the first low-noise amplifier (2) and the first single-pole double-throw switch (4), and the second low-noise amplifier (5) is connected between the first single-pole double-throw switch (4) and the second single-pole double-throw switch (6); the input end of the threshold detector (3) is connected to the output end of the first low-noise amplifier (2), and the output end of the threshold detector (3) is respectively connected to the control ends of the first single-pole double-throw switch (4) and the second single-pole double-throw switch (6); The directional coupler (1) performs directional coupling on the input analog signal to generate a radio frequency output signal and a coupled radio frequency signal; the radio frequency output signal is input to the first single-pole double-throw switch, the coupled radio frequency signal is amplified by the first low-noise amplifier (2), and the threshold detector judges the amplified coupled radio frequency signal, thereby controlling the connection mode of the first single-pole double-throw switch and the second single-pole double-throw switch to achieve automatic gain of the radio frequency output signal; specifically, the threshold detector receives the analog signal output by the first low-noise amplifier, judges whether the received analog signal exceeds the threshold, and outputs a digital signal Q and The high and low levels are used to control the connection mode of the first single-pole double-throw switch and the second single-pole double-throw switch; if the received analog signal exceeds the threshold value of the threshold detector, the threshold detector output Q is high, controlling the first single-pole double-throw switch to be directly connected to the second single-pole double-throw switch, and the second low-noise amplifier is not connected to the circuit; if the received analog signal does not reach the threshold value of the threshold detector, the threshold detector output Q is low, controlling the output end of the first single-pole double-throw switch to be connected to the input end of the second low-noise amplifier, and the output end of the second low-noise amplifier to be connected to the input end of the second single-pole double-throw switch, so that the RF output signal is amplified by the second low-noise amplifier and then output.

2. An automatic gain control circuit according to claim 1, characterized in that: The directional coupler (1) is based on the ADC-15-4+ chip U5, wherein the 1st pin of the chip U5 is connected to the input signal; the 2nd pin of the chip U5 is grounded; the 3rd pin of the chip U5, one end of the capacitor C26, and one end of the inductor L4 are connected, the other end of the capacitor C26 is grounded, and the other end of the inductor L4 is connected to one end of the capacitor C28; the 4th pin of the chip U5 is connected to one end of the resistor R11, and the other end of the resistor R11 is grounded; the 5th pin of the chip U5 is connected to one end of the resistor R12, and the other end of the resistor R12 is grounded; the 3rd pin of the chip U5 serves as the output end of the coupled RF signal, and the 6th pin of the chip U5 serves as the output end of the RF output signal.

3. An automatic gain control circuit according to claim 2, characterized in that: The first low-noise amplifier (2) is connected to pin 3 of the directional coupler via a capacitor C28 and an inductor L4. The first low-noise amplifier inputs a coupled radio frequency signal generated by the directional coupler, amplifies the coupled radio frequency signal, and outputs the amplified signal.

4. The automatic gain control circuit according to claim 3, wherein: The first low noise amplifier (2) is based on the LHA-13LN+ chip U9. Pin 3 of the chip U9 is connected to the other end of the capacitor C28. At the same time, pin 3 of the chip U9 is connected to one end of the capacitor C31, and the other end of the capacitor C31 is connected to one end of the resistor R19. Pin 7 of the chip U9, the other end of the resistor R19, one end of the capacitor C30, and one end of the inductor L5 are connected. The other end of the inductor L5, one end of the capacitor C34, one end of the capacitor C35, and a +3.3V power supply are connected. The other end of the capacitor C34 and the other end of the capacitor C35 are grounded. The other pins of the chip U9 are all grounded. Pin 7 of the chip U9 serves as the output end of the first low noise amplifier, generating a gain of 16-25dB for the coupled radio frequency signal generated by the received directional coupler.

5. The automatic gain control circuit according to claim 1, wherein: The second low noise amplifier (5) is based on the LHA-13LN+ chip U4. Pin 3 of the chip U4 is connected to the first single-pole double-throw switch through the capacitor C21, and the pin 3 is connected to one end of the capacitor C19, and the other end of the capacitor C19 is connected to one end of the resistor R4; the pin 7 of the chip U4 is connected to the second single-pole double-throw switch through the capacitor C22, and the pin 7, the other end of the resistor R4, and one end of the inductor L3 are connected, and the other end of the inductor L3, one end of the capacitor C13, one end of the capacitor C14, and the +5V voltage source are connected; the remaining pins of the chip U4 are all grounded.

6. The automatic gain control circuit according to claim 1, wherein: The threshold detector is based on the ADL5904 chip U10. Pin 1 of the chip U10 is connected to the first low-noise amplifier through capacitor C30. Pin 3 of the chip U10 is connected to a high-level signal. Pin 4 of the chip U10, one end of the resistor R20, and one end of the capacitor C32 are connected. The other end of the capacitor C32 is connected to pin 9 of the chip U10, and the other end of the resistor R20 is connected to one end of the capacitor C36. The other end of the capacitor C36 is grounded. Pin 5 and pin 7 of the chip U10 are connected and then to one end of the capacitor C37, one end of the capacitor C38, one end of the capacitor C39, and a +3.3V power supply. The other end of the capacitor C37, the other end of the capacitor C38, and the other end of the capacitor C39 are all grounded. Pin 10 of the chip U10 is respectively connected to the high-level signal and one end of the capacitor C33, and the other end of the capacitor C33 is grounded. Pin 12 of the chip U10 is connected to a second single-pole double-throw switch through resistor R8, and pin 12 is connected to one end of the resistor R13. The other end of the resistor R13 is connected to the A and B pins of the gate chip U8. The VCC pin of the chip U8 is connected to the +3.3V power supply and one end of the capacitor C27 respectively. The other end of the capacitor C27 is grounded. The Y pin of the chip U8 is connected to one end of the resistor R15. The other end of the resistor R15 is connected to the signal port. The 13th pin of the chip U10 is connected to the first single-pole double-throw switch through the resistor R9. The 14th pin of the chip U10 is connected to the resistor R14. The other end of the resistor R18 is connected to the Connect to the +3.3V power supply; pin 15 of chip U10 is connected to the signal port and one end of resistor R18 respectively, and the other end of resistor R18 is grounded; pin 16 of chip U10 is connected to one end of capacitor C29, one end of resistor R16, and one end of resistor R17 respectively, and the other end of capacitor C29 and the other end of resistor R17 are both grounded, and the other end of resistor R16 is connected to the +3.3V power supply; pins 2, 6, and 8 of chip U10 are floating, and pins 11 and 17 are grounded.

7. The automatic gain control circuit according to claim 1, wherein: The first single-pole double-throw switch (4) and the second single-pole double-throw switch (6) are based on the M3SW-2-50DRA+ chip, the VDD and VEE pins are respectively connected to the ±5V power supply via resistors and grounded via capacitors, the two output pins of the first single-pole double-throw switch are respectively connected to an input pin of the second single-pole double-throw switch and a signal input pin of the second low-noise amplifier via capacitors; the other input pin of the second single-pole double-throw switch is connected to the output pin of the second low-noise amplifier via a capacitor.

8. The automatic gain control circuit according to claim 7, characterized in that: The first single-pole double-throw switch is based on the M3SW-2-50DRA+ chip U6, and the second single-pole double-throw switch is based on the M3SW-2-50DRA+ chip U7, both of which are controlled by the output signal of the threshold detector; Pin 1 of chip U6 is connected to pin 4 of chip U7, pin 2 of chip U6 is connected to a threshold detector via resistor R9, and pin 4 of chip U6 is connected to a second low-noise amplifier via capacitor C21; pin 5 of chip U6 is connected to one end of capacitor C20 and one end of resistor R5, respectively, the other end of capacitor C20 is grounded, and the other end of resistor R5 is connected to a +5V power supply; pin 6 of chip U6 is connected to a directional coupler; pin 7 of chip U6 is connected to one end of capacitor C24 and one end of resistor R7, respectively, the other end of capacitor C24 is grounded, and the other end of resistor R7 is connected to a -5V power supply; pins 3, 8, and 9 of chip U6 are all grounded; Pin 1 of chip U7 is connected to the second low-noise amplifier through capacitor C22, and pin 2 of chip U7 is connected to the threshold detector through resistor R8; pin 5 of chip U7 is respectively connected to one end of capacitor C25 and one end of resistor R10, the other end of capacitor C25 is grounded, and the other end of resistor R10 is connected to a +5V power supply; pin 7 of chip U7 is respectively connected to one end of capacitor C23 and one end of resistor R6, the other end of capacitor C23 is grounded, and the other end of resistor R6 is connected to a -5V power supply; pins 3, 8, and 9 of chip U7 are all grounded, and pin 6 of chip U7 serves as a signal output end.

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