Frequency synchronization method, device and system

Abstract

The present application discloses a frequency synchronization method and apparatus, belonging to the field of communications. The frequency synchronization method provided by the present application includes: when a target network device is powered on, determining the device identity of the target network device; the device identity of the target network device includes a highest-level master clock device, a master clock candidate device, or a slave clock device; when the device identity of the target network device is a master clock candidate device or a slave clock device, receiving a target synchronization message; when the target synchronization message is received, obtaining clock level information and hop count information carried in a message header of the target synchronization message, the hop count information indicating the number of hops through which the target synchronization message is transmitted; and performing frequency synchronization based on the clock level information and the hop count information carried in the message header of the target synchronization message.

Description

Technical Field

[0001] The present application relates to the field of communications, and specifically to a frequency synchronization method, device, and system. Background Art

[0002] In a communication network, time synchronization between various network devices can be achieved through the IEEE1588v2 protocol, and frequency synchronization between various network devices can be achieved through the IEEE802.1AS protocol.

[0003] However, the related technologies use message type messages defined in the 1588 protocol to transmit time synchronization information and use ESMC messages to transmit frequency synchronization information. The message type required by the time synchronization method is different from the message type required by the frequency synchronization method. This method may have the problem of inconsistency between time synchronization and frequency synchronization. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a frequency synchronization method, device and system, which can solve the problem in the related art that time synchronization and frequency synchronization are inconsistent due to the time synchronization message type being different from the frequency synchronization message type.

[0005] In a first aspect, an embodiment of the present application provides a frequency synchronization method, applied to a target network device, comprising:

[0006] When the target network device is powered on, determining the device identity of the target network device; the device identity of the target network device includes a top-level master clock device, a master clock candidate device, or a slave clock device;

[0007] When the device identity of the target network device is a master clock candidate device or a slave clock device, receiving a target synchronization message;

[0008] When a target synchronization message is received, obtaining clock level information and hop count information carried in a message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0009] Frequency synchronization is performed according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0010] In a second aspect, an embodiment of the present application provides a frequency synchronization device, comprising: a determination module, a receiving module, an acquisition module, and a frequency synchronization module.

[0011] The determining module is configured to determine the device identity of the target network device when the target network device is powered on; the device identity of the target network device includes a top-level master clock device, a master clock candidate device, or a slave clock device;

[0012] The receiving module is configured to receive a target synchronization message when the device identity of the target network device is a master clock candidate device or a slave clock device;

[0013] The acquisition module is configured to, upon receiving a target synchronization message, acquire clock level information and hop count information carried in a message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0014] The frequency synchronization module is used to perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0015] In a third aspect, an embodiment of the present application provides a frequency synchronization system, comprising: a top-level master clock device, a master clock candidate device, and a slave clock device;

[0016] The highest level master clock device is used to: generate a target synchronization message, the target synchronization message carries the clock level information and hop number information of the highest level master clock device, the hop number information indicates the number of hops through which the target synchronization message is transmitted; and send the target synchronization message;

[0017] The master clock candidate device is configured to: upon receiving a target synchronization message, obtain clock level information and hop count information carried in a message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted; and perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message;

[0018] The master clock candidate device is further configured to, if no target synchronization message is received, send a first synchronization message, where the first synchronization message carries clock level information and first hop count information of the master clock candidate device, where the first hop count information indicates the number of hops taken to transmit the first synchronization message;

[0019] The slave clock device is used to obtain the clock level information and hop count information carried in the message header of the target synchronization message when receiving the target synchronization message, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; and perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0020] In an embodiment of the present application, when the target network device is powered on, the device identity of the target network device is determined; the device identity of the target network device includes the highest-level master clock device, the master clock candidate device, or the slave clock device; when the device identity of the target network device is the master clock candidate device or the slave clock device, the target synchronization message is received; when the target synchronization message is received, the clock level information and the hop count information carried in the message header of the target synchronization message are obtained, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; frequency synchronization is performed based on the clock level information and the hop count information carried in the message header of the target synchronization message. In this way, in the scenario where the clock level information and the hop count information are used for frequency synchronization, the clock level information and the hop count information are incorporated into the message header of the target synchronization message, and the target synchronization message is used to transmit the clock level information and the hop count information, without the need to use another message to transmit the clock level information and the hop count information separately. The target synchronization message can be used for both time synchronization and frequency synchronization, thereby solving the problem of inconsistency between time synchronization and frequency synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a schematic flow chart of a frequency synchronization method provided in an embodiment of the present application;

[0022] Figure 2 This is a schematic flowchart of steps for determining the device identity of a target network device provided by an embodiment of the present application;

[0023] Figure 3 is a schematic flow chart of another frequency synchronization method provided in an embodiment of the present application;

[0024] Figure 4 is a schematic flow chart of another frequency synchronization method provided in an embodiment of the present application;

[0025] Figure 5 This is a schematic flowchart of a step of determining a first target port of a target network device provided by an embodiment of the present application;

[0026] Figure 6 is a schematic flow chart of another frequency synchronization method provided in an embodiment of the present application;

[0027] Figure 7 is a schematic structural diagram of a time synchronization system provided in an embodiment of the present application;

[0028] Figure 8 is a schematic flow chart of another frequency synchronization method provided in an embodiment of the present application;

[0029] Figure 9This is a schematic diagram of a synchronization message transmission path between clock nodes in a frequency synchronization method provided in an embodiment of the present application;

[0030] Figure 10 This is a schematic diagram of a synchronization message transmission path between clock nodes in another frequency synchronization method provided in an embodiment of the present application;

[0031] Figure 11 This is a schematic structural diagram of a frequency synchronization device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0033] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0034] The frequency synchronization method provided in the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0035] Figure 1 This is a schematic flowchart of a frequency synchronization method provided in an embodiment of the present application.

[0036] like Figure 1 As shown, the frequency synchronization method provided in the embodiment of the present application, applied to the target network device, may include:

[0037] Step 110: When the target network device is powered on, determine the device identity of the target network device; the device identity of the target network device includes a top-level master clock device, a master clock candidate device, or a slave clock device;

[0038] Step 120: When the target network device is a master candidate device or a slave device, receive a target synchronization message.

[0039] Step 130: upon receiving a target synchronization message, obtaining clock level information and hop count information carried in a message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0040] Step 140: Perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0041] In step 110, when the hardware of the target network device is powered on, the device identity of the target network device can be determined. Different device identities of the target network device require different time synchronization methods to be applied to the target network device. The device identity generally includes a top-level master clock device, a master clock candidate device, or a slave clock device. The top-level master clock device generally acts as a master clock node to send synchronization messages to the slave clock nodes; the slave clock device generally acts as a slave clock node to receive synchronization messages sent by the master clock node; the master clock candidate device can act as a master clock node or a slave clock node. In the event that the top-level master clock device fails, the master clock candidate device can act as a master clock node to send synchronization messages to the slave clock nodes; in the event that the top-level master clock device is normal, the master clock candidate device can act as a slave clock node to receive synchronization messages sent by the master clock node.

[0042] In step 120 and step 130, the target synchronization message may be a sync type message information defined by the standard, or may be other types of message information, and this application does not impose any specific restrictions.

[0043] It can be understood that in the related art, the standard BMC best master clock algorithm generally uses announce type messages to transmit clock information, and the node processes the best master clock according to the clock information in the received announce message type. For example, in the related art, a separate message (such as an announce type message) is used to transmit clock level information and hop count information. In an embodiment of the present application, the clock level information and hop count information are directly compiled into the message header of the target synchronization message (such as a sync type message), and the target synchronization message is used to transmit the clock level information and hop count information. There is no need to use an announce message separately to transmit the clock level information and hop count information, which reduces the message type and the number of messages and simplifies the logic of the frequency synchronization processing.

[0044] Moreover, in the related art, the message type message defined in the 1588 protocol is used to transmit time synchronization information, and the ESMC message is used to transmit frequency synchronization information. The message type required by the time synchronization method is different from the message type required by the frequency synchronization method, and there may be a problem of inconsistency between time synchronization and frequency synchronization. In the embodiment of the present application, the BMC algorithm is directly used to achieve clock frequency synchronization, and there is no need for the ESMC message to transmit frequency synchronization information. The clock level information and hop count information (as frequency synchronization information) are incorporated into the message header of the target synchronization message, and the target synchronization message is used to transmit the clock level information and hop count information. The target synchronization message can be used for both time synchronization and frequency synchronization, solving the problem of inconsistency between time synchronization and frequency synchronization.

[0045] In step 140, the priority of the clock level information is higher than the priority of the hop count information. For example, based on the clock level information and the hop count information carried in the header of the target synchronization message, the clock node with the highest clock level or the clock node with the lowest clock level can be selected as the master clock to achieve frequency synchronization of all clock nodes in the local area network. If the clock levels are the same, the clock node with the highest hop count information or the clock node with the lowest hop count information can be selected as the master clock to achieve frequency synchronization of all clock nodes in the local area network.

[0046] According to the frequency synchronization method provided in the embodiment of the present application, upon receiving a target synchronization message, the clock level information and hop count information carried in the message header of the target synchronization message are obtained, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted; and frequency synchronization is performed based on the clock level information and the hop count information carried in the message header of the target synchronization message. In this way, in a scenario where the clock level information and the hop count information are used for frequency synchronization, the clock level information and the hop count information are incorporated into the message header of the target synchronization message, and the target synchronization message is used to transmit the clock level information and the hop count information. There is no need to use another message to transmit the clock level information and the hop count information separately. The target synchronization message can be used for both time synchronization and frequency synchronization, thereby solving the problem of inconsistency between time synchronization and frequency synchronization.

[0047] It was mentioned above that the device identity of the target network device may include a master clock candidate device. In a specific embodiment, in addition to clock level information and hop count information, the message header of the target synchronization message may also carry target indication information, and the target indication information indicates the number of master clock candidates in the hop count through which the target synchronization message is transmitted.

[0048] The above step 140 may specifically include: performing frequency synchronization according to the clock level information, the hop count information and the target indication information carried in the message header of the target synchronization message.

[0049] The priority of the clock level information is greater than the priority of the hop count information, which is greater than the priority of the target indication information. For example, in step 140, the clock node with the highest clock level or the clock node with the lowest clock level can be used as the master clock to achieve frequency synchronization of all clock nodes in the local area network. If the clock levels are the same, the clock node with the lowest hop count information is used as the master clock to achieve frequency synchronization of all clock nodes in the local area network. If the clock levels and hop count information are the same, the clock node with the highest target indication information is used as the master clock to achieve frequency synchronization of all clock nodes in the local area network.

[0050] In a specific embodiment, in order to avoid affecting other standard information carried by the target synchronization message, the message header of the target synchronization message may include a first reserved field, a second reserved field and a third reserved field, the clock level information is located in the first reserved field, the hop count information is located in the second reserved field, and the target indication information is located in the third reserved field.

[0051] For example, the target synchronization message can be a sync message (a type of event synchronization information). The common header of the target synchronization message includes multiple reserved fields. This solution uses the reserved fields to transmit clock class information, hop count information, and target indication information. Specifically, one reserved field can be redefined as the sCLKClass field to serve as the first reserved field for transmitting clock class information; another reserved field can be redefined as the steps1 field to serve as the second reserved field for transmitting hop count information; and another reserved field can be redefined as the steps2 field to serve as the third reserved field for transmitting target indication information. The following is a detailed description using Tables 1 and 2 as examples.

[0052]

[0053] Table 1

[0054] Table 1 shows the common header of the sync message defined by the IEEE 1588 V2 standard. Octets represents the number of octets occupied by a field. In the common header of the sync message, the upper four bits of the second octet are the reserved field, the sixth octet is the reserved field, and the 17th through 20th octets are the reserved field.

[0055]

[0056]

[0057] Table 2

[0058] Table 2 shows a common header for a sync message defined in this application. The upper four bits of the second octet are defined as the sCLKClass field, serving as the first reserved field for transmitting clock class information; the sixth octet is defined as the steps1 field, serving as the second reserved field for transmitting hop count information; and a reserved field between the seventeenth and twentieth octets in the target synchronization message header can be redefined as the steps2 field, serving as the third reserved field for transmitting target indication information.

[0059] Therefore, the first reserved field is located at the upper four bits of the second octet in the message header of the target synchronization message, the second reserved field is located at the sixth octet in the message header of the target synchronization message; the third reserved field is located at the seventeenth to twentieth octets in the message header of the target synchronization message.

[0060] In this way, the reserved field in the message header of the target synchronization message can be flexibly used to transmit clock level information and hop count information without affecting the standard function of the target synchronization message.

[0061] In a specific embodiment, in order to quickly determine the device identity of the target network device, such as Figure 2 As shown, in the above step 110, when the target network device is powered on, determining the device identity of the target network device may specifically include:

[0062] Step 1101: When the target network device is powered on, obtain the clock code of the target network device;

[0063] Step 1102: Based on the clock code, determine the device identity of the target network device, where the device identity includes a highest-level master clock device, a master clock candidate device, or a slave clock device; wherein the clock code corresponding to the highest-level master clock device, the clock code corresponding to the master clock candidate device, and the clock code corresponding to the slave clock device are all different.

[0064] In an embodiment of the present application, in order to shorten the time required to determine the device identity of the target network device, the clock code of the target network device can be determined based on the power-on status of the target network device when the hardware of the target network device is powered on.

[0065] It is understandable that the complex BMC algorithms in related technologies often require the participation of the CPU. After the CPU is powered on, it takes at least several seconds to boot the operating system, import the application software, and finally run the BMC algorithm.

[0066] However, the embodiment of the present application can directly determine the clock code of the target network device according to the power-on status of the target network device, thereby shortening the time required to determine the device identity of the target network device.

[0067] In practical applications, the target network device may be provided with a clock code detection component. In the above step 1101, when the target network device is powered on, obtaining the clock code of the target network device may specifically include:

[0068] When the target network device is powered on, determining a power-on state of the clock encoding detection component;

[0069] The clock code of the target network device is determined according to the power-on state of the clock code detection component.

[0070] The corresponding relationship between the power-on state of the clock code detection component and the clock code of the target network device can be preset when the hardware of the target network device is powered on. When the target network device is powered on, the power-on state of the clock code detection component is detected; and the clock code of the target network device is determined based on the power-on state of the clock code detection component and the preset corresponding relationship between the power-on state of the clock code detection component and the clock code of the target network device.

[0071] The correspondence between the target network device's clock code and its clock level can be pre-set. After obtaining the target network device's clock code, the target network device's clock level is determined based on the target network device's clock code and the correspondence between the target network device's clock code and its clock level. Furthermore, the target network device's device identity can be determined based on its clock level. The clock level of a slave device is less than the clock level of the candidate master device and less than the clock level of the highest-level master device. The slave device has the lowest clock level, while the highest-level master device has the highest clock level.

[0072] Alternatively, a correspondence between the clock code of the target network device and the device identity of the target network device may be pre-set. After obtaining the clock code of the target network device, the device identity of the target network device is determined based on the clock code of the target network device and the correspondence between the clock code of the target network device and the device identity of the target network device.

[0073] In this way, when the hardware of the target network device is powered on, the device identity of the target network device is determined directly by the clock code corresponding to the power-on state of the clock code detection component, without the need to determine the device identity of the target network device through the target network device sending and receiving messages, thereby improving the efficiency of determining the device identity of the target network device.

[0074] Furthermore, the clock code detection component may include at least one of the following: a chip, an input module, and an output module. The clock code detection component may be a chip, input module, or output module already existing in the target network device. The present application can determine the clock code of the target network device by reusing the chip, input module, or output module already existing in the target network device. This eliminates the need to add new hardware to the target network device as the clock code detection component, allowing the target network device to determine the clock code of the target network device based on the power-on status of the already existing chip, input module, or output module.

[0075] For example, in an embodiment of the present application, a clock code detection component of the target network device is provided with a first pin Pin1 and a second pin Pin2; in the above step 1101, when the target network device is powered on, obtaining the clock code of the target network device may specifically include:

[0076] When the target network device is powered on, determining a pin code of the first pin and a pin code of the second pin;

[0077] The pin code of the first pin and the pin code of the second pin are combined to obtain a clock code of the target network device.

[0078] The first pin has a first state, a second state, and a third state, and the second pin has a first state, a second state, and a third state; each of the first state, the second state, and the third state corresponds to a pin code, and different states correspond to different pin codes;

[0079] The first state is a pull-up state, the second state is a non-pull state, and the third state is a pull-down state. Each state corresponds to two binary bits, and the clock code of the target network device is four binary bits. Table 3 is used as an example for explanation.

[0080] Table 3 is a configuration table of the hardware power-on status and device identity of a target network device.

[0081]

[0082] Table 3

[0083] As shown in Table 3, the pin code of the first pin Pin1 in the pull-up state is 11, the pin code of the pull-down state is 10, and the pin code of the unpull state is 00. The pin code of the second pin Pin2 in the pull-up state is 11, the pin code of the pull-down state is 10, and the pin code of the unpull state is 00.

[0084] In Table 3, the clock code of the target network device can be obtained by combining the pin code of the first pin and the pin code of the second pin. The combination method can be to directly piece together the pin code of the first pin (corresponding to two binary bits) and the pin code of the second pin (corresponding to two binary bits) to obtain four binary bits as the clock code of the target network device.

[0085] Of course, the above encoding methods are merely examples and are not intended to be limiting. The pin encoding of the first pin is not limited to two binary bits, but can also be three binary bits, four binary bits, etc.; the pin encoding of the second pin is also not limited to two binary bits, but can also be three binary bits, four binary bits, etc.; the clock encoding of the target network device is not limited to four binary bits, but can also be five binary bits, six binary bits, etc.; the combination of the pin encoding of the first pin and the pin encoding of the second pin is not limited to direct combination, but can also be arithmetic operations such as addition and subtraction, and this application does not impose specific limitations.

[0086] In this way, the states of the first pin and the second pin set on the target network device can be detected when the target network device hardware is powered on, and the pin code of the first pin and the pin code of the second pin can be determined, thereby quickly determining the clock code of the target network device.

[0087] Of course, in the embodiment of the present application, the power-on state of the clock coding detection component can not only be represented by the pin state of the two pins set on the clock coding detection component mentioned above, but also by other states such as the voltage state, temperature state, pressure state, etc. of other components in the clock coding detection component. The present application does not make specific restrictions here.

[0088] The above mentioned determining the device identity of the target network device. In the embodiments of the present application, different device identities of the target network device will result in different clock synchronization methods being implemented by the target network device. The device identity of the target network device can include a master clock candidate device, a slave clock device, or a top-level master clock device. Furthermore, a master clock candidate device can function as a master clock node or a slave clock node in different situations, a slave clock device can function as a slave clock node, and a top-level master clock device can function as a master clock node. Examples are provided below to illustrate each of these.

[0089] The first case: the target network device is a master clock candidate device, and the master clock candidate device serves as a master clock node.

[0090] like Figure 3 As shown, when the target network device is a master clock candidate device and the master clock candidate device serves as a master clock node, the frequency synchronization method provided in the embodiment of the present application is applied to the candidate network element. The method may include:

[0091] Step 310: When the target network device is powered on, determine the device identity of the target network device; the device identity of the target network device is a master clock candidate device;

[0092] Step 320: When the target network device is a master candidate device, receive a target synchronization message.

[0093] Step 330: If the target network device is a master candidate device, determine whether the target network device has received the target synchronization message;

[0094] Step 340: If the target synchronization message is not received, a first synchronization message is sent, wherein the first synchronization message carries the clock level information, first hop number information and first indication information of the target network device, wherein the first hop number information indicates the number of hops passed through to transmit the first synchronization message, and the first indication information indicates the number of master clock candidates in the number of hops passed through to transmit the first synchronization message.

[0095] The first synchronization message may be a synchronization message generated by the target network device. The first hop count information indicates that the number of hops through which the first synchronization message is transmitted is generally 0.

[0096] The first indication information indicates that the number of master clock candidates in the number of hops passed by the first synchronization message is generally 0.

[0097] Among them, the priority of the clock level information of the target network device is greater than the priority of the first hop count information, which is greater than the priority of the first indication information, which is conducive to subsequent frequency synchronization based on the clock level information, first hop count information and first indication information of the target network device carried by the first synchronization message.

[0098] Step 350: Upon receiving a target synchronization message, obtain clock level information, hop count information, and target indication information carried in the message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted, and the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted;

[0099] Step 360: When receiving the target synchronization message, compare the clock level information carried in the message header of the target synchronization message with the local clock level information;

[0100] Step 370: When the local clock level information is higher than the clock level information, a first synchronization message is sent, wherein the first synchronization message carries the clock level information, first hop information and first indication information of the target network device, the first hop information indicates the number of hops passed through to transmit the first synchronization message, and the first indication information indicates the number of master clock candidates in the number of hops passed through to transmit the first synchronization message.

[0101] The first synchronization message may be a synchronization message generated by the target network device, and the specific content of the first synchronization message in step 370 may be the same as that in step 340. The first hop count information indicates that the number of hops through which the first synchronization message is transmitted is generally 0.

[0102] The first synchronization message may also carry first indication information, where the first indication information indicates that the number of master clock candidates in the number of hops passed by the first synchronization message is generally 0.

[0103] Among them, the priority of the clock level information of the target network device is greater than the priority of the first hop count information, which is greater than the priority of the first indication information, which is conducive to subsequent frequency synchronization based on the clock level information, first hop count information and first indication information of the target network device carried by the first synchronization message.

[0104] Among them, the above-mentioned step 310 can refer to the specific content of step 110; the above-mentioned step 320 can refer to the specific content of step 120, the above-mentioned step 350 can be a sub-step of step 130; the above-mentioned step 360 and the above-mentioned step 370 can be sub-steps of step 140.

[0105] In the case where the target network device is a master clock candidate device: if it has not received the target synchronization message, the target network device can act as the master clock, generate a first synchronization message, and send the first synchronization message to the slave clock. If it has received the target synchronization message, and if the local clock level information of the target network device is higher than the clock level information carried in the received target synchronization message, the target network device can act as the master clock, generate a first synchronization message, and send the first synchronization message to the slave clock.

[0106] In this way, after determining the device identity of the target network device, when the target network device is a master clock candidate device, when the target network device has not received the target synchronization message or when the local clock level information is higher than the clock level information carried by the received target synchronization message, the target network device can be used as the master clock to send the first synchronization message or the second synchronization message to the slave clock node connected to the target network device network to achieve frequency synchronization of the local area network.

[0107] The second case: the target network device is a master clock candidate device and the master clock candidate device serves as a slave clock node; or the target network device is a slave clock device.

[0108] In the embodiment of the present application, the number of target synchronization messages may be multiple.

[0109] like Figure 4 As shown, when the target network device is a master clock candidate device, the frequency synchronization method provided in the embodiment of the present application may further include:

[0110] Step 410: When the target network device is powered on, determine the device identity of the target network device; the device identity of the target network device is a master candidate device or a slave device;

[0111] Step 420: Receive multiple target synchronization messages through each port of the target network device;

[0112] Step 430: When receiving the target synchronization message, obtain the clock level information and hop count information carried in the message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0113] Step 440: When the target network device is a master candidate device and the local clock level information of the target network device is not higher than the clock level information carried by the target synchronization message, or when the target network device is a slave device, determine the first target port of the target network device based on the clock level information and hop count information carried in the message header of each target synchronization message in the multiple target synchronization messages;

[0114] The first target port may be a slave port (ie, a slave port).

[0115] Step 450: Determine a second target port of the target network device based on the first target port of the target network device;

[0116] The second target port may be a primary port (ie, a Master port).

[0117] Step 460: Send a second synchronization message through the second target port, where the second synchronization message carries target clock level information, second hop count information, and second indication information, where the value of the second hop count information is equal to the target hop count information plus one.

[0118] The target clock level information is the clock level information carried in the message header of the designated message, the target hop count information is the hop count information carried in the message header of the designated message, and the designated message is the target synchronization message with the highest clock level information carried in the message headers of the target synchronization messages among the multiple target synchronization messages;

[0119] Wherein, when the target network device is a slave clock device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted; when the target network device is a master clock candidate device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted plus one.

[0120] Among them, the above-mentioned step 410 can refer to the specific content of step 110; the above-mentioned step 420 can be a sub-step of step 120, and the above-mentioned step 430 can refer to the specific content of step 130; the above-mentioned step 440, the above-mentioned step 450 and the above-mentioned step 460 can be sub-steps of step 140.

[0121] It can be understood that in step 460, when there is one designated message among multiple target synchronization messages, the target hop count information is the hop count information carried in the message header of this designated message; when there are multiple designated messages among multiple target synchronization messages, the target hop count information is the lowest hop count in the hop count information carried in the message headers of the multiple designated messages.

[0122] Among them, the priority of the target clock level information is greater than the priority of the second hop number information, which is greater than the priority of the second indication information, which is conducive to subsequent frequency synchronization according to the target clock level information, the second hop number information and the second indication information.

[0123] In this way, when the target network device is a master clock candidate device and the local clock level information of the target network device is not higher than the clock level information carried by the target synchronization message, or when the target network device is a slave clock device, the target network device can act as a slave clock node and send a second synchronization message through the second target port to achieve frequency synchronization of the local area network.

[0124] In the embodiment of the present application, in the process of determining the first target port of the target network device, the priority of the clock level information is higher than the priority of the hop count information. Figure 5 As shown, the above step 440 may specifically include:

[0125] Step 4401: Determine the highest clock level in the clock level information carried in the message header of each target synchronization message;

[0126] Step 4402: When a header of a target synchronization message carries the highest clock level among the multiple target synchronization messages, determine the port that receives the target synchronization message carrying the highest clock level as the first target port of the target network device;

[0127] Step 4403: When there are multiple target synchronization messages among the multiple target synchronization messages, all of which carry the highest clock level in their message headers, determine the lowest hop count in the hop count information carried in the message headers of each target synchronization message; when there is only one target synchronization message carrying the lowest hop count among the multiple target synchronization messages carrying the highest clock level, determine the port that receives the target synchronization message carrying the highest clock level and the lowest hop count as the first target port of the target network device.

[0128] Thus, in the process of determining the first destination port of the target network device based on the clock level information and hop count information carried in the message headers of each of the multiple target synchronization messages, the clock level information has a higher priority than the hop count information. The first destination port of the target network device can be determined preferentially based on the clock level carried by the target synchronization message. Under conditions where the clock levels are the same, the first destination port of the target network device can be determined based on the hop count information carried by the target synchronization message.

[0129] In the embodiment of the present application, in the process of determining the first target port of the target network device, the header of the target synchronization message further carries target indication information, where the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted. The above-mentioned step 440 may specifically include:

[0130] Step 4404: When there are multiple target synchronization messages whose message headers all carry the highest clock level and the lowest hop count among the multiple target synchronization messages, determine the maximum indication information in each target synchronization message carrying the highest clock level and the lowest hop count;

[0131] Step 4405: Determine the port that receives the target synchronization message carrying the highest clock level, the lowest hop count and the maximum indication information as the first target port of the target network device.

[0132] In the process of determining the first target port of the target network device based on the clock level information, hop count information, and target indication information carried in the message header of each target synchronization message among multiple target synchronization messages, the clock level information has a higher priority than the hop count information, and the target indication information has a higher priority than the target indication information. The first target port of the target network device can be determined based on the clock level carried by the target synchronization message. Under the condition that the clock levels are the same, the first target port of the target network device can be determined based on the hop count information carried by the target synchronization message. Under the condition that the clock level and hop count information are the same, the first target port of the target network device can be determined based on the target indication information carried by the target synchronization message.

[0133] It can be understood that the clock level of the master candidate device is higher than that of the slave device, which means that the degradation of the clock performance may be smaller when passing through the master candidate device than when passing through the slave device; it is also possible that when the master node fails, the master candidate device may become the master clock, and the synchronization message transmission path may not change. Therefore, under the same conditions of clock level and hop count information, compared with the synchronization message transmission path passing through the slave device, the embodiment of the present application can determine that the synchronization message transmission path passing through the master candidate device is better. On this basis, since the target indication information can indicate the number of master candidates in the number of hops that the target synchronization message is transmitted through, under the same conditions of clock level and hop count information, the port that receives the target synchronization message with the maximum indication information can be determined as the first target port of the target network device.

[0134] In addition, in the embodiment of the present application, in the process of determining the first target port of the target network device, the first target port of the target network device can also be determined by the port number. The priority of the clock level information is higher than the priority of the hop count information, which is higher than the priority of the target indication information, which is higher than the priority of the port number. The above step 440 can also specifically include:

[0135] Step 4406: When there are multiple target synchronization messages among the multiple target synchronization messages, and the message headers of the multiple target synchronization messages all carry the highest clock level, the lowest hop count, and the maximum indication information, determine multiple port numbers that receive the target synchronization messages carrying the highest clock level, the lowest hop count, and the maximum indication information;

[0136] Step 4407: Determine the port with the smallest or largest number value among the multiple port numbers as the first target port of the target network device.

[0137] Thus, in the process of determining the first target port of the target network device based on the clock level information and hop count information carried in the message headers of each of the multiple target synchronization messages and the multiple port numbers of the received target synchronization messages, the priority of the clock level information is higher than the priority of the hop count information, which is higher than the priority of the target indication information, which is higher than the priority of the port number. Under the conditions that the clock level, hop count information, and target indication information are the same, the first target port of the target network device is determined based on the port number carried in the received target synchronization message.

[0138] In addition, after determining the first target port, the other ports of the target network device are in a passive state. In the case of a failure of the first target port, a new first target port can be determined from the ports in the passive state to implement a protection switching function.

[0139] The third case: The target network device is the highest-level master clock device.

[0140] like Figure 6 As shown, an embodiment of the present application provides a frequency synchronization method, which is applied to a highest-level master clock device and may further include:

[0141] Step 610: If the target network device is a top-level master clock device, generate a target synchronization message, wherein the target synchronization message carries clock level information and hop count information of the target network device, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted.

[0142] Step 620: Send a target synchronization message.

[0143] In step 610, the hop count information indicates that the number of hops through which the target synchronization message is transmitted is generally 0.

[0144] In step 620, the grandmaster device can send a target synchronization message to other candidate master devices or slave devices in the frequency synchronization system, enabling these candidate master devices or slave devices to receive the target synchronization message and perform frequency synchronization. In this way, if the target network device is the grandmaster device, the target synchronization message is used to convey clock level information and hop count information, eliminating the need for separate announce messages to convey these information. This reduces the number of message types and messages and simplifies the frequency synchronization logic.

[0145] Moreover, in the related art, the message type message defined in the 1588 protocol is used to transmit time synchronization information, and the ESMC message is used to transmit frequency synchronization information. The message type required by the time synchronization method is different from the message type required by the frequency synchronization method, and there may be a problem of inconsistency between time synchronization and frequency synchronization. In the embodiment of the present application, the BMC algorithm is directly used to achieve clock frequency synchronization, and there is no need for the ESMC message to transmit frequency synchronization information. The clock level information and hop count information (as frequency synchronization information) are incorporated into the message header of the target synchronization message, and the target synchronization message is used to transmit the clock level information and hop count information. The target synchronization message can be used for both time synchronization and frequency synchronization, solving the problem of inconsistency between time synchronization and frequency synchronization.

[0146] In the above step 610, in addition to the clock level information and hop count information, the message header of the target synchronization message may also carry target indication information, where the target indication information indicates the number of master clock candidates in the hop count through which the target synchronization message is transmitted.

[0147] The above-mentioned step 610 may specifically include: when the device identity of the target network device is the highest-level master clock device, generating a target synchronization message, the target synchronization message carrying the clock level information, hop number information and target indication information of the target network device; the hop number information indicates the number of hops through which the target synchronization message is transmitted; the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted.

[0148] Wherein, when the device identity of the target network device is the highest-level master clock device, the hop count information in the generated target synchronization message is generally 0, and the target indication information is generally 0.

[0149] The priority of the clock level information is higher than the priority of the hop count information, which is higher than the priority of the target indication information. This helps the device that receives the target synchronization message to synchronize the frequencies of various clock nodes in the local area network based on the clock level information, hop count information, and target indication information of the target network device.

[0150] In practical applications, the highest-level master clock device, master clock candidate device, and slave clock device mentioned above may be different clock nodes in the same frequency synchronization system.

[0151] like Figure 7 As shown, an embodiment of the present application provides a frequency synchronization system, including: a highest-level master clock device 701, a master clock candidate device 702 and a slave clock device 703.

[0152] like Figure 7As shown, the grandmaster device 701 can communicate with the master candidate device 702 and the slave device 703; the master candidate device 702 can communicate with the grandmaster device 701 and the slave device 703; and the slave device 703 can communicate with the grandmaster device 701, the master candidate device 702, or other slave devices.

[0153] Of course, the communication connection mode between the highest-level master clock device 701, the master clock candidate device 702 and the slave clock device 703 in the frequency synchronization system is not limited to Figure 7 The method shown may also be other methods, and this application does not make any specific limitations here.

[0154] The highest level master clock device 701 is configured to: generate a target synchronization message, wherein the target synchronization message carries the clock level information and hop count information of the highest level master clock device, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted; and send the target synchronization message;

[0155] The master clock candidate device 702 is configured to: upon receiving a target synchronization message, obtain clock level information and hop count information carried in a message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted; and perform frequency synchronization based on the clock level information and the hop count information carried in the message header of the target synchronization message;

[0156] The master candidate device 702 is further configured to, if no target synchronization message is received, send a first synchronization message, where the first synchronization message carries clock level information and first hop count information of the master candidate device, where the first hop count information indicates the number of hops taken to transmit the first synchronization message;

[0157] The slave clock device 703 is used to obtain the clock level information and hop count information carried in the message header of the target synchronization message when receiving the target synchronization message, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; and perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0158] In this way, in a frequency synchronization system, each clock node uses target synchronization messages to transmit clock level information and hop count information, eliminating the need for separate announce messages. This reduces the number of message types and messages, simplifying the frequency synchronization logic. The following example illustrates the frequency synchronization method for a single clock node in a frequency synchronization system.

[0159] like Figure 8As shown, for a single clock node in a frequency synchronization system, an embodiment of the present application provides a frequency synchronization method, which may include:

[0160] Step 810: After the clock node is powered on, the local clock level of the clock node is obtained according to the hardware status of the clock node, and the device identity of the clock node is determined; wherein the device identity of the clock node includes: the highest-level master clock device, the master clock candidate device, or the slave clock device.

[0161] In a frequency synchronization system, to maintain high robustness, at least two communication paths must be available between two clock nodes. If one of the two communication paths fails, the clock nodes can quickly switch to the other path for communication.

[0162] To maintain high robustness, the frequency synchronization system can include clock nodes that are candidates for master clocks. If the highest-level master clock fails, the candidate master clock can assume the role of master clock node. In other words, the candidate master clock can act as a master clock node and send synchronization messages to slave clock nodes.

[0163] In step 810 , if it is determined that the clock node is the highest-level master clock device, step 820 may be executed.

[0164] In step 810 , if it is determined that the clock node is a master clock candidate device, step 830 may be executed.

[0165] In step 810 , if it is determined that the clock node is a slave device, steps 860 and 870 may be executed.

[0166] Step 820: When the clock node is the highest-level master clock device, a synchronization message is generated and sent. The synchronization message carries the synchronization information of the local clock (sCLKClass, steps1, steps2); wherein sCLKClass is the highest clock level code 0XF, steps1 is 0, and steps2 is 0.

[0167] Step 830: When the clock node is a master clock candidate device, after power-on, it is detected whether the clock node receives synchronization message (sCLKClass, steps 1, steps 2) sent by other nodes.

[0168] In step 830 , in order to reduce the convergence time of frequency synchronization and eliminate unnecessary oscillations, the embodiment of the present application may specify that two or more master clock candidate devices have different local clock level code values.

[0169] In step 830 , if the clock node does not receive the synchronization message, the clock node is used as the master clock and step 840 may be executed.

[0170] In step 830 , if the clock node receives the synchronization message, step 850 may be executed.

[0171] Step 840: Generate a synchronization message and send it. The synchronization message carries the synchronization information of the local clock (sCLKClass, steps1, steps2). sCLKClass is the local clock class code, steps1 is 0, and steps2 is 0.

[0172] Step 850: Compare the local sCLKClass value with the sCLKClass value in the received synchronization message to determine whether the clock node itself is a master clock or a slave clock.

[0173] In step 850, if the clock node is a master candidate device and the local sCLKClass value is less than the sCLKClass value in the received synchronization message, the clock node may be used as a slave clock. Steps 860 and 870 are then executed in sequence.

[0174] In step 850 , when the clock node is a master clock candidate device, if the local sCLKClass value is higher than the sCLKClass value in the received synchronization message, the clock node may be used as the master clock and step 840 may be executed.

[0175] Step 860: Receive synchronization messages (sCLKClass, steps 1, steps 2) sent by other nodes, and determine the slave port and master port of the clock node.

[0176] Step 870: further sending synchronization message (sCLKClass, steps1+1, steps2) or (sCLKClass, steps1+1, steps2+1) to other nodes through the master port.

[0177] In step 870 , when the clock node is a slave device, a synchronization message (sCLKClass, steps1+1, steps2) is further sent to other nodes through the master port.

[0178] In step 870 , when the clock node is a master clock candidate device serving as a slave clock, a synchronization message (sCLKClass, steps1+1, steps2+1) is further sent to other nodes through the master port.

[0179] sCLKClass represents clock class information, steps1 represents hop count information, and steps2 represents target indication information (ie, the number of master clock candidates in steps1 through which the synchronization information is transmitted).

[0180] The following examples illustrate specific application scenarios of clock nodes in a local area network.

[0181] like Figure 9 and Figure 10 As shown in the figure, the N1 node clock is designed as the highest level clock (clock level is 0XF), the N6 node clock is designed as the master clock candidate (clock level is 0XE), and the remaining node clocks are designed as slave clocks (clock level is 0X8). Using the method described in this application, the synchronization message information path received and sent by all clock nodes is as follows: Figure 9 The dashed line represents the synchronization information (sCLKClass, steps1, steps2) adopted by the receiver, and the dotted line represents the synchronization information (sCLKClass, steps1, steps2) discarded by the receiver.

[0182] like Figure 9 As shown in the figure, if the clock of node N1 is normal, it is the highest-level master clock. After powering on, node N1 will not accept synchronization information sent by other nodes in the network. Node N1 sends local information (0XF, 0, 0) to N2 / N3 / N6. Upon receiving the information, N2 / N3 / N6 compares the local clock class sCLKClass value and finds it is lower than the received sCLKClass value (i.e., 0XF). N2 / N3 / N6 then passes the information (0XF, 1, 0) to the other ports, indicating that the synchronization information has already undergone one hop. Node N4 receives data from N6 (0XF, 1, 1) and N2 (0XF, 1, 0). Since the master candidate has a higher clock level than the slave, clock performance degradation may be less when passing through the master candidate than when passing through the slave. N4 determines that the data from N6 is superior to the data from N2. N4 sets the P2 port receiving N6's data as a slave port and sends data (0XF, 2, 1) to the other ports. Further analysis reveals that N5 receives synchronization information from N6, and N7 receives synchronization information from N6.

[0183] like Figure 10As shown in the figure, if node N1 fails, all slave nodes wait for their ports to receive new synchronization information. In this example, node N6 is a master candidate. If node N6 times out and fails to receive synchronization information from node N1, it becomes the master clock and proactively generates synchronization messages to send to other clock nodes.

[0184] In addition, if a slave node has multiple ports capable of receiving synchronization information from the master clock, a slave port is selected based on pre-set rules. Other ports may enter the passive state. If a slave port cannot properly receive synchronization information from the master clock, one of the passive ports can be selected as a new slave port to implement protection switching.

[0185] It should be noted that the frequency synchronization method provided in the embodiment of the present application can be executed by a frequency synchronization device, or a control module in the frequency synchronization device for executing the frequency synchronization method. In the embodiment of the present application, the frequency synchronization device provided in the embodiment of the present application is described by taking the frequency synchronization device executing the frequency synchronization method as an example.

[0186] Figure 11 This is a schematic structural diagram of a frequency synchronization device provided in an embodiment of the present application.

[0187] like Figure 11 As shown, the frequency synchronization device 1100 provided in this embodiment of the present application may include:

[0188] Determining module 1101, receiving module 1102, acquiring module 1103 and frequency synchronization module 1104,

[0189] The determining module 1101 is configured to determine the device identity of the target network device when the target network device is powered on; the device identity of the target network device includes a top-level master clock device, a master clock candidate device, or a slave clock device;

[0190] The receiving module 1102 is configured to receive a target synchronization message when the device identity of the target network device is a master candidate device or a slave device;

[0191] The acquisition module 1103 is configured to, upon receiving a target synchronization message, acquire clock level information and hop count information carried in a message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0192] The frequency synchronization module 1104 is configured to perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message.

[0193] In the frequency synchronization device provided in the embodiment of the present application, the determination module is used to determine the device identity of the target network device when the target network device is powered on; the device identity of the target network device includes the highest-level master clock device, the master clock candidate device or the slave clock device; the receiving module is used to receive the target synchronization message when the device identity of the target network device is the master clock candidate device or the slave clock device; the acquisition module is used to obtain the clock level information and hop count information carried in the message header of the target synchronization message when the target synchronization message is received, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; the frequency synchronization module is used to perform frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message. In this way, in the scenario where clock level information and hop count information are used for frequency synchronization, the clock level information and hop count information are incorporated into the message header of the target synchronization message, and the target synchronization message is used to transmit the clock level information and hop count information. There is no need to use another message separately to transmit the clock level information and hop count information. The target synchronization message can be used for both time synchronization and frequency synchronization, solving the problem of inconsistency between time synchronization and frequency synchronization.

[0194] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the message header of the target synchronization message further carries target indication information, where the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted;

[0195] The frequency synchronization module is used to perform frequency synchronization according to the clock level information, the hop count information and the target indication information carried in the message header of the target synchronization message.

[0196] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the message header of the target synchronization message includes a first reserved field, a second reserved field and a third reserved field, the clock level information is located in the first reserved field, the hop count information is located in the second reserved field, and the target indication information is located in the third reserved field.

[0197] The first reserved field is located at the upper four bits of the second octet in the message header of the target synchronization message, the second reserved field is located at the sixth octet in the message header of the target synchronization message; the third reserved field is located at the seventeenth to twentieth octets in the message header of the target synchronization message;

[0198] The target synchronization message is a sync message.

[0199] In this way, the reserved field in the message header of the target synchronization message can be flexibly used to transmit clock level information and hop count information without affecting the standard function of the target synchronization message.

[0200] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the determining module specifically includes:

[0201] A clock code acquisition module, configured to acquire a clock code of the target network device when the target network device is powered on;

[0202] a device identity determination module, configured to determine a device identity of the target network device based on the clock code, the device identity including a top-level master clock device, a master clock candidate device, or a slave clock device;

[0203] The clock codes corresponding to the highest-level master clock device, the clock codes corresponding to the master clock candidate devices, and the clock codes corresponding to the slave clock devices are all different.

[0204] The target network device is provided with a clock code detection component; the clock code acquisition module is specifically used to:

[0205] When the target network device is powered on, determining a power-on state of the clock encoding detection component;

[0206] The clock code of the target network device is determined according to the power-on state of the clock code detection component.

[0207] In this way, when the target network device hardware is powered on, the device identity of the target network device is directly determined by the clock code corresponding to the hardware status of the target network device, without the need to determine the device identity of the target network device through the target network device sending and receiving messages, thereby improving the efficiency of determining the device identity of the target network device.

[0208] Optionally, in the frequency synchronization device provided in the embodiment of the present application, a first pin and a second pin are provided on the clock encoding detection component of the target network device;

[0209] The clock code acquisition module specifically includes:

[0210] a pin code acquisition module, configured to determine the pin code of the first pin and the pin code of the second pin when the target network device is powered on;

[0211] A clock code determination module is used to combine the pin code of the first pin and the pin code of the second pin to obtain the clock code of the target network device.

[0212] The first pin has a first state, a second state and a third state, and the second pin has a first state, a second state and a third state; each of the first state, the second state and the third state corresponds to a pin code, and different states correspond to different pin codes.

[0213] The first state is a pull-up state, the second state is a non-pull state, and the third state is a pull-down state. Each state corresponds to two binary bits, and the clock code of the target network device is four binary bits.

[0214] In this way, the states of the first pin and the second pin set on the target network device can be detected when the target network device hardware is powered on, and the pin code of the first pin and the pin code of the second pin can be determined, thereby quickly determining the clock code of the target network device.

[0215] Optionally, in the frequency synchronization apparatus provided in the embodiment of the present application, the target network device is a master clock candidate device, and the frequency synchronization apparatus further includes:

[0216] The first sending module is used to send a first synchronization message when the target synchronization message is not received. The first synchronization message carries the clock level information and first hop information of the target network device. The first hop information indicates the number of hops required to transmit the first synchronization message.

[0217] In this way, after determining the device identity of the target network device, when the target network device is a master clock candidate device and when the target network device has not received the target synchronization message, the target network device can be used as the master clock to send the first synchronization message to the slave clock node connected to the target network device network to achieve frequency synchronization of the local area network.

[0218] Optionally, in the frequency synchronization apparatus provided in an embodiment of the present application, the target network device is a master clock candidate device, and the frequency synchronization module includes a comparison module and a second sending module;

[0219] A comparison module, configured to compare the clock level information carried in the message header of the target synchronization message with the local clock level information;

[0220] The second sending module is used to send a first synchronization message when the local clock level information is higher than the clock level information. The first synchronization message carries the clock level information and first hop number information of the target network device. The first hop number information indicates the number of hops required to transmit the first synchronization message.

[0221] In this way, after determining the device identity of the target network device, when the target network device is a master clock candidate device, and when the local clock level information of the target network device is higher than the clock level information carried by the received target synchronization message when the target network device receives the target synchronization message, the target network device can be used as the master clock to send the first synchronization message to the slave clock node connected to the target network device network to achieve frequency synchronization of the local area network.

[0222] Optionally, in the frequency synchronization device provided in the embodiment of the present application, the number of the target synchronization messages is multiple; and the frequency synchronization device further includes:

[0223] The receiving module is specifically configured to receive multiple target synchronization messages through each port of the target network device;

[0224] The frequency synchronization module further includes:

[0225] a first port determination module configured to determine a first target port of the target network device based on the clock level information and hop count information carried in a message header of each target synchronization message in a case where the target network device is a master candidate device and the local clock level information of the target network device is not higher than the clock level information carried by the target synchronization message, or when the target network device is a slave device;

[0226] The second port determining module is configured to determine a second target port of the target network device based on the first target port of the target network device;

[0227] a sending module, configured to send a second synchronization message through the second target port, where the second synchronization message carries target clock level information, second hop number information, and second indication information, where the value of the second hop number information is equal to the target hop number information plus one;

[0228] The target clock level information is the clock level information carried in the message header of the designated message, the target hop count information is the hop count information carried in the message header of the designated message, and the designated message is the target synchronization message with the highest clock level information carried in the message headers of the target synchronization messages among the multiple target synchronization messages;

[0229] Wherein, when the target network device is a slave clock device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted; when the target network device is a master clock candidate device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted plus one.

[0230] In this way, when the target network device is a master clock candidate device and the local clock level information of the target network device is not higher than the clock level information carried by the target synchronization message, or when the target network device is a slave clock device, the target network device can act as a slave clock and send a second synchronization message through the second target port to achieve frequency synchronization of the local area network.

[0231] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the first port determination module is specifically configured to:

[0232] Determine the highest clock level in the clock level information carried in the message header of each target synchronization message;

[0233] In a case where a message header of a target synchronization message among the multiple target synchronization messages carries the highest clock level, determining a port that receives the target synchronization message carrying the highest clock level as a first target port of the target network device;

[0234] In the case that there are multiple target synchronization messages among the multiple target synchronization messages, all of which carry the highest clock level in their message headers, determine the lowest hop count in the hop count information carried in the message headers of each target synchronization message; in the case that there is only one target synchronization message carrying the lowest hop count among the multiple target synchronization messages carrying the highest clock level, the port that receives the target synchronization message carrying the highest clock level and the lowest hop count will be determined as the first target port of the target network device.

[0235] Thus, in the process of determining the first destination port of the target network device based on the clock level information and hop count information carried in the message headers of each of the multiple target synchronization messages, the clock level information has a higher priority than the hop count information. The first destination port of the target network device can be determined preferentially based on the clock level carried by the target synchronization message. Under conditions where the clock levels are the same, the first destination port of the target network device can be determined based on the hop count information carried by the target synchronization message.

[0236] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the first port determination module is specifically configured to:

[0237] In a case where a plurality of target synchronization messages have message headers that carry the highest clock level and the lowest hop count, determining maximum indication information in each target synchronization message that carries the highest clock level and the lowest hop count;

[0238] The port that receives the target synchronization message carrying the highest clock level, the lowest hop count and the maximum indication information is determined as the first target port of the target network device.

[0239] Thus, in determining the first destination port of the target network device, the clock level information takes precedence over the hop count information, which takes precedence over the target indication information. Under conditions in which the clock level and hop count information are equal, the first destination port of the target network device is determined based on the number of master clock candidates traversed by the hop count indicated by the target indication information.

[0240] Optionally, in the frequency synchronization device provided in an embodiment of the present application, the first port determination module is specifically configured to:

[0241] In a case where there are multiple target synchronization messages among the multiple target synchronization messages, the message headers of which all carry the highest clock level, the lowest hop count, and the maximum indication information, determining multiple port numbers that receive the target synchronization messages carrying the highest clock level, the lowest hop count, and the maximum indication information;

[0242] The port with the smallest or largest number among the multiple port numbers is determined as the first target port of the target network device.

[0243] Thus, in determining the first target port of the target network device, the clock level information has a higher priority than the hop count information, which has a higher priority than the target indication information, which has a higher priority than the port number. Under the same conditions as the clock level, hop count, and target indication information, the first target port of the target network device is determined based on the port number carried in the received target synchronization message.

[0244] Optionally, in the frequency synchronization device provided in the embodiment of the present application, the frequency synchronization device further includes:

[0245] a generating module, configured to generate a target synchronization message when the device identity of the target network device is a highest-level master clock device, wherein the target synchronization message carries clock level information and hop count information of the target network device, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted;

[0246] A sending module is used to send the target synchronization message.

[0247] In this way, when the device identity of the target network device is the highest-level master clock device, the target synchronization message is used to transmit the clock level information and the number of hops information, and there is no need to use the announce message separately to transmit the clock level information and the number of hops information, which reduces the message type and the number of messages and simplifies the logic of frequency synchronization processing.

[0248] The frequency synchronization device in the embodiments of the present application can be a device, or a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. The non-mobile electronic device can be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc., and the embodiments of the present application do not specifically limit this.

[0249] The frequency synchronization device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0250] The frequency synchronization device provided in the embodiment of the present application can implement each process implemented in the above method embodiment. To avoid repetition, it will not be described here.

[0251] Optionally, an embodiment of the present application also provides an electronic device, including a processor, a memory, and a program or instruction stored in the memory and executable on the processor. When the program or instruction is executed by the processor, the various processes of the above-mentioned method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, they will not be described here.

[0252] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0253] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0254] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer-readable storage medium, such as a computer read-only memory (ROM), random access memory (RAM), a magnetic disk, or an optical disk.

[0255] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0256] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0257] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A frequency synchronization method, characterized in that: Applied to target network devices, including: When the target network device is powered on, determining the device identity of the target network device by using the clock code corresponding to the power-on state of the clock code detection component; the device identity of the target network device includes a highest-level master clock device, a master clock candidate device, or a slave clock device; When the device identity of the target network device is a master clock candidate device or a slave clock device, receiving a target synchronization message; When a target synchronization message is received, obtaining clock level information and hop count information carried in a message header of the target synchronization message, where the hop count information indicates the number of hops through which the target synchronization message is transmitted; Performing frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message; The header of the target synchronization message further carries target indication information, where the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted; the header of the target synchronization message includes a first reserved field, a second reserved field, and a third reserved field, where the clock level information is located in the first reserved field, the number of hops information is located in the second reserved field, and the target indication information is located in the third reserved field; The performing frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message includes: performing frequency synchronization according to the clock level information, the hop count information and the target indication information carried in the message header of the target synchronization message; When the device identity of the target network device is a master clock candidate device and the master clock candidate device has not received the target synchronization message, the master clock candidate device acts as a master clock, generates a first synchronization message, and sends the first synchronization message.

2. The frequency synchronization method according to claim 1, wherein: The first reserved field is located at the upper four bits of the second octet in the message header of the target synchronization message, the second reserved field is located at the sixth octet in the message header of the target synchronization message, and the third reserved field is located at the seventeenth to twentieth octets in the message header of the target synchronization message; The target synchronization message is a sync message.

3. The frequency synchronization method according to claim 1, wherein: When the target network device is powered on, determining the device identity of the target network device by using a clock code corresponding to a power-on state of a clock code detection component includes: When the target network device is powered on, obtaining a clock code of the target network device; Determining a device identity of the target network device based on the clock code, where the device identity of the target network device includes a top master clock device, a master clock candidate device, or a slave clock device; The clock codes corresponding to the highest-level master clock device, the clock codes corresponding to the master clock candidate devices, and the clock codes corresponding to the slave clock devices are all different.

4. The frequency synchronization method according to claim 3, wherein: The target network device is provided with a clock encoding detection component; When the target network device is powered on, obtaining the clock code of the target network device includes: When the target network device is powered on, determining a power-on state of the clock encoding detection component; The clock code of the target network device is determined according to the power-on state of the clock code detection component.

5. The frequency synchronization method according to claim 4, characterized in that: The clock encoding detection component of the target network device is provided with a first pin and a second pin; When the target network device is powered on, obtaining the clock code of the target network device includes: When the target network device is powered on, determining a pin code of the first pin and a pin code of the second pin; The pin code of the first pin and the pin code of the second pin are combined to obtain a clock code of the target network device.

6. The frequency synchronization method according to claim 5, characterized in that: in, The first pin has a first state, a second state, and a third state, and the second pin has a first state, a second state, and a third state; each of the first state, the second state, and the third state corresponds to a pin code, and different states correspond to different pin codes; The first state is a pull-up state, the second state is a non-pull state, and the third state is a pull-down state. Each state corresponds to two binary bits, and the clock code of the target network device is four binary bits.

7. The frequency synchronization method according to claim 1, wherein: The first synchronization message carries the clock level information, first hop number information and first indication information of the target network device, the first hop number information indicates the number of hops through which the first synchronization message is transmitted, and the first indication information indicates the number of master clock candidates in the number of hops through which the first synchronization message is transmitted.

8. The frequency synchronization method according to claim 1, wherein: The target network device is a master clock candidate device, and the performing frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message includes: Comparing the clock level information carried in the message header of the target synchronization message with the local clock level information; When the local clock level information is higher than the clock level information, a first synchronization message is sent, which carries the clock level information, first hop information and first indication information of the target network device, the first hop information indicates the number of hops passed through to transmit the first synchronization message, and the first indication information indicates the number of master clock candidates in the number of hops passed through to transmit the first synchronization message.

9. The frequency synchronization method according to claim 1, wherein: The number of the target synchronization messages is multiple; The receiving the target synchronization message includes: receiving a plurality of target synchronization messages through each port of the target network device; When the target network device is a master candidate device and the local clock level information of the target network device is not higher than the clock level information carried by the target synchronization message, or when the target network device is a slave device, performing frequency synchronization according to the clock level information and the hop count information carried in the message header of the target synchronization message further includes: When the local clock level information is not higher than the clock level information, determining the first target port of the target network device based on the clock level information and the hop count information carried in the message header of each target synchronization message in the multiple target synchronization messages; Determining a second target port of the target network device based on the first target port of the target network device; Sending a second synchronization message through the second target port, where the second synchronization message carries target clock level information, second hop count information, and second indication information, where the value of the second hop count information is equal to the target hop count information plus one; The target clock level information is the clock level information carried in the message header of the designated message, the target hop count information is the hop count information carried in the message header of the designated message, and the designated message is the target synchronization message with the highest clock level information carried in the message headers of the target synchronization messages among the multiple target synchronization messages; Wherein, when the target network device is a slave clock device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted; when the target network device is a master clock candidate device, the second indication information indicates the number of master clock candidates in the number of hops through which the designated message is transmitted plus one.

10. The frequency synchronization method according to claim 9, characterized in that: The determining, based on the clock level information and the hop count information carried in the message header of each target synchronization message in the multiple target synchronization messages, the first target port of the target network device includes: Determine the highest clock level in the clock level information carried in the message header of each target synchronization message; In a case where a message header of a target synchronization message among the multiple target synchronization messages carries the highest clock level, determining a port that receives the target synchronization message carrying the highest clock level as a first target port of the target network device; In the case that there are multiple target synchronization messages among the multiple target synchronization messages, all of which carry the highest clock level in their message headers, determine the lowest hop count in the hop count information carried in the message headers of each target synchronization message; in the case that there is only one target synchronization message carrying the lowest hop count among the multiple target synchronization messages carrying the highest clock level, the port that receives the target synchronization message carrying the highest clock level and the lowest hop count will be determined as the first target port of the target network device.

11. The frequency synchronization method according to claim 10, wherein: The determining, based on the clock level information and the hop count information carried in the message header of each target synchronization message in the multiple target synchronization messages, the first target port of the target network device further comprises: In a case where a plurality of target synchronization messages have message headers that carry the highest clock level and the lowest hop count, determining maximum indication information in each target synchronization message that carries the highest clock level and the lowest hop count; The port that receives the target synchronization message carrying the highest clock level, the lowest hop count and the maximum indication information is determined as the first target port of the target network device.

12. The frequency synchronization method according to claim 11, wherein: The determining, based on the clock level information and the hop count information carried in the message header of each target synchronization message in the multiple target synchronization messages, the first target port of the target network device further comprises: In a case where there are multiple target synchronization messages among the multiple target synchronization messages, the message headers of which all carry the highest clock level, the lowest hop count, and the maximum indication information, determining multiple port numbers that receive the target synchronization messages carrying the highest clock level, the lowest hop count, and the maximum indication information; The port with the smallest or largest number among the multiple port numbers is determined as the first target port of the target network device.

13. The frequency synchronization method according to claim 1, wherein: In a case where the device identity of the target network device is a grandmaster clock device, the method further includes: Generate a target synchronization message, wherein the target synchronization message carries clock level information and hop count information of the target network device, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; Send the target synchronization message.

14. A frequency synchronization device, characterized in that: include: Determination module, receiving module, acquisition module and frequency synchronization module, The determination module is configured to determine the device identity of the target network device by using a clock code corresponding to a power-on state of a clock code detection component when the target network device is powered on; the device identity of the target network device includes a top-level master clock device, a master clock candidate device, or a slave clock device; The receiving module is configured to receive a target synchronization message when the device identity of the target network device is a master clock candidate device or a slave clock device; The acquisition module is configured to, upon receiving a target synchronization message, acquire clock level information and hop count information carried in a message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted; the message header of the target synchronization message further carries target indication information, wherein the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted; The message header of the target synchronization message includes a first reserved field, a second reserved field, and a third reserved field, the clock level information is located in the first reserved field, the hop count information is located in the second reserved field, and the target indication information is located in the third reserved field; The frequency synchronization module is configured to perform frequency synchronization according to the clock level information, the hop count information, and the target indication information carried in the message header of the target synchronization message; The frequency synchronization device also includes: a first sending module, which is used to generate a first synchronization message and send the first synchronization message by the master clock candidate device as the master clock when the device identity of the target network device is a master clock candidate device and the master clock candidate device has not received the target synchronization message.

15. A frequency synchronization system, characterized in that: include: The highest-level master clock device, master clock candidate devices and slave clock devices; The highest level master clock device is used to: generate a target synchronization message, wherein the target synchronization message carries clock level information and hop count information of the highest level master clock device, and the hop count information indicates the number of hops through which the target synchronization message is transmitted; Send target synchronization message; The master clock candidate device is configured to: upon receiving a target synchronization message, obtain clock level information and hop count information carried in a message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted; the message header of the target synchronization message further carries target indication information, wherein the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted; The message header of the target synchronization message includes a first reserved field, a second reserved field, and a third reserved field, the clock level information is located in the first reserved field, the hop count information is located in the second reserved field, and the target indication information is located in the third reserved field; Performing frequency synchronization according to the clock level information, the hop count information, and the target indication information carried in the message header of the target synchronization message; The master clock candidate device is further configured to, when no target synchronization message is received, generate a first synchronization message as a master clock and send the first synchronization message, wherein the first synchronization message carries clock level information and first hop count information of the master clock candidate device, where the first hop count information indicates the number of hops taken to transmit the first synchronization message; The slave clock device is configured to, upon receiving a target synchronization message, obtain clock level information and hop count information carried in a message header of the target synchronization message, wherein the hop count information indicates the number of hops through which the target synchronization message is transmitted; the message header of the target synchronization message further carries target indication information, wherein the target indication information indicates the number of master clock candidates in the number of hops through which the target synchronization message is transmitted; Frequency synchronization is performed according to the clock level information, the hop count information and the target indication information carried in the message header of the target synchronization message.

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