Micro LED device and its transfer method, LED backplane, display device

Abstract

Embodiments of the present application provide a micro-LED device, a transfer method thereof, an LED backplane, and a display device, which relate to the field of display technologies. On the premise of avoiding damage to the chip by the ejector pin, the risk of solder bridging is not caused, and the light-emitting area of the micro-LED device is not lost or the loss of the light-emitting area is greatly reduced. The micro-LED device includes: a substrate; an epitaxial layer; trenches that divide the epitaxial layer into multiple sub-epitaxial layers; the micro-LED device has a first region, which includes two adjacent sub-epitaxial layers and the trenches therebetween, and the first region includes a second region, which is the region where the ejector pin is located in the die bonding process; the sub-epitaxial layers in the first region are a first sub-epitaxial layer and a second sub-epitaxial layer, the first sub-epitaxial layer includes a first main epitaxial portion and a first extended epitaxial portion that protrudes from the first main epitaxial portion in a first direction, and the first direction is the direction from the first sub-epitaxial layer to the second sub-epitaxial layer; the second region overlaps with the first extended epitaxial portion and does not overlap with the trench.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and more particularly to a micro-LED device and a transfer method thereof, an LED backplane, and a display device. Background Art

[0002] Micro-LED (Light Emitting Diode) devices, such as micro-LED chips, are widely used in various display devices due to their advantages of small size, high integration, and self-luminescence.

[0003] Currently, the LED backplane is the main form for realizing the display of micro-LED devices. In the process, it is necessary to transfer the micro-LED device from the carrier substrate to the transfer substrate, and then use the transfer substrate to drive the micro-LED device to emit light to form an LED backplane. Among them, the process of transferring the micro-LED device from the carrier substrate to a specified area on the transfer substrate is the die bonding process. In the die bonding process, first, it is necessary to separate the micro-LED device from the carrier substrate by using a thimble structure, and then adsorb the micro-LED device through a suction nozzle and transfer it to the transfer substrate.

[0004] However, when separating the micro-LED device from the carrier substrate by using the thimble structure, the thimble structure is likely to damage the film layer in the micro-LED device. Especially for high-voltage direct-current micro-LED devices, the risk of film layer damage is greater, resulting in leakage or even failure of the micro-LED device. Summary of the Invention

[0005] In view of this, the present application provides a micro-LED device and a transfer method thereof, an LED backplane, and a display device, which can avoid damaging the micro-LED device by the thimble structure, and will neither cause the risk of solder bridging, nor cause the loss of the light-emitting area of the micro-LED device or greatly reduce the loss of the light-emitting area.

[0006] In a first aspect, an embodiment of the present application provides a micro-LED device, including:

[0007] A substrate;

[0008] An epitaxial layer located on one side of the substrate;

[0009] At least one trench, the trench penetrating the epitaxial layer, and the trench dividing the epitaxial layer into a plurality of independent sub-epitaxial layers;

[0010] The micro-LED device has a first area, the first area includes two adjacent sub-epitaxial layers and the trench between the two adjacent sub-epitaxial layers, and the first area includes a second area, and the second area is the area where the thimble structure is orthogonally projected on the micro-LED device during the die bonding process;

[0011] The two sub-epitaxial layers in the first region are respectively a first sub-epitaxial layer and a second sub-epitaxial layer. The first sub-epitaxial layer includes a first main epitaxial portion and a first extended epitaxial portion. The first extended epitaxial portion protrudes from the first main epitaxial portion along a first direction. The first direction is parallel to the plane of the substrate and is the direction from the first sub-epitaxial layer to the second sub-epitaxial layer. Moreover, the distance between two intersection points where the positive projection of the first sub-epitaxial layer on the substrate intersects with a first connection line is greater than the distance between two intersection points where the positive projection of the second sub-epitaxial layer on the substrate intersects with the first connection line. The first connection line is parallel to the first direction and passes through the second region.

[0012] The second region overlaps with the region where the first extended epitaxial portion is located and does not overlap with the region where the trench is located.

[0013] In the embodiment of the present application, by adjusting the structure of the first sub-epitaxial layer to add a part of the first extended epitaxial portion at the position of the ejector pin, the trench can avoid the ejector pin position. In the die bonding process, when the ejector pin structure is placed under the carrier substrate and vibrates up and down to lift the micro-LED device, the ejector pin structure will only correspond to the flat region without trenches where the first sub-epitaxial layer is located, rather than acting on the trench. Therefore, when the ejector pin structure vibrates, it will not generate a force on the functional film layer inside the trench sidewall, thereby avoiding damage to the functional film layer on the trench sidewall by the ejector pin structure and improving the reliability of the performance of the micro-LED device.

[0014] Moreover, compared with the setting method of arranging a metal filling portion in the trench in the prior art, in the embodiment of the present application, there is no other metal structure between the first electrode and the second electrode at the ejector pin position. Therefore, when the micro-LED device is transferred to the transfer substrate, the risk of solder bridging between the first electrode and the second electrode can be avoided.

[0015] In addition, compared with the setting method of arranging isolation islands in the prior art, the embodiment of the present application will only reduce the light-emitting area of the micro-LED device to a small extent or even not reduce it. For example, when the first extended epitaxial portion only extends outward in a local area of the first main epitaxial portion, the area of this part of the trench increased due to the local avoidance of the ejector pin position by the trench is much smaller than the area occupied by the isolation island in the original epitaxial layer. This design can reduce the loss of the light-emitting area of the micro-LED device from 3.5% - 5% to 0.5%, and the loss of the light-emitting brightness from 1% to 0.1%. Or, when the trench width in the micro-LED device is large and the area of the second region is small, the trench can only avoid the ejector pin position on one side edge while the other side edge remains unchanged. At this time, the trench area decreases, and the light-emitting area of the micro-LED device will instead increase to a certain extent.

[0016] In addition, it should be noted that only the patterning design of the epitaxial layer needs to be adjusted in the embodiments of the present application, without adding other structures or additional process flows, and the process is relatively simple.

[0017] In one embodiment, the second sub-epitaxial layer has a first notch recessed along the first direction, and the first extended epitaxial portion and the first notch are arranged along the first direction.

[0018] By providing the first notch on the second sub-epitaxial layer, the groove still has sufficient width near the position of the ejector pin, so as to ensure reliable division of the first sub-epitaxial layer and the second sub-epitaxial layer near the second region.

[0019] Furthermore, the edges of the first extended epitaxial portion and the edges of the first notch extend along the edge of the second region respectively.

[0020] With such a setting, when the groove between the first sub-epitaxial layer and the second sub-epitaxial layer is designed to avoid the ejector pin position, it only needs to avoid along the edge of the second region. On the premise of ensuring that the ejector pin structure does not overlap with the groove, the increased area of the groove is relatively small. Correspondingly, the loss degree of the light-emitting area of the micro-LED device is smaller. Moreover, with this design, the area difference between the first sub-epitaxial layer and the second sub-epitaxial layer is also smaller, and the luminous brightness uniformity of the two light-emitting sub-units where the first sub-epitaxial layer and the second sub-epitaxial layer are located can be further improved.

[0021] In one embodiment, the first main epitaxial portion has a second notch recessed along the second direction, the second direction is parallel to the plane of the substrate, and is the direction from the second sub-epitaxial layer to the first sub-epitaxial layer.

[0022] By further providing the second notch on the first main epitaxial portion, the area reduced by the second notch to the first sub-epitaxial layer can be used to compensate the area increased by the first extended epitaxial portion to the first sub-epitaxial layer, thereby reducing the area difference between the first sub-epitaxial layer and the second sub-epitaxial layer and improving the luminous brightness uniformity of the two light-emitting sub-units where the two sub-epitaxial layers are located.

[0023] Moreover, the second notch is recessed along the second direction, that is, the second notch and the first extended epitaxial portion are on the same side of the first main epitaxial portion. In the process, only the shape of the groove between the first sub-epitaxial layer and the second sub-epitaxial layer needs to be adjusted to match the second notch, which will not affect the groove design between the first sub-epitaxial layer and other adjacent sub-epitaxial layers.

[0024] Further, the second notch includes a plurality of second sub-notches, the plurality of second sub-notches are respectively located on both sides of the first outer extended extension portion, and the area of the positive projection of each second sub-notch on the substrate is smaller than the area of the positive projection of the first outer extended extension portion on the substrate.

[0025] When the area of the first outer extended extension portion is large, if only one second notch is used to compensate for the area of the first outer extended extension portion, the second notch and the first outer extended extension portion need to occupy a large width in their arrangement direction. When the width of the first main extension portion in this direction is small, it may be difficult to accommodate a second notch with a large area on one side of the first outer extended extension portion. By providing a plurality of dispersed second sub-notches with smaller areas on both sides of the first outer extended extension portion, the second sub-notches do not need to occupy a large width on one side of the first outer extended extension portion, and this structure is more suitable for the design of the first sub-extension layer with a small width.

[0026] In one embodiment, the second sub-extension layer includes a second main extension portion and a second outer extended extension portion, the first notch is located in the second main extension portion, the second outer extended extension portion protrudes from the second main extension portion along a second direction, the second direction is parallel to the plane where the substrate is located, and is the direction from the second sub-extension layer to the first sub-extension layer.

[0027] By further providing a second outer extended extension portion on the second main extension portion, the area increased by the second outer extended extension portion to the second sub-extension layer can be used to compensate for the area reduced by the first notch to the second sub-extension layer, thereby reducing the area difference between the second sub-extension layer and the first sub-extension layer and improving the luminance uniformity of the two light-emitting sub-units where the two sub-extension layers are located.

[0028] Moreover, the second outer extended extension portion protrudes from the second main extension portion along the second direction, that is, the second outer extended extension portion and the first notch are located on the same side of the second main extension portion. On the one hand, in the process manufacturing, only the shape of the groove between the first sub-extension layer and the second sub-extension layer needs to be adjusted to match the second outer extended extension portion, which will not affect the groove design between the second sub-extension layer and other adjacent sub-extension layers. In addition, the second outer extended extension portion will not increase the width of the second sub-extension layer, so it will not affect the width design of the micro-LED device in the third direction.

[0029] Further, the second outer extended extension portion includes a plurality of second sub-outer extended extension portions, the plurality of second sub-outer extended extension portions are respectively located on both sides of the first notch, and the area of the positive projection of each second sub-outer extended extension portion on the substrate is smaller than the area of the positive projection of the first notch on the substrate.

[0030] When the area of the first notch is relatively large, if only one second extended outer extension is used to compensate for the area of the first notch, the second extended outer extension and the first notch need to occupy a relatively large width in their arrangement direction. When the width of the second main outer extension in this direction is relatively small, it may be difficult to accommodate the second extended outer extension with a relatively large area on one side of the first notch. By providing a plurality of second sub-extended outer extensions with relatively small areas on both sides of the first notch, the second sub-extended outer extensions do not need to occupy a relatively large width on one side of the first notch, and this structure is more suitable for the design of the second sub-outer extension layer with a relatively small width.

[0031] In one embodiment, there is a gap between the edge of the second region and the edge of the first extended outer extension. In this way, even if there is a certain deviation in the position of the ejector pin structure during the die bonding process, it can still be ensured that the ejector pin structure presses on the first sub-outer extension layer and does not overlap with the trench, thereby avoiding damage to the film layer in the micro-LED device to a greater extent.

[0032] In one embodiment, the dimension of the first extended outer extension in the third direction is equal to the dimension of the first main outer extension in the third direction, the third direction is parallel to the plane of the substrate, and perpendicular to the arrangement direction of the first sub-outer extension layer and the second sub-outer extension layer;

[0033] The trench between the first sub-outer extension layer and the second sub-outer extension layer extends along the third direction.

[0034] Compared with the original structure, this setting method only moves the position of the entire trench to avoid the second region, and does not adjust the area of the trench. Therefore, the sum of the areas of the first sub-outer extension layer and the second sub-outer extension layer does not change, and it will not affect the light-emitting area and light-emitting brightness of the micro-LED device.

[0035] In one embodiment, the outer extension layer includes an n-type semiconductor, a light-emitting layer located on the side of the n-type semiconductor facing away from the substrate, and a p-type semiconductor located on the side of the light-emitting layer facing away from the substrate;

[0036] The micro-LED device includes m sub-outer extension layers. Among them, the n-type semiconductor in the i-th sub-outer extension layer is electrically connected to the p-type semiconductor in the (i + 1)-th sub-outer extension layer through a connecting trace. The p-type semiconductor in the first sub-outer extension layer is electrically connected to the first electrode, and the n-type semiconductor in the m-th sub-outer extension layer is electrically connected to the second electrode. i is a positive integer greater than or equal to 1, m is a positive integer greater than or equal to 2, and i < m, thereby realizing the series connection between multiple light-emitting sub-units.

[0037] Further, the trench includes a first trench portion and a second trench portion that are connected. The first trench portion penetrates through the p-type semiconductor and the light-emitting layer, and the second trench portion penetrates through the p-type semiconductor, the light-emitting layer, and the n-type semiconductor;

[0038] The first end of the connection trace is electrically connected to the n-type semiconductor in the first trench portion that is not penetrated by the i-th sub-epitaxial layer, and the second end of the connection trace is electrically connected to the p-type semiconductor in the (i + 1)-th sub-epitaxial layer.

[0039] With the above arrangement, when the connection trace is electrically connected to the n-type semiconductor in the i-th sub-epitaxial layer, it can be directly connected to the n-type semiconductor exposed at the bottom of the first trench portion, without the need to realize the electrical connection with the n-type semiconductor by means of arranging vias in the p-type semiconductor and the light-emitting layer in the i-th sub-epitaxial layer, which simplifies the process flow and improves the connection reliability.

[0040] Further, the micro-LED device further includes:

[0041] A current blocking layer, located on the side of the p-type semiconductor facing away from the substrate; the current blocking layer is used to reduce the current ratio at the position directly below the first electrode, so that the current diffuses laterally, thereby avoiding the current at the position directly below the first electrode being blocked by the first electrode and unable to be emitted, and being absorbed inside the chip and generating a large amount of heat;

[0042] A conductive contact layer, located on the side of the current blocking layer facing away from the substrate. In the direction perpendicular to the plane of the substrate, the conductive contact layer covers the p-type semiconductor, so as to form a good ohmic contact between the first electrode and the p-type semiconductor layer;

[0043] A first connection portion, located on the side of the conductive contact layer in the first sub-epitaxial layer facing away from the substrate and electrically connected to the conductive contact layer, and the first electrode is located on the side of the first connection portion facing away from the substrate and electrically connected to the first connection portion;

[0044] A second connection portion, located on the side of the n-type semiconductor in the m-th sub-epitaxial layer facing away from the substrate and electrically connected to the n-type semiconductor, and the second electrode is located on the side of the second connection portion facing away from the substrate and electrically connected to the second connection portion;

[0045] An inorganic protective layer, located at the bottom and side walls of the trench, to protect the bottom and side walls of the trench, and the connection trace is located on the side of the inorganic protective layer facing away from the substrate;

[0046] An atomic layer deposition layer, located on the side of the conductive contact layer and the inorganic protective layer facing away from the substrate;

[0047] A reflective layer, located on the side of the atomic layer deposition layer facing away from the substrate, is configured to reflect the light in the non-emitting light direction back to the light-emitting surface for emission, thereby improving the light extraction efficiency of the micro-LED device.

[0048] In one embodiment, the micro-LED device includes 2n sub-epitaxial layers arranged along the first direction, and the first region includes the nth sub-epitaxial layer and the (n + 1)th sub-epitaxial layer, where n is a positive integer greater than or equal to 1.

[0049] Based on this structure, the second region is located at the middle position of the micro-LED device. In the die bonding process, the ejector pin structure corresponds to the middle position of the micro-LED device. When the micro-LED device is lifted by the ejector pin structure and separated from the carrier substrate, the micro-LED device can be prevented from tilting, thereby avoiding damage to the micro-LED device.

[0050] Based on the same inventive concept, an embodiment of the present application further provides a transfer method for a micro-LED device, including:

[0051] Providing a carrier substrate carrying the above-mentioned micro-LED device, placing an ejector pin structure on the side of the carrier substrate facing away from the micro-LED device, and aligning the ejector pin structure with the second region in the micro-LED device. Using the ejector pin structure to separate the micro-LED device from the carrier substrate, and using a suction nozzle to adsorb the micro-LED device;

[0052] Rotating the rotating arm to transfer the micro-LED device adsorbed by the suction nozzle to the transfer substrate.

[0053] Combined with the above analysis of the structure of the micro-LED device, by adjusting the structure of the first sub-epitaxial layer in the embodiment of the present application to add a part of the first extended epitaxial portion at the ejector pin position, the trench can be avoided at the ejector pin position. In the die bonding process, when the ejector pin structure is placed under the carrier substrate and vibrates up and down to lift the micro-LED device, the ejector pin structure only corresponds to the flat region without trenches where the first sub-epitaxial layer is located, rather than acting on the trench. Therefore, when the ejector pin structure vibrates, it will not generate a force on the functional film layer on the sidewall of the trench, thereby avoiding damage to the functional film layer on the sidewall of the trench by the ejector pin structure and improving the reliability of the performance of the micro-LED device.

[0054] Based on the same inventive concept, an embodiment of the present application further provides an LED backplane, including:

[0055] A substrate;

[0056] A plurality of the above-mentioned micro-LED devices located on one side of the substrate.

[0057] Since the LED backplane provided by the embodiments of the present application includes the above-mentioned micro-LED device, therefore, on the premise of avoiding damage to the functional film layer in the trench by the thimble structure, the LED backplane will neither generate the risk of solder bridging, nor will it cause a significant loss of the light-emitting area of the micro-LED device, or even there is no loss of the light-emitting area.

[0058] Based on the same inventive concept, the embodiments of the present application further provide a display device, including:

[0059] A display screen, having a light-emitting surface and a non-light-emitting surface;

[0060] The above-mentioned LED backplane, and the LED backplane is located on one side of the non-light-emitting surface of the display screen.

[0061] Since the display device provided by the embodiments of the present application includes the above-mentioned LED backplane, therefore, on the premise of avoiding damage to the functional film layer in the trench by the thimble structure, the display device will neither generate the risk of solder bridging, nor will it cause a significant loss of the light-emitting area of the micro-LED device, or even there is no loss of the light-emitting area. Description of the Drawings

[0062] Figure 1 It is a schematic diagram of the die bonding process in the prior art;

[0063] Figure 2 It is a schematic diagram of a thimble structure lifting a micro-LED device in the prior art;

[0064] Figure 3 It is a cross-sectional view of a DC high-voltage micro-LED device in the prior art;

[0065] Figure 4 It is another cross-sectional view of a DC high-voltage micro-LED device in the prior art;

[0066] Figure 5 For Figure 4 The corresponding top view;

[0067] Figure 6 It is still another cross-sectional view of a DC high-voltage micro-LED device in the prior art;

[0068] Figure 7 For Figure 6 The corresponding top view;

[0069] Figure 8 It is a top view of the micro-LED device provided by the embodiments of the present application;

[0070] Figure 9 It is a top view of the first sub-epitaxial layer and the second sub-epitaxial layer provided by the embodiments of the present application;

[0071] Figure 10 For Figure 8 A cross-sectional view along the A1 - A2 direction;

[0072] Figure 11 A schematic diagram of the die bonding process provided by the embodiments of the present application;

[0073] Figure 12 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0074] Figure 13 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0075] Figure 14 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0076] Figure 15 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0077] Figure 16 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0078] Figure 17 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0079] Figure 18 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0080] Figure 19 Another top view of the first sub - epitaxial layer and the second sub - epitaxial layer provided by the embodiments of the present application;

[0081] Figure 20 A schematic diagram of the film layer structure of the micro - LED device provided by the embodiments of the present application;

[0082] Figure 21 Another schematic diagram of the film layer structure of the micro - LED device provided by the embodiments of the present application;

[0083] Figure 22 Another top view of the micro - LED device provided by the embodiments of the present application;

[0084] Figure 23 A flowchart of the transfer method provided by the embodiments of the present application;

[0085] Figure 24 A structural flowchart of the transfer method provided by the embodiments of the present application;

[0086] Figure 25 Schematic diagram of the structure of the LED backplane provided by the embodiment of the present application;

[0087] Figure 26 Schematic diagram of the structure of the display device provided by the embodiment of the present application;

[0088] Figure 27 is Figure 26 Cross-sectional view along the B1-B2 direction. Detailed implementation manners

[0089] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0090] Before elaborating on the technical solutions of the embodiments of the present application, the problems existing in the prior art will be specifically described first:

[0091] Figure 1 Schematic diagram of the die bonding process in the prior art, Figure 2 Schematic diagram of the thimble structure lifting the micro-LED device in the prior art, as Figure 1 and Figure 2 shown, a plurality of micro-LED devices 101 are arranged in an array on a carrier substrate 102 (such as a blue film). In the die bonding process, the micro-LED device 101 is adsorbed by the suction nozzle 104 on the swing arm 103, and then the swing arm 103 is controlled to rotate 180° to transfer the micro-LED device 101 to a transfer substrate 106 (such as a printed circuit board or a glass substrate) placed on the moving platform 105. Among them, the electrodes of the micro-LED device 101 can be specifically fixed to the metal wires on the transfer substrate 106 through solder paste.

[0092] However, due to the certain adhesion of the carrier substrate 102, it is difficult for the suction nozzle 104 to directly suck up the micro-LED device 101. Therefore, before the suction nozzle 104 adsorbs the micro-LED device 101, the thimble structure 107 is usually used to lift the micro-LED device 101 below the carrier substrate 102 to facilitate the separation of the micro-LED device 101 from the carrier substrate 102. However, due to the high hardness of the thimble structure 107, the functional film layer in the micro-LED device 101 is easily damaged during the lifting process.

[0093] In particular, for the micro-LED device 101 with a direct current high voltage integrated with multiple light-emitting sub-units, Figure 3 Cross-sectional view of a micro-LED device with a direct current high voltage in the prior art, asFigure 3 As shown in Figure 3 , the DC high-voltage micro-LED device 101 includes a substrate 108, an epitaxial layer 109 on one side of the substrate 108, a first electrode 110, a second electrode 116, and a functional film layer 111 on the side of the epitaxial layer 109 facing away from the substrate. Exemplarily, the functional film layer 111 includes a reflective film for improving the light extraction rate. The micro-LED device 101 further includes at least one trench 112 that penetrates the epitaxial layer 109 and divides the epitaxial layer 109 into multiple independent parts to achieve the independence of the epitaxial layer 109 in multiple light-emitting sub-units 113 from each other.

[0094] Taking the micro-LED device 101 including two light-emitting sub-units 113 as an example, the trench 112 is located at the middle position of the micro-LED device 101. At this time, the trench 112 exactly corresponds to the position of the ejector pin structure 107. In this way, when the ejector pin structure 107 vibrates up and down, the ejector pin structure 107 will act on the trench 112, thereby damaging the functional film layer 111 at the side wall of the trench 112, and further affecting the chip performance.

[0095] For this reason, two improvement methods have been proposed in the prior art.

[0096] The first improvement method:

[0097] Figure 4 Another cross-sectional view of the DC high-voltage micro-LED device in the prior art. Figure 5 is Figure 4 the corresponding top view. As shown in Figure 4 and Figure 5 By arranging a metal filling part 114 in the trench 112, the position of the ejector pin structure 107 can correspond to that of the metal filling part 114. When the ejector pin structure 107 vibrates up and down, it will only act on the metal filling part 114, thereby avoiding damaging the film layer inside the side wall of the trench 112.

[0098] However, the presence of the metal filling part 114 will reduce the gap between the metal structures at the ejector pin position. Combining Figure 5 , when the metal filling part 114 is not provided, the distance between the first electrode 110 and the second electrode 116 in the micro-LED device 101 is L1. After adding the metal filling part 114, the distances between the first electrode 110 and the metal filling part 114 and between the second electrode 116 and the metal filling part 114 at the ejector pin position are both reduced to L2. This leads to the risk of soldering and tin bridging between the first electrode 110 and the second electrode 116 when the micro-LED device 101 is transferred to the transfer substrate 106, resulting in a short circuit of the electrodes of the micro-LED device 101, and further causing the micro-LED device 101 to fail to emit light normally.

[0099] The second improvement method:

[0100] Figure 6 Another cross-sectional view of a micro-LED device with DC high voltage in the prior art Figure 7 is Figure 6 the corresponding top view, as shown in Figure 6 and Figure 7 shown. At the position of the ejector pin, an isolation island 115 is designed. The isolation island 115 includes an epitaxial layer 109, and the epitaxial layer 109 in the isolation island 115 is isolated from the epitaxial layers 109 in two adjacent light-emitting sub-units 113. The position where the isolation island 115 is located cannot emit light.

[0101] However, since the diameter of the ejector pin position is usually larger than the width of the trench 112, after the isolation island 115 is set, the isolation island 115 will occupy the setting space of the epitaxial layer 109 in the adjacent light-emitting sub-unit 113, resulting in a reduction in the area of the epitaxial layer 109 in the adjacent light-emitting sub-unit 113, that is, the light-emitting area is reduced, thereby causing the micro-LED device 101 to lose a large light-emitting area. For example, the light-emitting area of the micro-LED device 101 may be lost by up to 3.5% - 5%, and the brightness loss is about 1%, which further has an adverse effect on the display effect of the micro-LED device 101.

[0102] Based on the above problems, the embodiment of the present application provides a micro-LED device. On the premise of avoiding damage to the functional film layer in the trench by the ejector pin structure, the micro-LED device will neither generate the risk of solder bridging, nor will it cause a significant loss of the light-emitting area of the micro-LED device, or even there is no loss of the light-emitting area.

[0103] Specifically, the micro-LED device may be a mini LED chip, and further a micro-LED chip with DC high voltage. The micro-LED chip with DC high voltage includes a plurality of light-emitting sub-units connected in series. Figure 8 is a top view of the micro-LED device provided by the embodiment of the present application Figure 9 is a top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application Figure 10 is Figure 8 a cross-sectional view along the A1 - A2 direction, as shown in Figures 8 - 10As shown, the micro-LED device includes: a substrate 1, such as a sapphire substrate; an epitaxial layer 2 on one side of the substrate 1, and the epitaxial layer 2 may specifically include an n-type semiconductor 21 on one side of the substrate 1, a light-emitting layer 22 on the side of the n-type semiconductor 21 facing away from the substrate 1, and a p-type semiconductor 23 on the side of the light-emitting layer 22 facing away from the substrate 1; at least one trench 3 that penetrates the epitaxial layer 2, and the trench 3 divides the epitaxial layer 2 into multiple independent sub-epitaxial layers 4. Each sub-epitaxial layer 4 belongs to a light-emitting sub-unit respectively, and the series connection between multiple light-emitting sub-units is achieved through the electrical connection between the sub-epitaxial layers 4 in different light-emitting sub-units. The specific connection method will be described in detail in the subsequent embodiments.

[0104] The micro-LED device has a first region 6, and the first region 6 includes two adjacent sub-epitaxial layers 4 and the trench 3 between the two sub-epitaxial layers 4. The first region 6 includes a second region 5, and the second region 5 is the region where the positive projection of the ejector pin structure is located on the micro-LED device during the die bonding process. Combining Figure 11 With the schematic diagram of the die bonding process provided by the embodiment of the present application shown, in the die bonding process, the ejector pin structure 100 is placed on the side of the carrier substrate 200 facing away from the micro-LED device 300, and the positive projection of the ejector pin structure 100 on the micro-LED device 300 coincides with the second region 5.

[0105] The two sub-epitaxial layers 4 in the first region 6 are respectively a first sub-epitaxial layer 8 and a second sub-epitaxial layer 9. The first sub-epitaxial layer 8 includes a first main epitaxial portion 10 and a first extended epitaxial portion 11. The first extended epitaxial portion 11 protrudes from the first main epitaxial portion 10 along a first direction, and the first direction is parallel to the plane where the substrate 1 is located and is the direction from the first sub-epitaxial layer 8 to the second sub-epitaxial layer 9. Moreover, the distance L1 between the two intersection points (intersection points O1 and O2) where the positive projection of the first sub-epitaxial layer 8 on the substrate 1 intersects the first connection line 31 is greater than the distance L2 between the two intersection points (intersection points O3 and O4) where the positive projection of the second sub-epitaxial layer 9 on the substrate 1 intersects the first connection line 31. The first connection line 31 is parallel to the first direction and penetrates the second region 5. The second region 5 overlaps with the region where the first extended epitaxial portion 11 is located and does not overlap with the region where the trench 3 is located.

[0106] It should be noted that the first connection line 31 is only a connection line defined to more clearly define the structure of the first sub-epitaxial layer 8, and in the actual product structure of the micro-LED device, the first connection line 31 does not exist.

[0107] In the embodiment of the present application, by adjusting the structure of the first sub-epitaxial layer 8 to add a part of the first extended epitaxial portion 11 at the ejector pin position, the trench 3 can be avoided at the ejector pin position. Combining Figure 11, in the die bonding process, when the ejector pin structure 100 is placed under the carrier substrate 200 and vibrates up and down to lift the micro-LED device 300, the ejector pin structure 100 only corresponds to the flat area without grooves where the first sub-epitaxial layer 8 is located, and no longer acts on the groove 3. Therefore, when the ejector pin structure vibrates, no force is exerted on the functional film layer 30 on the side wall of the groove 3, thereby avoiding damage to the functional film layer 30 on the side wall of the groove 3 by the ejector pin structure and improving the reliability of the performance of the micro-LED device.

[0108] Moreover, compared with Figure 4 and Figure 5 the setting method of arranging the metal filling part in the groove 3 shown, in the embodiment of the present application, there is no other metal structure between the first electrode 24 and the second electrode 25 at the position of the ejector pin. Therefore, when the micro-LED device is transferred to the transfer substrate, the risk of solder bridging between the first electrode 24 and the second electrode 25 can be reduced.

[0109] In addition, compared with Figure 6 and Figure 7 the setting method of arranging the isolation island shown, the embodiment of the present application only reduces the light-emitting area of the micro-LED device to a small extent or even does not reduce it. For example, as Figure 9 shown, when the first outstretched epitaxial part 11 only outstretches in a partial area of the first main epitaxial part 10, the area of the groove 3 increased due to the local avoidance of the ejector pin position by the groove 3 is much smaller than the area occupied by the isolation island in the original epitaxial layer. This design can reduce the loss of the light-emitting area of the micro-LED device from 3.5% - 5% to 0.5%, and the loss of the light-emitting brightness from 1% to 0.1%. Or, when the width of the groove 3 in the micro-LED device is relatively large and the area of the second region 5 is relatively small, Figure 12 This is another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application. As Figure 12 shown, the groove 3 can also only avoid the ejector pin position on one side edge and keep the other side edge unchanged. At this time, the area of the groove 3 decreases, and the light-emitting area of the micro-LED device will instead increase to a certain extent.

[0110] In addition, it should be noted that the embodiment of the present application only needs to adjust the patterning design of the epitaxial layer 2, without adding other structures or additional process flows, and the process is relatively simple.

[0111] In one implementation manner of the present application, Figure 13 This is yet another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application. As Figure 13As shown, the second sub-epitaxial layer 9 has a first notch 12 recessed in the first direction, and the first extended epitaxial portion 11 and the first notch 12 are arranged in the first direction. By providing the first notch 12 on the second sub-epitaxial layer 9, the trench 3 can still have a sufficient width near the ejector pin position, thereby ensuring reliable separation of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 near the second region 5.

[0112] Furthermore, please refer to Figure 13 again. The edges of the first extended epitaxial portion 11 and the first notch 12 extend along the edge of the second region 5 respectively. For example, when the shape of the second region 5 is circular, the edges of the first extended epitaxial portion 11 and the first notch 12 are arc-shaped edges respectively.

[0113] With such a setting, the trench 3 between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 only needs to avoid along the edge of the second region 5 at the ejector pin position. On the premise of ensuring that the ejector pin structure does not overlap with the trench 3, the increased area ratio of the trench 3 is small. Correspondingly, the loss degree of the light-emitting area of the micro-LED device is smaller. Moreover, with this design, the area difference between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 is also smaller, further improving the brightness uniformity of the two light-emitting sub-units where the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 are located.

[0114] Or, in other alternative embodiments of the present application, Figure 14 is another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiments of the present application. As Figure 14 shown, the edges of the first extended epitaxial portion 11 and the first notch 12 may not extend along the edge of the second region 5. For example, when the shape of the second region 5 is circular, the edges of the first extended epitaxial portion 11 and the first notch 12 are non-arc-shaped edges. At this time, there will be a gap between the edge of the first extended epitaxial portion 11 and the edge of the second region 5. In the die bonding process, when there is a certain deviation in the position where the ejector pin structure is located, it is more likely that the ejector pin structure still corresponds to the position of the first sub-epitaxial layer 8, reducing the risk of the ejector pin structure acting on the trench 3.

[0115] Furthermore, when the first extended epitaxial portion 11 only protrudes at a local position of the first epitaxial portion, in the avoidance design of the trench 3, the width of each position of the trench 3 in the direction perpendicular to its extension direction can be made equal. At this time, the width of the trench 3 near the second region 5 is the same as the width of the trench 3 at other positions, and the reliability of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 being separated by the trench 3 is relatively high.

[0116] In one embodiment, Figure 15 is another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiments of the present application. AsFigure 15 As shown, the first main epitaxial portion 10 has a second notch 15 that is recessed in the second direction. The second direction is parallel to the plane of the substrate 1 and is the direction from the second sub-epitaxial layer 9 to the first sub-epitaxial layer 8.

[0117] By further providing the second notch 15 on the first main epitaxial portion 10, the area increased by the first extended epitaxial portion 11 to the first sub-epitaxial layer 8 can be compensated by the area reduced by the second notch 15 to the first sub-epitaxial layer 8, thereby reducing the area difference between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 and improving the luminance uniformity of the two light-emitting sub-units where the two sub-epitaxial layers are located.

[0118] Moreover, the second notch 15 is recessed in the second direction, that is, the second notch 15 and the first extended epitaxial portion 11 are located on the same side of the first main epitaxial portion 10. In the process, only the shape of the trench 3 between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 needs to be adjusted to match the second notch 15, which will not affect the design of the trench 3 between the first sub-epitaxial layer 8 and other adjacent sub-epitaxial layers 4.

[0119] Furthermore, Figure 16 Another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application is shown in Figure 16 As shown, the second notch 15 includes a plurality of second sub-notches 16. The plurality of second sub-notches 16 are respectively located on both sides of the first extended epitaxial portion 11, and the area of the orthographic projection of each second sub-notch 16 on the substrate 1 is smaller than the area of the orthographic projection of the first extended epitaxial portion 11 on the substrate 1.

[0120] When the area of the first extended epitaxial portion 11 is large, if only one second notch 15 is used to compensate for the area of the first extended epitaxial portion 11, the second notch 15 and the first extended epitaxial portion 11 need to occupy a large width in their arrangement direction. When the width of the first main epitaxial portion 10 in this direction is small, it may be difficult to accommodate the second notch 15 with a large area on one side of the first extended epitaxial portion 11. By providing a plurality of dispersed second sub-notches 16 with smaller areas on both sides of the first extended epitaxial portion 11, the second sub-notches 16 do not need to occupy a large width on one side of the first extended epitaxial portion 11, and this structure is more suitable for the design of the first sub-epitaxial layer 8 with a small width.

[0121] In one embodiment, when the second sub-epitaxial layer 9 has a first notch 12, Figure 17 Another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application is shown in Figure 17As shown, the second sub-epitaxial layer 9 includes a second main epitaxial portion 17 and a second extended epitaxial portion 18. The first notch 12 is located in the second main epitaxial portion 17. The second extended epitaxial portion 18 protrudes from the second main epitaxial portion 17 in a second direction. The second direction is parallel to the plane of the substrate 1 and is the direction from the second sub-epitaxial layer 9 towards the first sub-epitaxial layer 8.

[0122] By further providing the second extended epitaxial portion 18 on the second main epitaxial portion 17, the area of the second sub-epitaxial layer 9 increased by the second extended epitaxial portion 18 can be used to compensate for the area of the second sub-epitaxial layer 9 reduced by the first notch 12, thereby reducing the area difference between the second sub-epitaxial layer 9 and the first sub-epitaxial layer 8 and improving the luminance uniformity of the two light-emitting sub-units where the two sub-epitaxial layers 4 are located.

[0123] Moreover, the second extended epitaxial portion 18 protrudes from the second main epitaxial portion 17 in the second direction, that is, the second extended epitaxial portion 18 and the first notch 12 are on the same side of the second main epitaxial portion 17. On the one hand, in the manufacturing process, only the shape of the groove 3 between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 needs to be adjusted to match the second extended epitaxial portion 18, which will not affect the design of the groove 3 between the second sub-epitaxial layer 9 and other adjacent sub-epitaxial layers 4. On the other hand, the second extended epitaxial portion 18 will not increase the width of the second sub-epitaxial layer 9 in the direction perpendicular to the first direction, so it will not affect the width design of the micro-LED device in this direction.

[0124] In addition, it should be noted again that please refer back to Figure 16 , when a second notch 15 is provided on the first sub-epitaxial layer 8, the second notch 15 and the second extended epitaxial portion 18 can be arranged along the first direction, so as to improve the width uniformity of the groove 3 between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 at various positions.

[0125] Furthermore, Figure 18 is another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiment of the present application. As Figure 18 shown, the second extended epitaxial portion 18 includes a plurality of second sub-extended epitaxial portions 19. The plurality of second sub-extended epitaxial portions 19 are respectively located on both sides of the first notch 12, and the area of the positive projection of each second sub-extended epitaxial portion 19 on the substrate 1 is smaller than the area of the positive projection of the first notch 12 on the substrate 1.

[0126] When the area of the first notch 12 is relatively large, if only one second outstretched extension 18 is used to compensate for the area of the first notch 12, the second outstretched extension 18 and the first notch 12 need to occupy a relatively large width in their arrangement direction. When the width of the second main extension 17 in this direction is relatively small, it may be difficult to accommodate the second outstretched extension 18 with a relatively large area on one side of the first notch 12. By providing a plurality of second sub-outstretched extensions 19 with relatively small areas on both sides of the first notch 12, the second sub-outstretched extensions 19 do not need to occupy a relatively large width on one side of the first notch 12, and this structure is more suitable for the design of the second sub-epitaxial layer 9 with a relatively small width.

[0127] In one embodiment, there is a gap between the edge of the second region 5 and the edge of the first outstretched extension 11. In this way, even if there is a certain deviation in the position of the thimble structure during the die bonding process, it can still be ensured that the thimble structure presses on the first sub-epitaxial layer 8 and does not overlap with the trench 3, thus avoiding damage to the film layer in the micro-LED device to a greater extent.

[0128] In one embodiment, Figure 19 is another top view of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 provided by the embodiments of the present application. As Figure 19 shown, the dimension of the first outstretched extension 11 in the third direction is equal to the dimension of the first main extension 10 in the third direction. The third direction is parallel to the plane of the substrate 1 and perpendicular to the arrangement direction of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9; the trench 3 between the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 extends in the third direction.

[0129] Compared with the original structure, this setting method only moves the position of the entire trench 3 to avoid the second region 5, and does not adjust the area of the trench 3. Therefore, the sum of the areas of the first sub-epitaxial layer 8 and the second sub-epitaxial layer 9 does not change, and it will not affect the light-emitting area and light-emitting brightness of the micro-LED device.

[0130] In one embodiment, Figure 20 is a schematic diagram of the film layer structure of the micro-LED device provided by the embodiments of the present application. As Figure 20 shown, the epitaxial layer 2 includes an n-type semiconductor 21, a light-emitting layer 22 located on the side of the n-type semiconductor 21 facing away from the substrate 1, and a p-type semiconductor 23 located on the side of the light-emitting layer 22 facing away from the substrate 1. The p-type semiconductor 23 and the n-type semiconductor 21 form a PN junction device.

[0131] Among them, the n-type semiconductor 21 can specifically be n-type gallium nitride (n-GaN). n-GaN is obtained by doping GaN with Si. After doping with Si, the tetravalent Si replaces the trivalent Ga. For GaN, there is one more valence electron, thus forming n-GaN; the p-type semiconductor 23 can specifically be p-type gallium nitride (p-GaN). p-GaN is obtained by doping GaN with Mg. After doping with Mg, the divalent Mg replaces the trivalent Ga. For GaN, there is one less valence electron, thus forming p-GaN; the light-emitting layer 22 can specifically be a multiple quantum well (MQW) layer. The composition of the multiple quantum wells determines the emission wavelength of the light-emitting diode, and the multiple quantum well structure can also improve the light-emitting efficiency.

[0132] In addition, the micro-LED device includes m sub-epitaxial layers 4, Figure 20 which is schematically shown with m = 2 as an example. Among them, the n-type semiconductor 21 in the i-th sub-epitaxial layer 4 is electrically connected to the p-type semiconductor 23 in the (i + 1)-th sub-epitaxial layer 4 through the connection trace 20. The p-type semiconductor 23 in the first sub-epitaxial layer 4 is electrically connected to the first electrode 24, and the n-type semiconductor 21 in the m-th sub-epitaxial layer 4 is electrically connected to the second electrode 25. i is a positive integer greater than or equal to 1, m is a positive integer greater than or equal to 2, and i < m. The first electrode 24 is located on the side of the p-type semiconductor 23 in the first sub-epitaxial layer 4 facing away from the substrate 1, and the second electrode 25 is located on the side of the n-type semiconductor 21 in the m-th sub-epitaxial layer 4 facing away from the substrate 1.

[0133] Taking m = 2 as an example, the p-type semiconductor 23 of the first sub-epitaxial layer 4 is electrically connected to the first electrode 24. The n-type semiconductor 21 of the first sub-epitaxial layer 4 is electrically connected to the p-type semiconductor 23 of the second semiconductor through the connection trace 20. The n-type semiconductor 21 of the second sub-epitaxial layer 4 is electrically connected to the second electrode 25 to realize the series connection between two light-emitting sub-units in the micro-LED device.

[0134] Furthermore, please refer to Figure 20 again. The trench 3 includes a first trench portion 26 and a second trench portion 27 that are connected. The first trench portion 26 penetrates through the p-type semiconductor 23 and the light-emitting layer 22 in the i-th sub-epitaxial layer 4, and the second trench portion 27 penetrates through the p-type semiconductor 23, the light-emitting layer 22, and the n-type semiconductor 21. The first end of the connection trace 20 is electrically connected to the n-type semiconductor 21 in the i-th sub-epitaxial layer 4 that is not penetrated by the first trench portion 26, and the second end of the connection trace 20 is electrically connected to the p-type semiconductor 23 in the (i + 1)-th sub-epitaxial layer 4.

[0135] With the above setting method, when the connecting trace 20 is electrically connected to the n-type semiconductor 21 in the i-th sub-epitaxial layer 4, it can be directly connected to the n-type semiconductor 21 exposed at the bottom of the first trench portion 26, without the need to realize the electrical connection with the n-type semiconductor 21 by means of providing vias in the p-type semiconductor 23 and the light-emitting layer 22 in the i-th sub-epitaxial layer 4, which simplifies the process flow and improves the connection reliability.

[0136] In one embodiment, please refer to again Figure 20 , the micro-LED device further includes: a current blocking layer 35, the current blocking layer 35 is located on the side of the p-type semiconductor 23 facing away from the substrate 1, and is used to reduce the current ratio at the position directly below the first electrode 24, so that the current diffuses laterally, thereby avoiding the photons generated by the current at the position directly below the first electrode 24 from being blocked by the first electrode 24 and unable to be emitted, and being absorbed inside the chip and generating a large amount of heat; a conductive contact layer 28, the conductive contact layer 28 is located on the side of the current blocking layer 35 facing away from the substrate 1, and in the direction perpendicular to the plane where the substrate 1 is located, the conductive contact layer 28 covers the p-type semiconductor 23, and the conductive contact layer 28 can be specifically formed of indium tin oxide (ITO) material, so as to form a good ohmic contact between the first electrode 24 and the p-type semiconductor 23 layer; a first connection portion 29, the first connection portion 29 is located on the side of the conductive contact layer 28 in the first sub-epitaxial layer 4 facing away from the substrate 1 and is electrically connected to the conductive contact layer 28, and the first electrode 24 is located on the side of the first connection portion 29 facing away from the substrate 1 and is electrically connected to the first connection portion 29; a second connection portion 32, the second connection portion 32 is located on the side of the n-type semiconductor 21 in the m-th sub-epitaxial layer 4 facing away from the substrate 1 and is electrically connected to the n-type semiconductor 21, and the second electrode 25 is located on the side of the second connection portion 32 facing away from the substrate 1 and is electrically connected to the second connection portion 32; an inorganic protection layer 33, the inorganic protection layer 33 is located at the bottom and side walls of the trench 3, and is used to protect the bottom and side walls of the trench 3 to prevent the infiltration of water and oxygen from eroding, and the connecting trace 20 is located on the side of the inorganic protection layer 33 facing away from the substrate 1; an atomic layer deposition (ALD) layer 34, the atomic layer deposition layer 34 is located on the side of the conductive contact layer 28 and the inorganic protection layer 33 facing away from the substrate 1, and the atomic layer deposition layer 34 can be specifically formed of a material with good conformality, high purity and high density to achieve a good protection effect; a reflective layer 36, the reflective layer 36 is located on the side of the atomic layer deposition layer 34 facing away from the substrate 1, and the reflective layer 36 can be specifically a distributed Bragg reflector (DBR), which is used to reflect the light in the non-emitting light direction back to the light-emitting surface and emit it, thereby improving the light extraction efficiency of the micro-LED device.

[0137] In addition, Figure 21Another schematic diagram of the film layer structure of the micro-LED device provided by the embodiment of the present application, as Figure 21 shown, a first passivation layer 37 is provided on the side of the reflective layer 36 facing the substrate 1, and / or a second passivation layer 38 is provided on the side of the reflective layer 36 facing away from the substrate 1. Specifically, the first passivation layer 37 can be formed of a silicon dioxide material, and the second passivation layer 38 can be formed of a silicon nitride or silicon oxynitride material. The first passivation layer 37 and the second passivation layer 38 have good compactness, thereby playing a good protective role for the micro-LED device.

[0138] In one implementation Figure 22 Another top view of the micro-LED device provided by the embodiment of the present application, as Figure 8 and Figure 22 shown, the micro-LED device includes 2n sub-epitaxial layers 4 arranged in a first direction. The first region 6 includes the nth sub-epitaxial layer 4 and the (n + 1)th sub-epitaxial layer 4, where n is a positive integer greater than or equal to 1.

[0139] Based on this structure, the micro-LED device includes an even number of sub-epitaxial layers 4. The second region 5 is located at the middle position of the micro-LED device. In the die bonding process, the ejector pin structure corresponds to the middle position of the micro-LED device. When the micro-LED device is lifted by the ejector pin structure and separated from the carrier substrate, the micro-LED device can be prevented from tilting, and further damage to the micro-LED device can be avoided.

[0140] Based on the same inventive concept, the embodiment of the present application also provides a transfer method for a micro-LED device. Combining Figure 11 , Figure 23 is the flowchart of the transfer method provided by the embodiment of the present application, Figure 24 is the structural flowchart of the transfer method provided by the embodiment of the present application, as Figure 23 and Figure 24 shown, the transfer method includes:

[0141] Step S1: Provide a carrier substrate 200 carrying the above-mentioned micro-LED device 300, place the ejector pin structure 100 on the side of the carrier substrate facing away from the micro-LED device 300, and align it with the second region 5 in the micro-LED device 300. Use the ejector pin structure 100 to separate the micro-LED device 300 from the carrier substrate 200, and use the suction nozzle 400 to adsorb the micro-LED device 300. Specifically, the carrier substrate 200 can be a blue film.

[0142] Step S2: The rotating arm 500 rotates to transfer the micro-LED device 300 adsorbed by the suction nozzle 400 to the transfer substrate 600. Specifically, the transfer substrate 600 can be a printed circuit board (PCB) or a glass substrate.

[0143] Combined with the above analysis of the structure of the micro-LED device, in the embodiment of the present application, by adjusting the structure of the first sub-epitaxial layer 8 to add a part of the first extended epitaxial portion 11 at the position of the ejector pin, the trench 3 can be avoided at the ejector pin position. In the die bonding process, when the ejector pin structure 100 is placed under the carrier substrate 200 and vibrates up and down to lift the micro-LED device 300, the ejector pin structure 100 will only correspond to the flat area without trenches where the first sub-epitaxial layer 8 is located, rather than acting on the trench 3. Therefore, when the ejector pin structure vibrates, it will not generate a force on the functional film layer inside the side wall of the trench 3, thereby avoiding damage to the functional film layer on the side wall of the trench 3 by the ejector pin structure and improving the reliability of the performance of the micro-LED device.

[0144] Based on the same inventive concept, the embodiment of the present application also provides an LED backplane. Figure 25 As the structural schematic diagram of the LED backplane provided by the embodiment of the present application, as Figure 25 shown, the LED backplane includes: a substrate 700, which can specifically be a printed circuit board or a glass substrate; a plurality of the above-mentioned micro-LED devices 300 located on one side of the substrate 700. Among them, the structure of the micro-LED device 300 has been described in detail in the above embodiment and will not be elaborated here.

[0145] It should be noted that in combination with the above transfer method of the micro-LED device, the substrate 700 included in the LED backplane is the Figure 23 transfer substrate 600 shown in

[0146] Based on the same inventive concept, the embodiment of the present application also provides a display device. Figure 26 As the structural schematic diagram of the display device provided by the embodiment of the present application, Figure 27 is Figure 26 a cross-sectional view along the B1-B2 direction, as Figure 26 and Figure 27 shown, the display device includes: a display screen 800, the display screen having a light-emitting surface 801 and a non-light-emitting surface 802; the above-mentioned LED backplane 900, which is located on one side of the non-light-emitting surface 802 of the display screen 800.

[0147] Of course, Figure 26 the electronic device shown in

[0148] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of protection of the present application.

[0149] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A micro-LED device, characterized in that, Comprising: A substrate; An epitaxial layer located on one side of the substrate; At least one trench that penetrates the epitaxial layer, and the trench divides the epitaxial layer into a plurality of independent sub-epitaxial layers; The micro-LED device has a first region, the first region includes two adjacent sub-epitaxial layers and the trench between the two adjacent sub-epitaxial layers, the first region includes a second region, and the second region is the region where the positive projection of the ejector pin structure on the micro-LED device is located during the die bonding process; The two sub-epitaxial layers in the first region are respectively a first sub-epitaxial layer and a second sub-epitaxial layer. The first sub-epitaxial layer includes a first main epitaxial portion and a first extended epitaxial portion. The first extended epitaxial portion protrudes from the first main epitaxial portion along a first direction. The first direction is parallel to the plane where the substrate is located and is the direction from the first sub-epitaxial layer to the second sub-epitaxial layer; and, the distance between two intersection points where the positive projection of the first sub-epitaxial layer on the substrate intersects a first connection line is greater than the distance between two intersection points where the positive projection of the second sub-epitaxial layer on the substrate intersects the first connection line. The first connection line is parallel to the first direction and penetrates the second region; The second region overlaps with the region where the first extended epitaxial portion is located and does not overlap with the region where the trench is located.

2. The micro-LED device according to claim 1, wherein The second sub-epitaxial layer has a first notch recessed along the first direction, and the first extended epitaxial portion and the first notch are arranged along the first direction.

3. The micro-LED device according to claim 2, wherein The edge of the first extended epitaxial portion and the edge of the first notch respectively extend along the edge of the second region.

4. The micro-LED device according to claim 1, wherein The first main epitaxial portion has a second notch recessed along a second direction. The second direction is parallel to the plane where the substrate is located and is the direction from the second sub-epitaxial layer to the first sub-epitaxial layer.

5. The micro-LED device according to claim 4, wherein The second notch includes a plurality of second sub-notches. The plurality of second sub-notches are respectively located on both sides of the first extended epitaxial portion, and the area of the positive projection of each second sub-notch on the substrate is smaller than the area of the positive projection of the first extended epitaxial portion on the substrate.

6. The micro-LED device according to claim 2, wherein The second sub-epitaxial layer includes a second main epitaxial portion and a second extended epitaxial portion. The first notch is located in the second main epitaxial portion. The second extended epitaxial portion protrudes from the second main epitaxial portion along a second direction. The second direction is parallel to the plane where the substrate is located and is the direction from the second sub-epitaxial layer to the first sub-epitaxial layer.

7. The micro-LED device according to claim 6, wherein The second outward extension portion includes a plurality of second sub-outward extension portions, the plurality of second sub-outward extension portions are respectively located on both sides of the first notch, and the area of the positive projection of each second sub-outward extension portion on the substrate is smaller than the area of the positive projection of the first notch on the substrate.

8. The micro-LED device according to claim 1, wherein There is a gap between the edge of the second region and the edge of the first outward extension portion.

9. The micro-LED device according to claim 1, wherein The dimension of the first outward extension portion in the third direction is equal to the dimension of the first main extension portion in the third direction, the third direction is parallel to the plane where the substrate is located, and is perpendicular to the arrangement direction of the first sub-extension layer and the second sub-extension layer; The trench between the first sub-extension layer and the second sub-extension layer extends along the third direction.

10. The micro-LED device according to claim 1, wherein The extension layer includes an n-type semiconductor, a light-emitting layer located on the side of the n-type semiconductor facing away from the substrate, and a p-type semiconductor located on the side of the light-emitting layer facing away from the substrate; The micro-LED device includes m sub-extension layers. Among them, the n-type semiconductor in the i-th sub-extension layer is electrically connected to the p-type semiconductor in the (i + 1)-th sub-extension layer through a connection trace, the p-type semiconductor in the first sub-extension layer is electrically connected to the first electrode, and the n-type semiconductor in the m-th sub-extension layer is electrically connected to the second electrode. i is a positive integer greater than or equal to 1, m is a positive integer greater than or equal to 2, and i < m.

11. The micro-LED device according to claim 10, wherein The trench includes a first trench portion and a second trench portion that are connected. The first trench portion penetrates through the p-type semiconductor and the light-emitting layer, and the second trench portion penetrates through the p-type semiconductor, the light-emitting layer, and the n-type semiconductor; The first end of the connection trace is electrically connected to the n-type semiconductor in the i-th sub-extension layer that is not penetrated by the first trench portion, and the second end of the connection trace is electrically connected to the p-type semiconductor in the (i + 1)-th sub-extension layer.

12. The micro-LED device according to claim 11, wherein, The micro-LED device further includes: A current blocking layer located on the side of the p-type semiconductor facing away from the substrate; A conductive contact layer located on the side of the current blocking layer facing away from the substrate. In the direction perpendicular to the plane where the substrate is located, the conductive contact layer covers the p-type semiconductor; A first connection portion located on the side of the conductive contact layer in the first sub-extension layer facing away from the substrate and electrically connected to the conductive contact layer, and the first electrode is located on the side of the first connection portion facing away from the substrate and electrically connected to the first connection portion; A second connection portion located on the side of the n-type semiconductor in the m-th sub-extension layer facing away from the substrate and electrically connected to the n-type semiconductor, and the second electrode is located on the side of the second connection portion facing away from the substrate and electrically connected to the second connection portion; An inorganic protective layer, located at the bottom and side walls of the trench, and the connecting trace is located on a side of the inorganic protective layer facing away from the substrate; An atomic layer deposition layer, located on a side of the conductive contact layer and the inorganic protective layer facing away from the substrate; A reflective layer, located on a side of the atomic layer deposition layer facing away from the substrate.

13. The micro-LED device according to claim 1, wherein, The micro-LED device includes 2n sub-epitaxial layers arranged along the first direction, and the first region includes the nth sub-epitaxial layer and the (n + 1)th sub-epitaxial layer, where n is a positive integer greater than or equal to 1.

14. A transfer method of a micro-LED device, characterized in that, Comprising: Providing a carrier substrate carrying the micro-LED device as described in any one of claims 1 to 13, placing a thimble structure on a side of the carrier substrate facing away from the micro-LED device, and aligning the thimble structure with a second region in the micro-LED device, separating the micro-LED device from the carrier substrate by using the thimble structure, and adsorbing the micro-LED device by using a suction nozzle; Rotating the rotating arm to transfer the micro-LED device adsorbed by the suction nozzle to a transfer substrate.

15. An LED backplane, characterized in that, Comprising: A substrate; A plurality of micro-LED devices as described in any one of claims 1 to 13 located on one side of the substrate.

16. A display device, characterized in that, Comprising: A display screen, having a light-emitting surface and a non-light-emitting surface; The LED backplane as described in claim 15, and the LED backplane is located on a side of the non-light-emitting surface of the display screen.

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