A Key Generation Method and System Based on RO PUF

Abstract

A key generation method based on RO PUF is provided, wherein the RO PUF includes N ring oscillators. The method includes: step 20): randomly generating a challenge for selecting a first ring oscillator and a second ring oscillator, and determining that the absolute value of the difference between the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within a first time length is greater than a first threshold; step 30): using the challenge to repeatedly count the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within a first time length for a first predetermined number of times, and performing a comparison for a first predetermined number of times to determine whether the comparison results of the first predetermined number of times are the same; and step 40): when the comparison results of the first predetermined number of times are all the same, outputting the challenge and the corresponding comparison results.

Description

Technical Field

[0001] This invention relates to the fields of digital integrated circuit design and information security, and in particular to a key generation method and system based on RO PUF. Background Technology

[0002] A Physically Unclonable Function (PUF) is a function that, when given an input stimulus, outputs an unpredictable response due to unavoidable random process variations during chip manufacturing. PUFs rely on irreversible errors in chip manufacturing, utilizing the randomness and uniqueness of these errors to extract them as chip characteristics. The unique correspondence between the stimulus and response signals forms a "chip fingerprint," similar to a human fingerprint. The concept of PUFs has greatly enriched the application scenarios and security of traditional cryptography.

[0003] Currently, the most widely used are integrable electronic PUFs, such as: SRAM-based physically unclonable functions (SRAM PUF), ring oscillator (RO)-based physically unclonable functions (RO PUF), arbitration-based physically unclonable functions (Arbiter PUF), and SR latch-based physically unclonable functions (SR PUF). Among these, the RO PUF has a simple circuit structure and is easy to implement on FPGA and ASIC platforms. Due to the deviation in the internal wiring delay of each ring oscillator, each ring oscillator generates a different frequency. By randomly selecting two ring oscillators and comparing their frequencies, a chip-specific response can be generated, and further, a chip-specific key can be generated. During key generation, whether for encryption or decryption, incorrect bit flips in the key will affect the key's stability. Therefore, it is necessary to reduce the incorrect flips of response bits in the key generated by the RO PUF to ensure its reliability.

[0004] The reliability of RO PUFs is susceptible to temperature and component aging, leading to erroneous response bits. Traditional error correction methods generally include Hamming codes and BCH codes. Hamming codes require additional bits to store parity bits and cannot correct data errors greater than 2 bits. BCH codes offer stronger error correction capabilities, but require adding excessive redundant bits to the generated response bits, increasing hardware overhead during ciphertext storage. For the same number of response bits, a higher bit error rate means greater hardware overhead during error correction; therefore, a method is needed to address response bit errors with minimal hardware overhead. Summary of the Invention

[0005] To address the aforementioned problems in existing technologies, this invention proposes a key generation method based on ROPUF, wherein ROPUF comprises N ring oscillators, where N is an integer greater than 2, and the method includes:

[0006] Step 20): Randomly generate a challenge for selecting the first and second ring oscillators, determining that the absolute value of the difference between the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within the first time length is greater than a first threshold, where N = 2. M / 2 M is the total number of bits used in the challenge to select the first and second ring oscillators;

[0007] Step 30): Using the challenge, repeatedly count the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within the first time length according to a first predetermined number of times, and perform a comparison of the first predetermined number of times to determine whether the comparison results of the first predetermined number of times are the same; and

[0008] Step 40): If the comparison results of the first predetermined number of times are all the same, output the challenge and the corresponding comparison results.

[0009] In one embodiment, step 20) further includes:

[0010] Step 210): The challenge is used to activate the first ring oscillator and the second ring oscillator. Based on the counted number of oscillations of the first ring oscillator and the second ring oscillator within the first time length, it is determined whether the absolute value of the difference is greater than a first threshold.

[0011] Step 220): If the absolute value of the difference is less than or equal to the first threshold, then repeat step 20.

[0012] In one embodiment, the step 20) is preceded by:

[0013] Step 10): Obtain an oscillation count table including the number of oscillations of each ring oscillator within the first time length;

[0014] Step 20) further includes:

[0015] Step 210): Based on the oscillation count table, determine whether the absolute value of the difference is greater than the first threshold.

[0016] Step 220): If the absolute value of the difference is less than or equal to the first threshold, then repeat step 20.

[0017] In one embodiment, step 30) includes:

[0018] Step 310): Repeatedly count the number of oscillations of the first ring oscillator within the first time length and the number of oscillations of the second ring oscillator within the first time length, and perform a comparison of a second predetermined number of times;

[0019] Step 320): If the comparison results of the second predetermined number of times are all the same, output the corresponding comparison results and store them;

[0020] Step 330): If the comparison results of the second predetermined number of times are not completely the same, return to step 20);

[0021] Step 340): Repeat steps 310) to 330) until the number of repetitions reaches the value of the first predetermined number of times / the second predetermined number of times.

[0022] In one embodiment, the method further includes:

[0023] Step 50): Repeat steps 20) to 40) until the number of repetitions reaches the third threshold.

[0024] In one embodiment, step 10) includes:

[0025] Activate the ring oscillators sequentially, iterate through all the ring oscillators, measure the number of oscillations of each ring oscillator within the first time length, and record it in the oscillation count table.

[0026] In one embodiment, the challenge includes a first part and a second part, wherein the first part is converted into an N-bit one-hot code and input to the enable pins of N ring oscillators to activate the first ring oscillator.

[0027] The second part is converted into an N-bit one-hot code and input to the enable terminals of N ring oscillators to activate the second ring oscillator.

[0028] In one embodiment, the first portion has the same number of bits as the second portion.

[0029] In one embodiment, the first threshold is greater than 5.

[0030] The present invention also provides a key generation system based on RO PUF, the system comprising:

[0031] The RO PUF circuit includes N ring oscillators;

[0032] A memory for storing the comparison results generated by the RO PUF circuit; and a processor configured to implement the steps of the RO PUF-based key generation method described above.

[0033] The key generation method and system based on RO PUF of the present invention can improve the stability of RO PUF response bits and reduce the key error rate with minimal hardware overhead, avoiding response bit inversion errors. The method tests the oscillation counts of all ring oscillators within a first time length and generates an oscillation count table. Based on the oscillation count table, two ring oscillators with an oscillation count difference greater than a first threshold are selected. The results are then compared multiple times using a comparator, and the response bit results are output. This ensures that the response bits output by the comparator for the two selected ring oscillators are a stable 1 or 0, thus reducing the bit error rate to 0. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the RO PUF circuit structure according to an embodiment of the present invention.

[0035] Figure 2 A flowchart of a key generation method based on RO PUF according to an embodiment of the present invention is shown.

[0036] Figure 3 A flowchart of a key generation method based on RO PUF according to another embodiment of the present invention is shown. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments given in this invention are for illustrative purposes only and do not limit the scope of protection of this invention.

[0038] Figure 1 This is a schematic diagram of a RO PUF circuit structure according to an embodiment of the present invention. The RO PUF circuit structure includes N (N is an integer greater than 2) ring oscillators RO1, RO2, ... RON, a data selector MUX, a counter CNT1, a counter CNT2, and a comparator CMP.

[0039] N ring oscillators RO1, RO2, ... RON have the same structure. Each ring oscillator includes a NAND gate and an even number of inverters connected in series. Ring oscillator RO1 includes a NAND gate 101 and an inverter group 201, which includes an even number of inverters connected in series. NAND gate 101 includes a first input IN1 for receiving the enable signal EN1, a second input IN2 for receiving data from the output OUT of inverter group 201, and an output OUT for outputting the calculation result. Inverter group 201 includes an input IN for receiving data from the output OUT of NAND gate 101, and an output OUT for outputting the calculation result. When the enable signal EN1 is 1 (i.e., logic high level), ring oscillator RO1 starts working and outputs an oscillation wave; when the enable signal EN1 is 0 (i.e., logic low level), ring oscillator RO1 does not work. The structure and operation of ring oscillators RO2...RON are the same as those of ring oscillator RO1, and will not be described again here. Figure 1 The circuit structure of the ring oscillator shown is for illustrative purposes only. Other ring oscillator structures can be used in practical applications, as long as the ring oscillator can be activated and deactivated by an enable signal. For example, a ring oscillator can consist of only an odd number of series-connected NOT gates. The ring oscillator and its functionality can be implemented, for example, using a hardware description language, such as a lookup table on an FPGA.

[0040] The N-bit enable signals EN1-ENN constitute the activation signal of the RO PUF circuit. The activation signal is an N-bit one-hot code, with only one bit set to 1 and the rest to 0. This means that only one ring oscillator is activated and outputs an oscillation wave at any given time. Typically, the processor randomly generates an M-bit binary code challenge (also called an excitation). This M-bit challenge is divided into two parts: a first part in the high-order segment and a second part in the low-order segment. The first and second parts are equal in length, both being M / 2 bits. Both parts can be converted into N-bit one-hot codes as activation signals to activate one ring oscillator. In another embodiment, two M / 2-bit binary code challenges can also be generated (i.e., two challenges, each M / 2 bits). Both challenges can be converted into N-bit one-hot codes as activation signals to activate one ring oscillator. Here, M and N satisfy the equation: N = 2^N. M / 2 M is an even number greater than or equal to 4.

[0041] The data selector MUX is used to select the active ring oscillator from N ring oscillators based on the first or second part of an M-bit challenge and output an oscillation wave. The data selector MUX includes N input terminals IN1, IN2, ..., INN for receiving the output data of the N ring oscillators RO1, RO2, ..., RON; an address terminal A for receiving the first or second part of the challenge; and a first output terminal OUT1 and a second output terminal OUT2 for outputting the oscillation wave. When the first part of the M-bit challenge is converted into an N-bit one-hot code and used as an activation signal, the selected ring oscillator starts working and outputs an oscillation wave. Simultaneously, the first part is input to address terminal A of the data selector MUX, at which point the data selector MUX outputs the oscillation wave of the selected ring oscillator to the first output terminal OUT1. When the second part of the M-bit challenge is converted into an N-bit one-hot code and used as an activation signal, the selected ring oscillator starts working and outputs an oscillation wave. Simultaneously, the second part is input to address terminal A of the data selector MUX, at which point the data selector MUX outputs the oscillation wave of the selected ring oscillator to the second output terminal OUT2.

[0042] According to another embodiment of the present invention, the data selector MUX may also include two data selectors, namely a first data selector and a second data selector. The first data selector is used to select an activated ring oscillator from N ring oscillators based on a first part of the M-bit challenge and output the oscillation wave to a first output terminal OUT1. The second data selector is used to select an activated ring oscillator from N ring oscillators based on a second part of the M-bit challenge and output the oscillation wave to a second output terminal OUT2. The data selector MUX and its functions can be implemented, for example, through a hardware description language.

[0043] Counters CNT1 and CNT2 are used to record and output the number of rising edges over a period of time. For clarity, this number of rising edges over a period of time is referred to as the "oscillation count" in this invention, and the ratio of the oscillation count to time is the frequency. Counter CNT1 includes an input terminal IN for receiving data from the first output terminal OUT1 of the data selector MUX, and an output terminal OUT for outputting the counting result. Counter CNT2 includes an input terminal IN for receiving data from the second output terminal OUT2 of the data selector MUX, and an output terminal OUT for outputting the counting result. Counters CNT1 and CNT2 and their functions can be implemented, for example, using a hardware description language.

[0044] The comparator CMP includes a first input IN1 for receiving the number of oscillations D1 from the output OUT of counter CNT1, a second input IN2 for receiving the number of oscillations D2 from the output OUT of counter CNT2, and an output OUT for outputting the comparison result (i.e., the response). The output response is 1 when the number of oscillations D1 > the number of oscillations D2, and 0 when the number of oscillations D1 < the number of oscillations D2. Of course, for those skilled in the art, the output result can also be the opposite: 0 when the number of oscillations D1 > the number of oscillations D2, and 1 when the number of oscillations D1 < the number of oscillations D2. The comparator CMP and its functionality can be implemented, for example, using a hardware description language.

[0045] Because the inverter, the basic component of a ring oscillator, is susceptible to environmental factors (such as temperature) and device aging, the ring oscillator's frequency is prone to fluctuations, leading to erroneous responses and ultimately reducing the reliability of the RO PUF. Experiments revealed that within the same time period, when the oscillation frequencies D1 and D2 are close (e.g., the difference is less than 5), the response exhibits both 0 and 1 states, with repeated jumps, easily resulting in bit errors. Within the same time period, when the difference between D1 and D2 is greater than 5, the frequency of these jumps decreases rapidly. Furthermore, within the same time period, when the difference between D1 and D2 is greater than 10, jumps are almost nonexistent, and the response is more stable. Therefore, within the same time period, the larger the difference between D1 and D2, the more stable the response.

[0046] This invention proposes a key generation method based on RO PUF. This method selects two ring oscillators with significantly different oscillation frequencies (within the same time period) and generates a stable response by repeatedly outputting responses through a comparator. For ease of understanding, the method is described in detail below using N=256 and M=16 as an example. Those skilled in the art should understand that the values ​​of M and N can be chosen in various ways.

[0047] Figure 2 A key generation method based on RO PUF according to an embodiment of the present invention is shown, the method comprising the following steps.

[0048] Step S201: Measure the number of rising edges of each ring oscillator within the first time length and record it in the oscillation count table.

[0049] The first time length can be, for example, 1000 clock cycles.

[0050] In this embodiment, there are 256 ring oscillators, and the challenge is a 16-bit binary code. First, 8-bit binary codes are generated sequentially as the first part of the challenge (i.e., the high 8 bits) of the input. Each input of the high 8 bits of the challenge is converted into a 256-bit one-hot code as an activation signal. This activation signal assigns a value to the enable terminal of each of the 256 ring oscillators. Since only one bit of the one-hot code is 1, the enable signal of the selected ring oscillator is 1, and the enable signals of the other ring oscillators are 0. At this time, the selected ring oscillator is activated and outputs an oscillation wave.

[0051] Simultaneously, the first part of the challenge (i.e., the high 8 bits) is input to address A of the data selector MUX, causing the data selector MUX to output the oscillation wave of the selected ring oscillator to the first output terminal OUT1. Counter CNT1 receives this oscillation wave and counts the rising edges of the oscillation wave within a first time length, outputting the number of oscillations. Due to the deviation in the internal wiring delay of each ring oscillator, the frequency of the oscillation wave generated by each ring oscillator is different, meaning the number of oscillations of each ring oscillator within the first time length is not the same. The first 16-bit challenge is generated sequentially to sequentially activate the ring oscillators. All ring oscillators are traversed, and the number of oscillations of each ring oscillator within the first time length is measured and recorded in the oscillation count table. Table 1 shows the number of oscillations of the 256 ring oscillators within the first time length.

[0052] Table 1

[0053]

[0054]

[0055] Step S202: Randomly generate a 16-bit challenge to select the first and second ring oscillators. The first part of the challenge (i.e., the high 8 bits) is converted into a 256-bit one-hot code to select the first ring oscillator; the second part of the challenge (i.e., the low 8 bits) is converted into a 256-bit one-hot code to select the second ring oscillator.

[0056] Step S203: Based on the oscillation count table (i.e., Table 1), determine whether the difference between the oscillation count D1 of the first ring oscillator and the oscillation count D2 of the second ring oscillator is greater than the first threshold. If yes, continue to step S204; otherwise, return to step S202, regenerate the 16-bit challenge, and reselect the two ring oscillators.

[0057] The difference between the number of oscillations D1 and the number of oscillations D2 is an absolute value, and the first threshold can be, for example, 50, 40, 30, 20, 10, or 5. Preferably, the first threshold is greater than 5.

[0058] Next, using the challenge, the number of oscillations D1 of the first ring oscillator and the number of oscillations D2 of the second ring oscillator within the first time length are repeatedly counted a first predetermined number of times, and multiple comparisons are performed. If the comparison results of the first predetermined number of times are not completely identical, the process returns to step S202, a new 16-bit challenge is generated, and two ring oscillators are selected again. According to an embodiment of the present invention, this multiple comparison can be implemented through steps S204-S208.

[0059] Step S204: Repeatedly count the number of oscillations of the two ring oscillators and perform a comparison of the second predetermined number of times. The second predetermined number of times can be, for example, ten times, twenty times, thirty times, etc. For ease of explanation, ten times will be used as an example for detailed explanation below.

[0060] During the response generation phase, firstly, the first part of the challenge (the high 8 bits) is converted into a 256-bit one-hot code to activate the first ring oscillator. Simultaneously, the first part of the challenge (the high 8 bits) is input to address A of the data selector MUX, causing the data selector MUX to output the oscillation wave of the selected first ring oscillator to its first output terminal OUT1. Counter CNT1 receives this oscillation wave and counts the rising edges of the oscillation wave within a first time length, outputting the oscillation count D1. Then, the second part of the challenge (the low 8 bits) is converted into a 256-bit one-hot code to activate the second ring oscillator. Simultaneously, the second part of the challenge (the low 8 bits) is input to address A of the data selector MUX, causing the data selector MUX to output the oscillation wave of the selected second ring oscillator to its second output terminal OUT2. Counter CNT2 receives this oscillation wave and counts the rising edges of the oscillation wave within a first time length, outputting the oscillation count D2.

[0061] First comparison: In the first time period, the oscillation waves output by the first ring oscillator are counted within the first time length to obtain the oscillation number D1; in the second time period, the oscillation waves output by the second ring oscillator are counted within the first time length to obtain the oscillation number D2; the magnitudes of the oscillation number D1 and the oscillation number D2 are compared.

[0062] Second comparison: In the third time period, the oscillation waves output by the first ring oscillator are counted within the first time period to obtain the number of oscillations D1; ​​in the fourth time period, the oscillation waves output by the second ring oscillator are counted within the first time period to obtain the number of oscillations D2, and the magnitudes of the number of oscillations D1 and D2 are compared; and so on, for ten comparisons.

[0063] Step S205: Determine if the results of the ten comparisons are the same. If all ten comparisons result in oscillation count D1 > oscillation count D2, or all ten comparisons result in oscillation count D1 < oscillation count D2, i.e., the results of the ten comparisons are the same, then proceed to step S206. If the results of the ten comparisons are not completely the same, return to step S202, regenerate the 16-bit challenge, and reselect two ring oscillators.

[0064] Step S206: Output the response and store it, and increase the repetition count by 1.

[0065] If all ten comparisons result in oscillation count D1 > oscillation count D2, the response is 1; if all ten comparisons result in oscillation count D1 < oscillation count D2, the response is 0. Preferably, the response can be stored in a data buffer FIFO.

[0066] Step S207: Determine whether the number of repetitions has reached the second threshold. If so, proceed to step S208, output a response, and increment the challenge count by 1; otherwise, continue to step S204 to continue the comparison. The second threshold is calculated as: first predetermined number of repetitions / second predetermined number of repetitions. For example, the second threshold could be 12800. In this case, the first predetermined number of repetitions is 128000, and each output response undergoes 128000 comparisons.

[0067] Step S209: Determine if the number of challenges has reached the third threshold. If so, proceed to step S210, outputting the challenge and its corresponding response, which are then stored as the key for the device. Otherwise, continue to step S202 to regenerate the challenge. The third threshold is a user-defined value, such as 128. In this case, 128 responses will be generated, i.e., 128 challenge-response pairs. Table 2 shows some of the output results, where the challenges and responses correspond, and the key can be used to encrypt and decrypt the chip.

[0068] Table 2

[0069]

[0070]

[0071] The steps S201-S210 described above are merely examples. Those skilled in the art can change the order of steps S201-S210 as needed, or omit certain steps. Figure 3 A flowchart of a key generation method based on ROPUF according to another embodiment of the present invention is shown, in which step S201 is omitted.

[0072] Step S302: Randomly generate a 16-bit challenge. The first part of the 16-bit challenge is used to activate the first ring oscillator, and the second part of the 16-bit challenge is used to activate the second ring oscillator.

[0073] Step S303: Based on the counted oscillation counts of the first ring oscillator and the second ring oscillator within the first time length, determine whether the absolute value of the difference between the counts of the first ring oscillator and the second ring oscillator within the first time length is greater than a first threshold. If the absolute value of the difference is greater than the first threshold, proceed to step S304; if the absolute value of the difference is less than or equal to the first threshold, return to step S302.

[0074] Steps S304-S310 are the same as steps S204-S210, and will not be repeated here.

[0075] The present invention also provides a key generation system based on ROPUF, the system comprising a ROPUF circuit, a memory, and a processor. The memory is used to store the response generated by the ROPUF circuit, and the processor is configured to implement the steps of the above-described ROPUF-based key generation method.

[0076] The present invention also provides a computer-readable storage medium having a computer program thereon, the computer program being executable by a processor to implement the steps of the above-described RO PUF-based key generation method.

[0077] The present invention also provides an electronic device comprising: one or more processors; and a memory for storing one or more executable instructions; wherein the one or more processors are configured to implement the steps of the above-described RO PUF-based key generation method by executing the one or more executable instructions.

[0078] The key generation method and system based on RO PUF of the present invention can improve the stability of RO PUF response bits and reduce the key error rate with minimal hardware overhead, avoiding response bit inversion errors. The method tests the oscillation counts of all ring oscillators within a first time length and generates an oscillation count table. Based on the oscillation count table, two ring oscillators with an oscillation count difference greater than a first threshold are selected. The results are then compared multiple times using a comparator, and the response bit results are output. This ensures that the response bits output by the comparator for the two selected ring oscillators are a stable 1 or 0, thus reducing the bit error rate to 0.

[0079] The key generation method based on RO PUF of this invention avoids the use of error correction coding such as Hamming codes and BCH codes, avoids adding too many redundant bits, and reduces the storage bit width of the ciphertext, thereby reducing hardware overhead and power consumption. At the same time, this method reduces the key error rate with minimal hardware overhead and solves the problem of response bit error inversion, thus maximizing key stability.

[0080] While the present invention has been described through preferred embodiments, it is not limited to the embodiments described herein, and various changes and modifications are made without departing from the scope of the invention.

Claims

1. A key generation method based on RO PUF, wherein the RO PUF comprises N ring oscillators, where N is an integer greater than 2, the method comprising: Step 20): Randomly generate a challenge for selecting a first and a second ring oscillator, determining that the absolute value of the difference between the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within a first time length is greater than a first threshold, wherein... M is the total number of bits used in the challenge to select the first and second ring oscillators, where the first threshold is an integer greater than 5; Step 30): Using the challenge, repeatedly count the number of oscillations of the first ring oscillator and the number of oscillations of the second ring oscillator within the first time length according to the first predetermined number of times, and perform a comparison of the first predetermined number of times to determine whether the comparison results of the first predetermined number of times are the same; as well as Step 40): If the comparison results of the first predetermined number of times are the same, output the challenge and the corresponding comparison results as the key.

2. The key generation method based on RO PUF according to claim 1, wherein, Step 20) further includes: Step 210): The challenge is used to activate the first ring oscillator and the second ring oscillator, and based on the counted number of oscillations of the first ring oscillator and the second ring oscillator within the first time length, it is determined whether the absolute value of the difference is greater than a first threshold. Step 220): If the absolute value of the difference is less than or equal to the first threshold, then repeat step 20.

3. The key generation method based on RO PUF according to claim 1, wherein, The steps preceding step 20) also include: Step 10): Obtain an oscillation count table including the number of oscillations of each ring oscillator within the first time length; Step 20) further includes: Step 210): According to the oscillation count table, determine whether the absolute value of the difference is greater than the first threshold; Step 220): If the absolute value of the difference is less than or equal to the first threshold, then repeat step 20).

4. The key generation method based on RO PUF according to claim 1, wherein, Step 30) includes: Step 310): Repeatedly count the number of oscillations of the first ring oscillator within the first time length and the number of oscillations of the second ring oscillator within the first time length, and perform a second predetermined number of comparisons; Step 320): If the comparison results of the second predetermined number of times are all the same, output the corresponding comparison results and store them; Step 330): If the comparison results of the second predetermined number of times are not completely the same, return to step 20). Step 340): Repeat steps 310-330 until the number of repetitions reaches the value of the first predetermined number of times / the second predetermined number of times.

5. The key generation method based on RO PUF according to claim 1, wherein, The method further includes: Step 50): Repeat steps 20-40) until the number of repetitions reaches the third threshold.

6. The key generation method based on RO PUF according to claim 3, wherein, Step 10) includes: Activate the ring oscillators sequentially, iterate through all the ring oscillators, measure the number of oscillations of each ring oscillator within the first time length, and record it in the oscillation count table.

7. The key generation method based on RO PUF according to claim 1, wherein, The challenge comprises a first part and a second part. The first part is converted into an N-bit one-hot code and input to the enable pins of N ring oscillators to activate the first ring oscillator. The second part is converted into an N-bit one-hot code and input to the enable terminals of N ring oscillators to activate the second ring oscillator.

8. The key generation method based on RO PUF according to claim 7, wherein, The first part has the same number of bits as the second part.

9. The key generation method based on RO PUF according to any one of claims 1-8, wherein, The first threshold is greater than 5.

10. A key generation system based on RO PUF, the system comprising: The RO PUF circuit includes N ring oscillators; A memory for storing the comparison results generated by the RO PUF circuit; as well as A processor configured to implement the steps of the key generation method based on RO PUF as described in any one of claims 1-9.

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